A high-resolution wafer detection method and system based on TDI technology

Abstract

This invention provides a high-resolution wafer inspection method and system based on TDI technology. The method constructs a raw inspection dataset with a unified temporal relationship by collecting scanning speed data, stage displacement data, TDI integral-level response data, and multi-channel optical inspection data during the wafer scanning process. It models the temporal offset characteristics of the integral-level response, calculates the temporal consistency compensation coefficient, and achieves spatial alignment and intensity redistribution of multiple integral-level responses. Based on the compensated data, it calculates the pixel offset between integral levels and establishes structural continuity constraints, performs sub-pixel-level fusion reconstruction processing, and obtains a high-resolution wafer surface image. It constructs a background response benchmark through local statistical modeling, extracts abnormal regions, and performs enhancement processing. It combines multi-dimensional feature parameters to construct a comprehensive defect risk index, achieving defect identification and classification, and performs spatial coordinate mapping and distribution reconstruction of defect regions to output wafer defect distribution results.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing and inspection technology, and specifically to a high-resolution wafer inspection method and system based on TDI technology. Background Technology

[0002] As semiconductor manufacturing processes continue to advance towards higher integration and micro / nano scales, the size of defects on wafer surfaces is gradually decreasing and their morphology becoming more complex, placing higher demands on inspection accuracy and efficiency. Wafer inspection, as a crucial step in the semiconductor manufacturing process, directly impacts product yield and the precision of subsequent process control.

[0003] Current wafer inspection technologies primarily employ area array imaging or linear array scanning imaging to acquire wafer surface images. Among these, linear array imaging, based on Time Delay Integration (TDI) technology, can perform multi-level integration of signals during continuous wafer scanning, effectively improving the imaging signal-to-noise ratio and offering certain advantages in high-speed inspection scenarios. However, in practical applications, factors such as wafer scanning speed fluctuations, stage motion errors, and asynchronous multi-level integration responses can easily lead to temporal shifts and spatial misalignments between integration-level responses, thereby reducing image clarity and detail reproduction capabilities.

[0004] On the other hand, wafer surfaces typically contain complex process patterns and background textures, with significant differences in grayscale distribution between different regions. Traditional detection methods based on global thresholds or simple statistical features struggle to effectively distinguish between real defects and background interference, easily leading to false positives or false negatives. Furthermore, existing defect assessment methods often rely on single features or simple rules for judgment, failing to comprehensively reflect the multidimensional characteristics of defects, resulting in insufficient stability and reliability of detection results.

[0005] Therefore, how to achieve effective compensation and high-resolution reconstruction of multi-level integral response during continuous wafer scanning, and improve the accuracy and reliability of defect detection under complex background conditions, has become a technical problem that urgently needs to be solved in the field of wafer inspection technology. Summary of the Invention

[0006] This invention provides a high-resolution wafer inspection method based on TDI technology, comprising: S10. Collect scanning speed data, stage displacement data, TDI integral level response data and multi-channel optical inspection data during the wafer inspection process, and establish the correspondence between integral level response and wafer spatial position according to a unified time reference to construct the original inspection dataset. S20. Extract the temporal offset features and integral response intensity distribution features formed by the scanning speed and displacement changes from the original detection dataset, construct the temporal offset parameter set of the integral response, calculate the temporal consistency compensation coefficient of the TDI integral response, perform integral response alignment and intensity redistribution processing, and generate compensated linear array image data. S30. Calculate the pixel offset between adjacent integration stages and the structural continuity constraint relationship between adjacent scan lines for the compensated linear array image data, perform sub-pixel position correction and cross-stage response superposition processing, and generate a high-resolution wafer surface reconstruction image. S40. Construct a local background response benchmark for the high-resolution wafer surface reconstruction image, calculate the response deviation of each pixel relative to the background benchmark, filter out abnormal areas based on the response deviation and perform local contrast enhancement processing to generate a defect candidate response map. S50. Extract area features, gray-level change features, boundary gradient features and multi-channel response difference features from the candidate response map of the defect candidate region, construct a multi-dimensional feature parameter set, calculate the comprehensive defect risk index of the candidate region, perform defect identification and classification processing, and generate a defect detection result set. S60. Perform spatial coordinate mapping and boundary parameter analysis on each defect region in the defect detection result set, and perform hierarchical labeling and spatial distribution reconstruction based on the comprehensive defect risk index to generate wafer defect distribution results and detection output data.

[0007] The high-resolution wafer inspection method based on TDI technology, as described above, involves acquiring scanning speed data, stage displacement data, TDI integral-level response data, and multi-channel optical inspection data during the wafer inspection process. A correspondence between the integral-level response and the wafer's spatial position is established according to a unified time reference to construct the original inspection dataset, including: S101. Perform time synchronization interpolation processing on the scanning speed data and the stage displacement data to generate a continuous displacement trajectory function, and discretize the displacement trajectory according to the preset spatial sampling interval. S102. Based on the discretized displacement trajectory, perform spatial remapping on the TDI integral level response data, and map each integral level response to an equally spaced wafer space coordinate system to construct the original detection dataset.

[0008] The high-resolution wafer inspection method based on TDI technology, as described above, involves extracting temporal offset features and integral-level response intensity distribution features from the original inspection dataset caused by changes in scanning speed and displacement, constructing a set of temporal offset parameters for the integral-level response, calculating the temporal consistency compensation coefficient of the TDI integral-level response, performing integral-level response alignment and intensity redistribution processing, and generating compensated linear array image data, including: S201. Calculate the displacement offset based on the displacement difference between adjacent sampling positions, and calculate the velocity disturbance based on the scanning speed change to construct a feature vector describing the temporal offset state of the integral response. S202. Calculate the timing consistency compensation coefficient based on the mapping relationship between the feature vector and the intensity distribution of the integral level response, and perform position alignment and response weighting allocation processing on each integral level response according to the compensation coefficient.

[0009] The high-resolution wafer inspection method based on TDI technology described above includes calculating the pixel offset between adjacent integration levels and the structural continuity constraint relationship between adjacent scan lines of the compensated linear array image data, performing sub-pixel position correction and cross-level response superposition processing, and generating a high-resolution wafer surface reconstruction image, including: S301. Calculate the pixel offset between adjacent integration levels through correlation matching or gradient consistency analysis, and construct the structural continuity constraint relationship between adjacent scan lines. S302. Perform sub-pixel-level position correction on the multi-level response based on the pixel offset, and perform cross-level response weighted superposition processing under structural continuity constraints to generate a high-resolution wafer surface reconstruction image.

[0010] The high-resolution wafer inspection method based on TDI technology described above includes: constructing a local background response benchmark for the reconstructed high-resolution wafer surface image; calculating the response deviation of each pixel relative to the background benchmark; filtering abnormal regions based on the response deviation; performing local contrast enhancement processing; and generating a defect candidate response map. The method includes: S401. Perform statistical analysis on pixel grayscale values ​​within the sliding window range, calculate the mean and variance of grayscale values ​​in the local area, and construct a local background response benchmark. S402. Filter out abnormal regions based on the difference between pixel grayscale values ​​and local background response benchmarks and their proportional relationship with variance, and perform local contrast enhancement processing on the abnormal regions.

[0011] The high-resolution wafer inspection method based on TDI technology described above includes extracting area features, grayscale variation features, boundary gradient features, and multi-channel response difference features from the defect candidate response map, constructing a multi-dimensional feature parameter set, calculating the comprehensive defect risk index of the candidate region, performing defect identification and classification processing, and generating a defect detection result set, including: S501. Calculate the area parameters, gray-level abrupt change, boundary gradient magnitude, and regional connectivity parameters for the candidate region, and construct the corresponding multidimensional feature vectors. S502. Normalize the multidimensional feature vectors and calculate the comprehensive defect risk index based on the weight of each feature. Then, perform defect judgment and category classification on the candidate regions according to the risk index.

[0012] The high-resolution wafer inspection method based on TDI technology described above includes performing spatial coordinate mapping and boundary parameter analysis on each defect region in the defect detection result set, and performing hierarchical labeling and spatial distribution reconstruction based on the comprehensive defect risk index to generate wafer defect distribution results and inspection output data, including: S601. Based on the wafer center coordinates and scanning trajectory parameters, the position information of the defect area is converted to a unified wafer coordinate system, and the boundary contour parameters of the defect area are extracted. S602. Classify and label each defect region according to the comprehensive defect risk index, and perform distribution reconstruction processing according to the spatial distribution of defects to generate wafer defect distribution results.

[0013] The present invention also provides a high-resolution wafer inspection system based on TDI technology, comprising: The data acquisition module is used to acquire scanning speed data, stage displacement data, TDI integral level response data and multi-channel optical inspection data during the wafer scanning process, and to construct a raw inspection dataset with time consistency. The compensation processing module is used to extract the temporal offset features from the original detection data and construct the offset parameter set of the integral response. Based on the offset parameter set, the compensation coefficient of the integral response is calculated, and alignment and intensity redistribution processing is performed on the integral response. The reconstruction processing module is used to calculate the pixel offset between integration levels based on the compensated data and establish structural continuity constraints in the scanning direction, and to perform sub-pixel correction and fusion reconstruction processing on multi-level responses. The response analysis module is used to construct a local background baseline for the image and calculate the degree of pixel response deviation. Based on the degree of response deviation, abnormal regions are extracted and enhancement processing is performed. The risk assessment module is used to extract multidimensional feature parameters of abnormal areas and calculate the risk index, and complete defect identification and classification based on the risk index; The results output module is used to perform spatial coordinate mapping and boundary parameter analysis on the defect area, and to perform hierarchical labeling and distribution construction based on the risk index, and output the wafer inspection results.

[0014] The beneficial effects achieved by this invention are as follows: By constructing a wafer inspection process based on time-delay integral imaging, this invention performs time-series consistency compensation on multi-level integral responses during continuous wafer scanning, effectively reducing response offset and spatial misalignment between integral levels and improving imaging stability. Simultaneously, it enhances the wafer surface detail resolution through cross-level fusion and sub-pixel reconstruction processing, achieving high-resolution imaging while ensuring inspection efficiency. Furthermore, by combining local background modeling and anomaly response enhancement mechanisms, it reduces the interference of complex process patterns and background textures on the inspection results. Finally, by comprehensively calculating defect risk indicators through multi-dimensional feature parameters, it improves the accuracy and stability of defect identification and classification, thereby comprehensively improving the wafer inspection accuracy, reliability, and suitability for high-speed online inspection scenarios. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0016] Figure 1 This is a flowchart of a high-resolution wafer inspection method based on TDI technology provided in Embodiment 1 of this application; Figure 2 This is a schematic diagram of a high-resolution wafer inspection system based on TDI technology provided in Embodiment 2 of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Example 1 like Figure 1 As shown, Embodiment 1 of this application provides a high-resolution wafer inspection method based on TDI technology, including the following steps: S10. Collect scanning speed data, stage displacement data, TDI integral level response data and multi-channel optical inspection data during the wafer inspection process, and establish the correspondence between integral level response and wafer spatial position according to a unified time reference to construct the original inspection dataset. Motion parameters and imaging response data during wafer scanning are collected uniformly, and various data types are synchronized and aligned using a time reference to establish a mapping relationship between the integral-level response and the wafer's spatial position, thus obtaining the original detection dataset. Specifically, the process includes the following sub-steps: S101. Perform time synchronization interpolation processing on the scanning speed data and the stage displacement data to generate a continuous displacement trajectory function, and discretize the displacement trajectory according to the preset spatial sampling interval. The scanning speed data sequence output by the motion control unit and the stage displacement data sequence collected by the position detection unit during the wafer scanning process are acquired. The above data sequences are uniformly mapped to the same time coordinate axis and rearranged according to the timestamp order.

[0019] To address the inconsistency between scanning speed data and displacement data in terms of sampling frequency and sampling time, interpolation is performed on the data corresponding to missing time points. A continuous interpolation method is used to construct a continuous function expression of displacement with respect to time, resulting in the displacement trajectory function. This displacement trajectory function is used to characterize the continuous positional change process of the wafer along the scanning direction.

[0020] After obtaining the continuous displacement trajectory function, the displacement trajectory function is sampled at equal intervals according to the preset spatial sampling interval to generate a discrete displacement sequence corresponding to a uniform spatial position distribution, where each discrete sampling point corresponds to a unique spatial coordinate value.

[0021] S102. Based on the discretized displacement trajectory, perform spatial remapping on the TDI integral level response data, and map each integral level response to an equally spaced wafer space coordinate system to construct the original detection dataset.

[0022] Obtain the integral-level response data sequence output by the TDI imaging system, where each integral-level response data is arranged in chronological order. Based on the discrete displacement sequence obtained in sub-step S101, associate and match the displacement position corresponding to each time sampling point with the integral-level response data.

[0023] Based on the correspondence between displacement position and time sampling point, spatial coordinate remapping processing is performed on the integral stage response data to convert the response data represented by time index into response data represented by spatial position index, so that each integral stage response is aligned in a unified wafer space coordinate system.

[0024] Furthermore, the integral-level response data that has undergone spatial remapping is jointly organized with the multi-channel optical detection data according to spatial location to form a structured data set containing spatial coordinate information, integral-level response information, and multi-channel response information, which serves as the original detection dataset.

[0025] S20. Extract the temporal offset features and integral response intensity distribution features formed by the scanning speed and displacement changes from the original detection dataset, construct the temporal offset parameter set of the integral response, calculate the temporal consistency compensation coefficient of the TDI integral response, perform integral response alignment and intensity redistribution processing, and generate compensated linear array image data. The information reflecting the scanning motion state and the distribution of integral-level responses in the original detection dataset is jointly analyzed to construct a set of temporal offset parameters for the integral-level responses. Based on this parameter set, the temporal consistency compensation coefficients corresponding to each integral-level response are calculated, completing the spatial alignment and intensity redistribution processing of the integral-level responses. Specifically, this includes the following sub-steps: S201. Calculate the displacement offset based on the displacement difference between adjacent sampling positions, and calculate the velocity disturbance based on the scanning speed change to construct a feature vector describing the temporal offset state of the integral response. Obtain the discrete displacement sequence, scanning velocity sequence, and response data of each integral stage from the original detection dataset, sorted by spatial location. Perform a difference operation on the displacement between adjacent sampling positions to obtain the first... Displacement offset corresponding to each spatial sampling position Perform differential and local variation analysis on the scan velocity sequence to obtain the velocity perturbation. .

[0026] Furthermore, a second-order difference operation is performed on the velocity disturbance to obtain the second-order velocity change. This is used to describe the degree of abrupt change in speed during the scanning process. and the set of response intensities of each integral level at the corresponding spatial location. A joint organization is conducted to construct an integral-level response time-series offset feature vector.

[0027] S202. Calculate the timing consistency compensation coefficient based on the mapping relationship between the feature vector and the intensity distribution of the integral level response, and perform position alignment and response weighting allocation processing on each integral level response according to the compensation coefficient.

[0028] Regarding the first At the spatial sampling location, the first Each integral-level response is used to construct the timing consistency compensation coefficient. Its calculation expression is: The components are defined as follows: (1) Basic weight item , ; (2) Constraint term for distribution difference between integral levels , ; (3) Time continuity constraint term , .

[0029] in, For the first At the spatial sampling location, the first The timing consistency compensation coefficient of each integral-level response; For spatial sampling location index; It is an integral-level index; For traversal index variables; The total number of integral levels; The length of the time window; This is the displacement offset; For velocity disturbance; This is the second-order change in velocity; The integral delay coefficient; The integral-order response strength; This is the mean of the response intensities of all integral levels at this location; To adjust the parameters; For exponential adjustment parameters; It is a very small positive number. When obtaining the timing consistency compensation coefficient... Then, spatial alignment processing is performed on each integral level response, and the compensation coefficient is used as a weighting coefficient to perform weighted allocation processing on multiple integral level responses at the same spatial sampling position to obtain compensated linear array image data.

[0030] S30. Calculate the pixel offset between adjacent integration stages and the structural continuity constraint relationship between adjacent scan lines for the compensated linear array image data, perform sub-pixel position correction and cross-stage response superposition processing, and generate a high-resolution wafer surface reconstruction image. Spatial alignment analysis and structural constraint modeling are performed on the multi-integral-level responses in the compensated linear array image data. The pixel offset relationship between integration levels is calculated, and continuity constraints are established along the scanning direction. Based on this, sub-pixel-level position correction and cross-level response fusion processing are completed. Specifically, the following sub-steps are included: S301. Calculate the pixel offset between adjacent integration levels through correlation matching or gradient consistency analysis, and construct the structural continuity constraint relationship between adjacent scan lines. The compensated linear array image data output in step S20 is acquired and organized according to spatial sampling positions and integration level indices to obtain an image response sequence arranged by integration level. For the image responses between adjacent integration levels, a local matching window is constructed in the neighborhood of the corresponding spatial position, and a similarity analysis is performed on the pixel grayscale distribution within the window.

[0031] Specifically, normalized cross-correlation calculation or a gradient direction consistency-based matching method is used to compare the pixel distributions between adjacent integration level responses, and the displacement parameter that optimizes the matching similarity is calculated as the pixel offset between adjacent integration levels. This pixel offset describes the positional differences between different integration levels during the spatial alignment process.

[0032] After calculating the pixel offset between integration stages, the image structure between adjacent scan lines is analyzed along the scanning direction. By statistically analyzing the consistency of adjacent scan lines in edge gradient distribution, grayscale variation trends, and local texture features, a structural constraint relationship describing the continuity of the scanning direction is constructed. This structural continuity constraint relationship is used to characterize the spatial continuity of the image along the scanning direction.

[0033] S302. Perform sub-pixel-level position correction on the multi-level response based on the pixel offset, and perform cross-level response weighted superposition processing under structural continuity constraints to generate a high-resolution wafer surface reconstruction image.

[0034] In this sub-step, position correction processing is performed on each integral stage response based on the pixel offset obtained in sub-step S301. For non-integer pixel offsets, a sub-pixel interpolation method is used to resample the image, so that each integral stage response is accurately aligned in spatial coordinates.

[0035] After position correction is completed, the multi-integral-level responses corresponding to the same spatial sampling position are fused. During the fusion process, the multi-level responses are weighted and superimposed based on the compensation weights of each integral-level response and the consistency of their local responses to obtain the fused pixel response value.

[0036] Simultaneously, structural continuity constraints are introduced during the fusion process to suppress abrupt or discontinuous responses along the scanning direction, ensuring spatial continuity in the fusion result. Finally, by performing the aforementioned position correction and fusion processing on all spatial sampling locations, a high-resolution reconstructed image of the wafer surface is generated.

[0037] S40. Construct a local background response benchmark for the high-resolution wafer surface reconstruction image, calculate the response deviation of each pixel relative to the background benchmark, filter out abnormal areas based on the response deviation and perform local contrast enhancement processing to generate a defect candidate response map. Local statistical modeling and response deviation analysis are performed on high-resolution reconstructed wafer surface images to construct a spatially adaptive background response benchmark. Based on this benchmark, anomalous response regions are extracted and enhanced. Specifically, the process includes the following sub-steps: S401. Perform statistical analysis on pixel grayscale values ​​within the sliding window range, calculate the mean and variance of grayscale values ​​in the local area, and construct a local background response benchmark. The high-resolution reconstructed wafer surface image generated in step S30 is obtained, and the image pixels are traversed according to spatial coordinates. A sliding window of a fixed size is constructed within the neighborhood of the current pixel, and the grayscale values ​​of all pixels within the window are statistically calculated.

[0038] Specifically, the grayscale mean and variance are calculated for the set of pixel grayscale values ​​within the sliding window. The grayscale mean characterizes the background brightness level of the current local area, and the grayscale variance characterizes the dispersion of grayscale distribution within the local area. By repeating the above statistical process for each pixel location in the image, local statistical parameters corresponding to each pixel location are obtained. Based on the above local grayscale mean and variance, a local background response benchmark corresponding to a spatial location is constructed to describe the response distribution characteristics of different regions on the wafer surface under normal conditions.

[0039] S402. Filter out abnormal regions based on the difference between pixel grayscale values ​​and local background response benchmarks and their proportional relationship with variance, and perform local contrast enhancement processing on the abnormal regions.

[0040] In this sub-step, the difference between the gray value of each pixel location and the corresponding local background response benchmark is calculated, and the degree of abnormality of the pixel response is measured by combining the ratio between the difference and the local variance.

[0041] Specifically, for the current pixel location, the difference between the pixel's grayscale value and the corresponding local grayscale mean is calculated. Based on the ratio between this difference and the local variance, the pixel is determined to be abnormal. When this ratio exceeds a preset threshold, the corresponding pixel is marked as an abnormal response point, and adjacent abnormal pixels are spatially aggregated to form an abnormal region.

[0042] After identifying the abnormal region, local contrast enhancement is performed on the pixels within that region. During enhancement, the pixel grayscale values ​​are adaptively adjusted based on the grayscale distribution characteristics of the pixels within the abnormal region, amplifying the grayscale differences and thus improving the distinguishability of the defective region in the image. After this processing, a defect candidate response map is obtained.

[0043] S50. Extract area features, gray-level change features, boundary gradient features and multi-channel response difference features from the candidate response map of the defect candidate region, construct a multi-dimensional feature parameter set, calculate the comprehensive defect risk index of the candidate region, perform defect identification and classification processing, and generate a defect detection result set. Multidimensional feature extraction and parameterized representation are performed on each candidate region in the defect candidate response map. Based on the normalized multidimensional feature parameters, a comprehensive defect risk index is constructed to complete the defect determination and category classification of the candidate regions. Specifically, this includes the following sub-steps: S501. Calculate the area parameters, gray-level abrupt change, boundary gradient magnitude, and regional connectivity parameters for the candidate region, and construct the corresponding multidimensional feature vectors. Obtain the defect candidate response map generated in step S40, mark each abnormal connected region, and define each abnormal connected region as a candidate region. For the first... For each candidate region, the number of pixels contained within that region is counted to obtain the area parameter. The difference between the grayscale values ​​of pixels within the candidate region and the corresponding local background response benchmark is statistically analyzed to obtain the grayscale abrupt change. .

[0044] Simultaneously, the pixel gradient at the boundary of the candidate region is calculated, and the boundary gradient magnitude is extracted. This is used to characterize the intensity of gray-level abrupt changes in the defect boundary region; and combined with the connectivity of pixels within the candidate region, regional connectivity parameters are extracted. It is used to characterize the continuity and integrity of the regional structure.

[0045] Furthermore, response statistics are performed on the corresponding regions of the candidate regions in the multi-channel optical response data to extract multi-channel response difference parameters. Then, the area parameters Gray-scale mutation amount Boundary gradient magnitude Regional connectivity parameters and multi-channel response difference parameters To form a joint organization and construct a structure corresponding to the first Multidimensional feature vectors of candidate regions.

[0046] S502. Normalize the multidimensional feature vectors and calculate the comprehensive defect risk index based on the weight of each feature. Then, perform defect judgment and category classification on the candidate regions according to the risk index.

[0047] Regarding the first A comprehensive defect risk index is constructed based on multiple candidate regions and multi-dimensional feature vectors. The calculation process is as follows: First, the area parameter, gray-level abrupt change, boundary gradient magnitude, regional connectivity parameter, and multi-channel response difference parameter are normalized to obtain: After normalization, an area-grayscale coupling term is constructed: Construct boundary-channel coupling terms: Construct connectivity inhibition terms: Construct discrete constraint terms for the response within the region: ,in, Indicates the first The number of pixels in each candidate region Indicates the first Within the candidate region, the first The response value of each pixel. Indicates the first The mean of the response values ​​of all pixels within each candidate region. Furthermore, a boundary morphology fluctuation constraint term is constructed: ,in, Indicates the first Number of candidate domain boundary pixels Indicates the first On the boundary of the candidate region The gradient magnitude of each boundary pixel. This represents the mean magnitude of the gradient at the boundary of the candidate region. Based on the above, a comprehensive defect risk index is constructed: ,in, For the first The comprehensive defect risk index of each candidate region; n is the candidate region index; For area parameters; This represents the grayscale mutation amount; The magnitude of the boundary gradient; For regional connectivity parameters; For multi-channel response difference parameters; These are the normalized corresponding feature parameters; To adjust the parameters; It is a very small positive number. In obtaining the comprehensive defect risk index... Then, it is compared with a preset risk threshold range. When the comprehensive defect risk index reaches the corresponding threshold condition, the candidate region is determined as a valid defect region, and the category is classified according to the risk index range and the combination of feature parameters, generating a defect detection result set.

[0048] S60. Perform spatial coordinate mapping and boundary parameter analysis on each defect region in the defect detection result set, and perform hierarchical labeling and spatial distribution reconstruction based on the comprehensive defect risk index to generate wafer defect distribution results and detection output data.

[0049] The spatial location and structural features of each defect region in the defect detection result set are represented by a unified coordinate system and their parameters are analyzed. This is then combined with the comprehensive defect risk index to complete the hierarchical labeling and spatial distribution reconstruction. Specifically, this includes the following sub-steps: S601. Based on the wafer center coordinates and scanning trajectory parameters, the position information of the defect area is converted to a unified wafer coordinate system, and the boundary contour parameters of the defect area are extracted. Obtain the defect detection result set output in step S50, where each defect region is represented by a pixel position in the image coordinate system. Combine the wafer center coordinates and scan trajectory parameters to establish the correspondence between the image coordinate system and the wafer physical coordinate system.

[0050] Specifically, based on the scanning direction, scanning start position, and spatial sampling interval, the image coordinates of each pixel within the defect area are transformed and mapped to a unified wafer coordinate system with the wafer center as the origin, thus obtaining a representation of the actual spatial position of the defect area. The wafer coordinate system can be expressed in rectangular or polar coordinate form.

[0051] After completing the spatial coordinate mapping, the boundary pixels of each defect region are extracted, and the boundary contour parameters, including boundary length, boundary curvature variation, and the range of the region's outer boundary, are calculated based on the boundary pixel sequence to describe the spatial morphological characteristics of the defect region.

[0052] S602. Classify and label each defect region according to the comprehensive defect risk index, and perform distribution reconstruction processing according to the spatial distribution of defects to generate wafer defect distribution results.

[0053] Comprehensive defect risk index for each defect area The defect area is compared with the preset risk classification range to classify the defect area and obtain the corresponding classification labeling result.

[0054] After completing the hierarchical labeling, the defect distribution is statistically analyzed and organized based on the spatial location of each defect region in the wafer coordinate system. Specifically, each defect region is classified according to its spatial location, and the density and risk level of defects in different regions are comprehensively expressed in combination with the hierarchical labeling results.

[0055] Furthermore, the defect distribution in each region of the wafer surface is reconstructed, and the spatial location, boundary morphology, and risk level information of the defect regions are integrated to form the wafer defect distribution results, and the corresponding detection result data is output.

[0056] Example 2 like Figure 2 As shown, Embodiment 2 of this application provides a high-resolution wafer inspection system based on TDI technology, comprising: The data acquisition module is used to acquire scanning speed data, stage displacement data, TDI integral-level response data, and multi-channel optical inspection data during the wafer scanning process, and to construct a raw inspection dataset with temporal consistency; specifically, it includes the following sub-modules: The time synchronization processing submodule is used to receive scanning speed data and stage displacement data, perform unified time axis alignment processing on data with different sampling frequencies and time distributions, and fill in missing sampling points through interpolation to form a continuously changing displacement trajectory data sequence. At the same time, it performs synchronous calibration on multi-source data based on timestamps, so that various types of data have consistent temporal attributes under the same time reference.

[0057] The spatial mapping construction submodule is used to perform spatial location transformation on the TDI integral response data based on the displacement trajectory data. It maps the integral response data collected in time series form to the wafer coordinate expression form indexed by spatial location, and combines it with multi-channel optical detection data for unified organization to form a raw detection dataset containing spatial location, integral response and channel response information.

[0058] The compensation processing module is used to extract temporal offset features from the original detection data and construct a set of offset parameters for the integral response. It calculates the compensation coefficients for the integral response based on the offset parameter set and performs alignment and intensity redistribution processing on the integral response. Specifically, it includes the following sub-modules: The offset feature construction submodule is used to perform differential calculations on displacement data based on spatial sampling positions to obtain displacement offset, and to perform change analysis on scan velocity data to extract velocity disturbance information. At the same time, it combines the distribution of integral response intensity to fuse and express multi-source features, and constructs a parameter set that reflects the temporal offset state of integral response.

[0059] The response compensation calculation submodule is used to evaluate the temporal consistency of the response of each integral level based on the offset feature parameter set, calculate the corresponding compensation weight coefficient, and perform position alignment and response intensity redistribution processing on the integral level response to make the response distribution of different integral levels in the same spatial location tend to be consistent, and output the compensated linear array image data.

[0060] The reconstruction processing module is used to calculate the pixel offset between integration levels based on the compensated data and establish structural continuity constraints in the scanning direction, and to perform sub-pixel correction and fusion reconstruction processing on multi-level responses; specifically, it includes the following sub-modules: The offset relationship calculation submodule is used to perform similarity matching analysis on the image responses of adjacent integral levels in the local spatial neighborhood. It calculates the optimal matching displacement by comparing gray-scale distribution or gradient information, thereby determining the pixel offset between adjacent integral levels. At the same time, it performs statistical analysis on the structural changes between adjacent scan lines and establishes structural continuity constraint relationships in the scanning direction.

[0061] The fusion reconstruction processing submodule is used to perform sub-pixel-level position correction on the multi-integral-level response based on the pixel offset, and to perform weighted fusion processing on the multi-level response by combining the compensation weight of the integral-level response and the local consistency constraint, so as to restore the continuous structural information in the spatial dimension and generate a high-resolution wafer surface reconstruction image.

[0062] The response analysis module is used to construct a local background baseline for the image and calculate the degree of pixel response deviation. Based on the degree of response deviation, it extracts abnormal regions and performs enhancement processing. Specifically, it includes the following sub-modules: The background baseline construction submodule is used to perform statistical analysis on local pixels in the image space using a sliding window method, calculate the gray-scale mean and gray-scale dispersion, and form a background response baseline corresponding to the pixel position in space to describe the response characteristics of the normal area on the wafer surface.

[0063] The abnormal region extraction submodule is used to filter abnormal pixels based on the degree of deviation between the pixel response and the background baseline, perform spatial aggregation on adjacent abnormal pixels to form candidate regions, and perform adaptive enhancement processing on the grayscale distribution within the candidate regions to improve the response contrast of the abnormal regions.

[0064] The risk assessment module is used to extract multidimensional feature parameters of abnormal areas and calculate the risk index, and to complete defect identification and classification based on the risk index; it specifically includes the following sub-modules: The feature parameter extraction submodule is used to perform structural and response feature analysis on candidate regions, extract region area information, gray-level change intensity, boundary gradient features, region connectivity, and multi-channel response difference information, and construct the corresponding multi-dimensional feature parameter set.

[0065] The risk index calculation submodule is used to normalize multi-dimensional feature parameters, calculate the comprehensive defect risk index by combining the coupling relationship between different features, determine the validity of candidate regions based on the risk index, and complete the defect category classification based on feature distribution.

[0066] The results output module is used to perform spatial coordinate mapping and boundary parameter analysis on the defect area, and to classify and label the defective area according to the risk index, constructing its distribution, and outputting the wafer inspection results. Specifically, it includes the following sub-modules: The coordinate mapping and parsing submodule is used to transform the position of the defect region in the image coordinate system to a unified coordinate system with the wafer center as the reference, and to extract and parameterize the boundary of the defect region to obtain the spatial location and morphological feature information of the defect.

[0067] The distribution reconstruction output submodule is used to classify and label defect areas according to the comprehensive defect risk index, and to reconstruct the overall structure based on the spatial distribution of defects on the wafer surface. It organizes the defect location, shape and risk level information in a unified manner to generate wafer defect distribution results and detection output data.

[0068] Corresponding to the above embodiments, the present invention provides a computer storage medium, including: at least one memory and at least one processor; The memory is used to store one or more program instructions; A processor for running one or more program instructions to execute a high-resolution wafer inspection method based on TDI technology.

[0069] Corresponding to the above embodiments, this embodiment of the invention provides a computer-readable storage medium containing one or more program instructions, which are executed by a processor to provide a high-resolution wafer inspection method based on TDI technology.

[0070] The embodiments disclosed in this invention provide a computer-readable storage medium storing computer program instructions. When the computer program instructions are executed on a computer, the computer performs the aforementioned high-resolution wafer inspection method based on TDI technology.

[0071] In this embodiment of the invention, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0072] The various methods, steps, and logic diagrams disclosed in the embodiments of this invention can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this invention can be directly implemented by a hardware decoding processor, or implemented by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The processor reads information from the storage medium and, in conjunction with its hardware, completes the steps of the above methods.

[0073] The storage medium can be memory, such as volatile memory or non-volatile memory, or may include both volatile and non-volatile memory.

[0074] Among them, non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory.

[0075] Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (Synchlink DRAM, SLDRAM), and direct memory bus RAM (DRRAM).

[0076] The storage media described in the embodiments of the present invention are intended to include, but are not limited to, these and any other suitable types of memory.

[0077] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in this invention can be implemented using a combination of hardware and software. When applied as software, the corresponding functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transmission of computer programs from one place to another. Storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0078] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made on the basis of the technical solution of the present invention should be included within the scope of protection of the present invention.

Claims

1. A high-resolution wafer inspection method based on TDI technology, characterized in that, include: S10. Collect scanning speed data, stage displacement data, TDI integral level response data and multi-channel optical inspection data during the wafer inspection process, and establish the correspondence between integral level response and wafer spatial position according to a unified time reference to construct the original inspection dataset. S20. Extract the temporal offset features and integral response intensity distribution features formed by the scanning speed and displacement changes from the original detection dataset, construct the temporal offset parameter set of the integral response, calculate the temporal consistency compensation coefficient of the TDI integral response, perform integral response alignment and intensity redistribution processing, and generate compensated linear array image data. S30. Calculate the pixel offset between adjacent integration stages and the structural continuity constraint relationship between adjacent scan lines for the compensated linear array image data, perform sub-pixel position correction and cross-stage response superposition processing, and generate a high-resolution wafer surface reconstruction image. S40. Construct a local background response benchmark for the high-resolution wafer surface reconstruction image, calculate the response deviation of each pixel relative to the background benchmark, filter out abnormal areas based on the response deviation and perform local contrast enhancement processing to generate a defect candidate response map. S50. Extract area features, gray-level change features, boundary gradient features and multi-channel response difference features from the candidate response map of the defect candidate region, construct a multi-dimensional feature parameter set, calculate the comprehensive defect risk index of the candidate region, perform defect identification and classification processing, and generate a defect detection result set. S60. Perform spatial coordinate mapping and boundary parameter analysis on each defect region in the defect detection result set, and perform hierarchical labeling and spatial distribution reconstruction based on the comprehensive defect risk index to generate wafer defect distribution results and detection output data.

2. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, The process involves collecting scanning speed data, stage displacement data, TDI integral-level response data, and multi-channel optical inspection data during wafer inspection. A correspondence between the integral-level response and the wafer's spatial position is established according to a unified time base to construct the original inspection dataset. This process includes the following sub-steps: S101. Perform time synchronization interpolation processing on the scanning speed data and the stage displacement data to generate a continuous displacement trajectory function, and discretize the displacement trajectory according to the preset spatial sampling interval. S102. Based on the discretized displacement trajectory, perform spatial remapping on the TDI integral level response data, and map each integral level response to an equally spaced wafer space coordinate system to construct the original detection dataset.

3. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, The process involves extracting temporal offset features and integral-level response intensity distribution features from the original detection dataset, constructing a set of temporal offset parameters for the integral-level response, calculating the temporal consistency compensation coefficient for the TDI integral-level response, performing integral-level response alignment and intensity redistribution processing, and generating compensated linear array image data. The specific steps include the following: S201. Calculate the displacement offset based on the displacement difference between adjacent sampling positions, and calculate the velocity disturbance based on the scanning speed change to construct a feature vector describing the temporal offset state of the integral response. S202. Calculate the timing consistency compensation coefficient based on the mapping relationship between the feature vector and the intensity distribution of the integral level response, and perform position alignment and response weighting allocation processing on each integral level response according to the compensation coefficient.

4. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, The pixel offset between adjacent integration stages and the structural continuity constraint between adjacent scan lines are calculated for the compensated linear array image data. Subpixel position correction and cross-stage response superposition processing are performed to generate a high-resolution reconstructed wafer surface image. The specific steps include the following: S301. Calculate the pixel offset between adjacent integration levels through correlation matching or gradient consistency analysis, and construct the structural continuity constraint relationship between adjacent scan lines. S302. Perform sub-pixel-level position correction on the multi-level response based on the pixel offset, and perform cross-level response weighted superposition processing under structural continuity constraints to generate a high-resolution wafer surface reconstruction image.

5. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, A local background response benchmark is constructed for the reconstructed high-resolution wafer surface image. The response deviation of each pixel relative to the background benchmark is calculated. Abnormal regions are screened based on the response deviation and local contrast enhancement processing is performed to generate a defect candidate response map. The specific steps include the following: S401. Perform statistical analysis on pixel grayscale values ​​within the sliding window range, calculate the mean and variance of grayscale values ​​in the local area, and construct a local background response benchmark. S402. Filter out abnormal regions based on the difference between pixel grayscale values ​​and local background response benchmarks and their proportional relationship with variance, and perform local contrast enhancement processing on the abnormal regions.

6. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, The process involves extracting area features, grayscale variation features, boundary gradient features, and multi-channel response difference features from the candidate response map to construct a multi-dimensional feature parameter set. The comprehensive defect risk index for the candidate region is then calculated. Defect identification and classification are performed to generate a defect detection result set. This process includes the following sub-steps: S501. Calculate the area parameters, gray-level abrupt change, boundary gradient magnitude, and regional connectivity parameters for the candidate region, and construct the corresponding multidimensional feature vectors. S502. Normalize the multidimensional feature vectors and calculate the comprehensive defect risk index based on the weight of each feature. Then, perform defect judgment and category classification on the candidate regions according to the risk index.

7. The high-resolution wafer inspection method based on TDI technology as described in claim 1, characterized in that, Spatial coordinate mapping and boundary parameter analysis are performed on each defect region in the defect detection result set. Then, based on the comprehensive defect risk index, hierarchical labeling and spatial distribution reconstruction are performed to generate wafer defect distribution results and detection output data. Specifically, this includes the following sub-steps: S601. Based on the wafer center coordinates and scanning trajectory parameters, the position information of the defect area is converted to a unified wafer coordinate system, and the boundary contour parameters of the defect area are extracted. S602. Classify and label each defect region according to the comprehensive defect risk index, and perform distribution reconstruction processing according to the spatial distribution of defects to generate wafer defect distribution results.

8. A high-resolution wafer inspection system based on TDI technology, characterized in that, include: The data acquisition module is used to acquire scanning speed data, stage displacement data, TDI integral level response data and multi-channel optical inspection data during the wafer scanning process, and to construct a raw inspection dataset with time consistency. The compensation processing module is used to extract the temporal offset features from the original detection data and construct the offset parameter set of the integral response. Based on the offset parameter set, the compensation coefficient of the integral response is calculated, and alignment and intensity redistribution processing is performed on the integral response. The reconstruction processing module is used to calculate the pixel offset between integration levels based on the compensated data and establish structural continuity constraints in the scanning direction, and to perform sub-pixel correction and fusion reconstruction processing on multi-level responses. The response analysis module is used to construct a local background baseline for the image and calculate the degree of pixel response deviation. Based on the degree of response deviation, abnormal regions are extracted and enhancement processing is performed. The risk assessment module is used to extract multidimensional feature parameters of abnormal areas and calculate the risk index, and complete defect identification and classification based on the risk index; The results output module is used to perform spatial coordinate mapping and boundary parameter analysis on the defect area, and to perform hierarchical labeling and distribution construction based on the risk index, and output the wafer inspection results.

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