Conical microporous translucent crystalline silicon photovoltaic and preparation method thereof

Abstract

This invention discloses a method for fabricating a conical microporous semi-transparent crystalline silicon photovoltaic cell, relating to the field of photovoltaic cells. The method includes the following steps: silicon wafer cleaning and preparation, photolithography to define the micropore pattern, deep reactive ion etching to prepare vertical micropores, micropore tapering treatment, diffusion doping to form a PN junction, alumina passivation layer deposition, post-annealing treatment, silicon nitride antireflection layer deposition, double-sided microgrid electrode fabrication, Low-E film deposition, and module encapsulation. This invention also discloses a conical microporous semi-transparent crystalline silicon photovoltaic cell fabricated using the above method. Through the synergistic design of the conical micropore structure and the selective Low-E film, this invention significantly expands the effective light transmission angle range of incident light without sacrificing the light absorption area, enabling the module to maintain stable light uniformity under different solar illumination angles. This significantly improves the utilization rate of the near-infrared band, reduces the air conditioning cooling load, and achieves a balance between power generation performance and building insulation function.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic cells, and more particularly to a conical microporous semi-transparent crystalline silicon photovoltaic cell and its preparation method. Background Technology

[0002] Semi-transparent photovoltaic technology mainly includes semi-transparent thin-film photovoltaics and space-segmented semi-transparent photovoltaics. Semi-transparent thin-film photovoltaics achieve light transmission by thinning the active layer or using wavelength-selective absorption materials, but they generally suffer from problems such as difficulty in simultaneously achieving high photoelectric conversion efficiency and visible light transmittance, and insufficient long-term stability. Space-segmented semi-transparent photovoltaics achieve visually neutral light transmission by constructing physical light-transmitting gaps within the cell. They have advantages such as broad material versatility and compatibility with high-efficiency crystalline silicon cells, and have received widespread attention in recent years.

[0003] In the field of spatially segmented crystalline silicon photovoltaics, patent CN118448493A discloses a transparent crystalline silicon solar cell that uses a micro-pore array structure to achieve visible light transmission and reduces surface defects through an intrinsic amorphous silicon passivation layer, effectively improving minority carrier lifetime and open-circuit voltage. However, existing spatially segmented crystalline silicon photovoltaics have the following technical bottlenecks: (1) Due to the physical structure of the micropores, the sidewalls of traditional cylindrical micropores will block light under large-angle incident light, resulting in a sharp decrease in transmittance as the incident angle increases, which makes the uniformity of light transmission of building curtain walls under different solar angles poor; the damage caused by deep reactive ion etching leads to severe carrier recombination and a decrease in open-circuit voltage; (2) Low energy utilization in the near-infrared band. To meet light transmission requirements, the microporous region allows visible light to pass through. However, a significant amount of available near-infrared energy also passes directly through the micropores. This results in a significant efficiency reduction in the battery compared to opaque batteries. Furthermore, the near-infrared energy entering the room through the micropores is directly converted into indoor heat gain, increasing the air conditioning cooling load in summer. This contradicts the building energy efficiency design goals and particularly limits its application in building-integrated photovoltaics (BIPV). Therefore, solving the problem of wide-angle light transmission and near-infrared energy management has become a pressing technical challenge in this field.

[0004] Therefore, those skilled in the art are dedicated to developing a conical microporous semi-transparent crystalline silicon photovoltaic system. This invention, through the synergistic design of a conical microporous structure and a selective Low-E film, significantly expands the effective light transmission angle range of incident light without sacrificing the light absorption area, enabling the module to maintain stable light uniformity under different sunlight angles. It also significantly improves the utilization rate of the near-infrared band by the battery, while the Low-E film effectively blocks near-infrared energy from entering the room, reducing the air conditioning cooling load and achieving a balance between power generation performance and building insulation. Summary of the Invention

[0005] In view of the above-mentioned defects of the prior art, the technical problem to be solved by the present invention is the poor uniformity of light collection and low energy utilization in the near-infrared band caused by the physical structure of traditional cylindrical micropores.

[0006] To achieve the above objectives, the present invention provides a method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell, the method comprising the following steps: Step 1: Silicon wafer cleaning and preparation. Select an N-type CZ or FZ monocrystalline silicon wafer, place the wafer in Piranha solution to clean it, remove surface organic contaminants and metal ions, then rinse it with deionized water and dry it with nitrogen. Step 2: Photolithography defines the micro-hole pattern. Photoresist is spin-coated onto the silicon wafer surface, and a photolithography process involving pre-baking, exposure, development, and post-baking is used to form a micro-hole array pattern. Step 3: Deep reactive ion etching to prepare vertical micropores. The silicon wafer with micropore pattern prepared in step 2 is placed in a deep reactive ion etching device and etched using the Bosch process. Through alternating etching and passivation cycles, an initial vertical micropore array is formed. This step forms a micropore structure with an aspect ratio of 1.5 to 2.5:1 on the silicon wafer. At the same time, it leaves a nanoscale rough morphology on the sidewall of the micropore and introduces a surface damage layer. Step 4: Micropore taperization treatment, the vertical micropores prepared in step 3 are taperized to form tapered micropores that are narrow on the outside and wide on the inside; Step 5: Diffusion doping to form a PN junction. The silicon wafer processed in step 4 is placed in a tube diffusion furnace and double-sided doping is performed using a spin-coating diffusion method. Step 6: Alumina passivation layer deposition. An Al2O3 passivation layer of 5-15 nm is deposited on the silicon wafer surface using atomic layer deposition (ALD) technology. By utilizing the conformal coverage characteristics of ALD technology, uniform coating of the sidewalls of the conical micropores is achieved. Step 7: Post-annealing; Step 8: Deposition of silicon nitride antireflection layer. A 60-70 nm SiN layer is deposited on the surface of the passivation layer using plasma-enhanced chemical vapor deposition. x The antireflection layer, together with the Al2O3 passivation layer prepared in step 6, forms a bilayer antireflection system to further reduce surface reflection; Step 9: Fabrication of double-sided micro-mesh electrodes. Micro-mesh electrodes are fabricated on the front and back sides of the silicon wafer using photolithography and lift-off processes. The steps are the same on both sides. Step 10: Low-E film coating. A selective low-emissivity double silver Low-E film layer is coated on the inner surface of the inner glass. Step 11: Module encapsulation. The prepared solar cells are laminated with the outdoor glass, encapsulating film, and inner glass with a Low-E film, and then subjected to high-temperature lamination to form a photovoltaic laminated glass module. Furthermore, if a hollow structure is required, the photovoltaic laminated glass module can be combined with the indoor glass using a hollow lamination process to form a hollow glass module.

[0007] Furthermore, the thickness of the single-crystal silicon wafer in step 1 is 120~200 μm, the resistivity is 1~10 Ω·cm, and the crystal orientation is... <100> The silicon wafer was cleaned in Piranha solution for 10 minutes.

[0008] Furthermore, in step 2, the micropores in the micropore array pattern are circular in shape and arranged in a square or hexagonal honeycomb pattern. The diameter of the micropores is 80~100 μm and the spacing between adjacent micropores is 180~250 μm.

[0009] Further, step 4 specifically involves: before the tapering process, plasma-enhanced chemical vapor deposition is used to deposit SiO2 as a protective layer on the back side of the silicon wafer; then, an isotropic acidic etching solution is prepared, the ratio of which is adjusted according to the required etching rate; the vertically oriented micro-hole silicon wafer with the protective layer is immersed in the isotropic acidic etching solution and processed at room temperature, with stirring during the process to ensure uniformity; utilizing the diffusion-limiting characteristics of the isotropic acidic etching solution, the etching rate inside the micro-hole is faster than that outside, forming a tapered micro-hole that is narrow on the outside and wide on the inside. At the same time, the isotropic effect of the isotropic acidic etching solution is beneficial for smoothing the sidewall roughness left by the deep reactive ion etching process; after the process is completed, the reaction is terminated by rinsing, the back protective layer is removed and dried; the angle between the inclined edge of the sidewall of the tapered micro-hole and the normal of the single crystal silicon wafer surface is 5~20°.

[0010] Furthermore, the volume ratio of the isotropic acidic etching solution is HF:HNO3:CH3COOH = 1:6:3.

[0011] Further, the double-sided doping in step 5 specifically involves: backside phosphorus diffusion using PECVD to deposit SiO2 as a diffusion barrier layer on the front side of the silicon substrate to prevent diffusion on the front side; with the back side of the silicon wafer facing upwards, a phosphorus source is spin-coated and then diffusion is performed in a mixed atmosphere of O2 and N2 for 30 minutes to form N2. + Back surface field; after diffusion, the generated phosphosilicate glass layer and SiO2 diffusion barrier layer are removed with buffered oxide etchant; Boron diffusion on the front side involves redepositing a SiO2 diffusion barrier layer on the back surface of the substrate via PECVD, then spin-coating a boron source onto the front side of the silicon wafer, placing it in a tube furnace, and diffusing it under a N2 atmosphere for 30 minutes to form P. +Emitter; after diffusion, the generated borosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffer oxide etching solution.

[0012] Because the micropores have a conical structure and smooth sidewalls, the doping source can uniformly cover the entire three-dimensional surface during diffusion, forming a conformal PN junction on the sidewalls of the micropores, achieving true three-dimensional carrier collection and effectively shortening the path of carriers to the junction region.

[0013] Further, step 7 specifically involves placing the silicon wafer after Al2O3 deposition in a tube furnace, introducing an Ar / H2 mixed gas, and annealing at 500°C for 25-40 minutes. This step activates the passivation effect of Al2O3, allowing hydrogen atoms to diffuse to the saturated dangling bonds at the silicon interface, significantly reducing the interface state density, and improving minority carrier lifetime and open-circuit voltage.

[0014] Further, the specific steps for fabricating the microgrid electrodes in step 9 are as follows: Photoresist is spin-coated onto the silicon wafer surface, and after exposure and development, a microgrid pattern is formed. The grid shape is consistent with the arrangement of the micro-hole array, being rectangular or hexagonal, and is distributed only in the micro-hole gap region. A layer of Al is thermally evaporated and deposited, and then the photoresist and the Al layer above it are stripped away, leaving the microgrid electrodes distributed in the micro-hole gaps. In this design, the microgrid electrodes completely avoid the micro-hole opening region, do not obstruct the light transmission channel, and the grid arrangement matches the micro-hole arrangement, minimizing the carrier collection path.

[0015] Further, the specific steps for preparing the double silver Low-E film in step 10 are as follows: the double silver Low-E film is prepared using magnetron sputtering. The film is a multilayer structure, and the thickness of each layer is adjusted by ±2 nm according to the optical design target. Specifically: TiO2 (98 nm) / Si3N4 (88 nm) / ZnO (10 nm) / Ag (9 nm) / Si3N4 (71 nm) / ZnO (10nm) / Ag (9 nm) / Si3N4 (96 nm) / TiO2 (99 nm); The double silver Low-E film has an average transmittance of 85-90% in the visible light band (380-780 nm) and an average reflectance of 80-85% in the near-infrared band (780-2500 nm).

[0016] The present invention also provides a conical microporous semi-transparent crystalline silicon photovoltaic, which is prepared by the method described above. The conical microporous semi-transparent crystalline silicon photovoltaic reflects the infrared energy passing through the micropores back to the battery for secondary absorption. The utilization rate of the battery for near-infrared photons is increased by 5-7%, and infrared heat is effectively blocked from entering the room, so that the solar thermal efficiency of the module is reduced to 0.15-0.2.

[0017] This invention uses an isotropic etching solution to improve the traditional cylindrical micro-hole into a conical structure and achieves smoothing of the hole wall. (1) Geometric optical principle of conical structure: When the thickness of the silicon wafer is constant, if the diameter of the cylindrical micro-hole is simply enlarged, although the incident light transmission angle can be increased, the light absorption area of ​​the silicon wafer will be reduced, resulting in a decrease in battery efficiency. This invention uses a conical micro-hole structure: the outer side diameter remains unchanged (ensuring that the light absorption area is not reduced), and the inner side diameter is enlarged by etching with an isotropic etching solution. This conical structure with a narrow outer side and a wide inner side greatly increases the effective light transmission angle, while the light absorption area is not affected. (2) Conical and smoothing principle of isotropic etching solution: the inner side of the micro-hole is in full contact with the etching solution, and the etching rate is fast; the micro-hole near the outer side is coated with a protective layer, the exchange of etching solution is restricted, and it is almost not etched. By precisely controlling the processing time, a conical profile with an enlarged inner side diameter and a basically unchanged outer side diameter can be achieved, forming a certain cone angle. Meanwhile, the isotropic etching properties can smooth the nanoscale "scallop-like" sidewall roughness left by deep reactive ion etching processes and eliminate carrier recombination centers.

[0018] This invention involves coating the inner glass surface with a selective Low-E film. Through the synergistic design of the microporous light-transmitting structure and the selective Low-E film, while ensuring visible light transmission, the near-infrared energy transmitted through the battery is reflected back to the battery for secondary absorption, effectively blocking near-infrared light from entering the room, reducing indoor cooling load, and achieving a balance between improved power generation efficiency and building insulation. The infrared modulation principle of the Low-E film is as follows: the multilayer film system utilizes the high reflectivity of the silver layer to near-infrared light and the interference effect of the dielectric layer to achieve selective modulation of "high visible light transmission and high near-infrared reflectivity". When the near-infrared light reflected back to the battery re-enters the conical micropores, it is repeatedly scattered and absorbed by the random pyramid texture and the sidewalls of the micropores, forming an optical feedback loop, which increases the effective optical path of the near-infrared band by 2-3 times.

[0019] This invention systematically solves several technical bottlenecks in existing semi-transparent crystalline silicon photovoltaics through the synergistic design of a conical micropore structure and a selective Low-E film. Regarding wide-angle light transmission, the conical micropores employ a geometric configuration where the outdoor aperture remains unchanged while the indoor aperture is enlarged. Without sacrificing the light absorption area, this significantly expands the effective light transmission angle range of the incident light, ensuring stable light uniformity under different sunlight angles. In terms of near-infrared energy management, the integration of the selective Low-E film achieves spectral selective control of "high visible light transmission and high near-infrared reflectivity." Near-infrared light not absorbed by the battery passes through the conical micropores and is reflected back towards the battery by the Low-E film. This forms a transmission-reflection-reabsorption optical feedback loop with the multiple scattering and random pyramid light-trapping effect within the conical micropores, significantly improving the battery's utilization rate in the near-infrared band. Simultaneously, the Low-E film effectively blocks near-infrared energy from entering the room, reducing the air conditioning cooling load and achieving a balance between power generation performance and building insulation. Furthermore, despite the addition of an additional film structure, the battery maintains an extremely low haze level, ensuring visual clarity comparable to ordinary glass. In terms of process integration, this invention employs a drilling-then-doping process sequence. First, through-hole vertical micropores are formed using photolithography and deep reactive ion etching. Then, isotropic etching is used for tapering treatment to form high-quality, smoothed tapered micropores. Finally, diffusion doping is performed to uniformly form a PN junction on the silicon wafer. This process sequence ensures that the PN junction formation process is not interfered with by subsequent etching processes, guaranteeing the battery's electrical performance.

[0020] The technical solution of this invention has good technical feasibility in terms of process equipment and basic materials, the overall process flow is clear, and it has the basic conditions for industrialization.

[0021] From the perspective of process integration, although the present invention adds a wet process for tapering treatment, the process can be completed in a standard wet etching tank, with a wide window for key parameters such as temperature, time, and concentration, and has good process controllability and repeatability.

[0022] This invention adds a wet process and integrates a Low-E film to the semi-transparent crystalline silicon cell process. The manufacturing cost is higher than that of conventional modules. However, considering the improvement in power generation efficiency and the energy-saving benefits of buildings, the cost per kilowatt-hour is still competitive. In particular, the overall cost-effectiveness advantage is obvious in scenarios with high requirements for aesthetics and heat insulation, such as building-integrated photovoltaics.

[0023] This invention has broad application prospects. In the field of building-integrated photovoltaics (BIPV), it can be applied to photovoltaic curtain walls, skylights, and shading components, directly replacing traditional building glass. In the field of agricultural photovoltaics, visible light transmittance can be precisely controlled by adjusting the micropore density, making it suitable for agricultural greenhouses. In the field of automotive photovoltaics, it can be integrated into car sunroofs and side windows to provide auxiliary power to vehicles. Furthermore, it can be expanded to areas such as surface photovoltaics and wearable photovoltaics, with huge market potential. Compared with semi-transparent thin-film photovoltaics (such as perovskite and organic photovoltaics), this invention is based on a crystalline silicon material system, possessing both excellent stability and a mature industrial chain. Although thin-film photovoltaics can achieve high transmittance through material selection, their long-term stability issues have always constrained the application of BIPV; while this invention uses crystalline silicon materials, which naturally have a service life of over 25 years, and their performance degradation is controllable in aging tests such as damp heat and ultraviolet radiation, meeting the durability requirements of building components.

[0024] Compared to traditional cylindrical aperture space-divided crystalline silicon photovoltaics, the conical micropore structure of this invention has significant advantages under large-angle incident light. The transmittance of traditional cylindrical apertures drops sharply when the incident angle exceeds 30°, resulting in poor light uniformity of building curtain walls under different sunlight angles; while this invention, through its conical geometric design, can maintain stable transmittance over a wider range of incident angles, significantly improving the lighting comfort of building applications.

[0025] In terms of visual aesthetics, this invention controls the haze to below 0.6%, comparable to ordinary glass, avoiding the light scattering and visual blurring problems that may be caused by the microporous structure, ensuring that the component presents a clear and transparent visual effect in architectural applications. In addition, by adjusting the density and distribution of micropores, the visible light transmittance can be precisely controlled within the range of 10% to 50%, meeting the differentiated lighting intensity requirements of different application scenarios.

[0026] In terms of near-infrared band management, this invention achieves active regulation of energy in the 780~2500nm band through the integration of a selective Low-E film. On the one hand, it reflects the infrared energy passing through the micropores back to the battery for secondary absorption, improving the battery's utilization rate of near-infrared photons; on the other hand, it effectively blocks infrared heat from entering the room, making the solar thermal gain coefficient of the module significantly lower than that of ordinary glass and traditional semi-transparent photovoltaic modules, thus meeting the building's energy-saving requirements while generating electricity.

[0027] Compared with the prior art, the present invention has the following beneficial technical effects: 1. The light absorption area remains unaffected, while the effective light transmission angle is significantly increased.

[0028] 2. Improved sidewall smoothness reduces carrier recombination and increases minority carrier lifetime.

[0029] 3. The increased aperture on the inner side further suppresses optical interference effects, making it more conducive to achieving neutral color translucency.

[0030] 4. The short-circuit current density is increased, thus significantly improving battery efficiency; the building energy-saving effect is significant, and the solar heat gain coefficient is reduced.

[0031] The following will further explain the concept, specific structure, and technical effects of the present invention in conjunction with the accompanying drawings, so as to fully understand the purpose, features, and effects of the present invention. Attached Figure Description

[0032] Figure 1 This is a top view schematic diagram of a preferred embodiment of the conical microporous semi-transparent crystalline silicon photovoltaic structure of the present invention; Figure 2 This is a schematic cross-sectional view of a cone-shaped microporous semi-transparent crystalline silicon photovoltaic hollow glass module according to a preferred embodiment of the present invention; Among them: 10-N type crystal orientation <100> Single-crystal silicon substrate; 11-micropores; 12-P + Emitter; 13-N + Back surface field; 14-alumina passivation layer; 15-silicon nitride antireflection layer; 16-microgrid electrode; 2-encapsulation layer; 30-outdoor glass; 31-inner glass; 32-indoor glass; 40-Low-E film; 50-hollow layer. Detailed Implementation

[0033] The following description, with reference to the accompanying drawings, illustrates several preferred embodiments of the present invention to make its technical content clearer and easier to understand. The present invention can be embodied in many different forms, and the scope of protection of the present invention is not limited to the embodiments mentioned herein.

[0034] In the accompanying drawings, components with the same structure are indicated by the same numerical designation, and components with similar structures or functions are indicated by similar numerical designations. The dimensions and thicknesses of each component shown in the drawings are arbitrary, and the present invention does not limit the dimensions and thicknesses of each component. To make the illustrations clearer, the thickness of some components has been appropriately exaggerated in the drawings.

[0035] Example 1

[0036] This embodiment provides a method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell, the preparation steps of which are as follows: Step 1: Silicon Wafer Cleaning and Preparation Select N-type CZ or FZ single-crystal silicon wafers with a thickness of 120~200 μm, resistivity of 1~10 Ω·cm, and crystal orientation. <100> The silicon wafer was immersed in Piranha solution for 10 minutes to remove surface organic contaminants and metal ions, then rinsed thoroughly with deionized water and dried with nitrogen. In this embodiment, the silicon wafer is an N-type CZ monocrystalline silicon wafer with a thickness of 200 μm, a resistivity of 1~10 Ω·cm, and a crystal orientation of... <100> .

[0037] Step 2: Photolithography defines the micro-hole pattern

[0038] Photoresist is spin-coated onto the surface of a silicon wafer, followed by photolithography processes including pre-baking, exposure, development, and post-baking to form a micro-hole array pattern. The microholes are circular and arranged in a tetragonal or hexagonal honeycomb pattern. In this embodiment, the microhole diameter is 100 μm, the spacing between adjacent microholes is 200 μm, and they are arranged in a tetragonal pattern. A schematic diagram of the specific arrangement is shown below. Figure 1 As shown.

[0039] Step 3: Deep reactive ion etching to prepare vertical micropores

[0040] A silicon wafer with a micropore pattern is placed in a deep reactive ion etching (DRIE) apparatus and etched using the Bosch process. Through alternating etching and passivation cycles, an initial vertical micropore array is formed. This step creates a micropore structure with a depth-to-width ratio of 2:1 on the silicon wafer, but the process leaves nanoscale rough morphology on the micropore sidewalls and introduces a surface damage layer.

[0041] Step 4: Micropore taperization treatment

[0042] Before the micro-hole tapering process, SiO2 is deposited as a protective layer on the back side of the silicon wafer using plasma-enhanced chemical vapor deposition (PECVD). An isotropic acidic etching solution is then prepared, the ratio of which can be adjusted according to the desired etching rate. The vertically tapered silicon wafer with the protective layer is immersed in this etching solution and processed at room temperature, with stirring to ensure uniformity during the process. Utilizing the diffusion-limiting properties of the etching solution, the etching rate inside the micro-hole is faster than the outside, forming a tapered profile that is narrower on the outside and wider on the inside. The angle between the inclined sidewall of the tapered micro-hole and the normal to the single-crystal silicon wafer surface is 5°. Simultaneously, the isotropic effect of the etching solution smooths the sidewall roughness left by the deep reactive ion etching process. After processing, the reaction is terminated by rinsing, the back protective layer is removed, and the wafer is dried. The volume ratio of the isotropic acidic etching solution is HF:HNO3:CH3COOH = 1:6:3.

[0043] Step 5: Diffusion doping to form a PN junction

[0044] The cleaned silicon wafers are placed in a tube diffusion furnace, and double-sided doping is performed using a spin-coating diffusion method. Backside phosphorus diffusion (N +Back surface field: SiO2 was deposited on the front side of the silicon substrate using PECVD as a diffusion barrier layer (to protect the front side from diffusion). The silicon wafer was then spin-coated with a phosphorus source with the back side facing up, followed by diffusion in a mixed atmosphere of O2 and N2 for 30 minutes to form N2. + Back surface field. After diffusion, the generated phosphosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0045] Frontal boron diffusion (P + Emitter: A SiO2 diffusion barrier layer is redeposited on the back surface of the substrate via PECVD. A boron source is spin-coated on the front side of the silicon wafer, which is then placed in a tube furnace and diffused for 30 minutes under an N2 atmosphere to form P. + Emitter. After diffusion, the generated borosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0046] Because the micropores have a conical structure and smooth sidewalls, the doping source can uniformly cover the entire three-dimensional surface during diffusion, forming a conformal PN junction on the sidewalls of the micropores, achieving true three-dimensional carrier collection and effectively shortening the path of carriers to the junction region.

[0047] Step 6: Deposition of alumina passivation layer

[0048] A 5 nm Al2O3 passivation layer was deposited on the silicon wafer surface using atomic layer deposition (ALD) technology. By utilizing the conformal coverage characteristics of ALD technology, uniform coating of the sidewalls of the conical micropores was achieved.

[0049] Step 7: Post-annealing

[0050] The silicon wafer after Al2O3 deposition was placed in a tube furnace, and an Ar / H2 mixed gas was introduced. It was then annealed at 500°C for 25 minutes.

[0051] Step 8: Deposition of silicon nitride antireflection layer

[0052] A 60 nm SiN layer was deposited on the passivation layer surface using plasma-enhanced chemical vapor deposition. x The antireflection layer, together with the Al2O3 passivation layer prepared in step 6, forms a bilayer antireflection system, further reducing surface reflection.

[0053] Step 9: Fabrication of double-sided micromesh electrodes

[0054] Microgrid electrodes are fabricated on both the front and back sides using photolithography and lift-off processes. The steps are identical on both sides. Taking one side as an example, the specific steps are as follows: Photoresist is spin-coated onto the silicon wafer surface, and after exposure and development, a micro-grid pattern is formed. The grid shape is consistent with the arrangement of the micro-via array, being rectangular or hexagonal, and is distributed only in the inter-via region. A layer of Al is deposited by thermal evaporation, and then the photoresist and the Al layer above it are stripped away, leaving the micro-grid electrodes distributed in the inter-via region. In this design, the micro-grid electrodes completely avoid the micro-via opening region, do not block the light transmission channel, and the grid and micro-via arrangement match to minimize the carrier collection path.

[0055] Step 10: Low-E film coating

[0056] A selective low-emissivity double-silver Low-E film is deposited on the inner surface of the inner glass. The double-silver Low-E film is prepared by magnetron sputtering and is a multilayer film structure. The thickness of each layer can be adjusted by ±2 nm according to the optical design objectives. TiO2 (98 nm) / Si3N4 (88 nm) / ZnO (10 nm) / Ag (9 nm) / Si3N4 (71 nm) / ZnO (10nm) / Ag (9 nm) / Si3N4 (96 nm) / TiO2 (99 nm); The film has an average transmittance of approximately 88.5% in the visible light band (380~780 nm) and an average reflectance of approximately 82.2% in the near-infrared band (780~2500 nm).

[0057] Step 11, Component Encapsulation

[0058] The prepared solar cells are laminated with the outdoor glass, encapsulating film, and inner glass (with Low-E film), and then subjected to high-temperature lamination to form a photovoltaic laminated glass module. If a hollow structure is required, the photovoltaic laminated glass module can be combined with the indoor glass using a hollow lamination process to form a hollow glass module. For example... Figure 2 The diagram shows a schematic cross-sectional view of an assembled semi-transparent crystalline silicon photovoltaic hollow glass module. From left to right, it includes an outdoor glass 30, a fabricated solar cell, an encapsulating film, an inner glass 31 with an inner double silver Low-E film 40, a hollow layer 50, and an indoor glass 32. The fabricated solar cell, from left to right, includes a grid electrode 16, an N... + Back surface field, N-type crystal orientation <100> 10. Single-crystal silicon substrate, 11. Tapered micropores, P + Emitter 12, aluminum oxide passivation layer 14, silicon nitride antireflection layer 15, grid electrode 16.

[0059] Example 2

[0060] This embodiment provides a method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell, the preparation steps of which are as follows: Step 1: Silicon Wafer Cleaning and Preparation N-type CZ single-crystal silicon wafers were selected, with a thickness of 120 μm, resistivity of 1~10 Ω·cm, and crystal orientation... <100> The silicon wafers were placed in Piranha solution for 10 minutes to remove surface organic contaminants and metal ions, then rinsed with deionized water and dried with nitrogen.

[0061] Step 2: Photolithography defines the micro-hole pattern

[0062] Photoresist is spin-coated onto the surface of a silicon wafer, followed by photolithography processes such as pre-baking, exposure, development, and post-baking to form a micro-hole array pattern. The microholes are circular and arranged in a tetragonal or hexagonal honeycomb pattern. In this embodiment, the microhole diameter is designed to be 80 μm, the spacing between adjacent microholes is 180 μm, and the arrangement is hexagonal honeycomb.

[0063] Step 3: Deep reactive ion etching to prepare vertical micropores

[0064] A silicon wafer with a micropore pattern is placed in a deep reactive ion etching (DRIE) apparatus and etched using the Bosch process. Through alternating etching and passivation cycles, an initial vertical micropore array is formed. This step creates a micropore structure with an aspect ratio of 1.5:1 on the silicon wafer, but the process leaves nanoscale rough morphology on the micropore sidewalls and introduces a surface damage layer.

[0065] Step 4: Micropore taperization treatment

[0066] Before the micro-via tapering process, SiO2 is deposited as a protective layer on the back side of the silicon wafer using plasma-enhanced chemical vapor deposition (PECVD). An isotropic acidic etchant solution is then prepared, with its ratio adjustable according to the desired etching rate. The vertically tapered silicon wafer with the protective layer is immersed in this etchant solution and processed at room temperature, with stirring to ensure uniformity. Utilizing the diffusion-limiting properties of the etchant solution, the etching rate inside the micro-via is faster than outside, forming a tapered profile that is narrower on the outside and wider on the inside. The angle between the inclined sidewall of the tapered micro-via and the normal to the single-crystal silicon wafer surface is 18°. Simultaneously, the isotropic effect of the etchant solution smooths the sidewall roughness left by the deep reactive ion etching process. After processing, the reaction is terminated by rinsing, the back protective layer is removed, and the wafer is dried. The volume ratio of the isotropic acidic etchant solution is HF:HNO3:CH3COOH = 1:6:3.

[0067] Step 5: Diffusion doping to form a PN junction

[0068] The cleaned silicon wafers are placed in a tube diffusion furnace, and double-sided doping is performed using a spin-coating diffusion method. Backside phosphorus diffusion (N +Back surface field: SiO2 was deposited on the front side of the silicon substrate using PECVD as a diffusion barrier layer (to protect the front side from diffusion). The silicon wafer was then spin-coated with a phosphorus source with the back side facing up, followed by diffusion in a mixed atmosphere of O2 and N2 for 30 minutes to form N2. + Back surface field. After diffusion, the generated phosphosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0069] Frontal boron diffusion (P + Emitter: A SiO2 diffusion barrier layer is redeposited on the back surface of the substrate via PECVD. A boron source is spin-coated on the front side of the silicon wafer, which is then placed in a tube furnace and diffused for 30 minutes under an N2 atmosphere to form P. + Emitter. After diffusion, the generated borosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0070] Because the micropores have a conical structure and smooth sidewalls, the doping source can uniformly cover the entire three-dimensional surface during diffusion, forming a conformal PN junction on the sidewalls of the micropores, achieving true three-dimensional carrier collection and effectively shortening the path of carriers to the junction region.

[0071] Step 6: Deposition of alumina passivation layer

[0072] A 15 nm Al2O3 passivation layer was deposited on the silicon wafer surface using atomic layer deposition (ALD) technology. By utilizing the conformal coverage characteristics of ALD technology, uniform coating of the sidewalls of the conical micropores was achieved.

[0073] Step 7: Post-annealing

[0074] The silicon wafer after Al2O3 deposition was placed in a tube furnace, and an Ar / H2 mixed gas was introduced. It was then annealed at 500°C for 40 minutes.

[0075] Step 8: Deposition of silicon nitride antireflection layer

[0076] A 70 nm SiN layer was deposited on the passivation layer surface using plasma-enhanced chemical vapor deposition. x The antireflection layer, together with the Al2O3 passivation layer prepared in step 6, forms a bilayer antireflection system, further reducing surface reflection.

[0077] Steps 9 to 11 are exactly the same as in Example 1.

[0078] Example 3

[0079] This embodiment provides a method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell, the preparation steps of which are as follows: Step 1: Silicon Wafer Cleaning and Preparation N-type CZ single-crystal silicon wafers with a thickness of 200 μm and resistivity of 1~10 Ω·cm were selected, with crystal orientation... <100> The silicon wafers were placed in Piranha solution for 10 minutes to remove surface organic contaminants and metal ions, then rinsed with deionized water and dried with nitrogen.

[0080] Step 2: Photolithography defines the micro-hole pattern

[0081] Photoresist is spin-coated onto the surface of a silicon wafer, followed by photolithography processes such as pre-baking, exposure, development, and post-baking to form a micro-hole array pattern. The microholes are circular and arranged in a tetragonal or hexagonal honeycomb pattern. In this embodiment, the microhole diameter is designed to be 80 μm, the spacing between adjacent microholes is 250 μm, and the arrangement is hexagonal honeycomb.

[0082] Step 3: Deep reactive ion etching to prepare vertical micropores

[0083] A silicon wafer with a micropore pattern is placed in a deep reactive ion etching (DRIE) apparatus and etched using the Bosch process. Through alternating etching and passivation cycles, an initial vertical micropore array is formed. This step creates a micropore structure with an aspect ratio of 2.5:1 on the silicon wafer, but the process leaves nanoscale rough morphology on the micropore sidewalls and introduces a surface damage layer.

[0084] Step 4: Micropore taperization treatment

[0085] Before the micro-hole tapering process, SiO2 is deposited as a protective layer on the back side of the silicon wafer using plasma-enhanced chemical vapor deposition (PECVD). An isotropic acidic etchant solution is then prepared, with its ratio adjustable according to the desired etching rate. The vertically tapered silicon wafer with the protective layer is immersed in this etchant solution and processed at room temperature, with stirring to ensure uniformity. Utilizing the diffusion-limiting properties of the etchant solution, the etching rate inside the micro-hole is faster than outside, forming a tapered profile that is narrower on the outside and wider on the inside. The angle between the inclined sidewall of the tapered micro-hole and the normal to the single-crystal silicon wafer surface is 20°. Simultaneously, the isotropic effect of the etchant solution smooths the sidewall roughness left by the deep reactive ion etching process. After processing, the reaction is terminated by rinsing, the back protective layer is removed, and the wafer is dried. The volume ratio of the isotropic acidic etchant solution is HF:HNO3:CH3COOH = 1:6:3.

[0086] Step 5: Diffusion doping to form a PN junction

[0087] The cleaned silicon wafers are placed in a tube diffusion furnace, and double-sided doping is performed using a spin-coating diffusion method. Backside phosphorus diffusion (N +Back surface field: SiO2 was deposited on the front side of the silicon substrate using PECVD as a diffusion barrier layer (to protect the front side from diffusion). The silicon wafer was then spin-coated with a phosphorus source with the back side facing up, followed by diffusion in a mixed atmosphere of O2 and N2 for 30 minutes to form N2. + Back surface field. After diffusion, the generated phosphosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0088] Frontal boron diffusion (P + Emitter: A SiO2 diffusion barrier layer is redeposited on the back surface of the substrate via PECVD. A boron source is spin-coated on the front side of the silicon wafer, which is then placed in a tube furnace and diffused for 30 minutes under an N2 atmosphere to form P. + Emitter. After diffusion, the generated borosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffered oxide etchant.

[0089] Because the micropores have a conical structure and smooth sidewalls, the doping source can uniformly cover the entire three-dimensional surface during diffusion, forming a conformal PN junction on the sidewalls of the micropores, achieving true three-dimensional carrier collection and effectively shortening the path of carriers to the junction region.

[0090] Step 6: Deposition of alumina passivation layer

[0091] A 10 nm Al2O3 passivation layer was deposited on the silicon wafer surface using atomic layer deposition (ALD) technology. By utilizing the conformal coverage characteristics of ALD technology, uniform coating of the sidewalls of the conical micropores was achieved.

[0092] Step 7: Post-annealing

[0093] The silicon wafer after Al2O3 deposition was placed in a tube furnace, and an Ar / H2 mixed gas was introduced. It was then annealed at 500°C for 30 minutes.

[0094] Step 8: Deposition of silicon nitride antireflection layer

[0095] A 70 nm SiN layer was deposited on the passivation layer surface using plasma-enhanced chemical vapor deposition. x The antireflection layer, together with the Al2O3 passivation layer prepared in step 6, forms a bilayer antireflection system, further reducing surface reflection.

[0096] Steps 9 to 11 are exactly the same as in Example 1.

[0097] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell, characterized in that, The method includes the following steps: Step 1: Silicon wafer cleaning and preparation. Select an N-type CZ or FZ monocrystalline silicon wafer, place the wafer in Piranha solution to clean it, remove surface organic contaminants and metal ions, then rinse it with deionized water and dry it with nitrogen. Step 2: Photolithography defines the micro-hole pattern. Photoresist is spin-coated onto the silicon wafer surface, and a photolithography process involving pre-baking, exposure, development, and post-baking is used to form a micro-hole array pattern. Step 3: Deep reactive ion etching to prepare vertical micropores. The silicon wafer with micropore pattern prepared in step 2 is placed in a deep reactive ion etching device and etched using the Bosch process. Through alternating etching and passivation cycles, an initial vertical micropore array is formed. This step forms a micropore structure with an aspect ratio of 1.5 to 2.5:1 on the silicon wafer. At the same time, it leaves a nanoscale rough morphology on the sidewall of the micropore and introduces a surface damage layer. Step 4: Micropore taperization treatment, the vertical micropores prepared in step 3 are taperized to form tapered micropores that are narrow on the outside and wide on the inside; Step 5: Diffusion doping to form a PN junction. The silicon wafer processed in step 4 is placed in a tube diffusion furnace and double-sided doping is performed using a spin-coating diffusion method. Step 6: Alumina passivation layer deposition. An Al2O3 passivation layer of 5-15 nm is deposited on the silicon wafer surface using atomic layer deposition (ALD) technology. By utilizing the conformal coverage characteristics of ALD technology, uniform coating of the sidewalls of the conical micropores is achieved. Step 7: Post-annealing; Step 8: Deposition of silicon nitride antireflection layer. A 60-70 nm SiN layer is deposited on the surface of the passivation layer using plasma-enhanced chemical vapor deposition. x The antireflection layer, together with the Al2O3 passivation layer prepared in step 6, forms a bilayer antireflection system to further reduce surface reflection; Step 9: Fabrication of double-sided micro-mesh electrodes. Micro-mesh electrodes are fabricated on the front and back sides of the silicon wafer using photolithography and lift-off processes. The steps are the same on both sides. Step 10: Low-E film coating. A selective low-emissivity double silver Low-E film layer is coated on the inner surface of the inner glass. Step 11: Component encapsulation. The prepared solar cells are laminated with the outdoor glass, encapsulation film, and inner glass with Low-E film, and then laminated at high temperature to form a photovoltaic laminated glass module.

2. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, The single-crystal silicon wafer in step 1 has a thickness of 120~200 μm, a resistivity of 1~10 Ω·cm, and a crystal orientation of... <100> The silicon wafer was cleaned in Piranha solution for 10 minutes.

3. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, In step 2, the micropores in the micropore array pattern are circular in shape and arranged in a square or hexagonal honeycomb pattern. The diameter of the micropores is 80~100 μm and the spacing between adjacent micropores is 180~250 μm.

4. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, Step 4 specifically involves: before the tapering process, plasma-enhanced chemical vapor deposition is used to deposit SiO2 as a protective layer on the back of the silicon wafer; then, an isotropic acidic etching solution is prepared, the ratio of which is adjusted according to the required etching rate; the vertically oriented micro-hole silicon wafer with the protective layer is immersed in the isotropic acidic etching solution and processed at room temperature, with stirring during the process to ensure uniformity; utilizing the diffusion-limiting characteristics of the isotropic acidic etching solution, the etching rate inside the micro-hole is faster than that outside, forming a tapered micro-hole that is narrow on the outside and wide on the inside. At the same time, the isotropic effect of the isotropic acidic etching solution is beneficial for smoothing the sidewall roughness left by the deep reactive ion etching process; after the process is completed, the reaction is terminated by rinsing, the back protective layer is removed and dried; the angle between the inclined edge of the sidewall of the tapered micro-hole and the normal of the single crystal silicon wafer surface is 5~20°.

5. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 4, characterized in that, The volume ratio of the isotropic acidic etching solution is HF:HNO3:CH3COOH = 1:6:

3.

6. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, The double-sided doping in step 5 specifically involves: backside phosphorus diffusion using PECVD to deposit SiO2 on the front side of the silicon substrate as a diffusion barrier layer to prevent diffusion on the front side; the back side of the silicon wafer is then facing upwards, and a phosphorus source is spin-coated before diffusion, which is performed for 30 minutes in a mixed atmosphere of O2 and N2 to form N2. + Back surface field; after diffusion, the generated phosphosilicate glass layer and SiO2 diffusion barrier layer are removed with buffered oxide etchant; Boron diffusion on the front side involves redepositing a SiO2 diffusion barrier layer on the back surface of the substrate via PECVD, then spin-coating a boron source onto the front side of the silicon wafer, placing it in a tube furnace, and diffusing it under a N2 atmosphere for 30 minutes to form P. + Emitter; after diffusion, the generated borosilicate glass layer and SiO2 diffusion barrier layer are removed using a buffer oxide etching solution.

7. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, Step 7 specifically involves placing the silicon wafer after Al2O3 deposition in a tube furnace, introducing an Ar / H2 mixed gas, and annealing it at 500°C for 25-40 minutes.

8. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, The specific steps for preparing the micro-grid electrode in step 9 are as follows: spin-coating photoresist on the silicon wafer surface, and forming a micro-grid pattern after exposure and development. The grid shape is consistent with the arrangement of the micro-hole array, which is rectangular or hexagonal, and is only distributed in the micro-hole gap area. A layer of Al is deposited by thermal evaporation, and then the photoresist and the Al layer above it are stripped away, leaving the micro-mesh electrodes distributed in the gaps between the micropores.

9. The method for preparing a conical microporous semi-transparent crystalline silicon photovoltaic cell as described in claim 1, characterized in that, The specific steps for preparing the double silver Low-E film in step 10 are as follows: The double silver Low-E film is prepared using magnetron sputtering. The film is a multilayer structure, and the thickness of each layer is adjusted by ±2 nm according to the optical design target. Specifically: TiO2 (98 nm) / Si3N4 (88 nm) / ZnO (10 nm) / Ag (9 nm) / Si3N4 (71 nm) / ZnO (10 nm) / Ag (9 nm) / Si3N4 (96 nm) / TiO2 (99 nm); The double silver Low-E film has an average transmittance of 85-90% in the visible light band (380-780 nm) and an average reflectance of 80-85% in the near-infrared band (780-2500 nm).

10. A conical microporous semi-transparent crystalline silicon photovoltaic, characterized in that, Prepared using the method described in claims 1-9, the conical microporous semi-transparent crystalline silicon photovoltaic reflects infrared energy passing through the micropores back to the battery for secondary absorption, increasing the battery's utilization rate of near-infrared photons by 5-7%, effectively blocking infrared heat from entering the room, and reducing the solar thermal efficiency of the module to 0.15-0.2.

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