A full-silicon carbide piezoresistive pressure sensing chip and a preparation method thereof

By employing processes such as Si-SiC temporary bonding, CMP thinning, and ICP shallow etching, combined with the Ni/Ti/Ni/TaSi2/Nb/Pt metal system, the problems of performance degradation and low etching rate of traditional silicon-based piezoresistive sensors at high temperatures have been solved, achieving stability and high-precision pressure measurement of the sensor at high temperatures.

CN122409015APending Publication Date: 2026-07-17ZHONGBEI UNIV

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ZHONGBEI UNIV
Filing Date
2026-05-15
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Traditional silicon-based piezoresistive sensors degrade in performance under high-temperature environments, and traditional silicon carbide etching processes suffer from low etching rates and micromask effects, which affect the sensor's pressure response and output performance.

Method used

A fully silicon carbide piezoresistive pressure sensor chip was fabricated using a method combining Si-SiC temporary bonding, chemical mechanical polishing (CMP) thinning, inductively coupled plasma (ICP) shallow etching cavity preparation, and room temperature activation bonding, along with a Ni/Ti/Ni/TaSi2/Nb/Pt metal system.

Benefits of technology

This improved the yield and film thickness uniformity of the sensor chip, achieved a smooth surface of the high-quality sensitive diaphragm, and enhanced the stability of the ohmic contact and the high-temperature reliability of the sensor.

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Abstract

本申请提供了一种全碳化硅压阻式压力传感芯片及其制备方法,属于先进制造技术领域;所要解决的技术问题为:现有碳化硅压阻传感器背腔刻蚀工艺会导致掩膜残留、粗糙度大、效率低;解决该技术问题采用的技术方案为:包括第一衬底,第一衬底表面设置有缓冲层,第一衬底远离缓冲层的一侧键合有第二衬底,缓冲层表面设置有外延层,外延层表面刻蚀有电阻沟道,电阻沟道表面沉积有绝缘层,电阻沟道的内侧壁上溅射有Ni / Ti / Ni / TaSi2 / Nb / Pt金属层,绝缘层表面沉积有Ti / Pt / Au金属层和钝化层,钝化层与Ti / Pt / Au金属层之间设置有间隔;本申请应用于航空航天发动机燃烧室监测、深海油气勘探、核反应堆冷却系统压力反馈等领域。
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