A high-speed read-write management system and method suitable for DDR5 memory
By partitioning and analyzing the state of the DDR5 memory, the read and write operations were optimized, solving the problem of frequent data skipping in the DDR5 memory and achieving efficient high-speed read and write speeds.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- DAIMA (ZHUHAI) INTEGRATED CIRCUIT CO LTD
- Filing Date
- 2026-04-24
- Publication Date
- 2026-07-17
Smart Images
Figure CN122412331A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of memory management technology, specifically a high-speed read / write management system and method suitable for DDR5 memory. Background Technology
[0002] DDR5 is a computer memory specification. Compared with DDR4 memory, the DDR5 standard has stronger performance and lower power consumption. Other changes include a reduction in voltage from 1.2V to 1.1V, 32 / 40 bits per channel (ECC), improved bus efficiency, and an increase in the number of prefetched bank groups to improve performance. Data read and write operations in existing DDR5 memory rely on pre-defined read and write operation logic. However, in actual read and write operations, due to the existence of data writing and data clearing, there are irregularly distributed free storage cells in DDR5 memory. When data needs to be written to DDR5 memory, the irregularly distributed free storage cells will cause data to be written frequently in jumps, resulting in a decrease in data read and write efficiency, and thus making it impossible to achieve efficient high-speed read and write of data in DDR5 memory. Therefore, this invention proposes a high-speed read / write management system and method suitable for DDR5 memory. Summary of the Invention
[0003] The purpose of this invention is to propose a high-speed read / write management system and method suitable for DDR5 memory, so as to solve the problem mentioned in the background art of the inability to achieve efficient high-speed read / write of data in DDR5 memory.
[0004] The objective of this invention can be achieved through the following technical solutions: In the first aspect, a high-speed read / write management system suitable for DDR5 memory includes a region partitioning module, a data acquisition module, a status analysis module, a space analysis module, a command sending module, a read analysis module, and an execution module; The region partitioning module is used to partition the storage regions in the DDR5 memory, obtain the logical addresses of different storage groups, and send them to the status analysis module; the data acquisition module is used to acquire the actual storage addresses of different stored files in the DDR5 memory and send them to the status analysis module and the read analysis module. The status analysis module is used to analyze the storage status of different storage groups, obtain the written address of the written storage group, the free address of the free storage group and the logical address of the row to be analyzed, and send them to the space analysis module. It also obtains the logical address of the priority write row and sends it to the read analysis module. The space analysis module is used to analyze the memory groups in the DDR5 memory, obtain the effective group space of different rows to be analyzed, and send it to the read analysis module; the command sending module is used to send read commands for reading files or write commands for writing files to the read analysis module; The read analysis module is used to analyze the read operations in the DDR5 memory, and the target write address of the file to be written is obtained and sent to the execution module; the execution module is used to write the file to the target write line of the DDR5 memory.
[0005] Furthermore, the region division module's division process includes the following: The smallest storage unit in DDR5 memory is called a storage cell, and the area in DDR5 memory composed of a fixed number of storage cells is called a storage block. DDR5 memory is divided into multiple storage blocks according to the fixed number of storage cells in a single storage block. The storage blocks are sequentially labeled as the first storage block, the second storage block, ..., the nth storage block, from left to right and from top to bottom, where n is the number of the storage block. For any storage cell within a storage block, from left to right, the area consisting of a fixed number of storage cells in any row within the corresponding storage block is recorded as a storage group, thus obtaining multiple storage groups within the corresponding storage block; The storage groups in the same row are named from left to right as the first column storage group, the second column storage group, ..., the kth column storage group, where k is the column number of the storage group; The storage groups within the same storage block are sequentially labeled as the first row storage group, the second row storage group, ..., the m-th row storage group, in descending order from top to bottom, where m is the row number of the storage group; Using the storage block number n as the first element, the storage group row number m as the second element, and the storage group column number k as the third element, the logical addresses (n, m, k) of different storage groups are constructed.
[0006] Furthermore, the analysis process of the state analysis module includes the following: Compare the actual storage addresses of different stored files in the DDR5 memory with the logical addresses of different memory groups; If the logical address of the storage group is the same as the actual storage address of any file already stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as "written to the storage group", and the logical address of the corresponding storage group is recorded as "written address". If the logical address of the storage group is different from the actual storage address of all the files stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as a free storage group, and the logical address of the corresponding storage group is recorded as a free address. Select any row in any storage block as the analysis object. If the storage status of all storage groups in the corresponding row in the storage block is free storage group, then the corresponding row is recorded as the priority write row. If the storage status of any storage group in the corresponding row within the storage block is "written to storage group", then the corresponding row is recorded as the row to be analyzed. By analogy, the analysis yields multiple priority write rows and rows to be analyzed within the storage block; Using the storage block number as the first element, the storage group row number as the second element, and a fixed value as the third element, the logical addresses of the priority write row and the row to be analyzed are constructed.
[0007] Furthermore, the analysis process of the spatial analysis module includes the following: Starting from the first free storage group in the row to be analyzed within the storage block, the storage groups are searched sequentially to the right along the row to be analyzed, and the search results of the storage groups are analyzed to obtain the number of different free groups in the row to be analyzed. The maximum number of free groups is obtained by iterating through and comparing the number of different free groups in the same row to be analyzed. The maximum number of free groups is then used as the number of valid groups in the corresponding row to be analyzed. Obtain the unit memory of a single storage unit, multiply the unit memory by a fixed number to obtain the group memory of a single storage group, and multiply the number of effective groups by the group memory to obtain the effective group space of the corresponding row to be analyzed. By analogy, the effective group space of different rows to be analyzed in the DDR5 memory can be calculated.
[0008] Furthermore, the analysis process of the spatial analysis module also includes the following: If the first written storage group is not found, count the number of storage groups in the row to be analyzed and record it as the number of the first free groups; If the first written storage group is found, it is recorded as the first written group. The free address of the starting storage group and the written address of the first written group are obtained. The third element of the corresponding free address of the starting storage group is subtracted from the third element of the corresponding free address of the first written group to obtain the number of first free groups of the row to be analyzed in the corresponding storage block. Then, starting from the first write group, the storage groups are searched sequentially to the right along the row to be analyzed. If the first free storage group is not found, no operation is performed. When the first free storage group is found, the corresponding free storage group is taken as the first free group, and the search is performed sequentially to the right along the free group, and the search results are analyzed to obtain the number of different free groups in the row to be analyzed.
[0009] Furthermore, the analysis process of the spatial analysis module also includes the following: If the first written storage group is not found, obtain the logical address of the last storage group in the free group and the free address of the first free group. Subtract the third element of the corresponding logical address from the third element of the first free group and add one to obtain the number of the second free groups for the row to be analyzed. If the first written storage group is found, it is recorded as the second written group. The free address of the first free group and the written address of the second written group are obtained. The third element of the corresponding free address of the first free group is subtracted from the third element of the corresponding free address of the second written group to obtain the number of free storage groups between the first free group and the second written group, and recorded as the number of second free groups of the row to be analyzed. Similarly, the number of free groups in the row to be analyzed is calculated, where j is the number of free groups.
[0010] Furthermore, the analysis process of the read analysis module includes the following: When only a read command is received, the actual storage address of the file to be read is obtained, and the corresponding file to be read is extracted from the storage group whose logical address is the same as the actual storage address; When both read and write commands are received simultaneously, the write address of the file to be written in the DDR5 memory is analyzed to obtain the target write line of the file. When only a write command is received, count the number of any row storage group in the storage block and record it as the number of single row storage groups. Multiply the number of single row storage groups by the group memory to obtain the single row group memory in the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. The memory block containing the priority write line in the DDR5 memory is denoted as the priority write block. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of lines required to write the file. The comparison yields the target write line of the file. The logical address of the target to be written to is denoted as the target write address.
[0011] Furthermore, the analysis process of the read analysis module also includes the following: Obtain the actual storage address of the file to be read, extract the corresponding file to be read from the storage group where the logical address is the same as the actual storage address, extract the number of the storage block where the corresponding actual storage address is located, and record the corresponding storage block as the read block; Count the number of storage groups in any row within the storage block and record it as the number of single-row storage groups. Multiply the number of single-row storage groups by the group memory to obtain the single-row group memory within the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. Non-read blocks in the DDR5 memory with priority write rows are denoted as priority write blocks. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of rows required to write the file. If the number of priority write blocks is greater than or equal to the number of groups of lines required to write the file, priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line to write the file. If the number of priority write blocks is less than the number of groups of rows required to write the file, the number of priority write lines in the DDR5 memory is counted, and the storage blocks in the DDR5 memory are analyzed to obtain the target write line for the file.
[0012] Furthermore, the analysis process of the read analysis module also includes the following: Compare the number of lines to be written first with the number of groups of lines required to write the file; When the number of priority write lines is greater than or equal to the number of groups of lines required to write the file, the number of priority write blocks is subtracted from the number of groups of lines required to write the file to obtain a first value. Priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file. Priority write blocks are extracted again in ascending order of storage block number according to the first value, and a single priority write line is extracted from each priority write block as the target write line of the file, until the number of target write lines is greater than or equal to the number of groups of lines required to write the file. When the number of priority write lines is less than the number of group lines required to write the file, the number of priority write blocks is subtracted from the number of group lines required to write the file to obtain the first value. Priority write blocks are extracted in ascending order of storage block number according to the number of group lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file, until no priority write line exists in the DDR5 memory. The number of target write lines is counted, and the number of target write lines is subtracted from the number of group lines required to write the file to obtain the remaining number of group lines required to write the file. The remaining number of group lines is multiplied by the single-row group memory to obtain the remaining memory required to write the file. The effective group space of different rows to be analyzed in the DDR5 memory is obtained, and the different rows to be analyzed are sorted in descending order according to the effective group space to obtain the row sequence. Starting from the first element, the effective group space corresponding to each element in the row sequence is added from left to right until the sum is greater than or equal to the remaining memory required. The rows to be analyzed between the first element and the last element of the sum are recorded as the target write lines of the file.
[0013] Secondly, a high-speed read / write management method suitable for DDR5 memory, the method comprising the following steps: Step S101: Divide the storage area in the DDR5 memory to obtain multiple storage blocks and storage groups; Step S102: Based on the actual storage address of the stored file and the logical ground of different storage groups, analyze the storage status of different storage groups in the DDR5 memory, and determine whether the storage status of the storage group is a written storage group or an idle storage group. Step S103: Analyze the storage group of any row in the storage block according to the storage status, and obtain the priority write row and the row to be analyzed in different storage blocks. Step S104: Analyze the memory groups in the DDR5 memory based on the written address, free address and the logical address of the row to be analyzed, and obtain the effective group space of different rows to be analyzed. Step S105: Analyze the read operation in the DDR5 memory according to the read command or write command, and obtain the target write address for writing to the file.
[0014] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are: 1. The present invention first divides the storage area in the DDR5 memory to obtain storage blocks and storage groups. Then, based on the actual storage address of the stored file and the logical ground of different storage groups, the storage status of different storage groups in the DDR5 memory is analyzed to determine whether the storage status of the storage group is a written storage group or a free storage group. 2. The present invention also analyzes the storage group of any row in the storage block according to the storage state, and obtains the priority write row and the row to be analyzed in different storage blocks. It also analyzes the storage group in the DDR5 memory according to the written address, free address and logical address of the row to be analyzed, and obtains the effective group space of different rows to be analyzed. Finally, it analyzes the read operation in the DDR5 memory according to the read command or write command, and obtains the target write address of the file to be written, so as to write the file to the target write address. Attached Figure Description
[0015] To facilitate understanding by those skilled in the art, the present invention will be further described below with reference to the accompanying drawings.
[0016] Figure 1 This is an overall system block diagram of the present invention; Figure 2 This is a schematic diagram of the storage unit in this invention; Figure 3 This is a schematic diagram of storage blocks and storage groups in this invention; Figure 4 This is a schematic diagram illustrating the number of idle groups in this invention; Figure 5 This is a flowchart of the method of the present invention. Detailed Implementation
[0017] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0018] Example 1: Please refer to Figures 1-4 As shown, the technical solution provided by the present invention is: a high-speed read / write management system suitable for DDR5 memory. The system first divides the storage area in the DDR5 memory to obtain storage blocks and storage groups, then analyzes the storage status of different storage groups, then analyzes the storage groups in the row to be analyzed to obtain the effective group space of different rows to be analyzed, and finally reads the corresponding file according to the read command or writes the file to the target row according to the write command. The system includes a region division module, a data acquisition module, a status analysis module, a space analysis module, a command sending module, a read analysis module, and an execution module. In this embodiment, the region partitioning module is used to partition the storage region in the DDR5 memory. The partitioning process includes the following: Please see Figure 2 As shown, the smallest storage unit in DDR5 memory is called a storage cell, and the area in DDR5 memory composed of a fixed number of storage cells is called a storage block. Based on the fixed number of storage cells in a single storage block, DDR5 memory is divided into multiple storage blocks. It should be explained that in DDR5 memory, the memory cells exist in a row and column distribution. A single DDR5 memory contains multiple memory blocks, and a single memory block is composed of multiple rows and columns of memory cells. The storage blocks are sequentially labeled as the first storage block, the second storage block, ..., the nth storage block, from left to right and from top to bottom, where n is the number of the storage block. Please see Figure 3 As shown, for any storage cell in any storage block, the area consisting of a fixed number of storage cells in any row of the corresponding storage block is recorded as a storage group from left to right, thereby obtaining multiple storage groups in the corresponding storage block. For example, a single storage block contains multiple rows of storage units. For any row of storage units, multiple consecutive storage units are collectively referred to as a storage group. Each row consists of multiple storage groups, and each storage group consists of multiple storage units. For example, a single storage block contains eight rows and sixteen columns of storage units, where eight storage units form a single storage group. Therefore, each row in the corresponding storage block contains two storage groups. The storage groups in the same row are named from left to right as the first column storage group, the second column storage group, ..., the kth column storage group, where k is the column number of the storage group; The storage groups within the same storage block are sequentially labeled as the first row storage group, the second row storage group, ..., the m-th row storage group, in descending order from top to bottom, where m is the row number of the storage group; Using the storage block number n as the first element, the storage group row number m as the second element, and the storage group column number k as the third element, the logical addresses (n, m, k) of different storage groups are constructed. For example, when the logical address of the storage group is (1, 2, 3), it means that the corresponding storage group is located in the second row and third column within the first storage block; The region partitioning module sends the logical addresses of different memory groups within the DDR5 memory to the status analysis module.
[0019] In this embodiment, the data acquisition module is used to acquire the actual storage addresses of different stored files in the DDR5 memory, and send the actual storage addresses of different stored files to the status analysis module and the read analysis module; In practical implementation, the status analysis module is used to analyze the storage status of different memory groups within the DDR5 memory. The analysis process includes the following: Compare the actual storage addresses of different stored files in the DDR5 memory with the logical addresses of different memory groups; If the logical address of the storage group is the same as the actual storage address of any file already stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as "written to the storage group", and the logical address of the corresponding storage group is recorded as "written address". If the logical address of the storage group is different from the actual storage address of all the files stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as a free storage group, and the logical address of the corresponding storage group is recorded as a free address. It should be explained that unit memory refers to the size of data that a single storage unit can store. The unit memory of each storage unit is the same. The fixed number is the number of storage units in a single storage group. The number of storage units in different storage groups is the same, and the number of storage groups in different storage blocks is the same. Select any row in any storage block as the analysis object. If the storage status of all storage groups in the corresponding row in the storage block is free storage group, then the corresponding row is recorded as the priority write row. If the storage status of any storage group in the corresponding row within the storage block is "written to storage group", then the corresponding row is recorded as the row to be analyzed. By analogy, the analysis yields multiple priority write rows and rows to be analyzed within the storage block; Using the storage block number as the first element, the storage group row number as the second element, and a fixed value as the third element, the logical addresses of the priority write row and the row to be analyzed are constructed. In this embodiment, the value of the fixed value is equal to zero. When multiple written files are stored in any row of the storage block, if all the written files are not cleared, it will result in both free storage groups and written storage groups existing in the corresponding row. At this time, the corresponding row is recorded as the row to be analyzed. Or, when the corresponding row stores written files, there are unused storage groups. At this time, the corresponding row is also recorded as the row to be analyzed. It should be explained that if the storage status of all storage groups in the corresponding row of the storage block is "written storage group", it means that there is no write space in the corresponding row, and there is no need to analyze the corresponding row. The judgment between the priority write row and the row to be analyzed is for any row in any storage block. Since there are multiple rows in the storage block, the priority write row and the row to be analyzed can coexist in the storage block. The status analysis module sends the written addresses of the storage groups, the free addresses of the free storage groups, and the logical addresses of the rows to be analyzed to the space analysis module; the status analysis module sends the logical addresses of the priority written rows to the read analysis module.
[0020] In this embodiment, the space analysis module is used to analyze the memory group in the DDR5 memory based on the written address, free address, and logical address of the row to be analyzed. The analysis process includes the following: Starting with the first free storage group in the row to be analyzed within the storage block, the storage groups are searched sequentially to the right along the row to be analyzed, and the search results are analyzed to obtain the number of different free groups in the row to be analyzed. The analysis process includes the following: If the first written storage group is not found, count the number of storage groups in the row to be analyzed and record it as the number of the first free groups; If the first written storage group is found, it is recorded as the first written group. The free address of the starting storage group and the written address of the first written group are obtained. The third element of the corresponding free address of the starting storage group is subtracted from the third element of the corresponding free address of the first written group to obtain the number of first free groups of the row to be analyzed in the corresponding storage block. Then, starting from the first write group, the storage groups are searched sequentially to the right along the row to be analyzed. If the first free storage group is not found, no operation is performed. When the first free storage group is found, it is taken as the first free group, and the search is performed sequentially to the right along the free groups, with the search results analyzed. The specific analysis process is as follows: If the first written storage group is not found, obtain the logical address of the last storage group in the free group and the free address of the first free group. Subtract the third element of the corresponding logical address from the third element of the first free group and add one to obtain the number of the second free groups for the row to be analyzed. If the first written storage group is found, it is recorded as the second written group. The free address of the first free group and the written address of the second written group are obtained. The third element of the corresponding free address of the first free group is subtracted from the third element of the corresponding free address of the second written group to obtain the number of free storage groups between the first free group and the second written group, and recorded as the number of second free groups of the row to be analyzed. Similarly, the number of free groups in the row to be analyzed is calculated, where j is the number of free groups. For example, please refer to Figure 4 As shown, the first line indicates the case where the first written storage group is not found when starting from the first free storage group in the row to be analyzed within the storage block; the second line indicates the case where the first written storage group is found, the first free group is found when starting from the first written group, but the first written storage group is not found when starting from the first free group; the third line indicates the case where the first written storage group is found when starting from the first free group. The maximum number of free groups is obtained by iterating through and comparing the number of different free groups in the same row to be analyzed. The maximum number of free groups is then used as the number of valid groups in the corresponding row to be analyzed. Obtain the unit memory of a single storage unit, multiply the unit memory by a fixed number to obtain the group memory of a single storage group, and multiply the number of effective groups by the group memory to obtain the effective group space of the corresponding row to be analyzed. By analogy, the effective group space of different rows to be analyzed in the DDR5 memory is calculated; It should be explained that when there are multiple non-contiguous written storage groups in the row to be analyzed, it means that there are multiple non-contiguous free storage groups in the row to be analyzed. In this case, if the file to be written is stored in the corresponding row to be analyzed, multiple written storage groups need to be skipped for writing, which will reduce the writing speed. The effective group space represents the maximum writing space in the row to be analyzed that does not need to be skipped. The space analysis module sends the valid group space of different rows to be analyzed in the DDR5 memory to the read analysis module.
[0021] In this embodiment, the command sending module is used to send a read command for reading a file or a write command for writing a file to the read analysis module; In practical implementation, the read analysis module is used to analyze read operations in the DDR5 memory based on read or write commands. The analysis process includes the following: When only a read command is received, the actual storage address of the file to be read is obtained, and the corresponding file to be read is extracted from the storage group whose logical address is the same as the actual storage address; When both read and write commands are received simultaneously, the write address of the file to be written in the DDR5 memory is analyzed to obtain the target write line of the file. The specific analysis process is as follows: Obtain the actual storage address of the file to be read, extract the corresponding file to be read from the storage group where the logical address is the same as the actual storage address, extract the number of the storage block where the corresponding actual storage address is located, and record the corresponding storage block as the read block; Count the number of storage groups in any row within the storage block and record it as the number of single-row storage groups. Multiply the number of single-row storage groups by the group memory to obtain the single-row group memory within the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. Non-read blocks in the DDR5 memory with priority write rows are denoted as priority write blocks. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of rows required to write the file. If the number of priority write blocks is greater than or equal to the number of groups of lines required to write the file, priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line to write the file. If the number of priority write blocks is less than the number of groups of lines required to write the file, then the number of priority write lines in the DDR5 memory is counted, and the memory blocks in the DDR5 memory are analyzed to obtain the target write lines for the file. The specific analysis process is as follows: Compare the number of lines to be written first with the number of groups of lines required to write the file; When the number of priority write lines is greater than or equal to the number of groups of lines required to write the file, the number of priority write blocks is subtracted from the number of groups of lines required to write the file to obtain a first value. Priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file. Priority write blocks are extracted again in ascending order of storage block number according to the first value, and a single priority write line is extracted from each priority write block as the target write line of the file, until the number of target write lines is greater than or equal to the number of groups of lines required to write the file. When the number of priority write lines is less than the number of group lines required to write the file, the number of priority write blocks is subtracted from the number of group lines required to write the file to obtain the first value. Priority write blocks are extracted in ascending order of storage block number according to the number of group lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file, until no priority write line exists in the DDR5 memory. The number of target write lines is counted, and the number of target write lines is subtracted from the number of group lines required to write the file to obtain the remaining number of group lines required to write the file. The remaining number of group lines is multiplied by the single-row group memory to obtain the remaining memory required to write the file. The effective group space of different rows to be analyzed in the DDR5 memory is obtained, and the different rows to be analyzed are sorted in descending order according to the effective group space to obtain the row sequence. Starting from the first element, the effective group space corresponding to each element in the row sequence is added from left to right until the sum is greater than or equal to the remaining memory required. The rows to be analyzed between the first element and the last element of the sum are recorded as the target write lines of the file. When only a write command is received, count the number of any row storage group in the storage block and record it as the number of single row storage groups. Multiply the number of single row storage groups by the group memory to obtain the single row group memory in the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. The memory block containing the priority write line in the DDR5 memory is denoted as the priority write block. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of lines required to write the file. The comparison yields the target write line of the file. The logical address of the target to be written to is denoted as the target write address; In the specific implementation process, when only a write command is received, the comparison between the number of priority write blocks and the number of group lines required to write the file is the same as the comparison process when both read and write commands are received simultaneously, and will not be repeated here; It should be explained that storing the file to be written to in multiple storage blocks in the target write line, rather than storing it centrally in a single storage block, can reduce the write pressure on the storage block, and storing multiple storage blocks in parallel at the same time will improve the data write speed. The read analysis module sends the target write address of the file to the execution module; The execution module is used to write the write file to the target write line of the DDR5 memory according to the target write address.
[0022] Example 2: Please refer to Figure 5 As shown, based on another concept of the same invention, a high-speed read / write management method suitable for DDR5 memory is proposed, the method including the following steps: Step S101: Divide the storage area in the DDR5 memory to obtain multiple storage blocks and storage groups; Step S102: Based on the actual storage address of the stored file and the logical ground of different storage groups, analyze the storage status of different storage groups in the DDR5 memory, and determine whether the storage status of the storage group is a written storage group or an idle storage group. Step S103: Analyze the storage group of any row in the storage block according to the storage status, and obtain the priority write row and the row to be analyzed in different storage blocks. Step S104: Analyze the memory groups in the DDR5 memory based on the written address, free address and the logical address of the row to be analyzed, and obtain the effective group space of different rows to be analyzed. Step S105: Analyze the read operation in the DDR5 memory according to the read command or write command, and obtain the target write address for writing to the file.
[0023] The preferred embodiments of the present invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to any specific implementation. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.
Claims
1. A high-speed read / write management system suitable for DDR5 memory, characterized in that, include: The region partitioning module is used to partition the storage regions in the DDR5 memory, obtain the logical addresses of different storage groups, and send them to the status analysis module. The data acquisition module is used to acquire the actual storage addresses of different stored files in the DDR5 memory and send them to the status analysis module and the read analysis module; The status analysis module is used to analyze the storage status of different storage groups. It analyzes and obtains the written address of the written storage group, the free address of the free storage group, and the logical address of the row to be analyzed, and sends them to the space analysis module. It analyzes and obtains the logical address of the row to be written first, and sends it to the read analysis module. The space analysis module is used to analyze the memory groups in the DDR5 memory, obtain the effective group space of different rows to be analyzed, and send it to the read analysis module; The command sending module is used to send read commands for reading files or write commands for writing files to the read analysis module; The read analysis module is used to analyze the read operations in the DDR5 memory, and send the target write address to the file to the execution module. The execution module is used to write the write file to the target write line of the DDR5 memory.
2. The high-speed read / write management system for DDR5 memory according to claim 1, characterized in that, The region division module's division process includes the following: The smallest storage unit in DDR5 memory is called a storage cell, and the area in DDR5 memory composed of a fixed number of storage cells is called a storage block. DDR5 memory is divided into multiple storage blocks according to the fixed number of storage cells in a single storage block. The storage blocks are sequentially labeled as the first storage block, the second storage block, ..., the nth storage block, from left to right and from top to bottom, where n is the number of the storage block. For any storage cell within a storage block, from left to right, the area consisting of a fixed number of storage cells in any row within the corresponding storage block is recorded as a storage group, thus obtaining multiple storage groups within the corresponding storage block; The storage groups in the same row are named from left to right as the first column storage group, the second column storage group, ..., the kth column storage group, where k is the column number of the storage group; The storage groups within the same storage block are sequentially labeled as the first row storage group, the second row storage group, ..., the m-th row storage group, in descending order from top to bottom, where m is the row number of the storage group; Using the storage block number n as the first element, the storage group row number m as the second element, and the storage group column number k as the third element, the logical addresses (n, m, k) of different storage groups are constructed.
3. A high-speed read / write management system for DDR5 memory according to claim 1, characterized in that, The analysis process of the state analysis module includes the following: Compare the actual storage addresses of different stored files in the DDR5 memory with the logical addresses of different memory groups; If the logical address of the storage group is the same as the actual storage address of any file already stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as "written to the storage group", and the logical address of the corresponding storage group is recorded as "written address". If the logical address of the storage group is different from the actual storage address of all the files stored in the DDR5 memory, then the storage status of the corresponding storage group is recorded as a free storage group, and the logical address of the corresponding storage group is recorded as a free address. Select any row in any storage block as the analysis object. If the storage status of all storage groups in the corresponding row in the storage block is free storage group, then the corresponding row is recorded as the priority write row. If the storage status of any storage group in the corresponding row within the storage block is "written to storage group", then the corresponding row is recorded as the row to be analyzed. By analogy, the analysis yields multiple priority write rows and rows to be analyzed within the storage block; Using the storage block number as the first element, the storage group row number as the second element, and a fixed value as the third element, the logical addresses of the priority write row and the row to be analyzed are constructed.
4. A high-speed read / write management system for DDR5 memory according to claim 1, characterized in that, The analysis process of the spatial analysis module includes the following: Starting from the first free storage group in the row to be analyzed within the storage block, the storage groups are searched sequentially to the right along the row to be analyzed, and the search results of the storage groups are analyzed to obtain the number of different free groups in the row to be analyzed. The maximum number of free groups is obtained by iterating through and comparing the number of different free groups in the same row to be analyzed. The maximum number of free groups is then used as the number of valid groups in the corresponding row to be analyzed. Obtain the unit memory of a single storage unit, multiply the unit memory by a fixed number to obtain the group memory of a single storage group, and multiply the number of effective groups by the group memory to obtain the effective group space of the corresponding row to be analyzed. By analogy, the effective group space of different rows to be analyzed in the DDR5 memory can be calculated.
5. A high-speed read / write management system for DDR5 memory according to claim 4, characterized in that, The analysis process of the spatial analysis module also includes the following: If the first written storage group is not found, count the number of storage groups in the row to be analyzed and record it as the number of the first free groups; If the first written storage group is found, it is recorded as the first written group. The free address of the starting storage group and the written address of the first written group are obtained. The third element of the corresponding free address of the starting storage group is subtracted from the third element of the corresponding free address of the first written group to obtain the number of first free groups of the row to be analyzed in the corresponding storage block. Then, starting from the first write group, the storage groups are searched sequentially to the right along the row to be analyzed. If the first free storage group is not found, no operation is performed. When the first free storage group is found, the corresponding free storage group is taken as the first free group, and the search is performed sequentially to the right along the free group, and the search results are analyzed to obtain the number of different free groups in the row to be analyzed.
6. A high-speed read / write management system for DDR5 memory according to claim 5, characterized in that, The analysis process of the spatial analysis module also includes the following: If the first written storage group is not found, obtain the logical address of the last storage group in the free group and the free address of the first free group. Subtract the third element of the corresponding logical address from the third element of the first free group and add one to obtain the number of the second free groups for the row to be analyzed. If the first written storage group is found, it is recorded as the second written group. The free address of the first free group and the written address of the second written group are obtained. The third element of the corresponding free address of the first free group is subtracted from the third element of the corresponding free address of the second written group to obtain the number of free storage groups between the first free group and the second written group, and recorded as the number of second free groups of the row to be analyzed. Similarly, the number of free groups in the row to be analyzed is calculated, where j is the number of free groups.
7. A high-speed read / write management system for DDR5 memory according to claim 1, characterized in that, The analysis process of the read analysis module includes the following: When only a read command is received, the actual storage address of the file to be read is obtained, and the corresponding file to be read is extracted from the storage group whose logical address is the same as the actual storage address; When both read and write commands are received simultaneously, the write address of the file to be written in the DDR5 memory is analyzed to obtain the target write line of the file. When only a write command is received, count the number of any row storage group in the storage block and record it as the number of single row storage groups. Multiply the number of single row storage groups by the group memory to obtain the single row group memory in the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. The memory block containing the priority write line in the DDR5 memory is denoted as the priority write block. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of lines required to write the file. The comparison yields the target write line of the file. The logical address of the target to be written to is denoted as the target write address.
8. A high-speed read / write management system for DDR5 memory according to claim 7, characterized in that, The analysis process of the read analysis module also includes the following: Obtain the actual storage address of the file to be read, extract the corresponding file to be read from the storage group where the logical address is the same as the actual storage address, extract the number of the storage block where the corresponding actual storage address is located, and record the corresponding storage block as the read block; Count the number of storage groups in any row within the storage block and record it as the number of single-row storage groups. Multiply the number of single-row storage groups by the group memory to obtain the single-row group memory within the storage block. Get the memory required to write to the file, divide the memory required to write to the file by the memory of a single row group, and then round up to get the number of groups of rows required to write to the file. Non-read blocks in the DDR5 memory with priority write rows are denoted as priority write blocks. The number of priority write blocks is counted, and the number of priority write blocks is compared with the number of groups of rows required to write the file. If the number of priority write blocks is greater than or equal to the number of groups of lines required to write the file, priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line to write the file. If the number of priority write blocks is less than the number of groups of rows required to write the file, the number of priority write lines in the DDR5 memory is counted, and the storage blocks in the DDR5 memory are analyzed to obtain the target write line for the file.
9. A high-speed read / write management system for DDR5 memory according to claim 8, characterized in that, The analysis process of the read analysis module also includes the following: Compare the number of lines to be written first with the number of groups of lines required to write the file; When the number of priority write lines is greater than or equal to the number of groups of lines required to write the file, the number of priority write blocks is subtracted from the number of groups of lines required to write the file to obtain a first value. Priority write blocks are extracted in ascending order of storage block number according to the number of groups of lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file. Priority write blocks are extracted again in ascending order of storage block number according to the first value, and a single priority write line is extracted from each priority write block as the target write line of the file, until the number of target write lines is greater than or equal to the number of groups of lines required to write the file. When the number of priority write lines is less than the number of group lines required to write the file, the number of priority write blocks is subtracted from the number of group lines required to write the file to obtain the first value. Priority write blocks are extracted in ascending order of storage block number according to the number of group lines required to write the file, and a single priority write line is extracted from each priority write block as the target write line of the file, until no priority write line exists in the DDR5 memory. The number of target write lines is counted, and the number of target write lines is subtracted from the number of group lines required to write the file to obtain the remaining number of group lines required to write the file. The remaining number of group lines is multiplied by the single-row group memory to obtain the remaining memory required to write the file. The effective group space of different rows to be analyzed in the DDR5 memory is obtained, and the different rows to be analyzed are sorted in descending order according to the effective group space to obtain the row sequence. Starting from the first element, the effective group space corresponding to each element in the row sequence is added from left to right until the sum is greater than or equal to the remaining memory required. The rows to be analyzed between the first element and the last element of the sum are recorded as the target write lines of the file.
10. A high-speed read / write management method suitable for DDR5 memory, characterized in that, A high-speed read / write management system for DDR5 memory according to any one of claims 1-9, the method comprising the following steps: Step S101: Divide the storage area in the DDR5 memory to obtain multiple storage blocks and storage groups; Step S102: Based on the actual storage address of the stored file and the logical ground of different storage groups, analyze the storage status of different storage groups in the DDR5 memory, and determine whether the storage status of the storage group is a written storage group or an idle storage group. Step S103: Analyze the storage group of any row in the storage block according to the storage status, and obtain the priority write row and the row to be analyzed in different storage blocks. Step S104: Analyze the memory groups in the DDR5 memory based on the written address, free address and the logical address of the row to be analyzed, and obtain the effective group space of different rows to be analyzed. Step S105: Analyze the read operation in the DDR5 memory according to the read command or write command, and obtain the target write address for writing to the file.