A PCB intelligent simulation modeling method, system and device of a new energy charging pile and a storage medium

Abstract

This application discloses a method, system, device, and storage medium for intelligent simulation modeling of PCBs for new energy charging piles. The method includes: acquiring target modeling region data; determining thermal conductivity contribution values; classifying the thermal via array according to the thermal conductivity contribution values ​​to obtain at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level; establishing explicit via models for the thermal vias in the explicit modeling level; dividing the thermal vias in the cluster equivalent modeling level into at least one via cluster according to a preset aggregation rule, and establishing an equivalent thermal bridge model for at least one via cluster; establishing a continuous equivalent diffusion model for the thermal vias in the peripheral diffusion modeling level; coupling the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling region; and embedding the local hybrid simulation sub-model into the charging pile PCB simulation model to perform thermal simulation.

Description

Technical Field

[0001] This application relates to the field of new energy technology, and in particular to a method, system, device and storage medium for intelligent simulation modeling of PCBs for new energy charging piles. Background Technology

[0002] As new energy charging piles develop towards higher power and higher integration, the heat generated by the power devices inside the charging piles during operation is constantly increasing. The PCB, as a crucial carrier for power device mounting and heat conduction, directly impacts the charging pile's heat dissipation performance, operational stability, and device reliability through its thermal design. Especially in the power device mounting area, thermal via arrays are typically placed below the heat dissipation pads, forming a heat conduction path from the device mounting point to the back of the PCB, in conjunction with a back-side heat dissipation copper area, to improve local heat conduction and dissipation. Therefore, in the PCB design process for charging piles, thermal simulation is often used to model and analyze the heat conduction around the power devices to assist in the design of the heat dissipation structure and the optimization of device layout.

[0003] In existing technologies, thermal simulation modeling of charging pile PCBs typically requires modeling the thermal via structures around power devices to reflect the heat conduction process between the heat dissipation pads and the back-side copper heat dissipation area. However, the thermal via arrays are numerous and densely distributed, and the roles of thermal vias at different locations in the local heat dissipation path vary. If a uniform modeling approach is used for the entire thermal via array during thermal simulation, it is easy to encounter a problem where the modeling accuracy of key local heat dissipation areas and the overall simulation efficiency of the board are difficult to balance, thus affecting the applicability of thermal simulation modeling for charging pile PCBs. Summary of the Invention

[0004] To address the aforementioned technical issues, this application provides a method, system, device, and storage medium for intelligent PCB simulation modeling of new energy charging piles.

[0005] The technical solution provided in this application is described below:

[0006] The first aspect of this application provides a PCB intelligent simulation modeling method for new energy charging piles, the method comprising: Obtain target modeling region data corresponding to the target power device. The target modeling region includes at least the heat dissipation pad region of the target power device, the thermal via array disposed below the heat dissipation pad region, and the back heat dissipation copper region, wherein the back heat dissipation copper region is connected to the thermal via array. Based on the target modeling region data, the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array is determined; The thermally conductive via array is classified according to the thermal conductivity contribution value, resulting in at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. Explicit via models are established for the thermally conductive vias in the explicit modeling hierarchy; The thermally conductive vias in the equivalent modeling hierarchy of the clusters are divided into at least one via cluster according to a preset aggregation rule, and an equivalent thermal bridge model is established for the at least one via cluster. A continuous equivalent diffusion model is established for the thermally conductive vias in the peripheral diffusion modeling layer; The explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model are coupled to obtain a local hybrid simulation sub-model of the target modeling region. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad region and the back heat dissipation copper region, respectively. The local hybrid simulation sub-model is embedded into the charging pile PCB simulation model to perform thermal simulation.

[0007] Optionally, the step of hierarchically dividing the thermally conductive via array according to the thermal conductivity contribution value to obtain at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level includes: Based on the thermal conductivity contribution value, determine the high contribution via set, medium contribution via set, and low contribution via set; The thermally conductive vias in the high-contribution via set whose distance from the heat source center of the heat dissipation pad area is less than a first distance threshold and whose thermal conductivity contribution value is greater than the first contribution threshold are classified into explicit modeling levels. Among the remaining thermal vias, identify those that have a preset adjacency relationship with the thermal vias in the explicit modeling level and whose thermal contribution value is between the first contribution threshold and the second contribution threshold, and divide the identified thermal vias into cluster equivalent modeling levels. Thermal vias that are not assigned to the explicit modeling level and the cluster equivalent modeling level, and are located on the periphery of the target modeling region, are classified as the peripheral diffusion modeling level.

[0008] Optionally, establishing an explicit via model for the thermally conductive vias in the explicit modeling hierarchy includes: Obtain the hole structure parameters of each thermally conductive via in the explicit modeling level, wherein the thermally conductive via in the explicit modeling level is the thermally conductive via whose thermal contribution value is higher than the first contribution threshold. Based on the hole structure parameters, a hole wall thermal conductivity model of the thermally conductive via is established; Determine the target copper layer to which the thermal via connects in the PCB thickness direction, as well as the connection area with the heat dissipation pad area and the back heat dissipation copper area; An interlayer thermal conductivity model for the thermally conductive via is established based on the target copper layer and the connection region. Based on the hole wall thermal conductivity model and the interlayer thermal conductivity model, the explicit via model corresponding to the thermally conductive via in the explicit modeling hierarchy is generated.

[0009] Optionally, the thermally conductive vias in the equivalent modeling hierarchy of the clusters are divided into at least one via cluster according to a preset aggregation rule, and an equivalent thermal bridge model is established for the at least one via cluster, including: Obtain the spatial location parameters, hole structure parameters, and thermal conductivity contribution values ​​of each thermally conductive via in the cluster equivalent modeling hierarchy; Based on the hole structure parameters and thermal contribution value of the thermally conductive vias in the cluster equivalent modeling hierarchy, the thermally conductive vias that satisfy the preset aggregation rules are aggregated to obtain at least one via cluster. For the at least one via cluster, determine the thermal conductivity connection between the thermally conductive via and the heat dissipation pad area, the back heat dissipation copper area, and the target copper layer; Based on the hole structure parameters, the thermally conductive connection relationship, and the thermally conductive contribution value, the equivalent vertical thermal conduction parameters and equivalent in-plane diffusion parameters corresponding to each of the via clusters are determined. Based on the equivalent vertical thermal conduction parameters and the equivalent in-plane diffusion parameters, an equivalent thermal bridge model corresponding to the via cluster is constructed.

[0010] Optionally, establishing a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling level includes: The peripheral modeling area is determined based on the spatial distribution range of the thermally conductive vias in the peripheral diffusion modeling layer; Based on the hole structure parameters, thermal connection relationship, and thermal contribution value of the thermally conductive via, determine the local thermal correction amount of the thermally conductive via on the thermal diffusion capability of the peripheral modeling area; Based on the hole structure parameters, the local thermal conductivity correction is mapped to the peripheral modeling area; Construct a continuous equivalent thermal conductivity parameter field corresponding to the peripheral modeling region; Based on the continuous equivalent thermal conductivity parameter field, a continuous equivalent diffusion model corresponding to the peripheral diffusion modeling level is established.

[0011] Optionally, the coupling of the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling region includes: Determine the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range corresponding to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model within the target modeling region, respectively. Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the first coupling boundary between the explicit via model and the equivalent thermal bridge model, and the second coupling boundary between the equivalent thermal bridge model and the continuous equivalent diffusion model; Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the model connection boundaries between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model and the heat source boundary of the heat dissipation pad area and the back heat dissipation copper area, respectively. Based on each boundary, establish the thermal conduction connection relationship between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model, the heat source boundary of the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area. Based on the first coupling boundary, the second coupling boundary, and each of the boundaries, boundary constraints are added to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model; Based on the heat conduction connection relationship and the boundary constraints, a local hybrid simulation sub-model of the target modeling region is constructed.

[0012] Optionally, the preset aggregation rule must simultaneously satisfy the following conditions: The center-to-center distance between any two thermally conductive vias is less than a preset distance threshold. The difference in thermal conductivity contribution between any two thermally conductive vias is less than a preset contribution difference threshold. Any two thermal vias connect to the same or adjacent target copper layers; The connection status between any two thermal vias and the heat dissipation pad area is the same; Any two thermal vias are connected to the same back heat dissipation copper area.

[0013] The second aspect of this application provides a PCB intelligent simulation modeling system for new energy charging piles, including: The data acquisition unit is used to acquire target modeling area data corresponding to the target power device. The target modeling area includes at least the heat dissipation pad area of ​​the target power device, the thermal via array disposed below the heat dissipation pad area, and the back heat dissipation copper area, wherein the back heat dissipation copper area is connected to the thermal via array. A thermal conductivity determination unit is used to determine the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array based on the target modeling region data. A hierarchical partitioning unit is used to hierarchically partition the thermally conductive via array according to the thermal conductivity contribution value, resulting in at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. The first modeling unit is used to establish an explicit via model for the thermally conductive vias in the explicit modeling hierarchy; The second modeling unit is used to divide the thermally conductive vias in the equivalent modeling level of the cluster into at least one via cluster according to a preset aggregation rule, and to establish an equivalent thermal bridge model for the at least one via cluster. The third modeling unit is used to establish a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling layer; The model coupling unit is used to couple the explicit via model, the equivalent thermal bridge model and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling area. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad area and the back heat dissipation copper area respectively. The thermal simulation unit is used to embed the local hybrid simulation sub-model into the charging pile PCB simulation model to perform thermal simulation.

[0014] A third aspect of this application provides a PCB intelligent simulation modeling device for new energy charging piles, the device comprising: Processor, memory, input / output units, and bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program, which the processor invokes to execute the first aspect and any one of the optional methods in the first aspect.

[0015] A fourth aspect of this application provides a computer-readable storage medium on which a program is stored, which, when executed on a computer, performs the methods of the first aspect and any one of the first aspects.

[0016] As can be seen from the above technical solutions, this application has the following beneficial effects: 1. The PCB intelligent simulation modeling method for new energy charging piles provided in this application divides the thermal via array into hierarchical levels based on the thermal contribution value of each thermal via in the thermal via array, and establishes explicit via model, equivalent thermal bridge model and continuous equivalent diffusion model respectively. Then, the above models are coupled to form a local hybrid simulation sub-model and embedded into the PCB simulation model of the charging pile.

[0017] 2. By characterizing thermally conductive vias with different thermal conductivity using modeling methods of different granularities, and achieving synergistic coupling of multi-level models within the same thermal conduction path, the key thermal conduction characteristics of the heat transfer process from the heat dissipation pad area to the back heat dissipation copper area through the thermally conductive via array can be preserved while reducing the overall model size and simulation solution overhead. This balances the accuracy of thermal analysis in local hot spots with the efficiency of overall PCB thermal simulation, thereby improving the modeling accuracy and engineering applicability in the thermal design and heat dissipation optimization process of new energy charging pile PCBs. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic flowchart of an embodiment of the intelligent simulation modeling method for PCB of a new energy charging pile provided in this application; Figure 2 This is a schematic flowchart of a specific embodiment of step S103 in the PCB intelligent simulation modeling method for new energy charging piles provided in this application. Figure 3 This is a schematic flowchart of a specific embodiment of step S104 in the PCB intelligent simulation modeling method for new energy charging piles provided in this application. Figure 4 This is a schematic flowchart of a specific embodiment of step S105 in the PCB intelligent simulation modeling method for new energy charging piles provided in this application. Figure 5 This is a schematic flowchart of a specific embodiment of step S106 in the PCB intelligent simulation modeling method for new energy charging piles provided in this application. Figure 6 This is a schematic diagram of the planar layout of the target modeling area of ​​the new energy charging pile PCB described in this application; Figure 7 This is a cross-sectional view of the target modeling area of ​​the PCB of the new energy charging pile described in this application; Figure 8 This is a schematic diagram of an embodiment of the intelligent simulation modeling device for the PCB of a new energy charging pile provided in this application. Figure 9 This is a schematic diagram of an embodiment of another intelligent simulation modeling device for the PCB of a new energy charging pile provided in this application. Detailed Implementation

[0020] Please see Figure 1 This application first provides an embodiment of a PCB intelligent simulation modeling method for new energy charging piles. In this embodiment, the method can be applied to the thermal design scenarios of charging pile PCBs, such as charging module main power boards, DC-DC converter power boards, rectifier power boards, or other charging pile PCBs with power devices and heat dissipation structures vias. The method is used to establish a local hybrid simulation sub-model for the local heat conduction structure of the power device mounting area, and embed the local hybrid simulation sub-model into the whole board PCB simulation model to improve the modeling adaptability and simulation efficiency of charging pile PCB thermal simulation.

[0021] See Figure 1 In this embodiment, the PCB intelligent simulation modeling method for new energy charging piles may include the following steps: S101. Obtain target modeling area data corresponding to the target power device. The target modeling area includes at least the heat dissipation pad area of ​​the target power device, the thermal via array disposed below the heat dissipation pad area, and the back heat dissipation copper area. The back heat dissipation copper area is connected to the thermal via array. Specifically, the target power device to be analyzed is first determined from the charging pile PCB design documents, thermal design database, or simulation preprocessing model. The target power device can be a MOSFET, IGBT, SiC power device, rectifier bridge module, power driver chip, or other devices with significant heat generation characteristics during operation. Centered on the mounting location of the power device on the PCB, a local area corresponding to its heat dissipation path is extracted as the target modeling area. The target modeling area at least covers the heat dissipation pad area below the power device, the thermally conductive via array thermally connected to the heat dissipation pad area, and the back heat dissipation copper area located on the back of the PCB and connected to the thermally conductive via array. In some embodiments, the target modeling area may further include an intermediate copper layer area connected to the thermally conductive via array, a local solder mask opening area, a heat sink contact area, or a thermal interface material contact area.

[0022] The target modeling area data may include geometric structure data, layer stack data, material property data, and connectivity data. Geometric structure data may include the planar contour of the heat dissipation pad area, the coordinates of the thermal vias, their diameter, spacing, the thickness of the metal layer on the via wall, and the boundary range of the back heat dissipation copper area. Layer stack data may include the total PCB thickness, the layer number of each copper layer, the thickness of each dielectric layer, and the relative positions of each layer. Material property data may include the thermal conductivity of the copper layer, the thermal conductivity of the dielectric layer, the thermal conductivity of the via wall metal, and the thermal conductivity of the solder layer or filler material. Connectivity data can be used to characterize the thermal connectivity between each thermal via and the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area.

[0023] In one example, the power device package pad area and via array distribution information can be extracted from the PCB layout file, and then combined with the stack-up file and material library file to generate the data set of the target modeling area.

[0024] Figure 6 The top-level planar structure of the target modeling region is shown. For example... Figure 6 As shown, the area enclosed by the dashed line is the target modeling area, and the center position is the heat dissipation pad area corresponding to the target power device; the thermal via array is distributed below and around the heat dissipation pad area, and is set on the top copper layer to show the planar distribution range and relative position relationship of the thermal vias.

[0025] See Figure 7 , Figure 7 The layered structure of the target modeling region is shown. For example... Figure 7 As shown, the target power device is mounted on the heat dissipation pad area on the top layer of the PCB; the PCB has multiple inner copper layers with PCB dielectric layers between them; the bottom layer of the PCB has a back heat dissipation copper area; multiple thermal vias are arranged through the PCB thickness direction, respectively thermally connected to the heat dissipation pad area, each inner copper layer and the back heat dissipation copper area, forming a vertical heat conduction path from the heat dissipation pad area to the back heat dissipation copper area.

[0026] S102. Based on the target modeling region data, determine the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array; Specifically, after acquiring the target modeling area data, a thermal conductivity contribution evaluation process can be established for each thermal via in the thermal via array, corresponding to the local heat dissipation path. The thermal conductivity contribution value is used to characterize the relative strength of the thermal conductivity effect of each thermal via in the heat transfer process from the heat dissipation pad area of ​​the target power device to the back heat dissipation copper area. To this end, the thermal conductivity connection relationships between each thermal via and the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area can be identified first, thereby determining the participation mode of each thermal via in the local heat conduction path.

[0027] In this embodiment, the thermal conductivity of each thermal via can be quantified based on its hole structure parameters, the copper layers it connects to, and its position relative to the heat dissipation pad area. For example, factors such as the via's diameter, wall metal layer thickness, number of layers penetrated, connection area with the heat dissipation pad area, connectivity with the back heat dissipation copper area, and relative distance to the heat source center area can be comprehensively considered to form a corresponding thermal conductivity characterization quantity, which is then further converted into a thermal conductivity contribution value for each thermal via. The thermal conductivity contribution value can be a normalized relative contribution coefficient or a contribution score used for ranking and classification. Through this step, the differences in the role of thermal vias with different positions, connection forms, and structural parameters in the local thermal path can be made explicit, providing a basis for subsequent hierarchical modeling.

[0028] It should be noted that the determination of the thermal conductivity contribution value in this embodiment only emphasizes that it can reflect the relative contribution of each thermal via to the heat conduction process from the heat dissipation pad area to the back heat dissipation copper area, while its specific calculation method, weight setting method or normalization method can be further elaborated in subsequent embodiments.

[0029] S103. The thermally conductive via array is divided into hierarchical levels according to the thermal conductivity contribution value, resulting in at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. Specifically, after obtaining the thermal conductivity contribution value of each thermally conductive via, the thermally conductive via array can be layered according to the strength of its thermal conductivity contribution. This allows key thermally conductive vias in the main local heat conduction path to be modeled with different granularities than peripheral auxiliary diffusion vias. In this embodiment, thermally conductive vias with higher thermal conductivity contribution values ​​can be classified into the explicit modeling layer, those with thermal conductivity contribution values ​​in the middle range and spatially clustered characteristics can be classified into the cluster equivalent modeling layer, and those with relatively low thermal conductivity contribution values ​​and mainly involved in peripheral heat diffusion can be classified into the peripheral diffusion modeling layer.

[0030] The hierarchical classification can be based on the ranking of thermal conductivity contribution values, or it can be comprehensively classified by combining the spatial distribution of thermal vias, their distance relationship with the heat dissipation pad area, and their connectivity characteristics with the back heat dissipation copper area. Through this step, the thermal vias, which were originally treated as a unified array, are divided into multiple thermal effect levels, thus providing a basis for subsequently using different modeling strategies to process thermal vias at different levels. It should be understood that this embodiment only illustrates the existence of three types of levels: explicit modeling level, cluster equivalent modeling level, and peripheral diffusion modeling level. In specific implementations, the number of thermal vias, boundary range, and classification thresholds included in each level can be configured according to different power device package sizes, via array sizes, and PCB heat dissipation design requirements.

[0031] Furthermore, this application provides a specific implementation of step S103, which specifically illustrates the hierarchical division process of the thermally conductive via array described in step S103. Through this hierarchical process, the thermally conductive via array can be structurally layered based on the thermal conductivity contribution value combined with spatial position and adjacency relationships.

[0032] See Figure 2 The following is a detailed description of this embodiment, which includes: S1031. Determine the high-contribution via set, the medium-contribution via set, and the low-contribution via set based on the thermal conductivity contribution value; First, based on the thermal conductivity contribution value of each thermally conductive via obtained in step S102, the thermally conductive via array is initially classified. Thermally conductive vias with higher contribution values ​​are grouped into a high-contribution via set, those with contributions in the middle range are grouped into a medium-contribution via set, and those with lower contributions are grouped into a low-contribution via set. This method allows for an initial overall classification of the thermally conductive via array based on contribution levels, forming the foundation for subsequent hierarchical modeling.

[0033] In one example, it is assumed that there are several thermally conductive vias in the target modeling area. Their corresponding thermally conductive contribution values ​​have been calculated in step S102 and normalized to the range of 0 to 1. Among them, thermally conductive vias with a thermally conductive contribution value greater than 0.7 can be regarded as a set of high contribution vias, thermally conductive vias with a thermally conductive contribution value between 0.3 and 0.7 can be regarded as a set of medium contribution vias, and thermally conductive vias with a thermally conductive contribution value less than 0.3 can be regarded as a set of low contribution vias.

[0034] For example, in an array of thermally conductive vias below the heat dissipation pad area of ​​a power device, the thermal contribution values ​​of vias P1, P2, and P3 are 0.85, 0.78, and 0.72, respectively, so they are classified as a high-contribution via set; the thermal contribution values ​​of vias P4, P5, and P6 are 0.55, 0.48, and 0.33, respectively, so they are classified as a medium-contribution via set; and the thermal contribution values ​​of vias P7 and P8 are 0.25 and 0.18, respectively, so they are classified as a low-contribution via set.

[0035] S1032. The thermally conductive vias in the high-contribution via set whose distance from the heat source center of the heat dissipation pad area is less than a first distance threshold and whose thermal contribution value is greater than the first contribution threshold are classified into explicit modeling levels. In this specific embodiment, the set of high-contribution vias undergoes further screening. Specifically, for each thermally conductive via in the set of high-contribution vias, its spatial distance relative to the heat source center of the heat dissipation pad area is calculated. Thermally conductive vias whose distance from the heat source center of the heat dissipation pad area is less than a first distance threshold and whose thermal conductivity contribution value is greater than the first contribution threshold are classified into explicit modeling levels. Through this screening process, thermally conductive vias located near the main heat source and significantly contributing to heat transfer are explicitly modeled to preserve their key vertical thermal conductivity characteristics.

[0036] For the explicit modeling hierarchy partitioning process in this step, taking the set of high-contribution vias as an example, the spatial distance between each high-contribution thermally conductive via and the center of the heat source of the heat dissipation pad is calculated. Assuming that the center of the heat source of the heat dissipation pad is defined as the origin of the coordinate system, the center coordinates of each thermally conductive via can be used to calculate its Euclidean distance.

[0037] For example, if the distance between the coordinate of via P1 and the center of the heat source is 0.15mm, which is less than the first distance threshold of 0.2mm, and its thermal conductivity contribution value of 0.85 is greater than the first contribution threshold of 0.7, then it is classified into the explicit modeling level; if the distance of via P2 is 0.35mm, then even if its thermal conductivity contribution value meets the high level, it does not meet the distance constraint condition, so it is not classified into the explicit modeling level, but enters the subsequent hierarchical processing flow.

[0038] S1033. Among the remaining thermal vias, identify thermal vias that have a preset adjacency relationship with the thermal vias in the explicit modeling level and whose thermal contribution value is between the first contribution threshold and the second contribution threshold, and divide the identified thermal vias into cluster equivalent modeling levels. For the remaining thermally conductive vias not assigned to the explicit modeling level, further adjacency relationship identification processing is performed. Specifically, among the remaining thermally conductive vias, those with a preset adjacency relationship to thermally conductive vias in the explicit modeling level, and whose thermal conductivity contribution value is between a first contribution threshold and a second contribution threshold, are identified and assigned to the cluster equivalent modeling level. The preset adjacency relationship can be used to characterize a spatial distance constraint or connectivity relationship between thermally conductive vias. Through this step, thermally conductive vias with local clustering characteristics and a moderate impact on heat conduction can be merged into cluster-level modeling units for subsequent equivalent thermal bridge modeling.

[0039] S1034. The thermally conductive vias that are not assigned to the explicit modeling level and the cluster equivalent modeling level and are located on the periphery of the target modeling region are assigned to the peripheral diffusion modeling level.

[0040] In this step, for the remaining thermally conductive vias that are not classified into the explicit modeling level and the cluster equivalent modeling level, and which are located in the outer region of the target modeling area, they are classified into the peripheral diffusion modeling level. The thermally conductive vias in the peripheral diffusion modeling level mainly play a role in heat diffusion and balancing in the overall heat conduction path, and their influence on the dominant heat path is relatively weak. Therefore, a unified peripheral diffusion modeling method is used for characterization to reduce the overall modeling complexity.

[0041] S104. Establish an explicit via model for the thermally conductive vias in the explicit modeling hierarchy; Specifically, for thermally conductive vias in the explicit modeling layer, since they contribute significantly to the main thermal path from the heat dissipation pad area of ​​the target power device to the back heat dissipation copper area, an explicit via model can be established for these vias to preserve their finer-grained thermal conduction structure characteristics. When establishing the explicit via model, the actual via location, diameter, wall metal layer, penetration thickness, and connection relationship with each target copper layer can be preserved for each thermally conductive via, and the corresponding vertical thermal conduction path can be constructed in the simulation model accordingly.

[0042] In some implementations, explicit via models can characterize not only the vertical thermal conductivity of thermally conductive vias along the PCB thickness direction, but also the heat exchange relationships between the thermally conductive vias and the heat dissipation pad area, local copper foil area, and back heat dissipation copper area. For thermally conductive vias located in the central area of ​​the heat dissipation pad or near the main heat source, using explicit via models helps improve the simulation accuracy of heat flow convergence in hot spots, local thermal resistance distribution, and vertical thermal conduction paths. It should be understood that this embodiment only describes how explicit via models are used to preserve the structural-level thermal conductivity characteristics of key thermally conductive vias, while the interlayer thermal conductivity construction method and via wall thermal conductivity parameter setting method within the explicit via model can be further explained in subsequent embodiments.

[0043] Furthermore, after completing the hierarchical division of the thermal via array, for the thermal vias classified into the explicit modeling level, since their thermal contribution value is higher than the first contribution threshold and they are located within the dominant thermal path range of the heat dissipation pad area of ​​the target power device, it is necessary to perform structural-level fine modeling on these thermal vias in order to preserve their true thermal conduction characteristics in the vertical thermal path.

[0044] See Figure 3 This application provides a specific embodiment of step S104, and the construction process of the explicit via model described in this embodiment is explained in detail below. This embodiment includes: S1041. Obtain the hole structure parameters of each thermally conductive via in the explicit modeling level, wherein the thermally conductive via in the explicit modeling level is the thermally conductive via whose thermal contribution value is higher than the first contribution threshold. In this embodiment, the hole structure parameters of each thermally conductive via in the explicit modeling layer are first obtained. These hole structure parameters include at least the via's diameter, depth or penetration thickness, metal layer thickness, and spatial coordinates. In one example, these structural parameters can be extracted from the PCB design file or via process parameter table and matched with the target modeling area data to determine the geometric and material basis information of each explicit thermally conductive via. It should be noted that in this embodiment, the thermally conductive vias in the explicit modeling layer are those with a thermal contribution value higher than a first contribution threshold. These types of thermally conductive vias are typically located in areas of high heat flux in the heat dissipation pad region and have a significant impact on the overall heat conduction path.

[0045] S1042. Based on the hole structure parameters, establish a hole wall thermal conductivity model for the thermally conductive via. In this step, a thermal conductivity model of the via wall is established based on the hole structure parameters. Specifically, the thermal conductivity of the via in the radial direction can be equivalently characterized according to the thermal conductivity characteristics of the metal layer on the hole wall and its distribution in the hole wall region. This allows the hole wall region to reflect the heat conduction behavior from the copper layer to the hole or from the hole to the copper layer, thus forming the basic model structure of the hole wall thermal conductivity path.

[0046] S1043. Determine the target copper layer connected to the thermal via in the PCB thickness direction and the connection area with the heat dissipation pad area and the back heat dissipation copper area. Furthermore, in this step, the target copper layer to which the thermal via connects in the PCB thickness direction is determined, and the connection area between the target copper layer and the heat dissipation pad area and the back heat dissipation copper area is determined. The target copper layer may include inner or outer copper layers that are connected through the thermal via, representing a multi-layered thermal conduction path of the thermal via in the vertical direction; the connection area represents the thermal contact interface relationship between the thermal via and the heat dissipation pad area and the back heat dissipation copper area, respectively.

[0047] S1044. Establish an interlayer thermal conductivity model for the thermally conductive via based on the target copper layer and the connection region; An interlayer thermal conductivity model for the thermally conductive via is established based on the target copper layer and the connection region to characterize the thermal path characteristics of vertical heat transfer between different copper layers through the thermally conductive via. This interlayer thermal conductivity model provides an equivalent description of the cross-layer thermal conductivity behavior of the thermally conductive via in the PCB thickness direction.

[0048] S1045. Based on the hole wall thermal conductivity model and the interlayer thermal conductivity model, generate the explicit via model corresponding to the thermally conductive via in the explicit modeling level.

[0049] The hole wall thermal conductivity model and the interlayer thermal conductivity model are combined to generate an explicit via model corresponding to the thermally conductive via in the explicit modeling level. This explicit via model allows the thermally conductive via to participate in the thermal conduction calculation between the heat dissipation pad area and the back heat dissipation copper area at the structural level during thermal simulation, thereby achieving a refined characterization of the vertical thermal conduction path of key thermally conductive vias.

[0050] This application provides an example of a specific embodiment. It is assumed that there is a thermal via P1 in the explicit modeling layer, with a hole diameter of 0.25mm, a hole depth of 1.6mm, and a copper layer thickness of 0.02mm. The thermal via penetrates the four-layer PCB structure and is directly connected to the top heat dissipation pad area and the bottom back heat dissipation copper area, while sequentially connecting the two middle inner copper layers.

[0051] When establishing a hole wall heat conduction model, the hole wall region can be regarded as a continuous heat conduction channel formed along the hole diameter direction based on the distribution of copper layers on the hole wall. This model is used to characterize the heat conduction behavior from each connecting copper layer to the hole and from the hole to each copper layer.

[0052] Furthermore, the thermal via P1 sequentially connects the top copper layer, the first inner copper layer, the second inner copper layer, and the bottom copper layer in the PCB thickness direction. The top copper layer corresponds to the heat dissipation pad area, and the bottom copper layer corresponds to the back heat dissipation copper area. By establishing this interlayer connection, a vertical thermal path can be formed that runs through each copper layer.

[0053] With the combined action of the hole wall thermal conductivity model and the interlayer thermal conductivity model, an explicit via model of the thermally conductive via P1 is generated, enabling it to participate in the thermal conduction calculation between the heat dissipation pad area and the back heat dissipation copper area in the form of structural unit during the thermal simulation process.

[0054] In another example, for a small-diameter thermally conductive via located near the center of the heat dissipation pad, although its hole structure parameters are different from those of P1, the hole wall thermal conductivity model and interlayer thermal conductivity model are still constructed in the same way.

[0055] S105. Divide the thermally conductive vias in the equivalent modeling hierarchy of the cluster into at least one via cluster according to a preset aggregation rule, and establish an equivalent thermal bridge model for the at least one via cluster. Specifically, for thermally conductive vias in the cluster equivalent modeling level, although these vias contribute to the main heat path, their individual importance is usually lower than that of thermally conductive vias in the explicit modeling level. Therefore, instead of building an explicit model for each via individually, multiple thermally conductive vias are first divided into at least one via cluster according to a preset aggregation rule, and then an equivalent thermal bridge model is built using the via cluster as the modeling object. The preset aggregation rule can be used to group thermally conductive vias that are spatially close, have similar thermal conductivity, or have similar connection relationships into the same via cluster.

[0056] When establishing an equivalent thermal bridge model, the same via cluster can be regarded as a cluster-level thermal bridge structure connecting the heat dissipation pad area and the back heat dissipation copper area. This via cluster is then assigned corresponding equivalent vertical thermal conductivity and equivalent in-plane diffusion capability, allowing the via cluster to represent the thermal bridge conduction effect formed by multiple original thermal vias with fewer modeling units during simulation. This preserves the overall thermal conductivity of the thermal vias in the middle contributing region while reducing the model complexity caused by explicit modeling of each via. In one example, several thermal vias located between the edge of the heat dissipation pad and the back heat dissipation copper area, and exhibiting a locally dense distribution, can be classified as the same via cluster, and an equivalent thermal bridge model can replace the multiple individual via models within this cluster.

[0057] It should be noted that this embodiment does not impose too many restrictions on the specific criteria for the preset aggregation rules or the specific methods for obtaining the parameters of the equivalent thermal bridge model. The relevant content can be further developed in subsequent embodiments in conjunction with specific subordinate schemes.

[0058] This application provides a specific embodiment of step S105. In this embodiment, for the thermal vias in this layer, since they exhibit local clustering distribution characteristics in the heat dissipation path of the target power device, and the influence of a single thermal via on the overall heat conduction path is relatively balanced, they are no longer explicitly modeled one via at a time. Instead, they are treated equivalently by via clusters to reduce model complexity and maintain a consistent expression of the overall heat conduction characteristics.

[0059] See Figure 4 The construction process of the equivalent thermal bridge model in this embodiment will be described in detail below. This embodiment includes: S1051. Obtain the spatial location parameters, hole structure parameters, and thermal contribution values ​​of each heat-conducting via in the cluster equivalent modeling hierarchy. In this embodiment, the spatial location parameters, hole structure parameters, and thermal conductivity contribution values ​​of each thermally conductive via in the cluster equivalent modeling level are obtained. The spatial location parameters characterize the distribution of each thermally conductive via below the heat dissipation pad area; the hole structure parameters characterize the geometric and material properties of each thermally conductive via; and the thermal conductivity contribution value characterizes the relative intensity of each thermally conductive via in the local heat conduction path.

[0060] S1052. Based on the hole structure parameters and thermal contribution value of the thermally conductive vias in the cluster equivalent modeling hierarchy, the thermally conductive vias that satisfy the preset aggregation rules are aggregated to obtain at least one via cluster. In this step, based on the pore structure parameters and the thermal conductivity contribution value, thermally conductive vias that meet the preset aggregation rules are aggregated to form at least one via cluster. Through this process, thermally conductive vias that are spatially adjacent and have similar thermal conductivity characteristics are grouped into the same cluster structure, forming the basic unit for equivalent modeling.

[0061] S1053. For the at least one via cluster, determine the thermal conductivity connection between the thermally conductive via and the heat dissipation pad area, the back heat dissipation copper area, and the target copper layer. Furthermore, for the at least one via cluster, the thermal conductivity connection relationship between each thermally conductive via in the via cluster and the heat dissipation pad area, the back heat dissipation copper area, and the target copper layer is determined, thereby enabling the determination of the cross-layer thermal conductivity path of the via cluster in the PCB thickness direction and its thermal conduction interface relationship with the upper and lower layer structures.

[0062] S1054. Based on the hole structure parameters, the thermally conductive connection relationship, and the thermally conductive contribution value, determine the equivalent vertical thermal conduction parameters and equivalent in-plane diffusion parameters corresponding to each of the via clusters. In this embodiment, based on the aforementioned thermally conductive connection relationship, and combined with the hole structure parameters and thermal conductivity contribution values, equivalent vertical thermal conductivity parameters and equivalent in-plane diffusion parameters are determined for each via cluster. The equivalent vertical thermal conductivity parameter characterizes the overall thermal conductivity of the via cluster in the direction from the heat dissipation pad area to the back heat dissipation copper area, while the equivalent in-plane diffusion parameter characterizes the heat diffusion effect of the via cluster in the PCB plane direction.

[0063] S1055. Based on the equivalent vertical thermal conduction parameters and the equivalent in-plane diffusion parameters, construct the equivalent thermal bridge model corresponding to the via cluster.

[0064] Based on the equivalent vertical thermal conduction parameters and the equivalent in-plane diffusion parameters, an equivalent thermal bridge model corresponding to the via cluster is constructed, so that the via cluster participates in the heat transfer process between the heat dissipation pad area and the back heat dissipation copper area in the form of a single equivalent thermal conduction unit during the thermal simulation process.

[0065] In one example, assume that there are three sets of thermally conductive vias in the cluster equivalent modeling hierarchy, denoted as via sets C1, C2 and C3 respectively.

[0066] Among them, via set C1 includes thermally conductive vias P1, P2, and P3, which are spatially concentrated in the lower left center of the heat dissipation pad area, with apertures of 0.25mm, 0.25mm, and 0.30mm, and thermal conductivity contributions of 0.62, 0.58, and 0.60, respectively; via set C2 includes thermally conductive vias P4, P5, and P6, which are spatially located in the lower right area of ​​the heat dissipation pad area, with apertures of 0.20mm, and thermal conductivity contributions of 0.55, 0.53, and 0.51, respectively; via set C3 includes thermally conductive vias P7 and P8, which are spatially dispersed, with thermal conductivity contributions of 0.45 and 0.42, respectively.

[0067] When dividing via clusters, spatial proximity and similar thermal conductivity contribution values ​​are used as the basis. For example, P1, P2 and P3 in via set C1 can be divided into the same via cluster because the spatial distance between them is small and the difference in thermal conductivity contribution values ​​is small. Similarly, P4, P5 and P6 in C2 can also form a single via cluster. As for C3, due to its dispersed spatial location, it can be classified into different via clusters or treated as an independent small-scale via cluster.

[0068] After the via cluster is formed, for example, via cluster C1, it sequentially connects the heat dissipation pad area, the first inner copper layer, the second inner copper layer and the back heat dissipation copper area in the PCB thickness direction, forming a complete vertical heat conduction path through this cross-layer connection relationship.

[0069] Based on this connection, C1 can be equivalently represented as a thermal bridge unit with a unified vertical heat conduction capability. At the same time, combined with its spatial distribution range below the heat dissipation pad area, its in-plane heat diffusion effect is uniformly characterized, forming an equivalent thermal bridge model corresponding to the via cluster C1.

[0070] For via clusters C2 and C3, the same method can be used.

[0071] S106. Establish a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling layer; Specifically, for the thermally conductive vias in the peripheral diffusion modeling layer, since these vias are usually located far from the center of the main heat source, they participate more in the heat diffusion or temperature field smoothing transfer in the local peripheral region. Their influence on the single vias that dominate the main heat path is relatively weak. Therefore, the thermally conductive via region in this layer can be treated as a continuous equivalent diffusion region. When establishing a continuous equivalent diffusion model, the independent geometric shape of a single thermally conductive via is no longer retained. Instead, based on the spatial region covered by the peripheral diffusion modeling layer, an equivalent thermally conductive region with continuous medium characteristics is constructed to characterize the overall thermal diffusion effect formed by multiple low-contribution thermally conductive vias within this region.

[0072] The continuous equivalent diffusion model can be used to simulate the comprehensive heat diffusion capability of the peripheral region in both the PCB thickness and planar directions. This compresses the heat dissipation diffusion network formed by the peripheral low-contribution thermal vias into a continuous thermally conductive region, thereby reducing the model's degrees of freedom and the need for local mesh refinement. Through this step, the modeling scale of the target modeling region can be further compressed without significantly losing the overall thermal conductivity trend of the peripheral diffusion region.

[0073] See Figure 5 Furthermore, this application provides a specific embodiment for establishing a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling level. This embodiment is described in detail below and includes: S1061. Determine the peripheral modeling area based on the spatial distribution range of the heat-conducting vias in the peripheral diffusion modeling layer; In this embodiment, after the hierarchical division of the thermal via array is completed, for the thermal vias assigned to the peripheral diffusion modeling level, since these thermal vias are usually located on the periphery of the target modeling area, their thermal contribution value is relatively low. They have a weak impact on the single hole of the dominant thermal path from the heat dissipation pad area to the back heat dissipation copper area. However, they still have an overall thermal conduction effect in the process of heat diffusion, temperature smoothing distribution and heat extension to the surrounding copper layer in the peripheral area.

[0074] Based on this, the peripheral modeling region is determined according to the spatial distribution range of the thermally conductive vias in the peripheral diffusion modeling layer. The spatial distribution range can be formed by the outer envelope of the via position coordinates of each thermally conductive via in the peripheral diffusion modeling layer, or it can be determined by combining the boundary of the target modeling region and the peripheral distribution characteristics of the thermally conductive vias. The peripheral modeling region is used to define the effective range of the continuous equivalent diffusion model.

[0075] In one example, if the array of thermal vias within the target modeling area is rectangularly distributed, and several thermal vias near the center of the heat dissipation pad area have been included in the explicit modeling level and the cluster equivalent modeling level, then the remaining thermal vias located in the surrounding edge areas can be used as the peripheral diffusion modeling level. In this case, the peripheral modeling area can be formed based on the outermost via boundary of this portion of the thermal vias. For example, it can form a ring-shaped area around the outer perimeter of the explicit modeling area and the cluster equivalent modeling area, or a rectangular or polygonal area covering the distribution range of the peripheral thermal vias.

[0076] S1062. Based on the hole structure parameters, thermal connection relationship, and thermal contribution value of the thermally conductive via, determine the local thermal correction amount of the thermally conductive via on the thermal diffusion capability of the peripheral modeling area. In this step, based on the via's hole structure parameters, thermal conductivity connection relationship, and thermal conductivity contribution value, the local thermal conductivity correction amount for the thermal diffusion capability of the thermal via in the peripheral modeling area is determined. The hole structure parameters reflect the geometric thermal conductivity of the via itself; the thermal conductivity connection relationship reflects the thermal connectivity between the via and the heat dissipation pad area, the target copper layer, and the back heat dissipation copper area; and the thermal conductivity contribution value reflects the relative strength of the via's effect in the local heat conduction path. By considering these factors, a corresponding local thermal conductivity correction amount can be determined for each thermal via in the peripheral diffusion modeling layer, characterizing the enhancing effect of the via on the local thermal conductivity of the peripheral modeling area.

[0077] In one example, assume that there are thermally conductive vias P7, P8, and P9 in the peripheral diffusion modeling layer. Thermally conductive via P7 is directly connected to the back heat dissipation copper area and has a thermal contribution value of 0.28. Thermally conductive via P8 is indirectly connected to the back heat dissipation copper area through an intermediate copper layer and has a thermal contribution value of 0.22. Thermally conductive via P9 only forms thermal connection with a local inner copper layer and has a thermal contribution value of 0.18. Therefore, when determining the local thermal conductivity correction, the local thermal conductivity correction value corresponding to thermally conductive via P7 can be higher than that corresponding to thermally conductive via P8, and the local thermal conductivity correction value corresponding to thermally conductive via P8 can be higher than that corresponding to thermally conductive via P9. This reflects the differentiated impact of peripheral thermally conductive vias on the regional heat diffusion capability under different thermal connectivity relationships and thermal conductivity contribution levels.

[0078] S1063. Based on the hole structure parameters, map the local thermal conductivity correction amount to the peripheral modeling area; In this step, the local thermal conductivity correction is mapped to the peripheral modeling area based on the hole structure parameters. Specifically, the corresponding local thermal conductivity correction can be applied to the local area corresponding to the spatial position of each thermally conductive via in the peripheral modeling area, so that the degree of thermal conductivity enhancement at different positions in the peripheral modeling area matches the actual distribution of the peripheral thermally conductive vias.

[0079] Specifically, the local thermal conductivity correction amount corresponding to each peripheral thermal via can be applied to the local influence area centered on the location of the thermal via, and the adjacent influence areas can be superimposed according to the spatial distribution relationship between multiple thermal vias to form a local thermal conductivity enhancement distribution within the peripheral modeling area.

[0080] S1064. Construct the continuous equivalent thermal conductivity parameter field corresponding to the peripheral modeling region; A continuous equivalent thermal conductivity parameter field is constructed corresponding to the peripheral modeling region. This continuous equivalent thermal conductivity parameter field describes the distribution of equivalent thermal conductivity at various locations within the peripheral modeling region. It can be determined jointly by the basic thermal conductivity parameters of the peripheral modeling region and the local thermal conductivity corrections obtained by mapping each thermally conductive via. Through this continuous equivalent thermal conductivity parameter field, the originally discretely distributed multiple thermally conductive vias in the peripheral diffusion modeling layer can be transformed into thermal conductivity distribution characteristics within a continuous region.

[0081] S1065. Based on the continuous equivalent thermal conductivity parameter field, establish the continuous equivalent diffusion model corresponding to the peripheral diffusion modeling level.

[0082] A continuous equivalent diffusion model corresponding to the peripheral diffusion modeling level is established based on the continuous equivalent thermal conductivity parameter field. Through this continuous equivalent diffusion model, the combined influence of multiple thermally conductive vias in the peripheral diffusion modeling level on the peripheral thermal diffusion process can be characterized in the form of a continuous region during thermal simulation. This reduces the number of discrete vias while preserving the overall thermal conductivity trend of heat diffusion from the peripheral region to the surrounding area.

[0083] In this embodiment, discrete thermally conductive vias in the peripheral diffusion modeling layer are mapped to a continuous equivalent thermally conductive parameter field within the peripheral modeling region. Based on this, a continuous equivalent diffusion model is established, enabling the overall diffusion effect of peripheral low-contribution thermally conductive vias to be expressed by a region-level continuous model. This, together with the explicit via model and the equivalent thermal bridge model, constitutes a multi-level hybrid thermal simulation structure.

[0084] S107. Couple the explicit via model, the equivalent thermal bridge model and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling area. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad area and the back heat dissipation copper area, respectively. Specifically, after establishing the explicit via model, equivalent thermal bridge model, and continuous equivalent diffusion model respectively, the three types of models can be coupled according to their spatial distribution and thermal conduction relationship in the target modeling area to form a unified local hybrid simulation sub-model. During coupling, the connection boundaries and thermal conduction interfaces between different models can be determined based on the distribution range of the explicit modeling level, cluster equivalent modeling level, and peripheral diffusion modeling level in the target modeling area. This allows the explicit via model, equivalent thermal bridge model, and continuous equivalent diffusion model to jointly describe the heat path transferred from the heat dissipation pad area to the back heat dissipation copper area within the same local area.

[0085] In this embodiment, the local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad area at one end and with the back heat dissipation copper area at the other end. That is, heat from the target power device can first be input to the local hybrid simulation sub-model through the heat dissipation pad area, and then transferred to the back heat dissipation copper area through the explicit heat conduction path, cluster-level thermal bridge path, and peripheral diffusion path in the local hybrid simulation sub-model. Through the above coupling, the "refined characterization of key thermal paths" and "compression of peripheral area modeling," which were originally difficult to simultaneously consider in a unified model, are integrated into the same local simulation structure, so that the local hybrid simulation sub-model can reflect the local temperature rise characteristics of the main thermal path and retain the influence of the peripheral diffusion area on the overall temperature field distribution.

[0086] Specifically, one implementation of step S107 includes: determining the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range corresponding to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model within the target modeling region, respectively; determining the first coupling boundary between the explicit via model and the equivalent thermal bridge model, and the second coupling boundary between the equivalent thermal bridge model and the continuous equivalent diffusion model, based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range; and determining the explicit via model... The model, the equivalent thermal bridge model, and the continuous equivalent diffusion model are respectively connected to the heat source boundary of the heat dissipation pad area and the back heat dissipation copper area. Based on these boundaries, the thermal conduction connection relationships between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model and the heat source boundary of the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area are established. Based on the first coupling boundary, the second coupling boundary, and each boundary, boundary constraints are added to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model. Based on the thermal conduction connection relationships and the boundary constraints, a local hybrid simulation sub-model of the target modeling area is constructed.

[0087] Furthermore, this application provides a specific embodiment of step S107, and the construction process of the local hybrid simulation sub-model in this embodiment will be described in detail below.

[0088] In this embodiment, it is necessary to uniformly couple the models of different granularities within the same target modeling region to form a local hybrid simulation sub-model that can simultaneously characterize the dominant thermal pathway and the peripheral diffusion pathway. To this end, this embodiment achieves the coupling construction of multi-level models by determining the spatial distribution range of various models, establishing connection boundaries between models and between models and external heat conduction structures, and applying heat conduction constraints at the corresponding boundaries.

[0089] Specifically, the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range corresponding to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model within the target modeling region are first determined. The first spatial distribution range characterizes the locally high-contribution thermally conductive via region covered by the explicit via model; the second spatial distribution range characterizes the via cluster distribution region covered by the equivalent thermal bridge model; and the third spatial distribution range characterizes the peripheral diffusion modeling region covered by the continuous equivalent diffusion model.

[0090] In one example, if the array of thermally conductive vias below the target power device is densely distributed at the center and sparsely distributed at the periphery, then the explicit via models corresponding to several thermally conductive vias with high thermal contribution values ​​located near the heat source center of the heat dissipation pad can constitute the first spatial distribution range; the equivalent thermal bridge model corresponding to the via clusters formed by multiple medium-contribution thermally conductive vias surrounding the first spatial distribution range can constitute the second spatial distribution range; and the peripheral diffusion region formed by low-contribution thermally conductive vias located at the edge of the target modeling area can constitute the third spatial distribution range. Thus, the three types of models form a spatial distribution structure that gradually transitions from the inside to the outside within the target modeling area.

[0091] After determining the spatial distribution ranges, based on the first, second, and third spatial distribution ranges, a first coupling boundary is determined between the explicit via model and the equivalent thermal bridge model, and a second coupling boundary is determined between the equivalent thermal bridge model and the continuous equivalent diffusion model. The first coupling boundary defines the heat conduction interface between the explicit via model and the equivalent thermal bridge model, and the second coupling boundary defines the heat conduction interface between the equivalent thermal bridge model and the continuous equivalent diffusion model. By setting these coupling boundaries, continuous heat conduction paths can be formed at the boundaries between models of different granularities, rather than isolated segmented models.

[0092] Furthermore, based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, the model connection boundaries between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model and the heat source boundary of the heat dissipation pad area and the back heat dissipation copper area are determined. The model connection boundaries define the heat input and heat output interfaces between the local hybrid simulation sub-model and the external heat conduction structure of the target modeling area. Specifically, the model connection boundary corresponding to the heat dissipation pad area receives heat input from the target power device, and the model connection boundary corresponding to the back heat dissipation copper area facilitates heat transfer to the back heat dissipation copper area. In some embodiments, the model connection boundaries may further relate to the thermal connection interface between the local hybrid simulation sub-model and the intermediate copper layer area to reflect the heat diffusion and transfer process within the multi-layer copper structure inside the PCB.

[0093] Based on the first coupling boundary, the second coupling boundary, and the model connection boundary, a thermal conduction connection relationship is established between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model, and the heat source boundary of the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area. Specifically, the explicit via model can establish a thermal conduction connection with the heat dissipation pad area and the target copper layer through the corresponding connection boundary; the equivalent thermal bridge model can establish a thermal conduction connection with the adjacent copper layer area and the back heat dissipation copper area through the corresponding connection boundary; and the continuous equivalent diffusion model can establish a thermal diffusion connection with the peripheral copper layer area and the back heat dissipation copper area through the peripheral connection boundary, thereby forming an overall thermal conduction path that runs through the heat dissipation pad area, the thermal via array, and the back heat dissipation copper area.

[0094] In one example, the explicit via model located within the first spatial distribution range can be connected to the heat dissipation pad area through its top connection boundary, and to the back heat dissipation copper area or the middle copper layer area through its bottom connection boundary; the equivalent thermal bridge model located within the second spatial distribution range can be connected to the explicit via model through the first coupling boundary, and to the continuous equivalent diffusion model through the second coupling boundary; the continuous equivalent diffusion model located within the third spatial distribution range is connected to the back heat dissipation copper area and the peripheral copper layer area through the peripheral model connection boundary.

[0095] Based on the first coupling boundary, the second coupling boundary, and the model connection boundary, boundary constraints are added to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model. These boundary constraints ensure the continuity of heat conduction and the consistency of heat transfer between different models at the boundaries. For example, temperature continuity constraints and heat flow transfer constraints can be set between the explicit via model and the equivalent thermal bridge model at the first coupling boundary; temperature connection constraints and heat flow balance constraints can be set between the equivalent thermal bridge model and the continuous equivalent diffusion model at the second coupling boundary; and heat input constraints or heat output constraints can be set at the model connection boundaries corresponding to the heat dissipation pad area and the back heat dissipation copper area. Through these boundary constraints, a unified heat transfer coupling relationship can be formed between different modeling levels during the thermal simulation solution process.

[0096] Based on the aforementioned thermal conduction connections and boundary constraints, a local hybrid simulation sub-model of the target modeling region is constructed. Structurally, this local hybrid simulation sub-model comprises three modeling levels: an explicit via model, an equivalent thermal bridge model, and a continuous equivalent diffusion model. It forms a unified coupling with the heat dissipation pad region, each PCB copper layer, and the back heat dissipation copper area along the thermal conduction path. This allows for the simultaneous characterization of the fine vertical heat transfer behavior of high-contribution thermally conductive vias, the bridging heat transfer behavior of medium-contribution thermally conductive via clusters, and the regional diffusion behavior of peripheral low-contribution thermally conductive vias within the same target modeling region.

[0097] Through the above processing method, this embodiment organically integrates the explicit via model, equivalent thermal bridge model and continuous equivalent diffusion model into the same local hybrid simulation sub-model through coupling boundary and model connection boundary, so that thermally conductive vias of different thermal conduction levels can participate in thermal simulation calculation in a unified thermal conduction framework, thereby taking into account both the modeling accuracy of local hot spot areas and the modeling efficiency of peripheral areas.

[0098] In one example, the target modeling area is 12mm × 12mm in size, and the central heat dissipation pad area is 4mm × 4mm in size. Using the heat source center of the heat dissipation pad as a reference, explicit via models are established for the vias within 1.5mm of the heat source center, forming the first spatial distribution range; equivalent thermal bridge models are established for the via clusters within 1.5mm to 3.5mm of the heat source center, forming the second spatial distribution range; and continuous equivalent diffusion models are established for the peripheral heat dissipation via areas beyond 3.5mm of the heat source center, forming the third spatial distribution range.

[0099] The first coupling boundary is formed by the boundary between the first and second spatial distribution ranges, and the second coupling boundary is formed by the boundary between the second and third spatial distribution ranges. The three types of models form upper model connection boundaries at their contact points with the top layer and the heat dissipation pad area, and lower model connection boundaries at their contact points with the bottom layer and the back heat dissipation copper area. By establishing temperature continuity constraints and heat flow transfer constraints at the first and second coupling boundaries, and establishing heat input and heat output constraints at the upper and lower model connection boundaries, a local hybrid simulation sub-model of the target modeling region is constructed.

[0100] S108. Embed the local hybrid simulation sub-model into the charging pile PCB simulation model to perform thermal simulation.

[0101] Specifically, after obtaining the local hybrid simulation sub-model, it can be embedded into the full-board charging pile PCB simulation model as a local high-precision heat conduction module corresponding to the target power device, replacing or simplifying the unified via modeling structure of the corresponding area in the original full-board model. During embedding, the thermal connection relationship between the local hybrid simulation sub-model and the remaining copper layer areas, dielectric layer areas, other device mounting areas, and boundary conditions in the full-board PCB model can be maintained. This allows the local hybrid simulation sub-model to retain the fine-grained characteristics of local key thermal paths while also participating in the solution of heat diffusion and temperature field coupling at the full-board scale.

[0102] During thermal simulation, the PCB simulation model of the charging pile, after embedding a local hybrid simulation sub-model, can be solved based on parameters such as the heat dissipation power of the target power device, ambient temperature, air-cooled or natural heat dissipation boundary conditions, and contact conditions between the back heat dissipation copper area and the heat sink. This yields the temperature distribution in the target power device area, the heat flow distribution around the thermal via array, the temperature rise of the back heat dissipation copper area, and the overall PCB temperature field distribution. Based on the simulation results, further optimization of the thermal via array layout, adjustment of the back heat dissipation copper area size, correction of the power device arrangement scheme, or improvement of the heat dissipation structure design can be achieved.

[0103] In this embodiment, by first identifying the thermal contribution of the via array in the local thermal conduction path of the target power device, and then constructing the vias of different thermal conduction levels as explicit via models, equivalent thermal bridge models and continuous equivalent diffusion models, and coupling them in the same target modeling area to form a local hybrid simulation sub-model, it is possible to compress the modeling complexity of non-critical areas while retaining the key thermal conduction characteristics from the heat dissipation pad area of ​​the power device to the back heat dissipation copper area, thereby taking into account both the thermal simulation accuracy of local hot spots and the thermal simulation efficiency of the whole PCB.

[0104] The foregoing has provided a detailed description of the embodiments of the methods provided in this application. The following is a detailed description of the embodiments of the systems, devices, and storage media provided in this application.

[0105] See Figure 8 This application provides an embodiment of a PCB intelligent simulation modeling system for new energy charging piles, which includes: The data acquisition unit 801 is used to acquire target modeling area data corresponding to the target power device. The target modeling area includes at least the heat dissipation pad area of ​​the target power device, the thermal via array disposed below the heat dissipation pad area, and the back heat dissipation copper area. The back heat dissipation copper area is connected to the thermal via array. The thermal conductivity determination unit 802 is used to determine the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array based on the target modeling region data. The hierarchical division unit 803 is used to hierarchically divide the thermally conductive via array according to the thermal conductivity contribution value, to obtain at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. The first modeling unit 804 is used to establish an explicit via model for the thermally conductive vias in the explicit modeling hierarchy; The second modeling unit 805 is used to divide the thermally conductive vias in the cluster equivalent modeling level into at least one via cluster according to a preset aggregation rule, and to establish an equivalent thermal bridge model for the at least one via cluster. The third modeling unit 806 is used to establish a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling layer; Model coupling unit 807 is used to couple the explicit via model, the equivalent thermal bridge model and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling area. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad area and the back heat dissipation copper area respectively. The thermal simulation unit 808 is used to embed the local hybrid simulation sub-model into the charging pile PCB simulation model to perform thermal simulation.

[0106] Optionally, the hierarchical division unit 803 includes: Based on the thermal conductivity contribution value, determine the high contribution via set, medium contribution via set, and low contribution via set; The thermally conductive vias in the high-contribution via set whose distance from the heat source center of the heat dissipation pad area is less than a first distance threshold and whose thermal conductivity contribution value is greater than the first contribution threshold are classified into explicit modeling levels. Among the remaining thermal vias, identify those that have a preset adjacency relationship with the thermal vias in the explicit modeling level and whose thermal contribution value is between the first contribution threshold and the second contribution threshold, and divide the identified thermal vias into cluster equivalent modeling levels. Thermal vias that are not assigned to the explicit modeling level and the cluster equivalent modeling level, and are located on the periphery of the target modeling region, are classified as the peripheral diffusion modeling level.

[0107] Optionally, the first modeling unit 804 includes: Obtain the hole structure parameters of each thermally conductive via in the explicit modeling level, wherein the thermally conductive via in the explicit modeling level is the thermally conductive via whose thermal contribution value is higher than the first contribution threshold. Based on the hole structure parameters, a hole wall thermal conductivity model of the thermally conductive via is established; Determine the target copper layer to which the thermal via connects in the PCB thickness direction, as well as the connection area with the heat dissipation pad area and the back heat dissipation copper area; An interlayer thermal conductivity model for the thermally conductive via is established based on the target copper layer and the connection region. Based on the hole wall thermal conductivity model and the interlayer thermal conductivity model, the explicit via model corresponding to the thermally conductive via in the explicit modeling hierarchy is generated.

[0108] Optionally, the second modeling unit 805 includes: Obtain the spatial location parameters, hole structure parameters, and thermal conductivity contribution values ​​of each thermally conductive via in the cluster equivalent modeling hierarchy; Based on the hole structure parameters and thermal contribution value of the thermally conductive vias in the cluster equivalent modeling hierarchy, the thermally conductive vias that satisfy the preset aggregation rules are aggregated to obtain at least one via cluster. For the at least one via cluster, determine the thermal conductivity connection between the thermally conductive via and the heat dissipation pad area, the back heat dissipation copper area, and the target copper layer; Based on the hole structure parameters, the thermally conductive connection relationship, and the thermally conductive contribution value, the equivalent vertical thermal conduction parameters and equivalent in-plane diffusion parameters corresponding to each of the via clusters are determined. Based on the equivalent vertical thermal conduction parameters and the equivalent in-plane diffusion parameters, an equivalent thermal bridge model corresponding to the via cluster is constructed.

[0109] Optionally, the third modeling unit 806 includes: The peripheral modeling area is determined based on the spatial distribution range of the thermally conductive vias in the peripheral diffusion modeling layer; Based on the hole structure parameters, thermal connection relationship, and thermal contribution value of the thermally conductive via, determine the local thermal correction amount of the thermally conductive via on the thermal diffusion capability of the peripheral modeling area; Based on the hole structure parameters, the local thermal conductivity correction is mapped to the peripheral modeling area; Construct a continuous equivalent thermal conductivity parameter field corresponding to the peripheral modeling region; Based on the continuous equivalent thermal conductivity parameter field, a continuous equivalent diffusion model corresponding to the peripheral diffusion modeling level is established.

[0110] Optionally, the model coupling unit 807 includes: Determine the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range corresponding to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model within the target modeling region, respectively. Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the first coupling boundary between the explicit via model and the equivalent thermal bridge model, and the second coupling boundary between the equivalent thermal bridge model and the continuous equivalent diffusion model; Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the model connection boundaries between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model and the heat source boundary of the heat dissipation pad area and the back heat dissipation copper area, respectively. Based on each boundary, establish the thermal conduction connection relationship between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model, the heat source boundary of the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area. Based on the first coupling boundary, the second coupling boundary, and each of the boundaries, boundary constraints are added to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model; Based on the heat conduction connection relationship and the boundary constraints, a local hybrid simulation sub-model of the target modeling region is constructed.

[0111] Optionally, the preset aggregation rule must simultaneously satisfy the following conditions: The center-to-center distance between any two thermally conductive vias is less than a preset distance threshold. The difference in thermal conductivity contribution between any two thermally conductive vias is less than a preset contribution difference threshold. Any two thermal vias connect to the same or adjacent target copper layers; The connection status between any two thermal vias and the heat dissipation pad area is the same; Any two thermal vias are connected to the same back heat dissipation copper area.

[0112] Please see Figure 9 This application also provides a PCB intelligent simulation modeling device for new energy charging piles, including: Processor 901, memory 902, input / output unit 903, bus 904; The processor 901 is connected to the memory 902, the input / output unit 903, and the bus 904; The memory 902 stores a program, and the processor 901 calls the program to execute any of the methods described above.

[0113] This application also relates to a computer-readable storage medium on which a program is stored, which, when run on a computer, causes the computer to perform any of the methods described above.

[0114] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0115] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between apparatuses or units through some interfaces, and may be electrical, mechanical, or other forms.

[0116] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0117] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0118] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A PCB intelligent simulation modeling method for new energy charging piles, characterized in that, The method includes: Obtain target modeling region data corresponding to the target power device. The target modeling region includes at least the heat dissipation pad region of the target power device, the thermal via array disposed below the heat dissipation pad region, and the back heat dissipation copper region, wherein the back heat dissipation copper region is connected to the thermal via array. Based on the target modeling region data, the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array is determined; The thermally conductive via array is classified according to the thermal conductivity contribution value, resulting in at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. Explicit via models are established for the thermally conductive vias in the explicit modeling hierarchy; The thermally conductive vias in the equivalent modeling hierarchy of the clusters are divided into at least one via cluster according to a preset aggregation rule, and an equivalent thermal bridge model is established for the at least one via cluster. A continuous equivalent diffusion model is established for the thermally conductive vias in the peripheral diffusion modeling layer; The explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model are coupled to obtain a local hybrid simulation sub-model of the target modeling region. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad region and the back heat dissipation copper region, respectively. The local hybrid simulation sub-model is embedded into the charging pile PCB simulation model to perform thermal simulation.

2. The PCB intelligent simulation modeling method for new energy charging piles according to claim 1, characterized in that, The process of hierarchically dividing the thermally conductive via array based on the thermal conductivity contribution value yields at least three levels: explicit modeling, cluster equivalent modeling, and peripheral diffusion modeling. Based on the thermal conductivity contribution value, determine the high contribution via set, medium contribution via set, and low contribution via set; The thermally conductive vias in the high-contribution via set whose distance from the heat source center of the heat dissipation pad area is less than a first distance threshold and whose thermal conductivity contribution value is greater than the first contribution threshold are classified into explicit modeling levels. Among the remaining thermal vias, identify those that have a preset adjacency relationship with the thermal vias in the explicit modeling level and whose thermal contribution value is between the first contribution threshold and the second contribution threshold, and divide the identified thermal vias into cluster equivalent modeling levels. Thermal vias that are not assigned to the explicit modeling level and the cluster equivalent modeling level, and are located on the periphery of the target modeling region, are classified as the peripheral diffusion modeling level.

3. The PCB intelligent simulation modeling method for new energy charging piles according to claim 2, characterized in that, The step of establishing an explicit via model for the thermally conductive vias in the explicit modeling hierarchy includes: Obtain the hole structure parameters of each thermally conductive via in the explicit modeling level, wherein the thermally conductive via in the explicit modeling level is the thermally conductive via whose thermal contribution value is higher than the first contribution threshold. Based on the hole structure parameters, a hole wall thermal conductivity model of the thermally conductive via is established; Determine the target copper layer to which the thermal via connects in the PCB thickness direction, as well as the connection area with the heat dissipation pad area and the back heat dissipation copper area; An interlayer thermal conductivity model for the thermally conductive via is established based on the target copper layer and the connection region. Based on the hole wall thermal conductivity model and the interlayer thermal conductivity model, the explicit via model corresponding to the thermally conductive via in the explicit modeling hierarchy is generated.

4. The PCB intelligent simulation modeling method for new energy charging piles according to claim 2, characterized in that, The thermally conductive vias in the equivalent modeling hierarchy of the clusters are divided into at least one via cluster according to a preset aggregation rule, and an equivalent thermal bridge model is established for the at least one via cluster, including: Obtain the spatial location parameters, hole structure parameters, and thermal conductivity contribution values ​​of each thermally conductive via in the cluster equivalent modeling hierarchy; Based on the hole structure parameters and thermal contribution value of the thermally conductive vias in the cluster equivalent modeling hierarchy, the thermally conductive vias that satisfy the preset aggregation rules are aggregated to obtain at least one via cluster. For the at least one via cluster, determine the thermal conductivity connection between the thermally conductive via and the heat dissipation pad area, the back heat dissipation copper area, and the target copper layer; Based on the hole structure parameters, the thermally conductive connection relationship, and the thermally conductive contribution value, the equivalent vertical thermal conduction parameters and equivalent in-plane diffusion parameters corresponding to each of the via clusters are determined. Based on the equivalent vertical thermal conduction parameters and the equivalent in-plane diffusion parameters, an equivalent thermal bridge model corresponding to the via cluster is constructed.

5. The PCB intelligent simulation modeling method for new energy charging piles according to claim 2, characterized in that, The establishment of a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling layer includes: The peripheral modeling area is determined based on the spatial distribution range of the thermally conductive vias in the peripheral diffusion modeling layer; Based on the hole structure parameters, thermal connection relationship, and thermal contribution value of the thermally conductive via, determine the local thermal correction amount of the thermally conductive via on the thermal diffusion capability of the peripheral modeling area; Based on the hole structure parameters, the local thermal conductivity correction is mapped to the peripheral modeling area; Construct a continuous equivalent thermal conductivity parameter field corresponding to the peripheral modeling region; Based on the continuous equivalent thermal conductivity parameter field, a continuous equivalent diffusion model corresponding to the peripheral diffusion modeling level is established.

6. The PCB intelligent simulation modeling method for new energy charging piles according to claim 1, characterized in that, The coupling of the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling region includes: Determine the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range corresponding to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model within the target modeling region, respectively. Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the first coupling boundary between the explicit via model and the equivalent thermal bridge model, and the second coupling boundary between the equivalent thermal bridge model and the continuous equivalent diffusion model; Based on the first spatial distribution range, the second spatial distribution range, and the third spatial distribution range, determine the model connection boundaries between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model and the heat source boundary of the heat dissipation pad area and the back heat dissipation copper area, respectively. Based on each boundary, establish the thermal conduction connection relationship between the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model, the heat source boundary of the heat dissipation pad area, each PCB copper layer, and the back heat dissipation copper area. Based on the first coupling boundary, the second coupling boundary, and each of the boundaries, boundary constraints are added to the explicit via model, the equivalent thermal bridge model, and the continuous equivalent diffusion model; Based on the heat conduction connection relationship and the boundary constraints, a local hybrid simulation sub-model of the target modeling region is constructed.

7. The PCB intelligent simulation modeling method for new energy charging piles according to claim 4, characterized in that, The preset aggregation rule must simultaneously satisfy the following conditions: The center-to-center distance between any two thermally conductive vias is less than a preset distance threshold. The difference in thermal conductivity contribution between any two thermally conductive vias is less than a preset contribution difference threshold. Any two thermal vias connect to the same or adjacent target copper layers; The connection status between any two thermal vias and the heat dissipation pad area is the same; Any two thermal vias are connected to the same back heat dissipation copper area.

8. A PCB intelligent simulation modeling system for new energy charging piles, characterized in that, include: The data acquisition unit is used to acquire target modeling area data corresponding to the target power device. The target modeling area includes at least the heat dissipation pad area of ​​the target power device, the thermal via array disposed below the heat dissipation pad area, and the back heat dissipation copper area, wherein the back heat dissipation copper area is connected to the thermal via array. A thermal conductivity determination unit is used to determine the thermal conductivity contribution value of each thermally conductive via in the thermally conductive via array based on the target modeling region data. A hierarchical partitioning unit is used to hierarchically partition the thermally conductive via array according to the thermal conductivity contribution value, resulting in at least an explicit modeling level, a cluster equivalent modeling level, and a peripheral diffusion modeling level. The first modeling unit is used to establish an explicit via model for the thermally conductive vias in the explicit modeling hierarchy; The second modeling unit is used to divide the thermally conductive vias in the equivalent modeling level of the cluster into at least one via cluster according to a preset aggregation rule, and to establish an equivalent thermal bridge model for the at least one via cluster. The third modeling unit is used to establish a continuous equivalent diffusion model for the thermally conductive vias in the peripheral diffusion modeling layer; The model coupling unit is used to couple the explicit via model, the equivalent thermal bridge model and the continuous equivalent diffusion model to obtain a local hybrid simulation sub-model of the target modeling area. The local hybrid simulation sub-model establishes a thermal conduction relationship with the heat dissipation pad area and the back heat dissipation copper area respectively. The thermal simulation unit is used to embed the local hybrid simulation sub-model into the charging pile PCB simulation model to perform thermal simulation.

9. A PCB intelligent simulation modeling device for new energy charging piles, characterized in that, The device includes: Processor, memory, input / output units, and bus; The processor is connected to the memory, the input / output unit, and the bus; The memory stores a program, which the processor invokes to perform the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium contains a program that, when executed on a computer, performs the method as described in any one of claims 1 to 7.

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