Semiconductor device
Patent Information
- Application Number
- CN202610143341.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-02-18
- Filing Date
- 2026-02-02
- Publication Date
- 2026-08-18
AI Technical Summary
[0006]The semiconductor device configured as described above can provide a semiconductor device with improved characteristics.
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Figure CN122602531A_ABST
Abstract
Description
[0001] This application is based on Japanese Patent Application 2025-024435 (filed on February 18, 2025), and enjoys priority from that application. This application incorporates the entire contents of that application by reference. Technical Field
[0002] Embodiments of the present invention relate to semiconductor devices. Background Technology
[0003] For example, in semiconductor devices such as transistors, improvements in performance are desired. Summary of the Invention
[0004] Embodiments of the present invention provide a semiconductor device capable of improving performance.
[0005] Means for solving technical problems According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, and a semiconductor component. The first electrode extends along a first direction. The second electrode extends along the first direction. A second direction from the first electrode toward the second electrode intersects the first direction. The third electrode includes a first electrode portion extending along the first direction. The position of the first electrode portion in the second direction is between a first electrode position in the second direction of the first electrode and a second electrode position in the second direction of the second electrode. The semiconductor component includes: a first semiconductor region containing Al x1 Ga 1-x1 N (0 ≤ x1 < 1); and a second semiconductor region containing Al. x2 Ga 1-x2 N (x1 < x2 ≤ 1). A portion of the second semiconductor region lies between the first semiconductor region and the first electrode and between the first semiconductor region and the second electrode in a third direction intersecting the plane containing the first direction and the second direction. The second semiconductor region includes: a first semiconductor portion including a first side and a second semiconductor portion including a second side. At least a portion of the first electrode portion lies between the first side and the second side in the second direction. The first side extends linearly along the first direction. The second side includes a plurality of first portions along a first portion direction and a plurality of second portions along a second portion direction. One of the plurality of first portions is located between one of the plurality of second portions and another of the plurality of second portions. The first portion direction is inclined relative to the second direction. The second portion direction intersects the first portion direction.
[0006] The semiconductor device configured as described above can provide a semiconductor device with improved characteristics. Attached Figure Description
[0007] Figure 1 (a) and Figure 1 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0008] Figure 2 This is a diagram illustrating the characteristics of a semiconductor device.
[0009] Figure 3 (a) and Figure 3 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0010] Figure 4 (a) and Figure 4 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0011] Figure 5 (a) and Figure 5 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0012] Figure 6 (a) and Figure 6 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0013] Figure 7 This is a schematic top view illustrating a semiconductor device according to the second embodiment.
[0014] Figure 8 (a) and Figure 8 (b) is a schematic diagram illustrating a semiconductor device according to the third embodiment.
[0015] Explanation of reference numerals in the attached figures 10, 20: First semiconductor region, second semiconductor region; 10M: Semiconductor component; 10c: Carrier region; 11-15: First part region to fifth part region; 18a: Nitride layer; 18b: Intermediate region; 18s: Substrate; 21, 22: First semiconductor part, second semiconductor part; 31: Compound layer; 41, 42: First insulating component, second insulating component; 51-53: First electrode to third electrode; 53a: First electrode part; 110, 110a to 110 g, 120, 130: Semiconductor device; D1~D3: First direction to third direction; Dp1~Dp4: First part direction to fourth part direction; Dq1: First intermediate part direction; F1, F2: First side, second side; F20: Side; SP1~SP4: First sample to fourth sample; Vth: Threshold voltage; p1~p4: First part to fourth part; pa1, pb1: Part; q1: First intermediate part; θ0: Angle; θ1~θ4: First angle to fourth angle. Detailed Implementation
[0016] Hereinafter, various embodiments of the present invention will be described with reference to the accompanying drawings.
[0017] The accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the ratio of the size between parts, etc., may not be the same as in reality. Even when representing the same part, there may be cases where the dimensions and ratios of each other are represented differently according to the accompanying drawings.
[0018] In this application specification and figures, elements that are the same as those described above with respect to previously presented figures are labeled with the same reference numerals and detailed descriptions are omitted where appropriate.
[0019] (First Implementation) Figure 1 (a) and Figure 1 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0020] Figure 1 (a) is the top view. Figure 1 (b) is Figure 1 (a) Sectional view along lines A1-A2.
[0021] like Figure 1 (a) and Figure 1 As shown in (b), the semiconductor device 110 of the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, and a semiconductor component 10M.
[0022] The first electrode 51 and the second electrode 52 extend along a first direction D1. The first direction D1 is defined as the Y-axis direction. A direction perpendicular to the Y-axis direction is defined as the X-axis direction. A direction perpendicular to both the Y-axis and X-axis directions is defined as the Z-axis direction.
[0023] A second direction D2 from the first electrode 51 toward the second electrode 52 intersects the first direction D1. The second direction D2 may be perpendicular to the first direction D1. The second direction D2 is, for example, the X-axis direction.
[0024] The third electrode 53 includes a first electrode portion 53a. The first electrode portion 53a extends along a first direction D1. The third electrode 53 may extend along the first direction D1. The position of the first electrode portion 53a in the second direction D2 is between the position of the first electrode 51 in the second direction D2 (first electrode position) and the position of the second electrode 52 in the second direction D2 (second electrode position).
[0025] Semiconductor component 10M includes: containing Al x1 Ga 1-x1 The first semiconductor region 10 of N (0 ≤ x1 < 1), and containing Al x2 Ga 1-x2 The second semiconductor region 20 is N (x1 < x2 ≤ 1). The composition ratio x1 can be, for example, greater than 0 and less than 0.15. The first semiconductor region 10 can be a GaN layer. The composition ratio x2 can be, for example, greater than 0.1 and less than 0.4. The second semiconductor region 20 can be, for example, an AlGaN layer.
[0026] A portion of the second semiconductor region 20 lies in the third direction D3 between the first semiconductor region 10 and the first electrode 51, and between the first semiconductor region 10 and the second electrode 52. The third direction D3 intersects a plane that includes the first direction D1 and the second direction D2.
[0027] The second semiconductor region 20 includes a first semiconductor portion 21 containing a first side surface F1 and a second semiconductor portion 22 containing a second side surface F2. At least a portion of the first electrode portion 53a is located between the first side surface F1 and the second side surface F2 in the second direction D2.
[0028] like Figure 1As shown in (a), a first side surface F1 extends in a straight line along a first direction D1. A second side surface F2 includes a plurality of first portions p1 along a first partial direction Dp1 and a plurality of second portions p2 along a second partial direction Dp2. The first partial direction Dp1 and the second partial direction Dp2 are, for example, contained in a plane containing the first direction D1 and the second direction D2. One of the plurality of first portions p1 lies between one of the plurality of second portions p2 and another of the plurality of second portions p2. One of the plurality of second portions p2 lies between one of the plurality of first portions p1 and another of the plurality of first portions p1.
[0029] The first partial direction Dp1 is inclined relative to the second direction D2. The first partial direction Dp1 may be inclined relative to the first direction D1. The second partial direction Dp2 intersects the first partial direction Dp1. In this example, the second partial direction Dp2 is also inclined relative to the second direction D2. The second side surface F2 is, for example, serrated. In the first direction D1, a portion of the second semiconductor portion 22 is located between the first portion p1 and the second portion p2.
[0030] In the semiconductor device 110, the current flowing between the first electrode 51 and the second electrode 52 can be controlled by the potential of the third electrode 53. The potential of the third electrode 53 can, for example, be a potential referenced to the first electrode 51. The first electrode 51 functions as either a source electrode or a drain electrode. The second electrode 52 functions as either a source electrode or a drain electrode. The third electrode 53 functions as a gate electrode. The semiconductor device 110 is, for example, a transistor.
[0031] The first semiconductor region 10 includes a portion opposite to the second semiconductor region 20. A carrier region 10c is formed in this portion. The carrier region 10c is, for example, a two-dimensional electron gas. The semiconductor device 110 is, for example, a HEMT (High Electron Mobility Transistor).
[0032] In this example, the distance between the first electrode 51 and the third electrode 53 is shorter than the distance between the third electrode 53 and the second electrode 52. In this case, the first electrode 51 functions as the source electrode, making stable operation easier to achieve.
[0033] As already explained, in this embodiment, the first side F1 and the second side F2 have different shapes. Due to the different shapes, the crystal orientation of the semiconductor component 10M differs on these sides. Therefore, as explained below, superior characteristics can be obtained.
[0034] Figure 2 This is a diagram illustrating the characteristics of a semiconductor device.
[0035] Figure 2 The characteristics of the first sample SP1, the second sample SP2, the third sample SP3, and the fourth sample SP4 are illustrated. In these samples, the first side surface F1 and the second side surface F2 are parallel to each other in a straight line. In these samples, the crystal orientations of the two side surfaces are different. Figure 2 The horizontal axis represents the angle θ0 between these sides and the reference direction of the semiconductor crystal orientation. Angle θ0 corresponds to the angle between the first direction D1 and the reference direction.
[0036] In the first sample SP1 with an angle θ0 of 0 degrees, the two sides are along the m-plane of the semiconductor component 10M. In the second sample SP2 with an angle θ0 of 30 degrees, the two sides are along the a-plane of the semiconductor component 10M. In the third sample SP3 with an angle θ0 of 60 degrees, the two sides are along another m-plane of the semiconductor component 10M. In the fourth sample SP4 with an angle θ0 of 90 degrees, the two sides are along another a-plane of the semiconductor component 10M. The vertical axis represents the threshold voltage Vth.
[0037] like Figure 2 As shown, the threshold voltage Vth is higher when the side is surface a than when the side is surface m. This is a new insight obtained through experiments conducted by the inventor alone.
[0038] On the other hand, different crystal orientations on the sides typically result in different mobilities and on-resistances. Based on experiments conducted independently by the inventors, for example, the on-resistance is higher when the side is an 'a' face than when the side is an 'm' face. Therefore, while a high threshold can be obtained when both sides are set to 'a' faces, the on-resistance becomes higher.
[0039] In this embodiment, the shapes of the first side F1 and the second side F2 are different. This, for example, allows for a high threshold voltage while suppressing the rise in on-resistance. Alternatively, it allows for maintaining a relatively high threshold voltage while obtaining a low on-resistance. In this embodiment, a semiconductor device with improved characteristics can be provided.
[0040] In one example, the first side F1 may be along the m-plane of the semiconductor component 10M. In this case, the two portions included by the second side F2 may be along the two a-planes of the semiconductor component 10M.
[0041] like Figure 1 As shown, the second part direction Dp2 can be tilted relative to the second direction D2 in a direction opposite to the first part direction Dp1.
[0042] For example, the angle between the first partial direction Dp1 and the second direction D2 is defined as the first angle θ1. The angle between the second partial direction Dp2 and the second direction D2 is defined as the second angle θ2. These angles are, for example, counterclockwise angles. In an embodiment, the sum of the first angle θ1 and the second angle θ2 can be substantially 180 degrees, for example. For example, the sum of the first angle θ1 and the second angle θ2 can be greater than 160 degrees and less than 200 degrees. The sum can also be greater than 170 degrees and less than 190 degrees. Good threshold voltage and good on-resistance can be easily and stably obtained.
[0043] The angle between the first direction Dp1 and the second direction D2 (the first angle θ1) can be substantially 30 degrees or 60 degrees, for example. The first angle θ1 can be, for example, greater than 20 degrees and less than 40 degrees, or greater than 50 degrees and less than 70 degrees. It is easy to obtain a stable and good threshold voltage and good on-resistance.
[0044] In the semiconductor device of the implementation method, such as Figure 1 As shown in (b), the first semiconductor region 10 may include a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15. The direction from the first partial region 11 toward the first electrode 51 is along a third direction D3. The direction from the second partial region 12 toward the second electrode 52 is along a third direction D3.
[0045] The fourth position of the fourth portion region 14 in the second direction D2 is located between the first position of the first portion region 11 in the second direction D2 and the third position of the third portion region 13 in the second direction D2. The fifth position of the fifth portion region 15 in the second direction D2 is located between the third position and the second position of the second electrode 52 in the second direction D2.
[0046] From the fourth region 14 toward the first semiconductor section 21 along the third direction D3. From the fifth region 15 toward the second semiconductor section 22 along the third direction D3.
[0047] For example, a portion of the first electrode portion 53a can be disposed in the second direction D2 between the fourth portion region 14 and the fifth portion region 15. The lengths of the first side surface F1 and the second side surface F2 along the third direction D3 are preferably 100 nm or more and 400 nm or less. By making the lengths of the first side surface F1 and the second side surface F2 along the third direction D3 100 nm or more, a high threshold value is easily obtained. Leakage current is easily reduced. For example, the shape of the side surfaces is easily controlled, and the shapes of the m-plane and the a-plane are easily obtained. By making the lengths of the first side surface F1 and the second side surface F2 along the third direction D3 400 nm or less, a low on-resistance is easily obtained. The lengths of the first side surface F1 and the second side surface F2 along the third direction D3 can substantially correspond to the depth of the groove.
[0048] Semiconductor device 110 may include a substrate 18s and a nitride layer 18a. The substrate 18s may include, for example, a silicon substrate. The nitride layer 18a is disposed between the substrate 18s and the first semiconductor region 10. The nitride layer 18a may include, for example, Al, Ga, and N. The nitride layer 18a may be, for example, a buffer layer.
[0049] The semiconductor device 110 may further include an intermediate region 18b. The intermediate region 18b is located between the nitride layer 18a and the first semiconductor region 10. The intermediate region 18b, for example, contains Al. x3 Ga 1-x3 N (0 ≤ x3 < 1, x3 < z2). The intermediate region 18b can be, for example, a GaN layer. The carbon concentration in the intermediate region 18b is higher than the carbon concentration in the first semiconductor region 10. By including the carbon in the intermediate region 18b, leakage current can be suppressed, for example.
[0050] like Figure 1 As shown in (b), the semiconductor device 110 may include a compound layer 31. The compound layer 31 is disposed at least between the semiconductor component 10M and the third electrode 53. The compound layer 31 may contain, for example, Al. z1 Ga 1-z1 N (0 < z1 ≤ 1, x2 < z1). The component ratio z1 can be, for example, greater than 0.8 and less than 1. Compound layer 31 contains, for example, AlN.
[0051] The semiconductor device 110 may include a first insulating component 41. The first insulating component 41 is located between the compound layer 31 and the first electrode portion 53a. The first insulating component 41 may, for example, include silicon oxide.
[0052] Semiconductor device 110 may include a second insulating member 42. A first semiconductor portion 21 is disposed between a fourth portion region 14 and a portion of the second insulating member 42. A second semiconductor portion 22 is disposed between a fifth portion region 15 and a portion of the second insulating member 42. The first insulating member 41 may include, for example, at least one selected from the group consisting of nitrogen and oxygen, and silicon. The second semiconductor region 20 is protected by the second insulating member 42.
[0053] The following are some examples related to the first side F1 and the second side F2.
[0054] Figure 3 (a) and Figure 3 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0055] Figure 3 (a) illustrates the first side F1 and the second side F2 of the semiconductor device 110 described above. In the semiconductor device 110, the two portions of the second side F2 are along plane a. The first angle θ1 is substantially 60 degrees. The second angle θ2 is 120 degrees.
[0056] like Figure 3 As shown in (b), in the semiconductor device 110a of the embodiment, the two portions included in the second side surface F2 are along the m-plane. The first angle θ1 is substantially 30 degrees. The second angle θ2 is 150 degrees.
[0057] For example, one of the plurality of first portions p1 is along the a-side of the semiconductor component 10M. One of the plurality of second portions p2 is along another a-side of the semiconductor component 10M.
[0058] Alternatively, one of the plurality of first portions p1 is along the m-plane of the semiconductor component 10M. One of the plurality of second portions p2 is along another m-plane of the semiconductor component 10M.
[0059] In semiconductor devices 110 and 110a, the gate width in the serrated second side surface F2 can be lengthened. As a result, a low on-resistance can be obtained.
[0060] Figure 4 (a) and Figure 4 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0061] like Figure 4As shown in (a), in the semiconductor device 110b of this embodiment, the second side F2 further includes a plurality of first intermediate portions q1 along a first intermediate portion direction Dq1. One of the plurality of first intermediate portions q1 is located between one of the plurality of first portions p1 and one of the plurality of second portions p2. The first intermediate portion direction Dq1 intersects the first portion direction Dp1 and intersects the second portion direction Dp2. In this example, the first intermediate portion direction Dq1 is along the second direction D2. The first angle θ1 may be, for example, 60 degrees, etc. The second angle θ2 may be, for example, 120 degrees, etc.
[0062] like Figure 4 As shown in (b), in the semiconductor device 110c of this embodiment, the second side F2 further includes a plurality of first intermediate portions q1. In this example, the direction Dq1 of the first intermediate portions is along the first direction D1. The first angle θ1 may be, for example, 30 degrees, etc. The second angle θ2 may be, for example, 150 degrees, etc. In the first direction D1, a portion of the second semiconductor portion 22 is located between two first intermediate portions q1.
[0063] In this way, the first intermediate portion direction Dq1 can be along either the first direction D1 or the second direction D2. This allows the gate width of the second side F2 to be increased. Consequently, a low on-resistance can be obtained.
[0064] Figure 5 (a) and Figure 5 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0065] like Figure 5 As shown in (a), in the semiconductor device 110d of this embodiment, the second side surface F2 includes a plurality of first intermediate portions q1 along a first intermediate portion direction Dq1. One of the plurality of first intermediate portions q1 is located between a portion pa1 of one of the plurality of first portions p1 and another portion pb1 of that one of the plurality of first portions p1. In this example, the first intermediate portion direction Dq1 also intersects the first portion direction Dp1 and the second portion direction Dp2. In this example, the first intermediate portion direction Dq1 is along the second direction D2. The first angle θ1 may be, for example, 60 degrees, etc. The second angle θ2 may be, for example, 120 degrees, etc.
[0066] like Figure 5As shown in (b), in the semiconductor device 110e of this embodiment, the second side F2 also includes a plurality of first intermediate portions q1. In this example, the length dq1 of one of the plurality of first intermediate portions q1 is longer than a portion pa1 of one of the plurality of first portions p1. The length dq1 is also longer than another portion pb1 of that one of the plurality of first portions p1. The length dq1 can be arbitrarily varied. This allows the gate width of the second side F2 to be increased. As a result, a low on-resistance can be obtained.
[0067] Figure 6 (a) and Figure 6 (b) is a schematic diagram illustrating a semiconductor device according to the first embodiment.
[0068] like Figure 6 As shown in (a), in the semiconductor device 110f of this embodiment, the second side F2 includes a plurality of first portions p1 along a first portion direction and a plurality of second portions p2 along a second portion direction Dp2. The first portion direction Dp1 is inclined relative to the second direction D2. In this example, the second portion direction Dp2 is along the first direction D1. The second angle θ2 is substantially 90 degrees. The first angle θ1 can be, for example, 120 degrees, etc. This allows the gate width of the second side F2 to be lengthened. As a result, a low on-resistance can be obtained.
[0069] like Figure 6 As shown in (b), in the semiconductor device 110g of this embodiment, the first portion direction Dp1 is also inclined relative to the second direction D2, and the second portion direction Dp2 is also along the first direction D1. In the semiconductor device 110g, the length of one of the plurality of first portions p1 is longer than the length of one of the plurality of second portions p2. The length of one of the plurality of first portions p1 can be arbitrarily set to be longer. This allows for a longer gate width on the second side F2. Consequently, a lower on-resistance can be obtained.
[0070] (Second Implementation) Figure 7 This is a schematic top view illustrating a semiconductor device according to the second embodiment.
[0071] like Figure 7 As shown, in the semiconductor device 120 of this embodiment, the shapes of the side surfaces of the first semiconductor portion 21 and the second semiconductor portion 22 are different from those in the semiconductor device of the first embodiment. Other than this, the configuration of the semiconductor device 120 may be the same as that of the semiconductor device of the first embodiment.
[0072] In the semiconductor device 120, the second semiconductor region 20 includes a first semiconductor portion 21 containing a first side surface F1 and a second semiconductor portion 22 containing a second side surface F2. At least a portion of the first electrode portion 53a is located between the first side surface F1 and the second side surface F2 in the second direction D2.
[0073] The second side F2 includes a plurality of first portions p1 along a first portion direction Dp1 and a plurality of second portions p2 along a second portion direction Dp2. One of the plurality of first portions p1 lies between one of the plurality of second portions p2 and another of the plurality of second portions p2. One of the plurality of second portions p2 lies between one of the plurality of first portions p1 and another of the plurality of first portions p1. The first portion direction Dp1 is inclined relative to the second direction D2. The second portion direction Dp2 intersects the first portion direction Dp1.
[0074] The first side F1 includes a plurality of third portions p3 along a third portion direction Dp3 and a plurality of fourth portions p4 along a fourth portion direction Dp4. One of the plurality of third portions p3 lies between one of the plurality of fourth portions p4 and another of the plurality of fourth portions p4. One of the plurality of fourth portions p4 lies between one of the plurality of third portions p3 and another of the plurality of third portions p3. The third portion direction Dp3 is inclined relative to the second direction D2. The fourth portion direction Dp4 intersects the third portion direction Dp3.
[0075] The first angle θ1 between the first part direction Dp1 and the second direction D2 is different from the third angle θ3 between the third part direction Dp3 and the second direction D2, and is also different from the fourth angle θ4 between the fourth part direction Dp4 and the second direction D2.
[0076] The second angle θ2 between the second direction Dp2 and the second direction D2 is different from the third angle θ3, and also different from the fourth angle θ4.
[0077] In the semiconductor device 120, for example, the gate length can be increased in both the first side F1 and the second side F2, thereby achieving low on-resistance.
[0078] For example, the first angle θ1 can be 60 degrees. For example, the second angle θ2 can be 120 degrees. For example, the third angle θ3 can be 30 degrees. For example, the fourth angle θ4 can be 150 degrees. For example, a high threshold voltage Vth and low on-resistance can be obtained.
[0079] The second side F2 in the semiconductor device 120 can be configured using the structure of the second side F2 described with respect to the semiconductor device of the first embodiment. The first side F1 in the semiconductor device 120 can be configured using the structure of the second side F2 described with respect to the semiconductor device of the first embodiment.
[0080] For example, the second direction Dp2 can be tilted relative to the second direction D2 in a direction opposite to the first direction Dp1. The fourth direction Dp4 is tilted relative to the second direction D2 in a direction opposite to the third direction Dp3.
[0081] For example, the sum of the first angle θ1 and the second angle θ2 can be greater than 160 degrees and less than 200 degrees. The sum of the third angle θ3 and the fourth angle θ4 can also be greater than 160 degrees and less than 200 degrees.
[0082] For example, one of the multiple first portions p1 is along the a-side of the semiconductor component 10M, and one of the multiple second portions p2 is along another a-side of the semiconductor component 10M. One of the multiple third portions p3 is along the m-side of the semiconductor component 10M, and one of the multiple fourth portions p4 is along another m-side of the semiconductor component 10M.
[0083] For example, the second side F2 may also include a plurality of first intermediate portions q1 along the first intermediate portion direction Dq1 (see reference). Figure 4 (a) ~ Figure 5 (b)). One of the plurality of first intermediate portions q1 is located between one of the plurality of first portions p1 and one of the plurality of second portions p2. The direction of the first intermediate portion Dq1 intersects with the direction of the first portion Dp1 and intersects with the direction of the second portion Dp2.
[0084] For example, it can suppress the rise in on-resistance and obtain a high threshold voltage. It can maintain a relatively high threshold voltage while obtaining low on-resistance. It can provide semiconductor devices with improved characteristics.
[0085] (Third Implementation) Figure 8 (a) and Figure 8 (b) is a schematic diagram illustrating a semiconductor device according to the third embodiment.
[0086] Figure 8 (a) is the top view. Figure 8 (b) is Figure 8 (a) Sectional view along lines A1-A2.
[0087] like Figure 8 (a) and Figure 8As shown in (b), the semiconductor device 130 of the embodiment includes a first electrode 51, a second electrode 52, a third electrode 53, and a semiconductor component 10M.
[0088] The first electrode 51, the second electrode 52, and the third electrode 53 extend along the first direction D1. The second direction D2 from the first electrode 51 toward the second electrode 52 intersects the first direction D1. The position of the third electrode 53 in the second direction D2 is between the first electrode position of the first electrode 51 in the second direction D2 and the second electrode position of the second electrode 52 in the second direction D2.
[0089] Semiconductor component 10M includes: containing Al x1 Ga 1-x1 The first semiconductor region 10 of N (0≤x1<1) and containing Al x2 Ga 1-x2 The second semiconductor region 20 is N (x1 < x2 ≤ 1).
[0090] The first semiconductor region 10 includes a first partial region 11, a second partial region 12, a third partial region 13, a fourth partial region 14, and a fifth partial region 15, extending from the first partial region 11 toward the first electrode 51 along a third direction D3 that intersects a plane containing the first direction D1 and the second direction D2.
[0091] The direction from the second region 12 toward the second electrode 52 is along the third direction D3. The direction from the third region 13 toward the third electrode 53 is along the third direction D3. The fourth position in the second direction D2 of the fourth region 14 is between the first position in the second direction D2 of the first region 11 and the third position in the second direction D2 of the third region 13. The fifth position in the second direction D2 of the fifth region 15 is between the third position and the second position in the second direction D2 of the second electrode 52.
[0092] The direction from the fifth region 15 toward the second semiconductor region 20 is along the third direction D3. The direction from a portion of the third electrode 53 toward the fifth region 15 is along the second direction D2.
[0093] The second semiconductor region 20 includes a side surface F20 opposite to the third electrode 53 in the second direction D2. The side surface F20 includes a plurality of first portions p1 along the first portion direction Dp1 and a plurality of second portions p2 along the second portion direction Dp2.
[0094] One of the multiple first parts p1 lies between one of the multiple second parts p2 and another of the multiple second parts p2. One of the multiple second parts p2 lies between one of the multiple first parts p1 and another of the multiple first parts p1.
[0095] The first direction Dp1 is inclined relative to the second direction D2. The second direction Dp2 intersects the first direction Dp1.
[0096] In semiconductor device 130, for example, a high threshold voltage is obtained. In semiconductor device 130, for example, a low on-resistance can be obtained. In the embodiment, a semiconductor device with improved characteristics can be provided.
[0097] On the side surface F20 of the semiconductor device 130, various configurations described regarding the second side surface F2 can be applied. For example, the second partial direction Dp2 can be tilted relative to the second direction D2 in a direction opposite to the first partial direction Dp1. The length of the side surface F20 along the third third direction D3 is preferably 100 nm or more and 400 nm or less. By making the length of the side surface F20 along the third third direction D3 100 nm or more, a high threshold value is easily obtained. Leakage current is easily reduced. The shape of the side surface is easily controlled, and the shapes of the m-plane and a-plane are easily obtained. By making the length of the side surface F20 along the third third direction D3 400 nm or less, a low on-resistance is easily obtained.
[0098] For example, the sum of the first angle θ1 between the first partial direction Dp1 and the second direction D2 and the second angle θ2 between the second partial direction Dp2 and the second direction D2 can be greater than 160 degrees and less than 200 degrees.
[0099] For example, one of the plurality of first portions p1 is along the a-side of the semiconductor component 10M, and one of the plurality of second portions p2 is along another a-side of the semiconductor component 10M.
[0100] One of the plurality of first portions p1 is along the m-plane of the semiconductor component 10M, and one of the plurality of second portions p2 is along another m-plane of the semiconductor component 10M.
[0101] In this embodiment, information related to the shape of the semiconductor region is obtained, for example, through electron microscope images. Information related to composition and elemental concentration is obtained, for example, through EDX (Energy Dispersive X-ray Spectroscopy) or SIMS (Secondary Ion Mass Spectrometry). Information related to composition can also be obtained, for example, through reciprocal space mapping.
[0102] The implementation methods may include the following technical solutions: (Technical Solution 1) A semiconductor device comprising: The first electrode extends along a first direction; A second electrode extending along the first direction, wherein a second direction from the first electrode towards the second electrode intersects with the first direction; A third electrode including a first electrode portion extending along the first direction, wherein a position of the first electrode portion in the second direction is between a first electrode position of the first electrode in the second direction and a second electrode position of the second electrode in the second direction; and A semiconductor component, The semiconductor component includes: A first semiconductor region containing Al x1 Ga 1-x1 N (0 ≤ x1 < 1); and A second semiconductor region containing Al x2 Ga 1-x2 N (x1 < x2 ≤ 1), A part of the second semiconductor region is between the first semiconductor region and the first electrode and between the first semiconductor region and the second electrode in a third direction intersecting a plane including the first direction and the second direction, The second semiconductor region includes a first semiconductor part including a first side surface and a second semiconductor part including a second side surface, At least a part of the first electrode portion is between the first side surface and the second side surface in the second direction, The first side surface extends linearly along the first direction, The second side surface includes a plurality of first parts along a first part direction and a plurality of second parts along a second part direction, One of the plurality of first parts is between one of the plurality of second parts and another of the plurality of second parts, The first part direction is inclined with respect to the second direction, The second part direction intersects with the first part direction.
[0103] (Technical solution 2) The semiconductor device according to technical solution 1, wherein, The second part direction is inclined with respect to the second direction in a direction opposite to the first part direction.
[0104] (Technical solution 3) The semiconductor device according to technical solution 2, wherein, <000032The sum of the first angle between the first part direction and the second direction and the second angle between the second part direction and the second direction is greater than 160 degrees and less than 200 degrees.
[0105] (Technical Solution 4) According to the semiconductor device described in technical solution 2, wherein, The angle between the first part direction and the second direction is 20 degrees or more and 40 degrees or less, or 50 degrees or more and 70 degrees or less.
[0106] (Technical Solution 5) The semiconductor device according to any one of technical solutions 2 to 4, wherein, One of the plurality of first portions is along surface a of the semiconductor component, and one of the plurality of second portions is along another surface a of the semiconductor component, or... One of the plurality of first portions is along the m-plane of the semiconductor component, and one of the plurality of second portions is along another m-plane of the semiconductor component.
[0107] (Technical Solution 6) The semiconductor device according to any one of technical solutions 2 to 5, wherein, The second side also includes a plurality of first intermediate portions along the direction of the first intermediate portion. One of the plurality of first intermediate portions is located between one of the plurality of first portions and one of the plurality of second portions. The direction of the first middle portion intersects with the direction of the first portion and also intersects with the direction of the second portion.
[0108] (Technical Solution 7) According to the semiconductor device described in technical solution 6, wherein... The first middle portion is oriented along either the first direction or the second direction.
[0109] (Technical Solution 8) The semiconductor device according to any one of technical solutions 2 to 5, wherein, The second side also includes a plurality of first intermediate portions along the direction of the first intermediate portion. One of the plurality of first intermediate portions is located between a portion of one of the plurality of first portions and another portion of one of the plurality of first portions. The direction of the first intermediate portion intersects the direction of the first portion and intersects the direction of the second portion.
[0110] (Technical solution 9) The semiconductor device according to Technical solution 1, wherein The direction of the second portion is along the first direction.
[0111] (Technical solution 10) A semiconductor device, comprising: A first electrode extending in a first direction; A second electrode extending in the first direction, and a second direction from the first electrode toward the second electrode intersects the first direction; A third electrode including a first electrode portion extending in the first direction, and a position of the first electrode portion in the second direction is between a first electrode position of the first electrode in the second direction and a second electrode position of the second electrode in the second direction; and A semiconductor component The semiconductor component includes: A first semiconductor region containing Al x1 Ga 1-x1 N (0 ≤ x1 < 1); and A second semiconductor region containing Al x2 Ga 1-x2 N (x1 < x2 ≤ 1), A part of the second semiconductor region is between the first semiconductor region and the first electrode, and between the first semiconductor region and the second electrode in a third direction intersecting a plane including the first direction and the second direction, The second semiconductor region includes a first semiconductor portion including a first side surface and a second semiconductor portion including a second side surface, At least a part of the first electrode portion is between the first side surface and the second side surface in the second direction, The second side surface includes a plurality of first portions along a first portion direction and a plurality of second portions along a second portion direction, One of the plurality of first portions is between one of the plurality of second portions and another of the plurality of second portions, The first portion direction is inclined with respect to the second direction, The second portion direction intersects the first portion direction, The first side surface includes a plurality of third portions along a third portion direction and a plurality of fourth portions along a fourth portion direction, One of the plurality of third parts is located between one of the plurality of fourth parts and another of the plurality of fourth parts. The direction of the third part is inclined relative to the second direction. The fourth direction intersects with the third direction. The first angle between the first partial direction and the second direction is different from the third angle between the third partial direction and the second direction, and also different from the fourth angle between the fourth partial direction and the second direction. The second angle between the second part direction and the second direction is different from the third angle and different from the fourth angle.
[0112] (Technical Solution 11) According to the semiconductor device of technical solution 10, wherein, The second part is inclined in the opposite direction to the first part, relative to the second direction. The fourth part is inclined relative to the second direction in the opposite direction to the third part.
[0113] (Technical Solution 12) According to the semiconductor device of technical solution 10, wherein, The sum of the first angle and the second angle is greater than 160 degrees and less than 200 degrees. The sum of the third angle and the fourth angle is greater than 160 degrees and less than 200 degrees.
[0114] (Technical Solution 13) The semiconductor device according to any one of technical solutions 10 to 12, wherein, One of the plurality of first portions is along surface a of the semiconductor component, and one of the plurality of second portions is along another surface a of the semiconductor component. One of the plurality of third portions is along the m-plane of the semiconductor component, and one of the plurality of fourth portions is along another m-plane of the semiconductor component.
[0115] (Technical Solution 14) The semiconductor device according to any one of technical solutions 10 to 13, wherein, The second side also includes a plurality of first intermediate portions along the direction of the first intermediate portion. One of the plurality of first intermediate portions is located between one of the plurality of first portions and one of the plurality of second portions. The direction of the first middle portion intersects with the direction of the first portion and also intersects with the direction of the second portion.
[0116] (Technical Solution 15) The semiconductor device according to any one of technical solutions 1 to 14, wherein, The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. From the first portion of the region toward the first electrode along the third direction From the second portion region toward the second electrode along the third direction From the third portion of the region toward the first electrode portion along the third direction The fourth position in the second direction of the fourth part of the region is located between the first position in the second direction of the first part of the region and the third position in the second direction of the third part of the region. The fifth position in the second direction of the fifth portion region is located between the third position and the second position in the second direction of the second electrode. From the fourth region toward the first semiconductor region along the third direction From the fifth region toward the second semiconductor region along the third direction.
[0117] (Technical Solution 16) According to the semiconductor device of technical solution 15, wherein... A portion of the first electrode portion is located between the fourth and fifth portion regions in the second direction.
[0118] (Technical Solution 17) A semiconductor device comprising: The first electrode extends along a first direction; The second electrode extends along the first direction and intersects the first direction in a second direction from the first electrode toward the second electrode; A third electrode extends along the first direction, and the position of the third electrode in the second direction is between the position of the first electrode in the second direction and the position of the second electrode in the second direction; and Semiconductor components The semiconductor component includes: a first semiconductor region containing Al x1 Ga 1-x1 N (0 ≤ x1 < 1); and a second semiconductor region containing Al x2 Ga 1-x2 N (x1 < x2 ≤ 1), the first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region, in a direction from the first partial region toward the first electrode, along a third direction intersecting a plane including the first direction and the second direction, in a direction from the second partial region toward the second electrode, along the third direction, in a direction from the third partial region toward the third electrode, along the third direction, a fourth position in the second direction of the fourth partial region is between a first position in the second direction of the first partial region and a third position in the second direction of the third partial region, a fifth position in the second direction of the fifth partial region is between the third position and a second position in the second direction of the second electrode, in a direction from the fifth partial region toward the second semiconductor region, along the third direction, in a direction from a part of the third electrode toward the fifth partial region, along the second direction, the second semiconductor region includes a side surface opposed to the third electrode in the second direction, the side surface includes a plurality of first parts along a first partial direction and a plurality of second parts along a second partial direction, one first part among the plurality of first parts is between one second part and another second part among the plurality of second parts, the first partial direction is inclined with respect to the second direction, the second partial direction intersects the first partial direction.
[0119] (Technical solution 18) The semiconductor device according to technical solution 17, wherein the second partial direction is inclined with respect to the second direction, in a direction opposite to the first partial direction.
[0120] (Technical solution 19) The semiconductor device according to technical solution 18, wherein The sum of the first angle between the first part direction and the second direction and the second angle between the second part direction and the second direction is greater than 160 degrees and less than 200 degrees.
[0121] (Technical Solution 20) The semiconductor device according to any one of technical solutions 17-19, wherein, One of the plurality of first portions is along surface a of the semiconductor component, and one of the plurality of second portions is along another surface a of the semiconductor component, or... One of the plurality of first portions is along the m-plane of the semiconductor component, and one of the plurality of second portions is along another m-plane of the semiconductor component.
[0122] According to the implementation method, a semiconductor device with improved characteristics can be provided.
[0123] The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, any specific configuration of the elements included in a semiconductor device, such as electrodes, semiconductor components, semiconductor regions, insulating components, and substrates, is included within the scope of the present invention as long as those skilled in the art can appropriately select from the known scope to similarly implement the present invention and obtain the same effects.
[0124] Furthermore, any scheme that combines any two or more elements of each specific example within the technically possible range is included within the scope of this invention as long as it contains the spirit of this invention.
[0125] Furthermore, all semiconductor devices and manufacturing methods that can be implemented by those skilled in the art through appropriate design modifications based on the semiconductor devices and manufacturing methods described above as embodiments of the present invention, as long as they contain the spirit of the present invention, fall within the scope of the present invention.
[0126] Within the scope of the present invention, those skilled in the art will be able to conceive of various modifications and alterations, which also fall within the scope of the present invention.
[0127] Several embodiments of the present invention have been described, but these embodiments are provided by way of example and are not intended to limit the scope of the invention. These new embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included within the scope and spirit of the invention, and are included within the scope of the invention as set forth in the claims and its equivalents.
Claims
1. A semiconductor device, wherein, have: The first electrode extends along a first direction; The second electrode extends along the first direction and intersects the first direction in a second direction from the first electrode toward the second electrode; The third electrode includes a first electrode portion extending along the first direction, wherein the position of the first electrode portion in the second direction is between the first electrode position in the second direction of the first electrode and the second electrode position in the second direction of the second electrode. as well as Semiconductor components The semiconductor component includes: Includes Al x1 Ga 1-x1 The first semiconductor region of N, where 0 ≤ x1 < 1; and Includes Al x2 Ga 1-x2 The second semiconductor region of N, where x1 <x2≤1, A portion of the second semiconductor region lies between the first semiconductor region and the first electrode, and between the first semiconductor region and the second electrode, in a third direction intersecting the plane containing the first direction and the second direction. The second semiconductor region includes a first semiconductor portion containing a first side and a second semiconductor portion containing a second side. At least a portion of the first electrode portion is located between the first side surface and the second side surface in the second direction. The first side extends in a straight line along the first direction. The second side includes a plurality of first portions along the direction of the first portion and a plurality of second portions along the direction of the second portion. One of the plurality of first parts is located between one of the plurality of second parts and another of the plurality of second parts. The first part is tilted relative to the second direction. The second part of the direction intersects with the first part of the direction.
2. The semiconductor device according to claim 1, wherein, The second part is inclined in the opposite direction to the first part, relative to the second direction.
3. The semiconductor device according to claim 2, wherein, The sum of the first angle between the first part direction and the second direction and the second angle between the second part direction and the second direction is greater than 160 degrees and less than 200 degrees.
4. The semiconductor device according to claim 2, wherein, One of the plurality of first portions is along surface a of the semiconductor component, and one of the plurality of second portions is along another surface a of the semiconductor component, or... One of the plurality of first portions is along the m-plane of the semiconductor component, and one of the plurality of second portions is along another m-plane of the semiconductor component.
5. The semiconductor device according to claim 2, wherein, The second side also includes a plurality of first intermediate portions along the direction of the first intermediate portion. One of the plurality of first intermediate portions is located between one of the plurality of first portions and one of the plurality of second portions. The direction of the first middle portion intersects with the direction of the first portion and also intersects with the direction of the second portion.
6. The semiconductor device according to claim 2, wherein, The second side also includes a plurality of first intermediate portions along the direction of the first intermediate portion. One of the plurality of first intermediate portions is located between a portion of one of the plurality of first portions and another portion of one of the plurality of first portions. The direction of the first middle portion intersects with the direction of the first portion and also intersects with the direction of the second portion.
7. A semiconductor device, wherein, have: The first electrode extends along a first direction; The second electrode extends along the first direction and intersects the first direction in a second direction from the first electrode toward the second electrode; The third electrode includes a first electrode portion extending along the first direction, wherein the position of the first electrode portion in the second direction is between the first electrode position in the second direction of the first electrode and the second electrode position in the second direction of the second electrode. as well as Semiconductor components The semiconductor component includes: Includes Al x1 Ga 1-x1 The first semiconductor region of N, where 0 ≤ x1 < 1; and Includes Al x2 Ga 1-x2 The second semiconductor region of N, where x1 <x2≤1, A portion of the second semiconductor region lies between the first semiconductor region and the first electrode, and between the first semiconductor region and the second electrode, in a third direction intersecting the plane containing the first direction and the second direction. The second semiconductor region includes a first semiconductor portion containing a first side and a second semiconductor portion containing a second side. At least a portion of the first electrode portion is located between the first side surface and the second side surface in the second direction. The second side includes a plurality of first portions along the direction of the first portion and a plurality of second portions along the direction of the second portion. One of the plurality of first parts is located between one of the plurality of second parts and another of the plurality of second parts. The first part is tilted relative to the second direction. The second part of the direction intersects with the first part of the direction. The first side includes a plurality of third portions along the direction of the third portion and a plurality of fourth portions along the direction of the fourth portion. One of the plurality of third parts is located between one of the plurality of fourth parts and another of the plurality of fourth parts. The direction of the third part is inclined relative to the second direction. The fourth direction intersects with the third direction. The first angle between the first partial direction and the second direction is different from the third angle between the third partial direction and the second direction, and also different from the fourth angle between the fourth partial direction and the second direction. The second angle between the second part direction and the second direction is different from the third angle and different from the fourth angle.
8. The semiconductor device according to claim 7, wherein, The second part is inclined in the opposite direction to the first part, relative to the second direction. The fourth part is inclined relative to the second direction in the opposite direction to the third part.
9. The semiconductor device according to claim 1, wherein, The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. From the first portion of the region toward the first electrode along the third direction From the second portion region toward the second electrode along the third direction From the third portion of the region toward the first electrode portion along the third direction The fourth position in the second direction of the fourth part of the region is located between the first position in the second direction of the first part of the region and the third position in the second direction of the third part of the region. The fifth position in the second direction of the fifth portion region is located between the third position and the second position in the second direction of the second electrode. From the fourth region toward the first semiconductor region along the third direction From the fifth region toward the second semiconductor region along the third direction.
10. A semiconductor device, wherein, have: The first electrode extends along a first direction; The second electrode extends along the first direction and intersects the first direction in a second direction from the first electrode toward the second electrode; The third electrode extends along the first direction, and the position of the third electrode in the second direction is between the position of the first electrode in the second direction of the first electrode and the position of the second electrode in the second direction of the second electrode. as well as Semiconductor components The semiconductor component includes: Includes Al x1 Ga 1-x1 The first semiconductor region of N, where 0 ≤ x1 < 1; and Includes Al x2 Ga 1-x2 The second semiconductor region of N, where x1 <x2≤1, The first semiconductor region includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. From the first partial region toward the first electrode along a third direction intersecting the plane containing the first direction and the second direction, From the second portion region toward the second electrode along the third direction From the third region toward the third electrode along the third direction The fourth position in the second direction of the fourth part of the region is located between the first position in the second direction of the first part of the region and the third position in the second direction of the third part of the region. The fifth position in the second direction of the fifth portion region is located between the third position and the second position in the second direction of the second electrode. From the fifth region toward the second semiconductor region along the third direction From a portion of the third electrode toward the fifth region along the second direction The second semiconductor region includes a side facing the third electrode in the second direction. The side includes a plurality of first portions along a first portion direction and a plurality of second portions along a second portion direction. One of the plurality of first parts is located between one of the plurality of second parts and another of the plurality of second parts. The first part is tilted relative to the second direction. The second part of the direction intersects with the first part of the direction.
Citation Information
Patent Citations
Power conversion device and program
JP2025024435A