Display device

CN122658239APending Publication Date: 2026-08-28LG DISPLAY CO LTD
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Patent Information

Application Number
CN202511942929.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-02-27
Filing Date
2025-12-22
Publication Date
2026-08-28

AI Technical Summary

Technical Problem

当多个子像素中的一部分子像素有缺陷时,相应子像素可能显示为暗点或亮点

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Abstract

A display device includes a substrate including a display area and a non-display area outside the display area; a display panel disposed on the substrate within the display area, the display panel including a plurality of sub-pixels; a data driving circuit for driving the plurality of sub-pixels; and a redundancy unit disposed on the substrate within the non-display area, the redundancy unit for driving the plurality of sub-pixels. The plurality of sub-pixels includes a first sub-pixel including a first light emitting device and a driving transistor for driving the first light emitting device, and the redundancy unit includes a first redundancy unit block including a first switch electrically connected to the first light emitting device and a first redundancy sub-pixel electrically connected to the first switch and capable of driving the first light emitting device.
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Description

[0001] Cross-reference to related applications This application claims priority and benefit to Korean Patent Application No. 10-2025-0026016, filed on February 27, 2025, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0002] The embodiments of the present invention generally relate to a display device. Background Technology

[0003] With the development of the information society, the demand for display devices for displaying images has increased in various forms. Recently, various display devices such as liquid crystal displays and organic light-emitting diode displays have been used.

[0004] A display device may include multiple subpixels. When some of the subpixels are defective, the corresponding subpixels may be displayed as dark spots or bright spots.

[0005] The information disclosed in this background section is only for understanding the background technology of the present invention concept, and therefore may contain information that does not constitute prior art. Summary of the Invention

[0006] Embodiments of the present invention can provide a display device that can improve the image quality of a display panel through redundant units.

[0007] Embodiments of the present invention can provide a display device capable of driving sub-pixels in a defective state through redundant units.

[0008] Embodiments of the present invention can provide a display device capable of achieving low power consumption by driving sub-pixels in a defective state.

[0009] Embodiments of the present invention can provide a display device that can achieve process optimization by using components arranged on a silicon substrate using the same process.

[0010] Additional features of the inventive concept will be set forth in the description which follows, and will be apparent in part from the specification, or may be learned by practicing the inventive concept. Embodiments of the invention are not limited to those described herein, and other features not mentioned will become apparent to those skilled in the art from the following description.

[0011] According to an embodiment of the present invention, a display device includes: a substrate, the substrate including a display area and a non-display area located outside the display area; a display panel disposed on the substrate within the display area, the display panel including a plurality of sub-pixels; a data driving circuit for driving the plurality of sub-pixels; and a redundancy unit disposed on the substrate within the non-display area, the redundancy unit for driving the plurality of sub-pixels. The plurality of sub-pixels may include a first sub-pixel, the first sub-pixel including a first light-emitting device and a driving transistor for driving the first light-emitting device, and the redundancy unit may include a first redundancy unit block, the first redundancy unit block including a first switch electrically connected to the first light-emitting device and a first redundant sub-pixel electrically connected to the first switch and capable of driving the first light-emitting device.

[0012] The first switch can be electrically connected to the first redundant sub-pixel via the first connection line, and the first redundant sub-pixel includes a first redundant transistor electrically connected to the first connection line and the first driving voltage line, a second redundant transistor electrically connected to the gate node of the first redundant transistor and the data line, a third redundant transistor electrically connected between the first connection line and the sensing line, and a redundant capacitor electrically connected between the gate node of the first redundant transistor and the first connection line.

[0013] When the first sub-pixel is a defective sub-pixel, the first switch can electrically connect the first light-emitting device and the first redundant sub-pixel, and the first redundant sub-pixel can supply driving current to the first light-emitting device of the defective sub-pixel.

[0014] When the first redundant sub-pixel drives the first light-emitting device, the driving transistor may not supply the current that enables the first light-emitting device to emit light.

[0015] The first sub-pixel may further include a scan transistor electrically connected between the gate node of the driving transistor and the data line, a sensing transistor electrically connected between the first light-emitting device and the sensing line, and a storage capacitor electrically connected between the gate node of the driving transistor and the first light-emitting device.

[0016] When the first redundant sub-pixel supplies driving current to the first light-emitting device, at least one of the scanning transistor and the sensing transistor can be in the off state.

[0017] A defective subpixel can be a subpixel that has a defect in at least one of the driving transistor, scanning transistor, sensing transistor, first light-emitting device, and storage capacitor.

[0018] The redundant unit may include multiple redundant unit blocks, the multiple redundant unit blocks include a first redundant unit block and a second redundant unit block, and the multiple sub-pixels may further include a second sub-pixel, wherein the first redundant unit block is electrically connected to the first sub-pixel, and wherein the second redundant unit block is electrically connected to the second sub-pixel and includes a second switch different from the first switch and a second redundant sub-pixel different from the first redundant sub-pixel.

[0019] The number of redundant unit blocks in multiple redundant unit blocks can be equal to or less than the number of sub-pixels in multiple sub-pixels.

[0020] The readout circuit can be mounted on the substrate. The readout circuit receives and senses current from multiple sub-pixels. The microprocessor can be mounted on the substrate and control the readout circuit and the display panel.

[0021] The substrate may contain silicon material, wherein the microprocessor may include a first transistor formed on the substrate, wherein the read circuit may include a second transistor formed on the substrate, wherein the driving transistor may be formed on the substrate, and wherein the display device may further include an insulating layer disposed on the substrate, a first electrode electrically connected to the first transistor and disposed in the insulating layer, a second electrode electrically connected to the second transistor and disposed in the insulating layer, and a third electrode electrically connected to the driving transistor and disposed in the insulating layer.

[0022] The anode can be electrically connected to the third electrode, the light-emitting layer can be disposed on the anode, the cathode can be disposed on the light-emitting layer, the color filter can be disposed on the cathode, and the microlens can be disposed on the color filter and overlap with the color filter.

[0023] The first sub-pixel may further include a first protection device electrically connected between the first light-emitting device and the driving transistor.

[0024] When the first sub-pixel is determined to be a defective sub-pixel, the first protection device can electrically insulate the first light-emitting device from the driving transistor.

[0025] The first protection device can be used to disconnect the electrical connection between the first light-emitting device and the driving transistor via electrical control.

[0026] The first subpixel can be driven during a first driving period for displaying the image and a second driving period for detecting whether the first subpixel has defects.

[0027] The second driving period may include a first period of supplying a test voltage to the first sub-pixel, a second period of receiving a test current from the first sub-pixel by the readout circuit, and a third period of determining whether the first sub-pixel has a defect by using test data generated based on the test current.

[0028] When the first sub-pixel is determined to be a defective sub-pixel, the microprocessor can store the coordinates of the first sub-pixel. The microprocessor can send a signal to the first protection device of the first sub-pixel, causing the first protection device to disconnect the electrical connection between the first light-emitting device and the driving transistor. The microprocessor can also control the first switch to be in the on state, so that the first redundant sub-pixel is electrically connected to the first light-emitting device.

[0029] The first sub-pixel may further include a second light-emitting device driven by a driving transistor, a second sensing transistor electrically connected between the second light-emitting device and the sensing line, and a second protection device electrically connected between the second light-emitting device and the driving transistor, wherein the first redundant unit block may further include a second switch electrically connected between the first redundant sub-pixel and the second light-emitting device.

[0030] The first protection device can be in a state where the electrical connection between the driving transistor and the first light-emitting device is disconnected, or the second protection device can be in a state where the electrical connection between the driving transistor and the second light-emitting device is disconnected.

[0031] According to an embodiment of the present invention, a method for determining a defective sub-pixel in a display device may include: forming a substrate including a display area and a non-display area located outside the display area; forming a display panel on the substrate within the display area, the display panel including a plurality of sub-pixels, the plurality of sub-pixels including a first light-emitting device and a driving transistor for driving the first light-emitting device; forming a redundant unit on the substrate within the non-display area, the redundant unit being used to drive the plurality of sub-pixels; driving the first sub-pixel among the plurality of sub-pixels during a first driving period for displaying an image; and driving the first sub-pixel during a second driving period for detecting whether the first sub-pixel is defective, wherein the redundant unit may include a first redundant unit block, the first redundant unit block including a first switch electrically connected to the first light-emitting device and a first redundant sub-pixel electrically connected to the first switch and capable of driving the first light-emitting device, wherein when the first sub-pixel is determined to be a defective sub-pixel, the first redundant sub-pixel may be electrically connected to the first light-emitting device.

[0032] A first switch is connected to a first redundant sub-pixel via a first connection line. The first redundant sub-pixel may include a first redundant transistor electrically connected to the first connection line and a first driving voltage line, a second redundant transistor electrically connected to the gate node of the first redundant transistor and a data line, a third redundant transistor electrically connected between the first connection line and a sensing line, and a redundant capacitor electrically connected between the gate node of the first redundant transistor and the first connection line.

[0033] When the first sub-pixel is a defective sub-pixel, the first switch can electrically connect the first light-emitting device and the first redundant sub-pixel, and the first redundant sub-pixel can supply driving current to the first light-emitting device of the defective sub-pixel.

[0034] The method may further include forming a readout circuit on the substrate and forming a microprocessor on the substrate, the microprocessor being able to control the readout circuit and the display panel, wherein the readout circuit can receive and sense current from multiple sub-pixels.

[0035] The second driving period may include: supplying a test voltage to the first sub-pixel during the first period; receiving a test current from the first sub-pixel by a readout circuit during the second period; and determining that the first sub-pixel is defective by test data generated based on the test current during the third period.

[0036] When the first sub-pixel is determined to be a defective sub-pixel, the method may further include: storing the coordinates of the first sub-pixel by a microprocessor; sending a signal from the microprocessor to a first protection device of the first sub-pixel to cause the first protection device to disconnect the electrical connection between the first light-emitting device and the driving transistor; and controlling a first switch to be in an on state by the microprocessor to electrically connect the first redundant sub-pixel to the first light-emitting device.

[0037] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed invention. Attached Figure Description

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention and illustrate embodiments thereof, and together with the specification serve to explain the inventive concept.

[0039] Figure 1 This is a block diagram of a display device according to an embodiment of the present invention.

[0040] Figure 2 This is an equivalent circuit diagram of a sub-pixel according to an embodiment of the present invention.

[0041] Figure 3 This is a diagram illustrating sub-pixels and redundant units according to an embodiment of the present invention.

[0042] Figure 4 This is a diagram illustrating redundant sub-pixels according to an embodiment of the present invention.

[0043] Figure 5 This is a diagram illustrating multiple redundant units and sub-pixel blocks according to an embodiment of the present invention.

[0044] Figure 6 and Figure 7 Is it like this? Figure 1 The sectional views of regions AB, CD, and EF are shown.

[0045] Figure 8 This is another image illustrating a sub-pixel according to an embodiment of the present invention.

[0046] Figure 9 This is another image illustrating a sub-pixel according to an embodiment of the present invention.

[0047] Figure 10 This is a schematic perspective view of a display device 100 according to an embodiment of the present disclosure. Detailed Implementation

[0048] In the following description, numerous specific details are set forth for illustrative purposes to provide a thorough understanding of various embodiments or implementations of the invention. As used herein, “embodiment” and “implementation” are interchangeable terms and are non-limiting examples of apparatus or methods employing one or more inventive concepts disclosed herein. However, it will be apparent that various embodiments may be practiced without these specific details or one or more equivalent arrangements. In other instances, well-known structures and apparatuses are shown in block diagram form to avoid unnecessarily obscuring the various embodiments. Furthermore, the various embodiments may differ but are not necessarily exclusive. For example, a particular shape, configuration, and characteristic of one embodiment may be used or implemented in another embodiment without departing from the inventive concept.

[0049] Unless otherwise stated, the illustrated embodiments should be understood as providing features of different details that can be implemented in practice in some ways that reflect the inventive concept. Therefore, unless otherwise stated, features, components, modules, layers, films, panels, regions and / or aspects (hereinafter individually or collectively referred to as “elements”) of various embodiments may be combined, separated, interchanged and / or rearranged in other ways without departing from the inventive concept.

[0050] The use of section lines and / or shading in the accompanying drawings is generally for the purpose of clarifying the boundaries between adjacent elements. Therefore, the presence or absence of section lines or shading does not indicate or suggest any preference or requirement for particular materials, material properties, dimensions, scale, commonalities between illustrated elements, and / or any other characteristics, properties, or characteristics of the elements, unless otherwise stated. Furthermore, in the accompanying drawings, the dimensions and relative dimensions of elements may be exaggerated for clarity and / or descriptive purposes. When an embodiment can be implemented in different ways, the specific process sequence may be performed differently than the described sequence. For example, two consecutively described processes may be performed substantially simultaneously, or two consecutively described processes may be performed in the reverse order of their description. Moreover, the same reference numerals denote the same elements.

[0051] When a component (e.g., a layer) is referred to as being "on," "connected to," or "bonded to" another component or layer, it may be directly on, directly connected to, or directly bonded to the other component or layer, or there may be intermediate components or layers present. However, when a component or layer is referred to as being directly "on," "directly connected to," or "directly bonded to" another component or layer, there are no intermediate components or layers present. Therefore, the term "connection" can refer to a physical, electrical, and / or fluid connection, with or without intermediate components. Furthermore, the D1, D2, and D3 axes are not limited to the three axes of a Cartesian coordinate system such as the x, y, and z axes, and can be interpreted in a broader sense. For example, the D1, D2, and D3 axes can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0052] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.

[0053] For descriptive purposes, this document may use spatially relative terms such as “below,” “under,” “below,” “lower,” “above,” “upper,” “above,” “higher,” and “side” (e.g., “sidewall”) to describe the relationship of one element shown in the figures to one or more other elements. In addition to the orientations shown in the figures, the spatially relative terms are also intended to cover different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figures is flipped, an element described as “below” or “under” other elements or features would be oriented “above” other elements or features. Thus, the exemplary term “below” can include both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or oriented in other orientations), and therefore the spatially relative descriptions used herein shall be interpreted accordingly.

[0054] The terminology used herein is for describing particular embodiments and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. Furthermore, the use of the terms “comprising,” “containing,” “having,” and / or “including” in this specification describes the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof, but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than terms of degree, and are therefore used to explain the inherent biases in measurements, calculations, and / or values ​​provided that would be recognized by one of ordinary skill in the art.

[0055] This document describes various embodiments with reference to cross-sectional and / or exploded views as schematic illustrations of idealized embodiments and / or intermediate structures. Therefore, variations in the shapes shown in the drawings due to, for example, manufacturing techniques and / or tolerances should be expected. Consequently, the embodiments disclosed herein are not necessarily to be construed as limited to the specific shapes of the shown areas, but rather include shape deviations due to, for example, manufacturing processes. Thus, the areas shown in the figures can be schematic in nature, and the shapes of these areas may not reflect the actual shapes of the areas of the device, and are therefore not necessarily intended to be limiting.

[0056] In accordance with the conventions of the art, some embodiments are described and illustrated in the accompanying drawings from the perspective of functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuitry such as logic circuits, discrete components, microprocessors, hardwired circuits, storage elements, wiring connections, etc., which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and may optionally be driven by firmware and / or software. It is also conceivable that each block, unit, and / or module can be implemented by dedicated hardware, or can be implemented as a combination of dedicated hardware performing certain functions and processors (e.g., one or more programmable microprocessors and associated circuitry) performing other functions. Furthermore, without departing from the scope of the inventive concept, each block, unit, and / or module of some embodiments may be physically separated into two or more interacting, separate blocks, units, and / or modules. Furthermore, without departing from the scope of the inventive concept, some embodiments of blocks, units and / or modules may be physically combined into more complex blocks, units and / or modules.

[0057] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms (such as those defined in common dictionaries) shall be interpreted as having the meaning consistent with their meaning in the relevant field context and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0058] In the following description of examples or embodiments of the invention, reference will be made to the accompanying drawings, in which specific examples or embodiments that can be implemented are illustrated by way of illustration, and in which the same reference numerals and symbols may be used to denote the same or similar parts, even if they are shown in different drawings. Furthermore, in the following description of examples or embodiments of the invention, such detailed descriptions will be omitted where it is determined that detailed descriptions of well-known functions and components included herein may make the subject matter of some embodiments of the invention quite unclear. Terms such as “comprising,” “having,” “including,” “constituting,” “made of,” and “formed by” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” As used herein, singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0059] Terms such as “first,” “second,” “A,” “B,” “(A),” or “(B)” may be used herein to describe elements of the invention. Each of these terms is not used to define the nature, order, sequence, or number of elements, but only to distinguish the corresponding element from other elements.

[0060] When referring to the first element and the second element as "connected or combined," "in contact or overlapping," etc., it should be interpreted as meaning that not only can the first element be "directly connected or combined" or "directly in contact or overlapping" with the second element, but a third element can also be "inserted" between the first element and the second element, or the first element and the second element can be "connected or combined," "in contact or overlapping," etc., with each other via a fourth element. Here, the second element can be included in at least one of two or more elements that are "connected or combined," "in contact or overlapping," etc., with each other.

[0061] When using time-relative terms such as “after,” “following,” “next,” “before,” etc., to describe the process or operation of an element or configuration, or the flow or steps in an operation, processing, or manufacturing method, these terms may be used to describe discontinuous or non-sequential processes or operations, unless the terms “directly” or “immediately” are used together.

[0062] Furthermore, when referring to any size, relative dimensions, etc., the numerical values ​​or corresponding information of the component or feature (e.g., level, range, etc.) should be taken into account, including tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if not explicitly stated in the relevant description. In addition, the term "can" fully encompasses all the meanings of the term "able to".

[0063] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0064] Figure 1 This is a block diagram of a display device according to an embodiment of the present invention.

[0065] The display device 100 may include a display panel 110, a data driving circuit 120, a gate driving circuit 130, a controller 140, a power supply circuit 150, a readout circuit 160, a microprocessor 170, and a redundancy unit 180.

[0066] Display panel 110, data driving circuit 120, gate driving circuit 130, controller 140, power supply circuit 150, readout circuit 160, microprocessor 170, and redundancy unit 180 can be disposed on substrate 101. Substrate 101 may contain silicon material. When the light-emitting device ED disposed on display panel 110 is an organic light-emitting device (OLED), display device 100 can be referred to as "OLEDoS". Display panel 110 can display images frame by frame. Display panel 110 may include multiple subpixels SP. When each of the multiple subpixels SP emits light, display panel 110 can display an image. Each of the multiple subpixels SP can be controlled by an external signal.

[0067] The data driving circuit 120 can supply data voltage to a plurality of sub-pixels SP disposed in the display panel 110. The data driving circuit 120 can generate data voltage based on image data. The data voltage can be supplied to the data line DL, and the sub-pixels SP electrically connected to the data line DL can receive the data voltage.

[0068] The gate drive circuit 130 can supply scan signals to a plurality of sub-pixels SP disposed in the display panel 110. When a scan signal with an on level is supplied to a sub-pixel SP, the corresponding sub-pixel SP can receive a data voltage.

[0069] The controller 140 can control the data driving circuit 120 and the gate driving circuit 130. The controller 140 can control the timing of the operation of the data driving circuit 120 and the gate driving circuit 130. The controller 140 can control the data driving circuit 120 and the gate driving circuit 130 to receive or output specific signals at specific times.

[0070] The power supply circuit 150 can supply voltage to components disposed in the display device 100. The power supply circuit 150 can generate various voltages based on the base power supply.

[0071] The readout circuit 160 can sense a defective subpixel SP among multiple subpixels SP. The readout circuit 160 can sequentially sense multiple subpixels SP to determine the coordinates of the defective subpixel SP. The readout circuit 160 can send the position of the defective subpixel SP to the microprocessor 170.

[0072] Microprocessor 170 can control readout circuit 160 and redundancy unit 180. Microprocessor 170 can control how readout circuit 160 senses defective subpixels SP. Microprocessor 170 can control the operation of redundancy unit 180.

[0073] The redundant unit 180 can drive the defective sub-pixel SP. The redundant unit 180 can be located within the non-display area NDA. The display panel 110 can be located within the display area DA, and the non-display area NDA can be an area outside the display area DA.

[0074] The redundancy unit 180 may include a switch block 181 and a redundant sub-pixel block 182. Circuitry for driving the defective sub-pixel SP may be disposed in the redundant sub-pixel block 182. The switch block 181 may control the connection between the redundant sub-pixel block 182 and the defective sub-pixel SP.

[0075] The subpixel SP and redundant unit 180 will be described in more detail below.

[0076] Figure 2 This is an equivalent circuit diagram of a sub-pixel SP according to an embodiment of the present invention.

[0077] A subpixel SP may include a light-emitting device (ED) and components for driving the ED. The subpixel SP can control the ED, enabling it to emit light at a predetermined brightness. When each of the multiple subpixels SP is controlled, a static image can be displayed via the display panel 110.

[0078] The driving transistor DRT controls the drive current flowing to the light-emitting device (ED). The driving transistor DRT can be electrically connected between the first node N1 and the second node N2. The gate node of the driving transistor DRT can be electrically connected to the third node N3. The first node N1 can be electrically connected to the drive voltage line DVL, and the second node N2 can be electrically connected to the light-emitting device (ED).

[0079] The scan transistor SCT controls the input of data voltage to the sub-pixel SP. The scan transistor SCT can be electrically connected between the data line DL and the third node N3. A scan signal can be supplied to the gate node of the scan transistor SCT. The scan signal can have an on-level to turn on the scan transistor SCT or an off-level to turn it off.

[0080] The sensing transistor SENT controls the electrical connection between the sensing line SL and the second node N2. The sensing transistor SENT can be electrically connected between the sensing line SL and the second node N2. A sensing signal can be supplied to the gate node of the sensing transistor SENT. The sensing signal can have an on-level to turn on the sensing transistor SENT or an off-level to turn it off.

[0081] The storage capacitor Cst can store the voltage used for the drive current. The storage capacitor Cst can be electrically connected between the second node N2 and the third node N3. The voltage corresponding to the difference between the voltages at the second node N2 and the third node N3 can be stored in the storage capacitor Cst. The stored voltage can correspond to the gate-source voltage difference of the drive transistor DRT, and the magnitude of the drive current can be determined based on the voltage stored in the storage capacitor Cst.

[0082] The light-emitting device (ED) can emit light corresponding to the driving current. The ED can be electrically connected between the second node N2 and the reference voltage line SVL. When a voltage is supplied across the ED and a driving current is supplied, the ED can emit light.

[0083] On the other hand, if a defect occurs during the formation of the subpixel SP, the subpixel SP may become a defective subpixel SP. When a subpixel SP becomes a defective subpixel SP, it may appear as a dark spot or a bright spot. Dark spots or bright spots may be visually identifiable by the user, and the quality of the display panel 110 may deteriorate.

[0084] However, according to the following description, embodiments of the present invention can drive the light-emitting device ED included in the defective sub-pixel SP by using redundant unit 180.

[0085] Figure 3 This is a diagram illustrating the sub-pixel SP and the redundancy unit 180 according to an embodiment of the present invention. Figure 3 The sub-pixel SP shown can be with Figure 2 The sub-pixels SP shown are the same.

[0086] Reference Figure 3The driving transistor (DRT) and the light-emitting device (ED) can be directly connected, but another component can be electrically connected between them. For example, an additional transistor or electronic fuse can be connected between the driving transistor (DRT) and the light-emitting device (ED).

[0087] Redundant unit 180 may include multiple redundant unit blocks 300. For example... Figure 3 As shown, for ease of explanation, only one redundant unit block 300 is illustrated. According to an exemplary embodiment, a redundant unit block 300 may be electrically connected to a sub-pixel SP.

[0088] The redundancy unit 180 may include a switch block 181 and a redundant sub-pixel block 182. The switch block 181 may include a switch 310. The redundant sub-pixel block 182 may include a redundant sub-pixel 320.

[0089] According to the control signal 311 supplied to switch 310, switch 310 can be in an on or off state. Redundant sub-pixel 320 can drive the light-emitting device ED of defective sub-pixel SP.

[0090] Switch 310 can be connected to redundant sub-pixel 320 via first connection line 330. Switch 310 can be connected to the second node N2 of sub-pixel SP via second connection line 340.

[0091] Reference Figure 3 Switch 310 can be electrically connected to the anode of the light-emitting device ED. At the second node N2, switch 310, sensing transistor SENT, driving transistor DRT, and light-emitting device ED can be electrically connected to each other.

[0092] When the sub-pixel SP is a normal sub-pixel SP, a control signal 311 for the off state can be supplied to the switch 310. That is, when the sub-pixel SP is a normal sub-pixel SP, the light-emitting device ED of the sub-pixel SP is not electrically connected to the redundant sub-pixel 320.

[0093] A normal subpixel SP refers to a subpixel SP that has no defects in its components DRT, SCT, SENT, Cst, and ED. In the case of a normal subpixel SP, the transistors DRT, SCT, and SENT included in the normal subpixel SP can be controlled to meet its design objectives. Furthermore, the light-emitting device ED included in a normal subpixel SP can emit light corresponding to the image data.

[0094] A defective subpixel SP refers to a subpixel SP that has a defect in at least one of the components DRT, SCT, SENT, Cst, and ED. For example, when the characteristic values ​​of transistors DRT, SCT, and SENT change from their expected values, the conduction and cutoff of transistors DRT, SCT, and SENT may be abnormally controlled. In the case of storage capacitor Cst, voltage may be abnormally stored in storage capacitor Cst, therefore, the brightness of light-emitting device ED may differ from the expected brightness. In the case of light-emitting device ED, for example, due to poor contact of the anode or cathode, light-emitting device ED may emit light of abnormal brightness. When at least one of the components used to make light-emitting device ED emit light is defective, light-emitting device ED may fail to emit light. Furthermore, a subpixel SP may become a defective subpixel SP due to an accidental electrical short circuit or electrical open circuit among the components DRT, SCT, SENT, Cst, and ED included in the defective subpixel SP.

[0095] The method for determining defective subpixels SP is described below. Defective subpixels SP can be determined before or after product shipment. When determining defective subpixels SP after product shipment, the driving phase of the display device 100 can be divided into an image display period and a defective subpixel detection period. The method for detecting defective subpixels SP will be described later.

[0096] When sub-pixel SP is a defective sub-pixel SP, the control signal 311 for the on state can be supplied to switch 310. That is, the second node N2 of the defective sub-pixel SP can be electrically connected to the redundant sub-pixel 320. Therefore, the redundant sub-pixel 320 can supply driving current to the second node N2. In this case, the scanning transistor SCT, sensing transistor SENT, and driving transistor DRT included in the defective sub-pixel SP can be kept in the off state. In other words, the transistors included in the defective sub-pixel SP can be kept in the off state so as not to affect the light-emitting device ED.

[0097] However, at least one of the scanning transistor SCT, sensing transistor SENT, and driving transistor DRT can be in the ON state. Because the storage capacitor Cst of the defective sub-pixel SP does not store the voltage used to drive the light-emitting device ED, the ED will not be affected during light emission even if at least one of the three transistors is in the ON state. In other words, although transistors SCT, SENT, and DRT can all remain in the OFF state, the light emission of the ED will not be affected even if at least one of them is in the ON state.

[0098] The following section will describe exemplary diagrams of the specific structure of the redundant subpixel 320. Figure 4 This is a diagram illustrating redundant sub-pixels 320 according to an embodiment of the present invention.

[0099] Reference Figure 4 The redundant sub-pixel 320 may include a first redundant transistor 321, a second redundant transistor 322, a third redundant transistor 323, and a redundant capacitor 324.

[0100] The first redundant transistor 321 can control the drive current flowing to the second redundant node N32. The first redundant transistor 321 can be electrically connected between the first redundant node N31 and the second redundant node N32. The first redundant node N31 can be electrically connected to the drive voltage line 327. The first redundant transistor 321 can perform... Figure 2 The driving transistor DRT shown has the same function.

[0101] The second redundant transistor 322 can control the supply of data voltage to the third redundant node N33. The second redundant transistor 322 can be electrically connected between the data line 325 and the third redundant node N33. When the second redundant transistor 322 is in the ON state, the data voltage can be supplied to the third redundant node N33. The second redundant transistor 322 can perform the following functions: Figure 2 The scanning transistor SCT shown has the same function.

[0102] The third redundant transistor 323 can control the electrical connection between the sensing line 326 and the second redundant node N32. The third redundant transistor 323 can perform operations related to... Figure 2 The sensing transistor SENT shown has the same function.

[0103] Redundant capacitor 324 can be electrically connected between the second redundant node N32 and the third redundant node N33. The voltage corresponding to the voltage difference between the second redundant node N32 and the third redundant node N33 can be stored in redundant capacitor 324. Redundant capacitor 324 can perform operations related to… Figure 2 The storage capacitor Cst shown has the same function.

[0104] A driving method for redundant sub-pixels 320 according to an exemplary embodiment will now be described. For example, a plurality of sub-pixels SP can be electrically connected to a specific gate line, and at least one of the sub-pixels SP may be a defective sub-pixel SP. When a turn-on scan signal is supplied to the specific gate line, the turn-on scan signal can also be supplied to the gate node of the second redundant transistor 322. Then, a redundant data voltage can be supplied to a third redundant node N33, and a reference voltage can be supplied to a second redundant node N32. A voltage corresponding to the difference between the redundant data voltage and the redundant reference voltage can be stored in a redundant capacitor 324. Subsequently, a driving current corresponding to the voltage stored in the redundant capacitor 324 can flow to the second redundant node N32. That is, the driving current can be supplied to the light-emitting device ED of at least one defective sub-pixel SP, and the light-emitting device ED of at least one defective sub-pixel SP can emit light.

[0105] The aforementioned redundant data voltage and redundant reference voltage are the same voltages intended to be supplied to the defective sub-pixel SP. In other words, the voltage that would be supplied to the redundant sub-pixel 320 if the defective sub-pixel SP is a normal sub-pixel SP.

[0106] Figure 5 This is a diagram illustrating a plurality of redundant units 180 and sub-pixel blocks B_SP according to an embodiment of the present invention.

[0107] Reference Figure 5 Multiple subpixel blocks B_SP can be located within the display area DA. Each subpixel block B_SP corresponds to Figure 2 The sub-pixel SP is shown.

[0108] Reference Figure 5 The redundant unit 180 may include multiple redundant unit blocks 300_1, 300_2, 300_3, ..., 300_k. These multiple redundant unit blocks 300_1, 300_2, 300_3, ..., 300_k can be located within the non-display area NDA. These multiple redundant unit blocks 300_1, 300_2, 300_3, ..., 300_k can be arranged along a vertical line, but this arrangement is not limited to this.

[0109] A subpixel block B_SP can be electrically connected to a redundant cell block 300. That is, a subpixel block B_SP can be connected to a redundant cell block 300 in a one-to-one relationship.

[0110] Subpixel blocks B_SP can be arranged in n units horizontally and m units vertically. Redundant unit blocks 300 can be arranged in k units. The number of subpixel blocks B_SP can be n×m, and n×m subpixel blocks B_SP can correspond to k redundant unit blocks 300. However, this arrangement is not limited to this; for example, two or more subpixel blocks B_SP can be electrically connected to a redundant unit block 300.

[0111] Figure 6 and Figure 7 All are like Figure 1 The sectional views of regions AB, CD, and EF are shown.

[0112] Reference Figure 6 It can identify the sectional views of regions AB, CD, and EF, and these regions correspond to... Figure 1 The sectional views of regions AB, CD, and EF are shown.

[0113] Area AB corresponds to a portion of microprocessor 170. Area CD corresponds to a portion of read circuitry 160. Area EF corresponds to a portion of display panel 110.

[0114] Reference Figure 6 The components of the microprocessor 170, the readout circuit 160, and the display panel 110 can be formed using the same process. For example, transistors included in each of the microprocessor 170, the readout circuit 160, and the display panel 110 can be formed on the substrate 101. The substrate 101 can be a silicon substrate, and the transistors can be formed on the silicon substrate. (See reference...) Figure 6 The transistor can be electrically connected to each electrode, including at least a portion of contact electrode ECNT, multiple metal patterns M1 to M5, and multiple via electrodes EV1 to EV4, each electrode being formed in an insulating layer on substrate 101.

[0115] Reference Figure 6The first transistor is shown in region AB. Although the microprocessor 170 may include various components, for ease of illustration, a cross-sectional view of the first transistor included in the microprocessor 170 will be described as an example. The first transistor may include a first body region 601, a first source region 602, a first drain region 603, and a first gate 604. The first body region 601 may be negative and may be referred to as an n-well. The first source region 602 and the first drain region 603 may be positive and may be referred to as p-type high-density regions. The first gate 604 may be an electrode supplied with a voltage for controlling the first transistor. The first transistor may be electrically connected to a first electrode including a contact electrode ECNT, a plurality of metal patterns M1 to M4, and a plurality of via electrodes EV1 to EV3.

[0116] Reference Figure 6 The CD region shows the inverter. Although the read circuit 160 may include various components, for ease of illustration, a cross-sectional view of the inverter included in the read circuit 160 will be described as an example. The inverter may include a deep negative well 621, a second transistor 622, and a third transistor 623. The second transistor 622 and the third transistor 623 may be formed in the deep negative well 621. The gate nodes of the second transistor 622 and the third transistor 623 may be electrically connected via a contact electrode ECNT, a plurality of metal patterns M1 to M5, and a plurality of via electrodes EV1 to EV4. For example, the second transistor 622 and the third transistor 623 may be electrically connected to a second electrode including the contact electrode ECNT, the plurality of metal patterns M1 to M5, and the plurality of via electrodes EV1 to EV4.

[0117] Reference Figure 6 The EF region illustrates the driving transistor DRT. The driving transistor DRT may include a drain region 611, a source region 612, and a gate 613. The driving transistor DRT may be electrically connected to a third electrode including a contact electrode ECNT, multiple metal patterns M1 to M5, and multiple via electrodes EV1 to EV4.

[0118] Reference Figure 6 A first insulating layer 631 may be provided on the substrate 101. The contact electrode ECNT may be disposed within the first insulating layer 631 and may be electrically connected to components disposed above and below the first insulating layer 631.

[0119] Reference Figure 6A first metal pattern M1 can be disposed on a first insulating layer 631. A second insulating layer 632 can be disposed on the first insulating layer 631, and the second insulating layer 632 can be arranged to cover the first metal pattern M1. A first via electrode EV1 can be disposed within the second insulating layer 632, and can be electrically connected to components disposed above and below the second insulating layer 632.

[0120] Reference Figure 6 The second metal pattern M2 can be disposed on the second insulating layer 632. A third insulating layer 633 can be disposed on the second insulating layer 632, and the third insulating layer 633 can be arranged to cover the second metal pattern M2. The second via electrode EV2 can be disposed within the third insulating layer 633, and can be electrically connected to components disposed above and below the third insulating layer 633.

[0121] Reference Figure 6 A third metal pattern M3 can be disposed on a third insulating layer 633. A fourth insulating layer 634 can be disposed on the third insulating layer 633, and the fourth insulating layer 634 can be arranged to cover the third metal pattern M3. A third via electrode EV3 can be disposed within the fourth insulating layer 634 and can electrically connect to components disposed above and below the fourth insulating layer 634. The third via electrode EV3 can be electrically connected to the third metal pattern M3 and the fourth metal pattern M4.

[0122] Reference Figure 6 A fourth metal pattern M4 can be disposed on a fourth insulating layer 634. A fifth insulating layer 635 can be disposed on the fourth insulating layer 634, and the fifth insulating layer 635 can be arranged to cover the fourth metal pattern M4. A fourth via electrode EV4 can be disposed within the fifth insulating layer 635 and can electrically connect to components disposed above and below the fifth insulating layer 635. The fourth via electrode EV4 can be electrically connected to the third metal pattern M3 and the fifth metal pattern M5. The fourth via electrode EV4 can also be electrically connected to the fourth metal pattern M4 and the fifth metal pattern M5.

[0123] Reference Figure 6 A sixth insulating layer 636 may be provided on the fifth insulating layer 635. Although a metallic pattern is not shown on the fifth insulating layer 635, a metallic pattern may also be provided on the fifth insulating layer 635.

[0124] Reference Figure 6 The fifth metal pattern M5 can be disposed on the sixth insulating layer 636. A seventh insulating layer 637 can be disposed on the sixth insulating layer 636, and the seventh insulating layer 637 can be arranged to cover the fifth metal pattern M5. The connecting electrode 641 can penetrate the seventh insulating layer 637 to be electrically connected to the fifth metal pattern M5.

[0125] Reference Figure 6 A planarization layer 640 may be disposed on the seventh insulating layer 637. The anode 651 can penetrate the planarization layer 640 to be electrically connected to the connection electrode 641. A light-emitting layer 652 may be disposed on the planarization layer 640. A cathode 653 may be disposed on the light-emitting layer 652. The magnitude of the drive current can be determined under the control of the drive transistor DRT, and the drive current can be supplied to the anode 651 through the contact electrode ECNT, multiple metal patterns M1 to M5, multiple via electrodes EV1 to EV4, and the connection electrode 641. The light-emitting layer 652 can emit light corresponding to the drive current.

[0126] Reference Figure 6 An encapsulation layer 660 may be disposed on the cathode 653. The encapsulation layer 660 can prevent moisture from penetrating into the light-emitting layer 652 from the outside. A color filter 671 may be disposed on the encapsulation layer 660. The color filter 671 can convert the light passing through the color filter 671 into any one of red, green, and blue. A color filter insulating layer 670 may be disposed on the color filter 671. The color filter 671 may overlap with the anode 651.

[0127] Reference Figure 7 A microlens 681 can be disposed on the color filter insulating layer 670. The microlens 681 can improve luminous efficiency and widen the viewing angle. The microlens 681 can overlap with the color filter 671. A protective layer 680 can be disposed on the color filter insulating layer 670, which can provide insulation and prevent moisture penetration.

[0128] Return to reference Figure 6 The sectional views of regions AB, CD, and EF have already been described. Figure 6 As shown, the transistors, contact electrodes ECNT, multiple metal patterns M1 to M5, and multiple via electrodes EV1 to EV4 formed on the substrate 101 can be formed using the same process. Therefore, since the components of the microprocessor 170, the readout circuit 160, and the display panel 110 can be formed simultaneously using the same process, their process efficiency can be improved.

[0129] Figure 8 This is another exemplary view of a sub-pixel SP according to an embodiment of the present invention. (Refer to...) Figure 8 Redundant unit block 300 can be with Figure 2 The redundant unit block 300 shown is the same.

[0130] Reference Figure 8 This shows the sub-pixel SP and redundant unit block 300. Except... Figure 2 In addition to the components of the sub-pixel SP shown, Figure 8The sub-pixel SP shown may further include an electronic fuse 700.

[0131] Reference Figure 8 An electronic fuse 700 may be included between the second node N2 and the light-emitting device ED. The electronic fuse 700 can protect the sub-pixel SP from overcurrent, overvoltage, overheating, etc. When predetermined conditions are met, the electronic fuse 700 can change the connection between the second node N2 and the light-emitting device ED from a short-circuit state to an open-circuit state. This can be referred to as the melting electronic fuse 700. The electronic fuse 700 can be a fuse or a protective device. Furthermore, the electronic fuse 700 is merely an example, and any device used to disconnect the electrical connection between the driving transistor DRT and the light-emitting device ED can correspond to the electronic fuse 700.

[0132] When a sub-pixel SP is determined to be a defective sub-pixel SP, the display device 100 can blow the electronic fuse 700 in the defective sub-pixel SP. After the electronic fuse 700 blows, an on signal 311 can be supplied to the switch 310. Then, the light-emitting device ED of the defective sub-pixel SP can be electrically connected to the redundant sub-pixel 320. The redundant sub-pixel 320 can supply a driving current to the light-emitting device ED of the defective sub-pixel SP, and the light-emitting device ED of the defective sub-pixel SP can emit light corresponding to the driving current.

[0133] The method for determining defective subpixels SP is described below. Defective subpixels SP can be determined before or after product shipment. When determining defective subpixels SP after product shipment, the driving phase of the display device 100 can be divided into an image display period and a defective subpixel detection period.

[0134] The image display period can be the period during which an image is displayed via the display panel 110. A defect subpixel detection period can be performed between the image display periods. The defect subpixel detection period can include a voltage supply phase, a defect current measurement phase, and a defect subpixel determination phase.

[0135] The voltage supply stage can be a stage in which a test voltage is supplied to the data line DL of the sub-pixel SP to be inspected, and a test reference voltage is supplied to the sensing line SL.

[0136] The defect current measurement phase can be a phase in which the transistor DRT supplies a test drive current to the second node N2 based on the voltage supplied during the voltage supply phase. The test drive current can flow through the sensing line SL. The readout circuit 160 can be electrically connected to the sensing line SL. The readout circuit 160 can convert the test drive current from an analog voltage state to a digital state. The test drive current can be converted into test data, and the test data can be transferred from the readout circuit 160 to the microprocessor 170.

[0137] The defective subpixel determination stage can be a stage that determines whether a subpixel SP is a defective subpixel SP based on a test drive current. When a subpixel SP is determined to be a defective subpixel SP during the defective subpixel determination stage, the coordinates of the subpixel SP can be stored in the microprocessor 170. After storing the coordinates of the defective subpixel SP, the microprocessor 170 can control the switch 310 to electrically connect the defective subpixel SP to the redundant subpixel 320.

[0138] Figure 9 This is another exemplary view of a sub-pixel SP according to an embodiment of the present invention. (Refer to...) Figure 9 The diagram shows a sub-pixel SP and a redundant unit block 300 electrically connected to the sub-pixel SP.

[0139] Reference Figure 9 Subpixel SP may include a driving transistor DRT, a scanning transistor SCT, two sensing transistors SENT1 and SENT2, two electronic fuses 700A and 700B, and two light-emitting devices ED_A and ED_B.

[0140] Reference Figure 9 The redundant unit block 300 may include two switches TR_A and TR_B and a redundant sub-pixel 320. Each of the two switches TR_A and TR_B may be electrically connected to the redundant sub-pixel 320 via a first connection line 330.

[0141] Reference Figure 9 The first electronic fuse 700A can be electrically connected to the first light-emitting device ED_A. The first electronic fuse 700A and the first light-emitting device ED_A can be electrically connected to the first switch TR_A via A connection line 340_A. The first switch TR_A can be electrically connected to the redundant sub-pixel 320.

[0142] Reference Figure 9 The second electronic fuse 700B can be electrically connected to the second light-emitting device ED_B. The second electronic fuse 700B and the second light-emitting device ED_B can be electrically connected to the second switch TR_B via connection line 340_B. The second switch TR_B can be electrically connected to the redundant sub-pixel 320.

[0143] Figure 9 The control methods for the first electronic fuse 700A and the second electronic fuse 700B shown can be compared with... Figure 8 The control method for the electronic fuse 700 shown is the same. Therefore, its repeated description will be omitted.

[0144] Figure 9 The features of the sub-pixel SP shown are as follows. Figure 9The sub-pixel SP shown may include two light-emitting devices, namely a first light-emitting device ED_A and a second light-emitting device ED_B, or generally, light-emitting device ED. Therefore, even when Figure 9 Even if any one of the light-emitting devices (EDs) shown is defective, it can still drive the other light-emitting devices (EDs) to make the sub-pixel (SP) emit light.

[0145] For example, two light-emitting diodes (EDs) can be in a normal state. In this case, only one of the two EDs may be working, or both EDs may be emitting light.

[0146] For example, one of the two light-emitting devices (EDs) may be defective. In this case, the electronic fuse 700 electrically connected to the defective ED can enter an open-circuit state, and only the remaining normal EDs can operate. For example, the first electronic fuse 700A can be in a state where the driving transistor DRT and the first ED_A are electrically disconnected from each other, and the second electronic fuse 700B can be in a state where the driving transistor DRT and the second ED_B are electrically connected to each other. Alternatively, the first electronic fuse 700A can be in a state where the driving transistor DRT and the first ED_A are electrically connected to each other, and the second electronic fuse 700B can be in a state where the driving transistor DRT and the second ED_B are electrically disconnected from each other. That is, one of the first electronic fuse 700A and the second electronic fuse 700B can be in a blown state.

[0147] When both light-emitting devices (EDs) are in a defective state, sub-pixels SP may appear as dark spots. However, in this case, the brightness of adjacent sub-pixels SP may increase, thereby compensating for the brightness reduction caused by the defective sub-pixel SP. The above compensation feature can also be applied to... Figure 3 and Figure 7 The sub-pixel SP is shown.

[0148] Figure 10 This is a schematic perspective view of a display device 100 according to an embodiment of the present disclosure.

[0149] Figure 10 The display device 100 shown is an example of a display device, and the embodiments of this disclosure are not limited to this form or this implementation method.

[0150] Display device 100 may be a display device that applies a virtual reality (VR) system and an augmented reality (AR) system.

[0151] A display device 100 that uses a virtual reality (VR) system can provide a virtual experience to a user by displaying a virtual space instead of the real world through a display panel.

[0152] The display device 100, which uses an augmented reality (AR) system, can provide a virtual experience based on the real world by displaying both the real world and virtual images to the user.

[0153] Display panels included in head-mounted displays (HMDs), face-mounted displays (FMDs), or eyeglass-type displays (EGDs) can be implemented as curved displays with a predetermined curvature to enable virtual reality (VR) and augmented reality (AR) technologies. In other words, display device 100 can be in the form of a curved display with a predetermined curvature.

[0154] The display device 100 may include a display unit 100d, a circuit unit 100c, and a housing unit 100s.

[0155] When the display device 100 includes only the aforementioned display unit 100d and circuit unit 100c, it may be a curved display device. The display device 100 may be in the form of a head-mounted display (HMD) that combines a curved display device with various types of housing units.

[0156] The display device comprising the aforementioned display unit 100d, circuit unit 100c, and housing unit 100s can be a wearable display device capable of applying technologies other than virtual reality or augmented reality systems, and can incorporate various other technologies therein. In other words, depending on the purpose, the display unit 100d can output images suitable for the corresponding purpose to the user.

[0157] The display unit 100d and the circuit unit 100c can be housed within the housing unit 100s. The display unit 100d can be configured to be exposed to the outside of the housing unit 100s.

[0158] The display panel can be driven by circuit unit 100c.

[0159] The circuit unit 100c may include circuitry for driving the display panel.

[0160] The circuit unit 100c can be disposed on one side of the display unit 100d. The circuit unit 100c can be disposed on... Figure 10 The substrate 101 of the display unit 100d shown (see Figure 6 and Figure 7 However, this disclosure is not limited thereto, and the circuit unit 100c may be disposed on top of another component of the display unit 100d. Furthermore, the circuit unit 100c may be disposed inside the housing unit 100s. The circuit unit 100c may be disposed anywhere, as long as it is located in an area where no image is displayed.

[0161] The circuit unit 100c may include a data driving circuit and a gate driving circuit, and may further include a controller for controlling the data driving circuit and the gate driving circuit.

[0162] A data driving circuit can be used to drive multiple data lines and supply data signals to multiple data lines. A gate driving circuit can be used to drive multiple gate lines and supply gate signals to multiple gate lines.

[0163] Under the control of the controller, the gate drive circuit can output a gate signal with a turn-on voltage or a gate signal with a turn-off voltage. The gate drive circuit can sequentially supply gate signals with turn-on voltages to multiple gate lines to drive them sequentially.

[0164] The controller can supply data control signals (DCS) to the data drive circuit to control the operating timing of the data drive circuit. The controller can also supply gate control signals (GCS) to the gate drive circuit to control the operating timing of the gate drive circuit.

[0165] The controller can initiate scanning according to the timing of each frame, convert the input image data from the external input into a data signal format usable by the data drive circuit, supply the converted image data (Data) to the data drive circuit, and control the data drive at the appropriate time in sync with the scanning.

[0166] The controller can receive timing signals such as vertical synchronization signal (Vsync), horizontal synchronization signal (Hsync), input data enable signal (DE), and clock signal (CLK) to control the data drive circuit and gate drive circuit, generate various control signals (DCS, GCS), and output the control signals to the data drive circuit and gate drive circuit.

[0167] The housing unit 100s can protect the display unit 100d and the circuit unit 100c, and the display unit 100d and the circuit unit 100c can be fixed to the housing unit 100s.

[0168] The housing unit 100s can be connected to a strap (not shown) for fixing the display device 100 to the user's face.

[0169] The display device according to embodiments of the present disclosure can be described as follows.

[0170] Embodiments of this disclosure may provide a display device, comprising: a substrate, the substrate including a display area and a non-display area located outside the display area; a display panel disposed on the substrate, disposed within the display area, and including a plurality of sub-pixels; a data driving circuit for driving the plurality of sub-pixels; and a redundancy unit disposed on the substrate, disposed within the non-display area, and capable of driving the plurality of sub-pixels, wherein the plurality of sub-pixels includes a first sub-pixel, the first sub-pixel including a first light-emitting device and a driving transistor for driving the first light-emitting device, and the redundancy unit including a first redundancy unit block, the first redundancy unit block including a first switch electrically connected to the first light-emitting device and a first redundant sub-pixel electrically connected to the first switch and capable of driving the first light-emitting device.

[0171] The switch can be electrically connected to the first redundant sub-pixel via the first connection line. The first redundant sub-pixel may include a first redundant transistor electrically connected to the first connection line and the first driving voltage line, a second redundant transistor electrically connected to the gate node of the first redundant transistor and the data line, a third redundant transistor electrically connected between the first connection line and the sensing line, and a redundant capacitor electrically connected between the gate node of the first redundant transistor and the first connection line.

[0172] When the first sub-pixel is determined to be a defective sub-pixel, the switch can electrically connect the first light-emitting device and the first redundant sub-pixel, and the first redundant sub-pixel can supply driving current to the first light-emitting device of the defective sub-pixel.

[0173] When the first redundant sub-pixel drives the first light-emitting device, the driving transistor may not supply the current that enables the first light-emitting device to emit light.

[0174] The first sub-pixel may further include a scan transistor electrically connected between the gate node of the driving transistor and the data line, a sensing transistor electrically connected between the first light-emitting device and the sensing line, and a storage capacitor electrically connected between the gate node of the driving transistor and the first light-emitting device.

[0175] When the first redundant sub-pixel supplies driving current to the first light-emitting device, at least one of the scanning transistor and the sensing transistor can be in the off state.

[0176] A defective subpixel can be a subpixel that has a defect in at least one of the driving transistor, scanning transistor, sensing transistor, first light-emitting device, and storage capacitor.

[0177] The redundant unit may include multiple redundant unit blocks, the multiple redundant unit blocks include a first redundant unit block and a second redundant unit block, and the multiple sub-pixels may further include a second sub-pixel, wherein the first redundant unit block is electrically connected to the first sub-pixel, the second redundant unit block is electrically connected to the second sub-pixel, and the second redundant unit block includes a second switch different from the first switch and a second redundant sub-pixel different from the first redundant sub-pixel.

[0178] The number of redundant unit blocks in multiple redundant unit blocks can be equal to or less than the number of sub-pixels in multiple sub-pixels.

[0179] The display device may further include a readout circuit disposed on a substrate and receiving current from a plurality of sub-pixels to sense the current, and a microprocessor disposed on the substrate and controlling the readout circuit and the display panel.

[0180] The substrate may contain silicon material, the microprocessor may include a first transistor formed on the substrate, the read circuit may include a second transistor formed on the substrate, the driving transistor may be formed on the substrate, and the display device may further include an insulating layer disposed on the substrate, a first electrode electrically connected to the first transistor and disposed in the insulating layer, a second electrode electrically connected to the second transistor and disposed in the insulating layer, and a third electrode electrically connected to the driving transistor and disposed in the insulating layer.

[0181] The display device may further include an anode electrically connected to a third electrode, a light-emitting layer disposed on the anode, a cathode disposed on the light-emitting layer, a color filter disposed on the cathode, and a microlens disposed on and overlapping the color filter.

[0182] The first sub-pixel may further include a first protection device electrically connected between the first light-emitting device and the driving transistor.

[0183] When the first sub-pixel is determined to be a defective sub-pixel, the first protection device can electrically insulate the first light-emitting device from the driving transistor.

[0184] The first protection device can be electrically controlled to disconnect the electrical connection between the first light-emitting device and the driving transistor.

[0185] The first subpixel can be driven during a first driving period for displaying the image and a second driving period for detecting whether the first subpixel has defects.

[0186] The second driving period may include a first period of supplying a test voltage to the first sub-pixel, a second period of receiving a test current from the first sub-pixel by the readout circuit, and a third period of determining whether the first sub-pixel has a defect by using test data generated based on the test current.

[0187] When the microprocessor determines that the first sub-pixel is a defective sub-pixel, the microprocessor can store the coordinates of the first sub-pixel.

[0188] The microprocessor can send a signal to the first protection device of the first sub-pixel, causing the first protection device to disconnect the electrical connection between the first light-emitting device and the driving transistor, and the microprocessor can control the first switch to be in the on state, so that the first redundant sub-pixel is electrically connected to the first light-emitting device.

[0189] The first sub-pixel may further include a second light-emitting device driven by a driving transistor, a second sensing transistor electrically connected between the second light-emitting device and the sensing line, and a second protection device electrically connected between the second light-emitting device and the driving transistor, and the first redundant unit block may further include a second switch electrically connected between the first redundant sub-pixel and the second light-emitting device.

[0190] The first protection device can be in a state where the electrical connection between the driving transistor and the first light-emitting device is disconnected, or the second protection device can be in a state where the electrical connection between the driving transistor and the second light-emitting device is disconnected.

[0191] The above description is provided to enable those skilled in the art to implement and use the technical ideas of the present invention, and is provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art without departing from the spirit and scope of the invention, and the general principles defined herein can be applied to other embodiments and applications. The above description and drawings provide examples of the technical ideas of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of the invention. Although certain embodiments and implementations have been described herein, other embodiments and modifications will become apparent from this specification. Therefore, the inventive concept is not limited to such embodiments, but lies in the broader scope of the appended claims and various obvious modifications and equivalent arrangements that will be apparent to those skilled in the art.

Claims

1. A display device, comprising: A substrate, the substrate including a display area and a non-display area located outside the display area; A display panel is disposed on the substrate within the display area, and the display panel includes a plurality of sub-pixels; A data driving circuit, wherein the data driving circuit is used to drive the plurality of sub-pixels; as well as A redundant unit is disposed on the substrate within the non-display area, and the redundant unit is used to drive the plurality of sub-pixels. The plurality of sub-pixels includes a first sub-pixel, the first sub-pixel including a first light-emitting device and a driving transistor for driving the first light-emitting device, and The redundant unit includes a first redundant unit block, which includes a first switch electrically connected to the first light-emitting device and a first redundant sub-pixel electrically connected to the first switch and capable of driving the first light-emitting device.

2. The display device according to claim 1, wherein, The first switch is electrically connected to the first redundant sub-pixel via a first connection line, and The first redundant sub-pixel includes: A first redundant transistor, the first redundant transistor being electrically connected to the first connection line and the first drive voltage line; The second redundant transistor is electrically connected to the gate node and the data line of the first redundant transistor; A third redundant transistor, electrically connected between the first connection line and the sensing line; and A redundant capacitor is electrically connected between the gate node of the first redundant transistor and the first connection line.

3. The display device according to claim 1, wherein, When the first sub-pixel is a defective sub-pixel, the first switch electrically connects the first light-emitting device and the first redundant sub-pixel, and The first redundant sub-pixel supplies driving current to the first light-emitting device of the defective sub-pixel.

4. The display device according to claim 3, wherein, When the first redundant sub-pixel drives the first light-emitting device, the driving transistor does not supply current for making the first light-emitting device emit light.

5. The display device according to claim 4, wherein, The first sub-pixel also includes: A scanning transistor, which is electrically connected between the gate node of the driving transistor and the data line; A sensing transistor, electrically connected between the first light-emitting device and the sensing line; and A storage capacitor is electrically connected between the gate node of the driving transistor and the first light-emitting device.

6. The display device according to claim 5, wherein, When the first redundant sub-pixel supplies the driving current to the first light-emitting device, at least one of the scanning transistor and the sensing transistor is in the off state.

7. The display device according to claim 5, wherein, The defective sub-pixel is a sub-pixel in which at least one of the driving transistor, the scanning transistor, the sensing transistor, the first light-emitting device, and the storage capacitor has a defect.

8. The display device according to claim 1, wherein, The redundant unit includes multiple redundant unit blocks, the multiple redundant unit blocks include a first redundant unit block and a second redundant unit block, and the multiple sub-pixels also include a second sub-pixel. Wherein, the first redundant unit block is electrically connected to the first sub-pixel, and The second redundant unit block is electrically connected to the second sub-pixel, and the second redundant unit block includes a second switch that is different from the first switch and a second redundant sub-pixel that is different from the first redundant sub-pixel.

9. The display device according to claim 8, wherein, The number of redundant unit blocks in the plurality of redundant unit blocks is equal to or less than the number of sub-pixels in the plurality of sub-pixels.

10. The display device according to claim 1, further comprising: A readout circuit is disposed on the substrate, and the readout circuit receives current from the plurality of sub-pixels and senses the current; as well as A microprocessor is disposed on the substrate and controls the reading circuit and the display panel.

11. The display device according to claim 10, wherein, The substrate comprises silicon material. The microprocessor includes a first transistor formed on the substrate. The readout circuit includes a second transistor formed on the substrate. The driving transistor is formed on the substrate, and The display device further includes: An insulating layer disposed on the substrate; A first electrode, which is electrically connected to the first transistor and disposed in the insulating layer; A second electrode, electrically connected to the second transistor and disposed within the insulating layer; and The third electrode is electrically connected to the driving transistor and is disposed in the insulating layer.

12. The display device according to claim 11, further comprising: Anode, which is electrically connected to the third electrode; A light-emitting layer is disposed on the anode; Cathode, wherein the cathode is disposed on the light-emitting layer; A color filter, wherein the color filter is disposed on the cathode; as well as A microlens is disposed on and overlaps with the color filter.

13. The display device according to claim 11, wherein, The first sub-pixel also includes a first protection device electrically connected between the first light-emitting device and the driving transistor.

14. The display device according to claim 13, wherein, When the first sub-pixel is determined to be a defective sub-pixel, the first protection device electrically isolates the first light-emitting device from the driving transistor.

15. The display device according to claim 13, wherein, The first sub-pixel is driven during a first driving period for displaying the image and a second driving period for detecting whether the first sub-pixel has defects.

16. The display device according to claim 15, wherein, The second driving period includes: The first time period for supplying test voltage to the first sub-pixel; The readout circuit receives a second time period of test current from the first sub-pixel; and The third time period is used to determine whether the first sub-pixel has a defect by using test data generated based on the test current.

17. The display device according to claim 13, wherein, The first sub-pixel also includes: The second light-emitting device is driven by the driving transistor; The second sensing transistor is electrically connected between the second light-emitting device and the sensing line; and The second protection device is electrically connected between the second light-emitting device and the driving transistor, and The first redundant unit block further includes a second switch electrically connected between the first redundant sub-pixel and the second light-emitting device.

18. The display device according to claim 11, wherein, Each of the first electrode, the second electrode, and the third electrode includes a via electrode.

19. A method for determining defective sub-pixels in a display device, the method comprising: A substrate is formed that includes a display area and a non-display area located outside the display area; A display panel is formed on the substrate within the display area. The display panel includes a plurality of sub-pixels, and the plurality of sub-pixels include a first light-emitting device and a driving transistor for driving the first light-emitting device. A redundant unit is formed on the substrate in the non-display area, and the redundant unit is used to drive the plurality of sub-pixels; as well as The first sub-pixel of the plurality of sub-pixels is driven during a first driving period for displaying the image, and the first sub-pixel is driven during a second driving period for detecting whether the first sub-pixel has defects. The redundant unit includes a first redundant unit block, which includes a first switch electrically connected to the first light-emitting device and a first redundant sub-pixel electrically connected to the first switch and capable of driving the first light-emitting device. When the first sub-pixel is determined to be a defective sub-pixel, the first redundant sub-pixel is electrically connected to the first light-emitting device.

20. The method of claim 19, further comprising connecting the first switch to the first redundant sub-pixel via a first connection line. in, The first redundant sub-pixel includes: A first redundant transistor, the first redundant transistor being electrically connected to the first connection line and the first drive voltage line; The second redundant transistor is electrically connected to the gate node and the data line of the first redundant transistor; A third redundant transistor, electrically connected between the first connection line and the sensing line; and A redundant capacitor is electrically connected between the gate node of the first redundant transistor and the first connection line.

Citation Information

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