A femtosecond pulse laser energy dynamic modulation system and method

Abstract

The application discloses a kind of femtosecond pulse laser energy dynamic modulation system and method, the system includes: function editing module, for based on the function input received, generate laser energy function curve with time, position, speed or Burst sub-pulse number as independent variable;Waveform generation module, for laser energy function curve is converted into digital waveform data with index range and address mapping relationship;FPGA real-time waveform control module, for in the updating time determined by laser trigger signal, according to current index amount reading digital waveform data;Digital-analog conversion module, for the digital control code read is converted into analog control signal;Laser modulation module, for according to analog control signal changes into processing optical path the pulse energy or femtosecond pulse laser output energy;Femtosecond pulse laser, for dynamic output corresponding target energy.The technical scheme of the embodiment of the application can realize function, real-time and pulse level energy modulation.

Description

Technical Field

[0001] This invention relates to the field of ultrafast laser precision machining control technology, specifically to a femtosecond pulse laser energy dynamic modulation system and method. Background Technology

[0002] Femtosecond pulsed lasers feature ultra-short pulse widths, high peak power, and low heat-affected zones, making them widely used in glass cutting, semiconductor wafer processing, flexible material cutting, micro-hole fabrication, medical device manufacturing, and internal modification of transparent materials.

[0003] Current femtosecond laser processing control typically relies on fixed average power, fixed repetition frequency, fixed single-pulse energy, or simple external control. While this approach can meet basic requirements for linear, uniform-speed processing, it is prone to problems such as overheating, cracking, inconsistent kerf, or uneven energy deposition when dealing with start-stop sections, corners, speed variations, local material differences, and gradual depth changes. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art, and proposes a femtosecond pulse laser energy dynamic modulation system and method.

[0005] In a first aspect, the present invention provides a femtosecond pulse laser energy dynamic modulation system, comprising: a function editing module, a waveform generation module, an FPGA real-time waveform control module, a digital-to-analog conversion module, a laser modulation module, and a femtosecond pulse laser; The function editing module provides various function inputs and generates a laser energy function curve with time, position, velocity, or Burst sub-pulse number as independent variables based on the received function inputs. The waveform generation module converts the laser energy function curve into digital waveform data with an index range and address mapping relationship. The FPGA real-time waveform control module reads the digital waveform data according to the current index value at the update time determined by the laser trigger signal. The digital-to-analog conversion module converts the read digital control code into an analog control signal. The laser modulation module changes the pulse energy entering the processing optical path or the output energy of the femtosecond pulse laser according to the analog control signal. The femtosecond pulse laser dynamically outputs the corresponding target energy.

[0006] Secondly, the present invention provides a method for dynamic modulation of femtosecond pulse laser energy, comprising: The system receives a laser energy function curve with time, position, velocity, or Burst subpulse number as independent variables; it samples, interpolates, calibrates, quantizes, limits, and maps the laser energy function curve to an address, generating a digital waveform lookup table; it sends the digital waveform lookup table to the inactive buffer of the FPGA and switches it to the active buffer after verification; at the update time determined by laser triggering, the FPGA calculates the read address and obtains the digital control code based on the current time, position, velocity, trigger number, or Burst subpulse number; it converts the digital control code into an analog control signal; and it uses the analog control signal to adjust the output energy of the femtosecond pulsed laser.

[0007] Thirdly, embodiments of the present invention provide an electronic device, the electronic device comprising: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores a computer program that can be executed by at least one processor, such that the at least one processor is able to perform the steps of the method according to any embodiment of the present invention.

[0008] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the steps of a method according to any embodiment of the present invention.

[0009] Compared with the prior art, the present invention has the following advantages: The technical solution in this embodiment supports free programming of femtosecond laser energy, upgrading from fixed power control to function-based energy control; it improves the processing quality of complex paths, variable speed processing, corner processing, and start-stop segments; it also supports optimization of the energy distribution within Burst, increasing the processing window for hard and brittle materials and transparent materials; and through real-time control of the FPGA, it reduces the impact of software latency and communication jitter on the processing effect. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only preferred embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A general structural block diagram of a femtosecond pulsed laser energy dynamic modulation system provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a user-defined function wave generation process provided in an embodiment of the present invention; Figure 3This is a schematic diagram of an FPGA real-time waveform control process provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of energy control based on location synchronization provided in an embodiment of the present invention; Figure 5 A schematic diagram of the energy envelope of the internal sub-pulse of Burst provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of a closed-loop energy compensation structure provided in an embodiment of the present invention; Figure 7 This is a schematic diagram illustrating the complete working process of a user-defined function-driven system, as provided in an embodiment of the present invention. Figure 8 This is a schematic diagram of energy function mapping in position-synchronized processing provided by an embodiment of the present invention; Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0012] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0013] Before introducing the embodiments of the present invention, it should be noted that existing femtosecond laser processing control schemes can also adjust power through external analog signals, PWM, or speed compensation. However, most of these belong to ordinary laser power control or motion controller-side compensation, lacking functional, real-time, and pulse-level energy control mechanisms for the internal control link of femtosecond pulsed lasers. Typically, users cannot directly define continuous energy functions, and it is difficult to achieve real-time energy modulation at the femtosecond pulse triggering stage, position synchronization stage, or Burst internal sub-pulse stage.

[0014] It is evident that existing femtosecond laser processing control schemes are insufficient to meet the demands of precise laser energy control for complex paths, variable speed motions, and high-consistency micromachining.

[0015] Based on this, the present invention aims to provide a femtosecond pulse laser energy dynamic modulation system and method based on user-defined function waveforms, enabling users to edit target energy functions with time, position, velocity, or Burst subpulse number as independent variables, and convert the target energy function into a digital waveform lookup table that can be deterministically executed by FPGA, so as to solve the problem that it is difficult to achieve functionalization, real-time operation, and pulse-level energy modulation when using fixed power control, simple analog quantity adjustment, and compensation only on the motion controller side.

[0016] Figure 1 This is a general structural block diagram of a femtosecond pulsed laser energy dynamic modulation system provided in an embodiment of the present invention, combined with... Figure 1 This embodiment proposes a femtosecond pulsed laser energy dynamic modulation system, which includes: a function editing module, a waveform generation module, an FPGA real-time waveform control module, a digital-to-analog conversion module, a laser modulation module, and a femtosecond pulsed laser.

[0017] The system includes a function editing module and waveform generation module on the host computer side, an FPGA real-time waveform control module, a digital-to-analog converter module, a laser modulation module, and a femtosecond pulse laser on the real-time side, and may also include a photoelectric detection module, an analog-to-digital converter module, and a feedback compensation module. The data link sequentially converts the user-defined target energy function into a digital waveform lookup table, DAC control code, and analog control quantity; the synchronization link determines the update time by laser triggering, and determines the target energy corresponding to this update by time, position, velocity, or Burst subpulse sequence number.

[0018] The system comprises several modules: a function editing module for receiving function input and generating a laser energy function curve with time, position, velocity, or Burst sub-pulse number as independent variables; a waveform generation module for converting the laser energy function curve into digital waveform data with index ranges and address mappings; an FPGA real-time waveform control module for reading digital waveform data based on the current index value at the update time determined by the laser trigger signal; a digital-to-analog conversion module for converting the read digital control code into an analog control signal; a laser modulation module for changing the pulse energy entering the processing optical path or the output energy of the femtosecond pulse laser based on the analog control signal; and a femtosecond pulse laser for dynamically outputting the corresponding target energy.

[0019] It should be noted that function input methods include: polyline input, key point table input, spline input, formula input, template curve call input, and processing recipe associated call input. Laser energy function curves include: time function, position function, velocity function, and Burst subpulse sequence function. Furthermore, a spline is a smooth curve generated based on given control points.

[0020] In this embodiment, the user defines an energy function in the form of P=f(t), P=f(x), P=f(v), or P=f(n) through a graphical interface or parameter table. The system converts the function into a digital waveform table and sends it to the FPGA. The FPGA reads the corresponding control value in real time based on the laser trigger signal, system clock, encoder position, speed information, or Burst subpulse sequence number, outputs an analog control quantity via DAC, and drives the AOM, EOM, pulse selector, or pump modulation module to achieve dynamic modulation of femtosecond pulse laser energy.

[0021] Optionally, the system may also include: a photoelectric detection module, an analog-to-digital conversion module, and a feedback compensation module.

[0022] The photoelectric detection module includes a sampling optical path, a photodetector, and transimpedance amplification, integration, or sample-and-hold circuits to convert the output light energy into a voltage signal. The analog-to-digital conversion module samples the voltage signal within a sampling window synchronized with laser triggering and obtains the actual energy measurement data through peak extraction, single-pulse integration, Burst integration, or moving average. The feedback compensation module corrects the waveform lookup table, calibration coefficients, or current digital control code based on the error between the target energy and the actual energy.

[0023] Specifically, the sampling optical path and photodetector convert the output light energy into an electrical signal, which is then amplified, integrated, or sampled and held to form a sampleable voltage. The analog-to-digital conversion module performs peak extraction, single-pulse integration, Burst integration, or moving average within the laser trigger synchronization window. The feedback compensation module corrects the waveform lookup table, calibration coefficients, or current digital control code based on the error between the target energy and the actual energy, using proportional, proportional-integral, or segmented calibration table update methods.

[0024] Table 1 illustrates the functions and core technologies of some key modules in the dynamic modulation system. For example, the function editing module supports input methods such as polylines, splines, formulas, key point tables, and template curves. Its key technology lies in binding user-defined functions with processing recipes. Another example is the waveform generation module, which performs sampling, interpolation, quantization, amplitude limiting, slope constraints, and waveform table generation. Its key technology lies in the conversion from continuous functions to hardware-executable LUTs.

[0025] Table 1: Functions and Core Technologies of Key Modules

[0026] In this embodiment, the user defines the energy function using key points, splines, formulas, template curves, or processing recipes. The waveform generation module generates a waveform lookup table through sampling, interpolation, calibration inverse calculation, quantization, amplitude limiting, and address mapping. At the update time determined by laser triggering, the FPGA reads the control code using time, position, velocity, or Burst subpulse sequence number as an index, and drives the AOM, EOM, pulse selector, or pump module after digital-to-analog conversion. The system can also utilize photoelectric detection and analog-to-digital conversion feedback to correct the control code, achieving position synchronization, Burst envelope, and closed-loop energy control.

[0027] It is understandable that one of the core aspects of this embodiment lies in combining user-defined functions, processing recipes, FPGA real-time waveform engines, position synchronization, and Burst subpulse envelope control into a dynamic energy control architecture executable within a femtosecond laser. This architecture can map functions such as P=f(t), P=f(x), P=f(v), and P=f(n) into analog modulation quantities in real time, and participate in energy modulation at the triggering stage or subpulse stage.

[0028] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the function editing module in the dynamic modulation system will be further introduced below.

[0029] Optionally, the function editing module includes: a key point editing unit, a curve interpolation unit, a formula input unit, a template curve calling unit, and a processing Recipe association unit.

[0030] The keypoint editing unit receives the coordinates of the input independent variables and target energy, and sorts, removes duplicates, and verifies the range of the input coordinates. Specifically, when using polyline or keypoint table input, the user inputs a set of coordinates arranged by time, position, velocity, or Burst sub-pulse number, and the keypoint editing unit performs sorting, duplicate handling, and boundary checks on the coordinates. Alternatively, when using spline input, the user inputs a set of keypoints, and the keypoint editing unit performs sorting, duplicate removal, and range checks on the coordinates. Through the keypoint editing unit, the functions of receiving, sorting, and verifying the coordinates of the independent variables and target energy are realized.

[0031] The curve interpolation unit is used to perform linear interpolation or spline interpolation between adjacent points of the input coordinates. Specifically, when using polyline or keypoint table input, the keypoint editing unit first sorts the coordinates, handles duplicate points, and checks for out-of-bounds errors, and then the curve interpolation unit performs linear interpolation between adjacent points; or when using spline input, the keypoint editing unit first sorts the coordinates, removes duplicates, and performs range checks, and then the curve interpolation unit constructs a piecewise cubic spline or a monotonic spline curve, and limits any potential overshoot. Through the curve interpolation unit, the functions of linear interpolation, piecewise spline interpolation, or monotonic spline interpolation between adjacent coordinate points can be achieved.

[0032] The formula input unit receives and parses the input energy function expression, and checks its domain, singularities, and discontinuities. Specifically, when using formula input, the system parses the function expression and parameters, and checks for the domain, division by zero, and discontinuities. Through the formula input unit, the system parses the energy function expression and parameters, and checks its domain and discontinuities.

[0033] The template curve calling unit is used to call pre-stored template curves and receive parameterized modifications to the template curves. Specifically, when using template curves, the system calls pre-stored ramp curve templates, S-curve templates, stepped curve templates, symmetrical curve templates, or exponential curve templates, and allows users to modify the amplitude, duration, and inflection points. The template curve calling unit enables the calling and parameterization of ramp curve templates, S-curve templates, stepped curve templates, symmetrical curve templates, or exponential curve templates.

[0034] The processing recipe association unit is used to invoke the processing recipe pre-bound to the processing task when the processing task is loaded. This processing recipe is associated with a curve identifier, curve version, working mode, calibration parameters, and safety threshold. Specifically, when using the processing recipe association method, the curve identifier, curve version, calibration parameters, and working mode are bound to the recipe number and invoked together when the processing task is loaded. Through the processing recipe association unit, the curve identifier, curve version, working mode, calibration parameters, and safety threshold are bound to the processing task.

[0035] The operating modes include: time function mode, position function mode, velocity function mode, external trigger sequence mode, Burst envelope mode, and closed-loop correction mode.

[0036] Table 2 shows the inputs, outputs, and application scenarios for different working modes. For example, in the time function mode, the input is the time t after the start of processing, and the output control is P=f(t), which is suitable for scenarios such as initial gradual rise, final gradual fall, preheating, and progressive ablation. Similarly, in the position function mode, the input is the encoder position x or the two-dimensional path coordinates, and the output control is P=f(x) or P=f(x,y), which is suitable for scenarios such as glass cutting, wafer dicing, and complex path edge compensation.

[0037] Table 2: Inputs, Outputs, and Application Scenarios for Different Working Modes

[0038] In summary, the keypoint editing unit in the function editing module receives (u,P) coordinate points input by the user or formed by dragging and dropping, and performs sorting, deduplication, and range verification; the curve interpolation unit performs linear interpolation, piecewise cubic spline interpolation, or monotonic spline interpolation between adjacent keypoints; the formula input unit parses P=f(u) and its parameters and checks the domain, singularities, and discontinuities; the template curve calling unit calls ramp, S-curve, step, symmetric, or exponential templates and allows parameter modification; the processing recipe association unit binds the curve identifier, version, working mode, calibration parameters, and safety threshold to the processing recipe. Furthermore, the independent variable u can be time t, position x, velocity v, or Burst sub-pulse number n.

[0039] In this embodiment, the function editing module allows users to define energy functions using key points, splines, formulas, template curves, and processing recipes, generating laser energy function curves with time, position, velocity, or Burst subpulse number as independent variables.

[0040] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the waveform generation module in the dynamic modulation system will be further introduced below.

[0041] The waveform generation module unifies various input forms into P=f(u), generates sampling points within the domain with a preset number of points or a preset independent variable step size, and obtains the target energy sequence through curve evaluation or interpolation. Based on the calibration curves of the femtosecond laser and modulator, the system inversely calculates the target energy into an analog control quantity, and then quantizes it into a digital control code according to the DAC full-scale range and bit width. The quantization result, after amplitude clamping, adjacent point slope limiting, and address mapping, forms a waveform lookup table, which includes the operating mode, domain, address scaling factor, calibration version, CRC, and security value. The lookup table is organized according to processing path segment, process segment, or recipe number, and is first written to the FPGA idle buffer. After verification, it switches to the active buffer at the allowable boundary.

[0042] Furthermore, the waveform generation module converts the laser energy function curve into digital waveform data, including: Sampling points are set within the domain of the laser energy function curve. The target energy sequence of the sampling points is obtained by function evaluation or interpolation. Based on the calibration relationship between the target energy and the analog control quantity, the target energy is converted into an analog control quantity. The analog control quantity is quantized into digital control codes according to the bit width of the digital-to-analog conversion module. The digital waveform data is obtained by sequentially passing through amplitude limiting, adjacent control code change rate limiting, and storage address mapping, and a waveform lookup table is generated.

[0043] Specifically, the waveform generation module sets sampling points within the domain of the laser energy function curve, obtains the target energy sequence through function evaluation or interpolation, and converts the target energy back into an analog control quantity based on the calibration relationship between the target energy and the analog control quantity. The analog control quantity is then quantized into a digital control code according to the bit width of the digital-to-analog converter module. Subsequently, amplitude limiting, adjacent control code change rate limiting, and storage address mapping are performed sequentially to form a waveform lookup table containing an index range, address scaling factor, digital control code, calibration version, and safety value. The waveform lookup table can include the operating mode, domain, address scaling factor, calibration version, check value, and fault safety value.

[0044] Figure 2 A schematic diagram of a user-defined function wave generation process is shown, combined with Figure 2First, the function editing module determines the type, domain, unit, and energy range of the independent variable in the laser energy function curve. Then, the waveform generation module uniformly represents different inputs as a mapping between the independent variable u and the target energy P. N sampling points u_i = u_min + i * Delta_u are set within the domain [u_min, u_max], and the target energy P_i is obtained by calculating the curve. If the sampling point is located between two key points, linear interpolation or spline interpolation is used to obtain the target energy P_i. Subsequently, based on the calibration relationship of the laser and modulator, the target energy P_i is back-calculated into the required analog control quantity V_i, and then quantized into digital control code D_i according to the DAC bit width B. Then, amplitude clamping, adjacent point change rate limitation, address mapping, CRC check, and version registration are executed sequentially to form a waveform lookup table containing address, control code, and protection parameters. The waveform lookup table is first downloaded to the idle buffer of the FPGA. After verification, it is switched to the active buffer at the frame boundary, processing section boundary, or stop window to obtain digital waveform data that can be read by the FPGA in real time.

[0045] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the FPGA real-time waveform control module in the dynamic modulation system will be further introduced below.

[0046] Optionally, the FPGA real-time waveform control module includes: a trigger synchronization unit, an address calculation unit, a waveform lookup table storage unit, an interpolation calculation unit, a Burst counting unit, and a safety protection unit.

[0047] The system includes the following components: a trigger synchronization unit for synchronizing the laser trigger or processing start signal and detecting its edges; an address calculation unit for normalizing the time, position, speed, or Burst sub-pulse number into an integer address and a fractional phase in a lookup table; a waveform lookup table storage unit for storing and outputting the digital control code corresponding to the integer address; an interpolation calculation unit for interpolating between adjacent digital control codes based on the fractional phase; a Burst counting unit for resetting the count to zero at the start of a Burst and updating the sequence number according to the sub-pulse event; and a safety protection unit for performing amplitude, rate of change, address out-of-bounds, trigger timeout, and fault status checks.

[0048] Figure 3 A schematic diagram of a real-time waveform control process for an FPGA is shown, combined with Figure 3First, the trigger synchronization unit synchronizes, debounces, and detects edges of external laser triggers, processing start signals, or internal timing triggers. Upon a valid trigger, it latches the operating mode, resets or loads the time counter and the Burst counter. Then, the address calculation unit generates an index value u based on the selected function mode: the time function mode calculates time t using the clock count after triggering; the position function mode calculates position x using encoder counts, motion controller position, or bus position; the speed function mode obtains v using the sampling difference between adjacent positions or the speed provided by the motion controller; and the Burst mode obtains the sequence number n by clearing the Burst start signal and incrementing it based on sub-pulse events. It should be noted that the laser trigger signal is used to determine the moment of a real-time update, while time, position, speed, or sub-pulse sequence number is used to determine the lookup table address to be read for that update. These two parameters respectively address the questions of "when to update" and "what value to update."

[0049] The address calculation unit converts the index u into address a using the formula a = (u - u_min) * K_addr, and separates the integer address from the fractional phase. The waveform lookup table storage unit reads adjacent control codes from the currently active buffer; when resolution needs to be improved, the interpolation calculation unit performs linear interpolation based on the fractional phase. The safety protection unit performs upper and lower limit checks, rate of change checks, invalid address checks, trigger timeout checks, and enable status checks on the control codes; in case of an anomaly, it maintains the most recent safe value or switches to a preset stop-light value. The protected control code is written to the DAC when the DAC update strobe signal arrives and is retained until the next update cycle. Dual-buffered or multi-buffered switching is only performed when data verification is complete and the data is within the allowed switching boundary, thereby avoiding the reading of half-updated data during processing.

[0050] In summary, the trigger synchronization unit in the FPGA real-time waveform control module synchronizes and detects the edges of the laser trigger, processing start signal, and system clock, and latches the operating mode or resets the corresponding counter when a valid trigger arrives. The address calculation unit obtains 't' from the clock count after triggering in time mode, 'x' from encoder counting, position synchronization triggering, or bus position in position mode, 'v' from position differential or controller speed in speed mode, and 'n' from the Burst counting unit in Burst mode; then, the index is normalized to an integer address and a fractional phase in the lookup table. The waveform lookup table storage unit reads adjacent data from the active buffer, the interpolation calculation unit calculates the control code based on the fractional phase, and the safety protection unit performs amplitude limiting, rate of change, address out-of-bounds checks, trigger timeout checks, and fault status checks. The protected digital control code is updated and strobed by the DAC and written to the digital-to-analog converter module.

[0051] Furthermore, the FPGA real-time waveform control module uses a dual-buffer or multi-buffer method to store digital waveform data; the host computer writes the waveform lookup table to be used into the inactive buffer area, the FPGA real-time waveform control module checks the data length, version and check value, and switches the inactive buffer area to the active buffer area at the light stop window, processing section boundary, frame boundary or preset synchronization event.

[0052] The FPGA real-time waveform control module can use dual or multiple buffers to store the waveform lookup table. Data to be used is first written to the inactive buffer. After the data length, version, and checksum are verified, the buffer is switched to the active buffer at the stop window, processing section boundary, frame boundary, or preset synchronization event to avoid reading partially updated data during processing.

[0053] Furthermore, the FPGA real-time waveform control module uses the time count value, position feedback value, speed value, trigger sequence number or Burst sub-pulse sequence number after laser triggering as index values, and obtains the corresponding digital control code through normalization, address mapping and table lookup or interpolation. It also updates the advance amount according to the setup time of the digital-to-analog conversion module and the response delay of the laser modulation module.

[0054] Furthermore, if the FPGA real-time waveform control module uses the position feedback value after laser triggering as the index, then before reading the digital waveform data according to the current index, it also includes: The position feedback information is acquired and converted into a unified position value based on the encoder resolution or bus scaling factor, direction sign and zero offset; the unified position value is normalized into an integer address and a decimal phase of the lookup table.

[0055] Optionally, methods for obtaining location feedback information include: The motion platform encoder performs quadrature decoding and cumulative counting of the AB phase signals; or the position synchronization trigger module latches the count value at a known reference position; or the motion controller provides the position through the pulse and direction interface or position register; or the real-time bus interface periodically receives position process data.

[0056] Specifically, position feedback can be provided by an AB phase encoder, pulse and direction interface, position synchronization trigger module, motion controller position register, or real-time bus position process data. The FPGA real-time waveform control module obtains a unified position x based on the encoder resolution or bus scaling factor, direction sign, and zero-point offset, and normalizes it into a waveform read address. When the position is between two sampling points, a control code is obtained based on the address fractional phase interpolation, establishing a definite mapping between the output energy and the processing position.

[0057] Figure 4 A schematic diagram of energy control based on location synchronization is shown, combined with Figure 4Position feedback information can be obtained from the AB phase encoder via FPGA quadrature decoding and counting, or it can be provided by the motion controller using pulse + direction, position synchronization trigger, or periodic bus process data. For encoder input, the FPGA determines the direction based on the phase relationship and accumulates the count, converting the count value into the actual position using encoder resolution, electronic subdivision ratio, and mechanical transmission coefficient. For bus position data, the communication interface receives position process data in each bus cycle and converts it into unified engineering units according to the agreed byte order, scaling factor, direction sign, and zero-point offset. Position synchronization trigger can latch the count value at a known reference position to eliminate fixed deviations caused by bus refresh phase or communication delay.

[0058] The FPGA determines the current processing zone based on a unified position x and normalizes the position into a lookup table address. If the processing position is between two sampling points, the target energy is obtained by phase interpolation of the address fraction. At sampling points with equal positions, energy control is bound to the processing position, independent of the movement speed. At corners, deceleration zones, entrances, exits, or material-sensitive areas, energy segments that decrease, increase, or gradually change can be pre-set in the position function, thus giving each position a defined target energy control value.

[0059] In summary, position feedback can be provided by an AB phase encoder, a pulse + direction interface, a position synchronization trigger module, motion controller registers, or real-time bus process data. The AB phase signals are quadrature-decoded and direction-determined to form a cumulative count; the pulse + direction interface determines the position based on the pulse count and direction bit; the bus interface receives position data according to the communication cycle and converts it to uniform engineering units through byte order, proportional coefficient, direction, and zero-point offset. Position synchronization trigger latches the count value at a known reference position to correct for fixed delays. The FPGA maps the uniform position x to a lookup table address P=f(x) and interpolates it, ensuring a one-to-one correspondence between laser energy and processing position; at corners, deceleration zones, entrances, exits, or locally sensitive areas, preset functions can reduce, increase, or gradually change the output energy.

[0060] Furthermore, if the FPGA real-time waveform control module uses the sub-pulse sequence number within the Burst after laser triggering as the index, then before the corresponding sub-pulse arrives, the control code is updated in advance based on the modulator response delay and DAC setup time; and after the last sub-pulse is processed, the counter enters a waiting state until the next Burst start event is resynchronized.

[0061] The Burst counter unit resets the sub-pulse number n to zero upon the arrival of each Burst start event and increments n after each sub-pulse trigger event, using n as the address of the P=f(n) lookup table. Before the arrival of the corresponding sub-pulse, the FPGA updates the control code in advance based on the modulator response delay and DAC setup time, ensuring that the analog control quantity reaches a stable value when the sub-pulse passes through the AOM, EOM, or pulse selector. After the last sub-pulse is processed, the counter enters a waiting state until resynchronization at the next Burst start event. This allows for incrementing, decrementing, stepped, symmetrical, or arbitrarily custom envelopes. When the sequence number exceeds the limit, the Burst length is incorrect, or the trigger is lost, the safety protection unit outputs a preset safety value.

[0062] In addition to the Burst mode, the system also includes a time function mode, a position function mode, a velocity function mode, an external trigger sequence mode, and a closed-loop correction superposition mode. Each mode adopts a common link of "index normalization, address mapping, table lookup or interpolation, calibration inverse calculation, and DAC synchronous update", and improves the output energy accuracy through DAC resolution, interpolation accuracy, modulator calibration curve, trigger advance, and optional closed-loop compensation.

[0063] Figure 5 A schematic diagram of the energy envelope of a sub-pulse inside a Burst is shown, combined with Figure 5 The Burst counting unit clears the sub-pulse sequence number n to zero when the Burst start event arrives, and increments n after each sub-pulse event. The FPGA reads the energy control code corresponding to P=f(n) with n as the address, and updates the output in advance by combining the DAC setup time and modulator response delay, so that each sub-pulse obtains the preset energy. The envelope can be incrementing, decrementing, stepped, symmetrical, or user-defined; a safety value is output when the sequence number goes out of bounds, the Burst length is abnormal, or the trigger is lost. In addition to the Burst mode, the time, position, speed, and external trigger sequence modes all use index normalization, address mapping, lookup table interpolation, calibration inverse calculation, and synchronous update links to achieve accurate output.

[0064] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the digital-to-analog conversion module in the dynamic modulation system will be further introduced below.

[0065] The digital-to-analog converter latches the digital control code when the update strobe signal arrives and converts it into analog voltage or current.

[0066] The digital-to-analog converter latches the B-bit digital control code D when the update strobe signal arrives, and then... Converted to analog voltage or current, the output is held until the next update cycle. The output can be configured with buffer amplification, bias, and low-pass filtering circuits; for nonlinear modulators, the waveform generation module or FPGA employs an inverse calibration table to maintain a monotonic and calibrable mapping between the target energy and the actual analog control quantity.

[0067] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the laser modulation module in the dynamic modulation system will be further introduced below.

[0068] Optionally, the laser modulation module includes at least one of an acousto-optic modulator, an electro-optic modulator, a pulse selector, and a pump drive module.

[0069] Analog control signals are used to adjust the RF drive amplitude of the acousto-optic modulator; or to adjust the control voltage of the electro-optic modulator; or to adjust the gating or modulation depth of the pulse selector; or to adjust the current or power settings of the pump drive module. By adjusting the acousto-optic modulator, electro-optic modulator, pulse selector, or pump drive module using analog control signals, the transmission energy of the femtosecond pulse, the selected pulse, or the output energy of the laser can be changed.

[0070] The laser modulation module may include an acousto-optic modulator (AOM), an electro-optic modulator (EOM), a pulse selector, a pump drive module, or a combination thereof. Analog control signals are used to adjust the RF drive amplitude, electro-optic crystal control voltage, pulse gating or modulation depth, and pump current or power settings. The FPGA real-time waveform control module can set and update the advance amount based on the DAC setup time, modulator response delay, and optical path propagation delay to stabilize the modulation state before the arrival of the target femtosecond pulse. When using an AOM, analog control quantities adjust the RF drive amplitude, thereby changing the diffraction efficiency and the pulse energy entering the processing optical path. When using an EOM, the control voltage changes the electro-optic crystal phase delay and, in conjunction with the polarizer, changes the transmittance. When using a pulse selector, the control quantity and gating timing jointly determine which pulses are released and their modulation depth. When using a pump drive, the control quantity changes the pump current or power settings. The FPGA real-time waveform control module sets and updates the advance amount based on the DAC setup time, RF drive delay, and optical path propagation delay to stabilize the modulation state before the arrival of the target femtosecond pulse.

[0071] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the photoelectric detection module, analog-to-digital conversion module, and feedback compensation module in the dynamic modulation system will be further introduced below.

[0072] Figure 6 A schematic diagram of a closed-loop energy compensation structure is shown, combined with Figure 6The photoelectric detection module acquires an optical signal proportional to the output pulse energy through a beam splitter or the sampling optical path inside the laser. A photodiode converts this signal into a current, which is then converted into a voltage suitable for sampling by a transimpedance amplifier, integrator, or sample-and-hold circuit. The analog-to-digital conversion module acquires this voltage within a sampling window synchronized with laser triggering and obtains the actual energy measurement value using at least one of the following methods: peak extraction, integration, single-pulse sampling, Burst integration, or moving average. After dark current subtraction, gain, and zero-point calibration, the feedback compensation module calculates the error between the target energy and the actual energy.

[0073] Feedback compensation can be achieved using proportional, proportional-integral, or segmented calibration table updates, superimposing the compensation amount onto the digital waveform data, calibration coefficients, or current DAC control code. The compensated control code still undergoes saturation, rate of change, and fault protection. A pulse-level feedforward lookup table is responsible for high-speed determination of each output. The feedback loop can be updated with a lower bandwidth based on a single pulse, each burst, or the average value of multiple pulses, thereby compensating for temperature drift, AOM / EOM nonlinearity, pump fluctuations, and slow optical path drift without compromising real-time trigger determinism.

[0074] Understandably, the photoelectric detection module converts the output light energy into current through a sampling optical path and a photodiode, which is then amplified, integrated, or sampled and held to form a voltage signal. The analog-to-digital conversion module completes sampling within a sampling window synchronized with laser triggering and obtains the actual energy measurement value through peak extraction, pulse integration, Burst integration, or moving average. The feedback compensation module, after subtracting dark current and applying gain and zero-point calibration, calculates the error between the target energy and the actual energy, and corrects the waveform lookup table, calibration coefficients, or current DAC control code using proportional, proportional-integral, or segmented calibration table update methods. Feedback updates can be performed on a single pulse, each Burst, or the average of multiple pulses, and the compensation result still undergoes saturation, rate of change, and fault protection.

[0075] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the complete working process of user-defined function-driven operation will be further described below.

[0076] Figure 7 This diagram illustrates the complete working process of a user-defined function-driven architecture, combined with... Figure 7First, the user inputs a series of coordinate points containing independent variables (time, position, velocity, or Burst sub-pulse number) and target energy through the function editing module, or directly inputs the energy function expression through the function editing module, or directly calls a pre-stored template curve through the function editing module, or directly calls a processing recipe pre-bound to the processing task through the function editing module to generate a laser energy function curve. Then, the waveform generation module converts the laser energy function curve into digital waveform data containing index ranges and address mapping relationships, and generates a waveform lookup table. Next, the FPGA real-time waveform control module looks up the digital waveform data according to the coordinate points in the laser energy function curve. Then, the digital-to-analog conversion module converts the read digital control code into an analog control signal, and the laser modulation module changes the pulse energy entering the processing optical path or the output energy of the femtosecond pulse laser according to the analog control signal.

[0077] Table 3 shows recommended parameter ranges and descriptions for some implementation parameters. For example, the FPGA system clock is set to 100MHz to 250MHz to meet the requirements of trigger response, address calculation, and DAC update. Another example is setting the DAC resolution to 12bit to 16bit (preferably 16bit) to improve analog control accuracy.

[0078] Table 3: Recommended Parameter Ranges and Parameter Descriptions for Implementation

[0079] In summary, this system does not simply change a single power setpoint. Instead, it sequentially converts the user-input target energy function into a digital waveform lookup table and control codes that can be executed by the FPGA in real time. At the update moment determined by laser triggering, the FPGA uses time t, position x, velocity v, or Burst sub-pulse number n as indices to drive the analog-to-digital converter and laser modulation module, thus converting the target energy curve into output energy that varies position-by-position or pulse-by-pulse along the processing trajectory. When photoelectric detection is enabled, the actual output can also be sampled and error calculated before being returned to the feedback compensation module. Therefore, the graphical function, real-time hardware control, and specific processing results form a complete data and control chain.

[0080] To more clearly illustrate the structure and function of the dynamic modulation system in this embodiment, the complete working process of user-defined function-driven operation will be further described below.

[0081] Figure 8 This diagram illustrates an energy function mapping in position-synchronized processing, combined with... Figure 8The real-time position x given by the encoder or motion controller is converted into a unified position value after conversion by direction, zero point, and proportional coefficient. The FPGA maps this position to the lookup table address of P=f(x) and performs interpolation. Different target energies can be set for the entry, stable processing section, local high-energy zone, corner deceleration zone, material sensitive zone, and exit, so that the lookup table address, DAC control code, processing trajectory position, and the corresponding femtosecond pulse energy remain synchronized; therefore, even if the motion speed or path direction changes, the energy modulation is still directly determined by the spatial position.

[0082] The structure and function of the dynamic modulation system in this embodiment will be illustrated below with some specific examples.

[0083] Example 1: Illustrate the complete implementation process using the time function model: First, the user inputs key points (0ms, 0%), (2ms, 50%), (5ms, 100%), (95ms, 100%), and (100ms, 30%) in the function editing module, or inputs a piecewise formula expressing the equivalent relationship, and binds this curve to the processing recipe. The waveform generation module checks the domain and amplitude, interpolates each segment, and generates the target energy sequence with 4096 sampling points; it inversely calculates the control voltage based on the pre-measured modulator "control voltage-output energy" calibration curve, then performs 16-bit DAC quantization, executes amplitude and slope limits, and generates a waveform lookup table with CRC and version number. The above values ​​are for illustrative purposes only; the number of sampling points, bit width, and time parameters can be adjusted according to system resources.

[0084] Then, the host computer writes the lookup table into the FPGA's free buffer. After verifying the length, CRC, version, and security threshold, the FPGA switches the buffer to the active buffer in the off-light state. When the processing start trigger arrives, the trigger synchronization unit generates a single-cycle valid event and resets the time counter; the address calculation unit converts the system clock count into time t and the lookup table address, the waveform storage unit reads the adjacent control code, the interpolation calculation unit obtains the current control code, and the safety protection unit completes the amplitude limiting, slope, and timeout checks.

[0085] Next, the protected digital control code is written to the digital-to-analog converter module at the predetermined DAC update time, and converted into an analog control voltage. The laser modulation module uses this voltage to adjust the AOM RF amplitude, EOM transmittance, pulse selector, or pump setting, so that the femtosecond pulsed laser gradually increases in the initial stage, maintains the target energy in the steady stage, and gradually decreases in the final stage. When processing ends or a fault signal arrives, the safety protection unit switches to the light-stop control value and freezes the address count.

[0086] Finally, when closed-loop compensation is enabled, the sampling optical path and photoelectric detection module collect the output energy, and the analog-to-digital conversion module samples and forms the actual energy value within the trigger synchronization window. The feedback compensation module compares the actual energy with the current target value and updates the compensation coefficient or DAC control code according to the moving average error of multiple pulses; the compensation result takes effect in the next update cycle and is subject to saturation and rate of change limits. Thus, function editing, waveform generation, FPGA real-time reading, digital-to-analog conversion, laser modulation, femtosecond laser output, and optional feedback compensation are all included in the same complete implementation process.

[0087] Example 2: Position synchronization energy control using position function mode: During glass cutting or wafer dicing, the user defines P=f(x) using key points, splines, or recipes. The waveform generation module performs sampling, calibration inverse calculation, quantization, and amplitude limiting, and then issues a position waveform table. Encoder, motion controller, or bus position data is converted into a unified position x using proportional coefficients, direction, and zero-point offset. The FPGA maps x to an address and interpolates to read the control code, which is then used by the DAC and laser modulation module to change the output energy in real time. At path corners, entrances, exits, or locally sensitive areas, the system automatically adjusts the laser energy according to the position function; optional photoelectric feedback provides slow correction for long-term drift to improve edge quality and kerf consistency.

[0088] Example 3: Burst internal energy envelope control using the Burst envelope pattern: When the laser operates in Burst mode and each Burst contains multiple sub-pulses, the user defines P=f(n) and generates a sequence lookup table. The Burst start signal resets the counter to zero, and each sub-pulse event increments n. The FPGA reads the control value according to n and updates the DAC in advance based on the modulator response delay, ensuring that each sub-pulse receives the target energy. For example, a Burst containing 5 sub-pulses can be set to a decreasing energy distribution of 100%, 80%, 60%, 40%, and 20%. Photoelectric detection can be performed by integrating a single Burst or averaging multiple Bursts. The feedback compensation module adjusts the gain of the entire envelope or the control codes of each sequence number accordingly to reduce heat accumulation or impact effects and maintain long-term consistency.

[0089] Example 4: Closed-loop compensation that can be superimposed with time, position, velocity, or Burst modes: The sampling optical path directs a small amount of output light to the photodiode. The transimpedance amplification and integration / hold circuit generates a voltage corresponding to the pulse energy, and the ADC samples within the trigger synchronization window. After dark current, zero-point, and gain calibration, the actual energy is obtained. The feedback compensation module calculates the error and updates the lookup table, calibration coefficients, or control codes using proportional-integral, segmented calibration, or gain correction methods. The updated result takes effect after being limited and protected against rate of change to compensate for energy drift caused by changes in AOM, EOM, pump source, or optical path state.

[0090] The technical solutions in this invention embodiment realize the direct conversion of user-defined functions into femtosecond laser energy control waveforms; realize the dynamic adjustment of femtosecond laser energy according to time, position, speed or Burst subpulse sequence number; realize real-time execution through FPGA, reducing communication latency and software jitter; realize the improvement of energy deposition consistency in complex paths, variable speed scanning, start-stop segments and Burst processing; and realize the improvement of long-term operational stability through feedback compensation.

[0091] Based on the same inventive concept, this embodiment proposes a method for dynamic modulation of femtosecond pulse laser energy. This method is applied to a femtosecond pulse laser energy dynamic modulation system and includes: The system receives a laser energy function curve with time, position, velocity, or Burst subpulse number as independent variables; it samples, interpolates, calibrates, quantizes, limits, and maps the laser energy function curve to an address, generating a digital waveform lookup table; it sends the digital waveform lookup table to the inactive buffer of the FPGA and switches it to the active buffer after verification; at the update time determined by laser triggering, the FPGA calculates the read address and obtains the digital control code based on the current time, position, velocity, trigger number, or Burst subpulse number; it converts the digital control code into an analog control signal; and it uses the analog control signal to adjust the output energy of the femtosecond pulsed laser.

[0092] Furthermore, the process of converting the laser energy function curve into a digital waveform lookup table includes: Determine the domain of the independent variable and the sampling step size; evaluate the formula or perform linear interpolation or spline interpolation between key points; calculate the analog control quantity based on the calibration relationship between the target energy and the analog control quantity; quantize into digital control code according to the bit width of the digital-to-analog conversion module; limit the amplitude and the rate of change of adjacent points of the digital control code; establish the mapping between the independent variable, the storage address and the digital control code.

[0093] Furthermore, when the position function P=f(x) is used, the FPGA performs quadrature counting on the AB phase encoder, or receives pulse and direction interface, position synchronization trigger, motion controller position or real-time bus position process data, and obtains a unified position x according to the proportional coefficient, direction and zero-point offset; the position x is normalized into an integer address and a fractional phase, and the energy control value is obtained by looking up the table and interpolation, so that the femtosecond pulse laser energy changes with the processing position.

[0094] Furthermore, when using the speed function P=f(v), the speed v is calculated based on the difference between the sampled values ​​of adjacent positions and the sampling time, or the speed value provided by the motion controller is received; the speed v is mapped to a waveform reading address and a digital control code is obtained, so as to adjust the analog control signal in real time when the motion speed changes, so that the energy deposition per unit processing length is kept within a predetermined range.

[0095] Furthermore, when using the Burst subpulse sequence number function P=f(n), the subpulse counter is cleared when the Burst start event arrives, the sequence number n is updated after each subpulse event, and the corresponding digital control code is read with the sequence number n; combined with the setup time of the digital-to-analog conversion module and the response delay of the laser modulation module, the analog control signal is updated in advance, so that different subpulses within the same Burst form increasing, decreasing, stepped, symmetrical, or user-defined energy envelopes.

[0096] Furthermore, when using the time function P=f(t), the time counter is reset based on the processing start trigger or laser trigger, the current time t is obtained by counting according to the system clock, and the current time t is mapped to the waveform reading address to realize the processing start gradual rise, the stable segment maintenance and the processing end gradual fall.

[0097] Furthermore, the actual output energy is obtained through the sampling optical path and photoelectric detection module. After analog-to-digital conversion, it is compared with the current target energy to obtain the error. The waveform lookup table, calibration coefficient, or current digital control code is corrected by using proportional, proportional-integral, or segmented calibration table update methods. The correction result is then used for subsequent pulses or subsequent Bursts after amplitude and rate of change limits.

[0098] Specifically, the entire dynamic modulation process includes: receiving the user-defined target energy function; performing sampling, interpolation, calibration inverse calculation, quantization, amplitude limiting, rate of change limiting, and address mapping to form a waveform lookup table; writing the waveform lookup table into the FPGA and completing buffer switching; calculating the read address based on time, position, speed, trigger sequence number, or Burst subpulse sequence number at the determined update time; completing table lookup, optional interpolation, and security protection; converting the digital control code into an analog control signal and driving the laser modulation module; and acquiring the actual output energy and performing feedback compensation.

[0099] The technical effects brought about by the technical solution in this embodiment are similar to those described above, and will not be repeated here.

[0100] Based on the same inventive concept Figure 9 This is a schematic diagram of an electronic device that implements the femtosecond pulse laser energy dynamic modulation method according to embodiments of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0101] like Figure 9 As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded into the RAM 13 from storage unit 18. The RAM 13 can also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0102] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0103] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the femtosecond pulsed laser energy dynamic modulation method.

[0104] In some embodiments, the femtosecond pulse laser energy dynamic modulation method can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the femtosecond pulse laser energy dynamic modulation method described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform the femtosecond pulse laser energy dynamic modulation method by any other suitable means (e.g., by means of firmware).

[0105] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0106] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0107] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0108] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0109] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0110] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0111] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0112] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A femtosecond pulsed laser energy dynamic modulation system, characterized in that, The system includes: a function editing module, a waveform generation module, an FPGA real-time waveform control module, a digital-to-analog conversion module, a laser modulation module, and a femtosecond pulse laser; The function editing module provides various function inputs and generates a laser energy function curve with time, position, velocity, or Burst sub-pulse number as independent variables based on the received function inputs. The waveform generation module converts the laser energy function curve into digital waveform data with an index range and address mapping relationship. The FPGA real-time waveform control module reads the digital waveform data according to the current index value at the update time determined by the laser trigger signal. The digital-to-analog conversion module converts the read digital control code into an analog control signal. The laser modulation module changes the pulse energy entering the processing optical path or the output energy of the femtosecond pulse laser according to the analog control signal. The femtosecond pulse laser dynamically outputs the corresponding target energy.

2. The system according to claim 1, characterized in that, The function input methods include: polyline input, key point table input, spline input, formula input, template curve call input, and processing Recipe associated call input; The laser energy function curve includes: time function, position function, velocity function, and Burst subpulse number function.

3. The system according to claim 1, characterized in that, The system also includes: a photoelectric detection module, an analog-to-digital conversion module, and a feedback compensation module; The photoelectric detection module is used to convert the output light energy into a voltage signal; the analog-to-digital conversion module is used to sample the voltage signal within a sampling window synchronized with the laser trigger and obtain actual energy measurement data; the feedback compensation module is used to correct the waveform lookup table, calibration coefficient or current digital control code according to the error between the target energy and the actual energy.

4. The system according to claim 1, characterized in that, The function editing module includes: a key point editing unit, a curve interpolation unit, a formula input unit, a template curve calling unit, and a processing Recipe association unit; The key point editing unit is used to receive the coordinates of the input independent variable and the target energy, and to sort, deduplicate, and validate the range of the input coordinates; the curve interpolation unit is used to perform linear interpolation or spline interpolation between adjacent points of the input coordinates; the formula input unit is used to receive and parse the input energy function expression, and to check the domain, singularities, and discontinuities of the input energy function expression; the template curve calling unit is used to call a pre-stored template curve and to receive parameterized modifications to the template curve; the processing recipe association unit is used to call the processing recipe pre-bound to the processing task when the processing task is loaded. The processing recipe includes curve identifier, curve version, working mode, calibration parameters, and safety threshold.

5. The system according to claim 1, characterized in that, The process by which the waveform generation module converts the laser energy function curve into digital waveform data includes: Sampling points are set within the domain of the laser energy function curve. The target energy sequence of the sampling points is obtained by function evaluation or interpolation. Based on the calibration relationship between the target energy and the analog control quantity, the target energy is converted into an analog control quantity. The analog control quantity is quantized into digital control codes according to the bit width of the digital-to-analog conversion module. The digital waveform data is obtained by sequentially passing through amplitude limiting, adjacent control code change rate limiting, and storage address mapping, and a waveform lookup table is generated.

6. The system according to claim 1, characterized in that, The FPGA real-time waveform control module includes: a trigger synchronization unit, an address calculation unit, a waveform lookup table storage unit, an interpolation calculation unit, a Burst counting unit, and a safety protection unit; The trigger synchronization unit is used to synchronize the laser trigger or processing start signal and detect its edge; the address calculation unit is used to normalize the time, position, speed, or Burst subpulse sequence number into an integer address and a fractional phase in a lookup table; the waveform lookup table storage unit is used to store and output the digital control code corresponding to the integer address; the interpolation calculation unit is used to calculate the current control code based on the fractional phase; the Burst counting unit is used to reset the count to zero at the start of the Burst and update the sequence number according to the subpulse event; the safety protection unit is used to perform amplitude, rate of change, address out-of-bounds, trigger timeout, and fault status checks.

7. The system according to claim 6, characterized in that, The FPGA real-time waveform control module uses the time count value, position feedback value, speed value, trigger sequence number or Burst sub-pulse sequence number after laser triggering as index values. After normalization, address mapping and table lookup or interpolation, the corresponding digital control code is obtained. The advance is updated according to the setup time of the digital-to-analog conversion module and the response delay of the laser modulation module.

8. The system according to claim 6, characterized in that, The FPGA real-time waveform control module uses a dual-buffer or multi-buffer method to store digital waveform data; the host computer writes the waveform lookup table to be used into the inactive buffer area, and the FPGA real-time waveform control module checks the data length, version and check value, and switches the inactive buffer area to the active buffer area at the light stop window, processing section boundary, frame boundary or preset synchronization event.

9. The system according to claim 1, characterized in that, The laser modulation module includes at least one of an acousto-optic modulator, an electro-optic modulator, a pulse selector, and a pump drive module; Analog control signals are used to adjust the radio frequency drive amplitude of the acousto-optic modulator; Alternatively, it can be used to adjust the control voltage of the electro-optic modulator; Alternatively, it can be used to adjust the gating or modulation depth of the pulse selector; Alternatively, it can be used to adjust the current or power setting of the pump drive module.

10. A method for dynamic modulation of femtosecond pulse laser energy, applied to the femtosecond pulse laser energy dynamic modulation system as described in any one of claims 1-9, characterized in that, include: Receive laser energy function curves with time, position, velocity, or Burst subpulse number as independent variables; The laser energy function curve is sampled, interpolated, calibrated, inversely calculated, quantized, limited, and address mapped to generate a digital waveform lookup table. The digital waveform lookup table is then sent to the inactive buffer of the FPGA and switched to the active buffer after verification. At the update moment determined by laser triggering, the FPGA calculates the read address and obtains the digital control code based on the current time, position, speed, trigger sequence number or Burst subpulse sequence number; converts the digital control code into an analog control signal; and uses the analog control signal to adjust the output energy of the femtosecond pulse laser.

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