Composite film and method for producing the same

Abstract

The application provides a composite film and a preparation method thereof. The composite film comprises a substrate layer, a functional layer, a first silicon-oxygen layer and an electrostatic dissipation layer. The functional layer is formed on one side of the substrate layer along a first direction; the first silicon-oxygen layer is formed between the substrate layer and the functional layer along the first direction; and the electrostatic dissipation layer is formed between the first silicon-oxygen layer and the functional layer along the first direction, and the electrostatic dissipation layer serves as a dissipation channel for discharging electrostatic charges. When electrostatic charges are generated in subsequent processing, the electrostatic charges can be quickly conducted away through the electrostatic dissipation layer, so that local electric field breakdown of the functional layer or a device electrode is avoided, the anti-static discharge performance of the composite film in the subsequent processing procedure is improved, ESD failure is prevented, and reliability is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a composite thin film and its preparation method. Background Technology

[0002] As electronic components develop towards miniaturization, low power consumption, and high performance, composite thin film materials are widely used in processors such as central processing unit (CPU) chips, as well as radio frequency devices such as memory and filters.

[0003] In related technologies, traditional composite thin films typically consist of a substrate layer, a silicon dioxide layer, and a functional layer stacked from bottom to top. When using thermal oxidation to prepare the silicon dioxide layer in a composite thin film, the high resistivity makes it difficult to effectively dissipate static charge during subsequent processing, easily leading to electrostatic discharge (ESD) failure. Furthermore, the electromechanical coupling coefficient... The performance level is too low to meet the requirements. Summary of the Invention

[0004] This application provides a composite film and its preparation method, which can improve the anti-static discharge performance of the composite film in subsequent processing steps, prevent ESD failure, and improve reliability.

[0005] To achieve the above objectives, the embodiments of this application adopt the following technical solutions: In a first aspect, embodiments of this application provide a composite film, comprising: Substrate layer; A functional layer is formed on one side of the substrate layer along a first direction; A first silicon oxide layer is formed between the substrate layer and the functional layer along a first direction; An electrostatic dissipation layer is formed along a first direction between the first silicon oxide layer and the functional layer. The electrostatic dissipation layer serves as a dissipation channel for dissipating static charge.

[0006] In some embodiments, the electrostatic dissipation layer comprises a silicon element component and an oxygen element component, wherein the silicon-oxygen atomic ratio of the silicon element component and the oxygen element component is greater than or equal to 0.6 and less than or equal to 0.9.

[0007] In some implementations, the electrostatic dissipation layer also includes a nitrogen element component.

[0008] In some embodiments, the silicon-oxygen atom ratio of the electrostatic dissipation layer near the functional layer is greater than the silicon-oxygen atom ratio of the electrostatic dissipation layer near the first silicon-oxygen layer. And / or, the nitrogen content of the electrostatic dissipation layer on the side closer to the functional layer is greater than the nitrogen content of the electrostatic dissipation layer on the side closer to the first silicon oxide layer.

[0009] In some embodiments, the electrostatic dissipation layer includes: A first thin film layer is formed along a first direction between a first silicon oxide layer and a functional layer. The second thin film layer is formed between the first thin film layer and the functional layer along the first direction. A third thin film layer is formed between the second thin film layer and the functional layer along the first direction; Wherein, the silicon-to-oxygen atomic ratio of the first thin film layer is less than that of the second thin film layer, and the silicon-to-oxygen atomic ratio of the second thin film layer is less than that of the third thin film layer; and / or, The nitrogen content of the first thin film layer is less than that of the second thin film layer, and the nitrogen content of the second thin film layer is less than that of the third thin film layer.

[0010] In some embodiments, the silicon-to-oxygen ratio of the first thin film layer is 0.6; the silicon-to-oxygen ratio of the second thin film layer is greater than or equal to 0.7 and less than or equal to 0.8; the silicon-to-oxygen ratio of the third thin film layer is greater than or equal to 0.8 and less than or equal to 0.9; and / or, The atomic percentage of nitrogen in the first thin film layer is greater than 0 and less than or equal to 1. The atomic percentage of nitrogen in the second thin film layer is greater than or equal to 2%. and less than or equal to 4 The atomic percentage of nitrogen in the third thin film layer is greater than or equal to 4. And less than or equal to 6 .

[0011] In some embodiments, the dimension of the first thin film layer along the first direction is greater than or equal to 20 nm and less than or equal to 80 nm; and / or, The second thin film layer has a dimension along the first direction that is greater than or equal to 60 nm and less than or equal to 300 nm; and / or, The dimension of the third thin film layer along the first direction is greater than or equal to 30 nm and less than or equal to 120 nm.

[0012] In some embodiments, the dimension of the first silicon oxide layer along the first direction is greater than or equal to 10 nm and less than or equal to 100 nm; and / or, The size of the electrostatic dissipation layer along the first direction is greater than or equal to 150 nm and less than or equal to 500 nm.

[0013] In some embodiments, a trap layer is also included, which is disposed between the substrate layer and the first silicon oxide layer along a first direction; the trap layer is a polycrystalline silicon layer or an amorphous silicon layer.

[0014] In some embodiments, a low-sound-loss layer is also included, which is formed along a first direction between the electrostatic dissipation layer and the functional layer. The low-sound-loss layer is an oxygen-silicon layer.

[0015] In some embodiments, the dimension of the low acoustic loss layer along the first direction is greater than or equal to 2 nm and less than or equal to 50 nm; and / or, The density of the low-sound-loss layer is ≥2.2. .

[0016] Secondly, embodiments of this application provide a method for preparing a composite thin film, comprising the following steps: Provide a substrate layer; A first silicon oxide layer is prepared on the substrate; An electrostatic dissipation layer is prepared on the side of the first silicon oxide layer that is away from the substrate layer along the first direction. The electrostatic dissipation layer serves as a dissipation channel for dissipating static charge. A functional layer is prepared on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer to obtain a composite film.

[0017] In some embodiments, the substrate layer has a first surface and a second surface disposed opposite to each other along a first direction. Fabricating a first silicon oxide layer on the substrate layer includes: thermally oxidizing the first surface of the substrate layer to form the first silicon oxide layer; and / or depositing a trap layer on the first surface of the substrate layer and thermally oxidizing the trap layer on the side facing away from the substrate layer to form the first silicon oxide layer; and / or... The electrostatic dissipation layer is prepared on the side of the first silicon oxide layer facing away from the substrate layer, comprising: forming the electrostatic dissipation layer on the side of the first silicon oxide layer facing away from the substrate layer by plasma-enhanced chemical vapor deposition; or, forming the electrostatic dissipation layer on the side of the first silicon oxide layer facing away from the substrate layer by performing a rapid annealing post-treatment after plasma-enhanced chemical vapor deposition; and / or A functional layer is fabricated on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer, including: Provide functional wafers; Ion implantation is performed on a functional wafer to obtain an implanted wafer, which includes a functional layer, a separation layer and a residual mass layer distributed along a first direction. The functional layer of the implanted sheet is bonded to the electrostatic dissipation layer to obtain a bonded body; The bonded material is annealed to remove the separation layer and residual layer, resulting in a composite film.

[0018] In some embodiments, the preparation method further includes: A low-sound-loss layer is formed on the side of the electrostatic dissipation layer that is away from the first silicon oxide layer; A functional layer is fabricated on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer to obtain a composite thin film, comprising: A functional layer is fabricated on the side of the low acoustic loss layer that is away from the electrostatic dissipation layer.

[0019] In some embodiments, a low acoustic loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer, including: A low-sound-loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer via physical vapor deposition; or... A low acoustic loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer by atomic layer deposition.

[0020] The composite thin film and its preparation method provided in the embodiments of this application involve a substrate layer, a first silicon oxide layer, an electrostatic dissipation layer, and a functional layer stacked along a first direction. The electrostatic dissipation layer serves as a dissipation channel for dissipating static charges. When static charges are generated during subsequent processing, these charges can be quickly conducted away through the electrostatic dissipation layer, preventing local electric field breakdown of the functional layer or device electrodes. This improves the electrostatic discharge resistance of the composite thin film in subsequent processing steps, prevents ESD failure, and enhances reliability.

[0021] In addition, a first silicon oxide layer and an electrostatic dissipation layer are incorporated. The first silicon oxide layer dominates the Q value, resulting in extremely low RF loss and an even higher Q value for the composite film. The electrostatic dissipation layer, as an electrostatic dissipative material, allows static charges generated during subsequent processing to be quickly conducted away, preventing localized electric field breakdown of functional layers or device electrodes, thus preventing ESD failure and improving the electromechanical coupling coefficient. The coordination of these two factors allows the composite thin film to achieve a balance between high Q value, low RF loss, and high performance. ESD resistance. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 1 ; Figure 2 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 2 ; Figure 3 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 3 ; Figure 4 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 4 ; Figure 5 This is a flowchart illustrating a method for preparing a composite thin film according to an embodiment of this application. Figure 1 ; Figure 6 This is a schematic diagram of the substrate layer in a method for preparing a composite thin film according to an embodiment of this application; Figure 7 This is a schematic diagram of the preparation of a first silicon oxide layer on a substrate in a method for preparing a composite thin film according to an embodiment of this application; Figure 8 This is a schematic diagram of the preparation of a trap layer on a substrate in a method for preparing a composite thin film provided in this application embodiment; Figure 9 This is a schematic diagram illustrating the preparation of a first silicon oxide layer on a trap layer in a method for preparing a composite thin film according to an embodiment of this application. Figure 10A This is a schematic diagram of the preparation of an electrostatic dissipation layer on a first silicon oxide layer in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 10B This is a schematic diagram of the preparation of an electrostatic dissipation layer on a first silicon oxide layer in a method for preparing a composite thin film provided in this application embodiment. Figure 2 ; Figure 11 This is a flowchart illustrating a method for preparing a composite thin film according to an embodiment of this application. Figure 2 ; Figure 12A This is a schematic diagram of the structure of a functional wafer in a method for preparing a composite thin film provided in an embodiment of this application; Figure 12B This is a schematic diagram of ion implantation of a functional wafer in a method for preparing a composite thin film according to an embodiment of this application; Figure 12C This is a schematic diagram of the structure of the injection sheet in a method for preparing a composite thin film according to an embodiment of this application; Figure 13A This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 13B This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 2 ; Figure 14A This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 14B This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 2 ; Figure 15A This is a schematic diagram of the preparation of a low acoustic loss layer on an electrostatic dissipation layer in a method for preparing a composite thin film provided in this application embodiment; Figure 15B This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 3 ; Figure 15C This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 3 .

[0023] Explanation of reference numerals in the attached figures: 100 - Composite thin film; 10 - Substrate layer; 20 - First silicon oxide layer; 30 - Electrostatic dissipation layer; 31 - First thin film layer; 32 - Second thin film layer; 33 - Third thin film layer; 40 - Functional layer; 401 - Functional wafer; 42 - Separation layer; 43 - Residual material layer; 4011 - First surface; 4012 - Second surface; 50 - Trap layer; 60 - Low acoustic loss layer; T1 - First direction. Detailed Implementation

[0024] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of this application.

[0025] It should be noted that many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Therefore, the scope of protection of this application is not limited to the specific embodiments disclosed below.

[0026] As electronic components develop towards miniaturization, low power consumption, and high performance, composite thin film materials are widely used in processors such as central processing unit (CPU) chips, as well as radio frequency devices such as memory and filters.

[0027] In related technologies, traditional composite thin films typically consist of a substrate layer, a silicon dioxide layer, and a functional layer stacked from bottom to top. When the silicon dioxide layer in the composite thin film is prepared using a thermal oxidation method, its resistivity is high, making it difficult to effectively dissipate static charges in subsequent processing steps. This easily leads to electrostatic discharge (ESD) failure, and the electromechanical coupling coefficient is also high. The performance level is too low to meet the requirements.

[0028] It should be noted that back-end processing can be understood as the back-end processes of chip manufacturing (BEOL) that the composite thin film undergoes after the basic structure is prepared, including photolithography and patterning, etching, electrode deposition, chemical mechanical polishing and chip packaging.

[0029] In post-processing, the functional layers of materials such as lithium niobate or lithium tantalate generate static charge due to the pyroelectric effect. If the static charge cannot be dissipated, it will accumulate to a certain extent and cause local electric field breakdown of the functional layer. In addition, the extremely fine and fragile metal electrodes prepared in post-processing can also be broken down by the local electric field, causing ESD failure.

[0030] The applicant discovered that the reason why static charge could not be dissipated during subsequent processing included: the silicon oxide layer in the related technology had extremely high resistivity, reaching [amount missing]. In subsequent processing steps, the static charge cannot be conducted away.

[0031] Based on this, the present application provides a composite film that can improve the anti-static discharge performance of the composite film in subsequent processing steps and enhance its reliability.

[0032] Figure 1 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 1 . Reference Figure 1 As shown in the embodiments of this application, the composite thin film 100 includes a substrate layer 10, a functional layer 40, and a first silicon oxide layer 20 and an electrostatic dissipation layer 30 formed between the substrate layer 10 and the functional layer 40.

[0033] The substrate layer 10 is used to provide mechanical support and basic substrate functions.

[0034] The functional layer 40 is formed on one side of the substrate layer 10 along the first direction T1. The functional layer 40 is a structural layer with core functions of the composite thin film 100, such as piezoelectric and semiconductor properties.

[0035] A first silicon oxide layer 20 is formed along a first direction T1 between the substrate layer 10 and the functional layer 40. An electrostatic dissipation layer 30 is formed along the first direction T1 between the first silicon oxide layer 20 and the functional layer 40, and the electrostatic dissipation layer 30 serves as a dissipation channel for dissipating static charge.

[0036] The above scheme involves stacking a substrate layer 10, a first silicon oxide layer 20, an electrostatic dissipation layer 30, and a functional layer 40 along the first direction T1. The electrostatic dissipation layer 30 is formed between the first silicon oxide layer 20 and the functional layer 40 along the first direction T1, serving as a dissipation channel to discharge static charge. When static charge is generated during subsequent processing, this static charge can be quickly conducted away through the electrostatic dissipation layer, preventing local electric field breakdown of the functional layer or device electrodes. This improves the electrostatic discharge resistance of the composite film in subsequent processing steps, prevents ESD failure, and enhances reliability.

[0037] Furthermore, a first silicon oxide layer 20 and an electrostatic dissipation layer 30 are provided. The first silicon oxide layer 20 dominates the Q value, resulting in extremely low RF loss and a higher Q value for the composite film. The electrostatic dissipation layer 30, as an electrostatic dissipative material, allows static charges generated during subsequent processing to be quickly conducted away, preventing local electric field breakdown of functional layers or device electrodes, thus preventing ESD failure and improving efficiency. The coordination of these two factors allows the composite thin film 100 to achieve a high quality factor (Q value), low RF loss, and high efficiency. ESD resistance.

[0038] Here, the first direction T1 can be understood as the thickness direction of the composite film 100.

[0039] In some embodiments, the substrate 10 may be made of silicon, or other semiconductor materials may be selected according to actual needs. This application does not limit the type of material of the substrate 10.

[0040] In some embodiments, the functional layer 40 may be made of, but is not limited to, any one of lithium niobate, lithium tantalate, silicon carbide, silicon, gallium nitride, or gallium arsenide.

[0041] In some examples, the functional layer 40 may be made of lithium niobate or lithium tantalate to provide high voltage coefficients and good acoustic transmission performance, etc.

[0042] In some embodiments of this application, the electrostatic dissipation layer 30 includes a silicon element component and an oxygen element component, and the silicon-oxygen atomic ratio (Si / O) of the silicon element component and the oxygen element component is greater than or equal to 0.6 and less than or equal to 0.9, that is, 0.6≤Si / O≤0.9.

[0043] According to the above scheme, the silicon-to-oxygen ratio is controlled between 0.6 and 0.9, that is, the electrostatic dissipation layer 30 is configured as a silicon-rich silicon oxide layer. Excess silicon atoms in this layer will form defect energy levels in the band gap. These energy levels can serve as hopping conductive channels for charge carriers, reducing the resistivity of the electrostatic dissipation layer 30. Therefore, the electrostatic dissipation layer 30, with its silicon-rich composition and moderately low resistivity, increases the dielectric constant, thereby improving the performance of the composite thin film 100. This broadens the operating bandwidth of the device; and the defect energy levels formed by the excess silicon atoms make the electrostatic dissipation layer 30 an electrostatic dissipative material. When static charges are generated in the subsequent processing, these static charges can be quickly conducted away through this layer, avoiding local electric field breakdown of the functional layer or device electrodes and preventing ESD failure.

[0044] In some embodiments, the resistivity of the electrostatic dissipation layer 30 can be controlled within the range of 10. 8 Up to 10 11 This ensures effective electrostatic dissipation while avoiding excessive RF loss due to low resistivity.

[0045] In some examples, the silicon-to-oxygen atom ratio of the electrostatic dissipation layer 30 can be specific values ​​such as 0.6, 0.65, 0.7, 0.75, 0.8, 0.85, or 0.9, which can be controlled by adjusting the flow rate ratio of the reactant gas.

[0046] In some embodiments of this application, the electrostatic dissipation layer 30 may also include a nitrogen element component.

[0047] Therefore, the electrostatic dissipation layer 30 comprises silicon, oxygen, and nitrogen elements, and can form more heat-resistant and stable Si-N chemical bonds. These Si-N chemical bonds can fix hydrogen atoms in the electrostatic dissipation layer 30, suppressing hydrogen release during subsequent high-temperature processing, improving oxidation resistance, and forming a denser network structure, thus enhancing thermal stress resistance and strengthening the structural stability and reliability of the composite film 100 under high-temperature conditions.

[0048] Furthermore, by utilizing the characteristics of nitrogen components, the dielectric constant of the electrostatic dissipation layer 30 can be increased, further enhancing its properties. This is beneficial for expanding the bandwidth of the device.

[0049] In some embodiments, nitrogen can be distributed in the silicon-oxygen network structure of the electrostatic dissipation layer 30 in the form of substitutional or interstitial doping. The embodiments of this application do not impose specific restrictions on the doping method of nitrogen.

[0050] In some examples, the nitrogen doping concentration in the electrostatic dissipation layer 30 can be determined according to actual needs. For example, if the electrostatic dissipation layer 30 is formed using a chemical vapor deposition process, the atomic percentage of nitrogen in the electrostatic dissipation layer 30 can be adjusted by regulating the flow rate of the nitrogen doping source.

[0051] Here, the nitrogen doping source can be nitrogen gas ( ) or ammonia ( Doping gases such as nitrogen dopant, etc., are not specifically limited in the types of nitrogen doping sources in the embodiments of this application.

[0052] In some embodiments of this application, the silicon-oxygen atom ratio of the electrostatic dissipation layer 30 near the functional layer 40 is greater than the silicon-oxygen atom ratio of the electrostatic dissipation layer 30 near the first silicon-oxygen layer 20.

[0053] Therefore, the electrostatic dissipation layer 30 has a higher silicon-oxygen atomic ratio on the side near the functional layer 40, that is, this side is rich in more silicon elements, which is beneficial for capturing and transporting static charge; it ensures the charge discharge capability of the top surface of the electrostatic dissipation layer 30, while also taking into account the structural stability requirements, thereby improving electrostatic protection and ensuring the overall mechanical integrity and long-term reliability of the composite film.

[0054] In some examples, the ratio of silicon to oxygen atoms in the electrostatic dissipation layer 30 exhibits a gradient distribution along the first direction T1, with a higher ratio of silicon to oxygen atoms on the side closer to the functional layer 40 and a lower ratio on the side farther from the functional layer 40.

[0055] In some examples, the silicon-to-oxygen ratio in the electrostatic dissipation layer 30 can vary gradually along the first direction T1, for example, by adjusting the ion source according to the preparation sequence (e.g. and Traffic is achieved through [the system / mechanism].

[0056] In some examples, the silicon-oxygen atom ratio in the electrostatic dissipation layer 30 may change in a stepwise abrupt manner along the first direction T1. In this embodiment, the change of the silicon-oxygen atom ratio in the electrostatic dissipation layer 30 along the first direction T1 is not specifically limited.

[0057] In some embodiments of this application, the content of nitrogen element component on the side of electrostatic dissipation layer 30 near functional layer 40 is greater than the content of nitrogen element component on the side of electrostatic dissipation layer 30 near first silicon oxide layer 20.

[0058] Through the above scheme, the side of the electrostatic dissipation layer 30 closest to the functional layer 40 has a higher dielectric constant and a lower resistivity, which can provide an efficient electrostatic dissipation path and is beneficial to improving... This expands the device bandwidth. The side of the electrostatic dissipation layer 30 away from the functional layer 40 has a relatively low dielectric constant and a high resistivity, which, together with the first silicon oxide layer 20, ensures low loss of the overall electrostatic dissipation layer 30 under radio frequency. Thus, by controlling the nitrogen concentration in a partitioned manner along the first direction T1, the electrostatic dissipation function and the low-loss radio frequency function are decoupled and coordinated.

[0059] In some examples, the nitrogen concentration in the electrostatic dissipation layer 30 exhibits a gradient distribution along the first direction T1, with a higher nitrogen concentration on the side closer to the functional layer 40 and a lower nitrogen concentration on the side farther from the functional layer 40.

[0060] In some examples, the nitrogen concentration in the electrostatic dissipation layer 30 can change gradually along the first direction T1, for example, by adjusting the concentration of the dopant gas in a time sequence.

[0061] In some examples, the nitrogen concentration in the electrostatic dissipation layer 30 can change in a stepwise abrupt manner along the first direction T1, for example, through segmented deposition. In this embodiment, the variation of the nitrogen concentration in the electrostatic dissipation layer 30 along the first direction T1 is not specifically limited.

[0062] Figure 2 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 2 . Reference Figure 2 As shown, in some embodiments of this application, the electrostatic dissipation layer 30 may include a first thin film layer 31, a second thin film layer 32, and a third thin film layer 33. The first thin film layer 31 is formed along a first direction T1 between the first silicon oxide layer 20 and the functional layer 40; the second thin film layer 32 is formed along the first direction T1 between the first thin film layer 31 and the functional layer 40; and the third thin film layer 33 is formed along the first direction T1 between the second thin film layer 32 and the functional layer 40.

[0063] Therefore, the electrostatic dissipation layer 30 is designed as a three-layer composite structure, which allows for the control of the silicon-oxygen atomic ratio, nitrogen composition, and performance of each layer, thereby better achieving resistivity gradient distribution and performance optimization. Here, the first thin film layer 31, located close to the first silicon oxide layer 20, primarily serves as a transition layer between the two layers and maintains low RF loss; the second thin film layer 32, as an intermediate transition layer, primarily serves to buffer stress and provide a resistivity gradient platform; and the third thin film layer 33, located close to the functional layer 40, primarily serves to achieve efficient electrostatic dissipation and enhance performance. The three thin film layers work synergistically to optimize the overall electrical and mechanical properties of the electrostatic dissipation layer 30.

[0064] In some examples, the interface between the three thin film layers (i.e., the first thin film layer 31, the second thin film layer 32, and the third thin film layer 33) can be a clear abrupt interface, for example, by depositing films under different process conditions in sequence.

[0065] In some examples, the interface between the three thin film layers (i.e., the first thin film layer 31, the second thin film layer 32, and the third thin film layer 33) can be a blurred, gradient interface, for example, achieved by continuously changing process parameters.

[0066] In some embodiments of this application, the nitrogen content of the first thin film layer 31 is less than the nitrogen content of the second thin film layer 32, and the nitrogen content of the second thin film layer 32 is less than the nitrogen content of the third thin film layer 33. That is, the nitrogen concentration increases sequentially from the first thin film layer 31 to the third thin film layer 33.

[0067] In some embodiments of this application, the silicon-to-oxygen atomic ratio of the first thin film layer 31 is less than that of the second thin film layer 32, and the silicon-to-oxygen atomic ratio of the second thin film layer 32 is less than that of the third thin film layer 33. That is, the silicon-to-oxygen atomic ratio also increases sequentially from the first thin film layer 31 to the third thin film layer 33.

[0068] In some embodiments of this application, the nitrogen content of the first thin film layer 31 is less than that of the second thin film layer 32, and the nitrogen content of the second thin film layer 32 is less than that of the third thin film layer 33; and the silicon-to-oxygen ratio of the first thin film layer 31 is less than that of the second thin film layer 32, and the silicon-to-oxygen ratio of the second thin film layer 32 is less than that of the third thin film layer 33. Therefore, the resistivity of the electrostatic dissipation layer 30 gradually decreases from the first thin film layer 31 to the third thin film layer 33, forming a resistivity gradient structure with high resistance at the bottom and low resistance at the top.

[0069] Correspondingly, the high resistivity of the first thin film layer 31 can maintain low RF loss, and together with the first silicon oxide layer, it can maintain the low loss of the overall electrostatic dissipation layer 30 under RF conditions; the intermediate resistivity of the second thin film layer 32 plays a transition and buffering role, preventing charge concentration or sound wave reflection caused by a sudden increase in resistivity; the low resistivity of the third thin film layer 33 provides an efficient lateral electrostatic discharge path, enabling the static charge to be quickly discharged.

[0070] In some embodiments of this application, the atomic percentage of nitrogen in the first thin film layer 31 is greater than 0 and less than or equal to 1. For example, 0.8 0.9 1 Alternatively, the atomic percentage of nitrogen in the first thin film layer 31 may also be greater than 0 and less than or equal to 1. The resistivity is continuously and gradually varied within a certain range to achieve high resistivity and low radio frequency loss performance. In this application embodiment, the atomic percentage of nitrogen in the first thin film layer 31 is not specifically limited.

[0071] In some embodiments of this application, the atomic percentage of nitrogen in the second thin film layer 32 is greater than or equal to 2. and less than or equal to 4 For example, 2 3.8 3.9 4 Alternatively, the atomic percentage of nitrogen in the second thin film layer 32 may also be greater than or equal to 2. and less than or equal to 4 The gradient is continuous within a certain range. In this embodiment of the application, there is no specific limitation on the atomic percentage of nitrogen in the second thin film layer 32.

[0072] In some embodiments of this application, the atomic percentage of nitrogen in the third thin film layer 33 is greater than or equal to 4. And less than or equal to 6 For example, 4. 4.8 5.9 6 Alternatively, the atomic percentage of nitrogen in the third thin film layer 33 can also be greater than or equal to 4. And less than or equal to 6 The range is continuously and gradually changed to form an efficient electrostatic discharge channel. In this embodiment, the atomic percentage of nitrogen in the third thin film layer 33 is not specifically limited.

[0073] Here, the atomic percentage of nitrogen can be understood as: the percentage of nitrogen atoms out of the total number of atoms of all elements in that layer. For example, the atomic percentage of nitrogen in the first thin film layer 31 is 1. This indicates that the first thin film layer 31 contains 1 nitrogen atom for every 100 atoms.

[0074] In some examples, the silicon-to-oxygen ratio of the first thin film layer 31 is 0.6.

[0075] In some examples, the silicon-to-oxygen atomic ratio of the second thin film layer 32 is greater than or equal to 0.7 and less than or equal to 0.8, that is, 0.7≤Si / O≤0.8, for example, 0.7, 0.75, 0.8 or other values. Alternatively, the silicon-to-oxygen atomic ratio of the second thin film layer 32 can also be continuously and gradually varied within the range of greater than or equal to 0.7 and less than or equal to 0.8. In this application embodiment, no specific limitation is made on the silicon-to-oxygen atomic ratio of the first thin film layer 31.

[0076] In some examples, the silicon-to-oxygen atomic ratio of the third thin film layer 33 is greater than or equal to 0.8 and less than or equal to 0.9, that is, 0.8≤Si / O≤0.9, for example, 0.8, 0.86, 0.9 or other values. Alternatively, the silicon-to-oxygen atomic ratio of the third thin film layer 33 may also be continuously and gradually varied within the range of greater than or equal to 0.8 and less than or equal to 0.9. The embodiments of this application do not impose specific limitations on the silicon-to-oxygen atomic ratio of the third thin film layer 33.

[0077] In the above scheme, the silicon-to-oxygen atomic ratio and nitrogen content are synergistically configured in the electrostatic dissipation layer 30, and the resistivity of the first thin film layer 31 is approximately The resistivity of the second thin film layer 32 is approximately to The resistivity of the third thin film layer 33 is approximately This creates a gradual decrease in resistivity from bottom to top (which can be understood as from the direction closest to the first silicon oxide layer 20 to the direction furthest from the first silicon oxide layer 20), from Reduce to The complete gradient. In this way, static charge is preferentially transported laterally and dissipated rapidly in the third thin film layer 33 with the lowest resistivity, and low RF loss is maintained by the high resistivity of the first thin film layer 31. In conjunction with the first silicon oxide layer 20, the overall intermediate layer (the layer between the substrate layer 10 and the functional layer 40) maintains low loss under RF conditions.

[0078] In some embodiments of this application, the thickness of the first thin film layer 31 can be relatively thin to avoid excessive obstruction of the electrostatic dissipation path by the high-resistivity layer; the thickness of the third thin film layer 33 can be relatively thick to ensure the formation of a continuous and complete lateral conductive network.

[0079] In some examples, the size of the first thin film layer 31 along the first direction T1 can be greater than or equal to 20 nm and less than or equal to 80 nm, such as 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm or 80 nm and other values. In this application embodiment, the size of the first thin film layer 31 along the first direction T1 is not specifically limited.

[0080] Here, the dimension of the first thin film layer 31 along the first direction T1 can be understood as the distance between the relative outer walls of the first thin film layer 31 along the first direction T1, that is, the thickness of the first thin film layer 31 as commonly understood.

[0081] It should be noted that if the dimension of the first thin film layer 31 along the first direction T1 is greater than 80 nm, the increased series resistance will increase RF loss and lengthen the path of static charge leakage along the longitudinal direction, reducing dissipation efficiency. If the dimension of the first thin film layer 31 along the first direction T1 is less than 20 nm, it cannot effectively block RF signal leakage, resulting in a decrease in Q value. Therefore, controlling the thickness of the first thin film layer 31 between 20 nm and 80 nm can maintain low RF loss without hindering static dissipation, while also ensuring that the dominant role of the first silicon oxide layer 20 in RF performance is not excessively diluted.

[0082] In some examples, the size of the second thin film layer 32 along the first direction T1 can be greater than or equal to 60nm and less than or equal to 300nm, such as 60nm, 80nm, 100nm, 150nm, 200nm, 250nm or 300nm and other values. In this application embodiment, the size of the second thin film layer 32 along the first direction T1 is not specifically limited.

[0083] Here, the dimension of the second thin film layer 32 along the first direction T1 can be understood as the distance between the relative outer walls of the second thin film layer 32 along the first direction T1, that is, the thickness of the second thin film layer 32 as commonly understood.

[0084] It should be noted that if the dimension of the second thin film layer 32 along the first direction T1 is greater than 300 nm, the excessive thickness will lead to stress accumulation within the film, increasing the risk of cracking or peeling during high-temperature processing. Furthermore, an excessively thick intermediate layer will lengthen the path of static charge migration from the top to the bottom layer, reducing the transient dissipation response speed. If the dimension of the second thin film layer 32 along the first direction T1 is less than 60 nm, it will be difficult to provide sufficient space for a smooth resistivity transition. An excessively narrow transition range will cause abrupt resistivity changes, leading to localized charge concentration or abnormal acoustic wave reflection at the interface, which will degrade device performance. Therefore, controlling the thickness of the second thin film layer 32 between 60 nm and 300 nm can buffer interlayer stress, prevent cracking, and provide a sufficient resistivity gradient platform to ensure a smooth transition of the charge transport path.

[0085] In some examples, the size of the third thin film layer 33 along the first direction T1 can be greater than or equal to 30nm and less than or equal to 120nm, such as 30nm, 40nm, 50nm, 60nm, 80nm, 100nm or 120nm and other values. In this application embodiment, the size of the third thin film layer 33 along the first direction T1 is not specifically limited.

[0086] Here, the dimension of the third thin film layer 33 along the first direction T1 can be understood as: the distance between the relative outer walls of the third thin film layer 33 along the first direction T1, that is, the thickness of the third thin film layer 33 as commonly understood.

[0087] It should be noted that if the dimension of the third thin film layer 33 along the first direction T1 is greater than 120 nm, it will cause additional scattering loss of the radio frequency signal, reducing the overall Q value. If the dimension of the third thin film layer 33 along the first direction T1 is less than 30 nm, it is difficult to form a continuous and complete lateral conductive network. Static charge cannot diffuse quickly and uniformly laterally in the top layer, resulting in discontinuous electrostatic dissipation channels. Local charge accumulation may still cause discharge failure. Therefore, controlling the thickness of the third thin film layer 33 between 30 nm and 120 nm can form a complete low-resistance lateral conductive network, ensuring that static charge is quickly grounded and discharged from any position, without introducing excessive radio frequency loss due to an excessively thick defect layer.

[0088] In some examples, the size of the electrostatic dissipation layer 30 along the first direction T1 can be greater than or equal to 150 nm and less than or equal to 500 nm, such as 150 nm, 200 nm, 250 nm, 300 nm, 350 nm, 400 nm, 450 nm or 500 nm and other values. In this application embodiment, the size of the electrostatic dissipation layer 30 along the first direction T1 is not specifically limited.

[0089] Here, the dimension of the electrostatic dissipation layer 30 along the first direction T1 can be understood as the distance between the relative outer walls of the electrostatic dissipation layer 30 along the first direction T1, that is, the thickness of the electrostatic dissipation layer 30 as commonly understood. In other words, it is the sum of the dimensions of the first thin film layer 31, the second thin film layer 32, and the third thin film layer 33 along the first direction T1.

[0090] It should be noted that the total thickness of the electrostatic dissipation layer 30 is controlled between 150nm and 500nm. The thickness is sufficient to accommodate gradient nitrogen doping and ensure the thickness of the low-resistivity region on the surface, thus achieving a comprehensive balance between electrostatic dissipation efficiency, RF performance and reliability.

[0091] In some examples, the size of the first silicon oxide layer 20 along the first direction T1 can be greater than or equal to 10 nm and less than or equal to 100 nm, such as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 100 nm and other values. In this application embodiment, the size of the first silicon oxide layer 20 along the first direction T1 is not specifically limited.

[0092] Here, the dimension of the first silicon oxide layer 20 along the first direction T1 can be understood as the distance between the relative outer walls of the first silicon oxide layer 20 along the first direction T1, that is, the thickness of the first silicon oxide layer 20 as commonly understood.

[0093] It should be noted that if the dimension of the first silicon oxide layer 20 along the first direction T1 is greater than 100 nm, it will increase the internal stress of the thin film and reduce the reliability of the bonding interface. If the dimension of the first silicon oxide layer 20 along the first direction T1 is less than 10 nm, it will be impossible to effectively confine the radio frequency signal energy near the interface between the functional layer 40 and the first silicon oxide layer 20, resulting in the leakage of acoustic wave energy towards the substrate and a decrease in the Q value. Therefore, controlling the thickness of the first silicon oxide layer 20 between 10 nm and 100 nm can ensure low-loss transmission of radio frequency signals and maintain a high Q value, while avoiding stress and size problems caused by excessive thickness and ensuring process reliability.

[0094] Figure 3 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 3 . Reference Figure 3 As shown, in some embodiments of this application, the composite thin film 100 may further include a trap layer 50. The trap layer 50 is disposed between the substrate layer 10 and the first silicon oxide layer 20 along the first direction T1, and the trap layer 50 is a polycrystalline silicon layer or an amorphous silicon layer.

[0095] In other words, the trap layer 50 can be made of polycrystalline silicon or amorphous silicon.

[0096] Thus, the trap layer 50 can form a defect trapping layer between the substrate layer 10 and the first silicon oxide layer 20, which is used to absorb and fix the free carriers on the surface of the substrate layer 10 facing the first silicon oxide layer 20, or at the interface between the substrate layer 10 and the trap layer 50, suppressing the influence of interface charge on the performance of the functional layer 40, and in particular reducing interface leakage current and parasitic capacitance, thereby improving the performance stability of the composite film 100 under high frequency conditions.

[0097] In some examples, the trap layer 50 can be formed on the silicon substrate by deposition, such as by using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD) to prepare a polycrystalline or amorphous silicon layer.

[0098] In some examples, the trap layer 50, facing away from the top of the substrate layer 10 along the first direction T1, can be oxidized to form at least a partial first silicon oxide layer 20.

[0099] In some implementations, the thickness of the trap layer 50 can be adjusted according to actual needs, for example, configured to be 50 nm to 500 nm, i.e., other values ​​such as 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 500 nm, to provide sufficient carrier trap density.

[0100] Figure 4 This is a schematic diagram of the structure of a composite thin film provided in an embodiment of this application. Figure 4 . Reference Figure 4As shown, in some embodiments of this application, the composite film 100 may further include a low-sound-loss layer 60. This low-sound-loss layer 60 is formed along a first direction T1 between the electrostatic dissipation layer 30 and the functional layer 40. The low-sound-loss layer 60 is a silicon oxide layer. Therefore, by providing a low-sound-loss layer 60 between the electrostatic dissipation layer 30 and the functional layer 40, the scattering of sound waves at the interface can be effectively reduced, sound wave leakage can be prevented, thereby reducing sound loss and further improving the Q value of the composite film 100.

[0101] Furthermore, the low-sound-loss layer 60 can work synergistically with the electrostatic dissipation layer 30, with the former addressing sound loss and the latter addressing electrostatic dissipation and... The improvement problem allows the various performance indicators of the composite film 100 to be optimized independently without mutual constraint.

[0102] In some examples, the material of the low acoustic loss layer 60 can be silicon dioxide (SiO2). In this application embodiment, no specific restrictions are placed on the material of the low sound loss layer 60.

[0103] In some examples, the low acoustic loss layer 60 can be fabricated by methods such as physical vapor deposition (PVD) or atomic layer deposition (ALD) to obtain a thin film with high density. The embodiments of this application do not limit the formation method of the low acoustic loss layer 60.

[0104] In some examples, the density of the low-sound-loss layer 60 is greater than or equal to 2.2. For example, 2.2 2.3 2.4 2.5 In this embodiment, the density of the low acoustic loss layer 60 is not specifically limited, as long as it meets the density requirements for acoustic wave reflection and interface protection. The density of the low acoustic loss layer 60 can be determined by methods such as X-ray reflectivity or ellipsometer.

[0105] Here, the density of the low-sound-loss layer 60 can be understood as: the mass per unit volume of the low-sound-loss layer 60, that is, the degree of atomic arrangement of the low-sound-loss layer 60 material at the microscale, which is used to measure whether there are micropores or structural defects inside the film.

[0106] It should be noted that if the density of the low-sound-loss layer 60 is less than 2.2... If the metal atoms in the functional layer 40 diffuse downwards into the electrostatic dissipation layer 30 during high-temperature annealing, it cannot effectively prevent these atoms from doing so, causing irreversible shifts in resistivity and resulting in a loss of precisely controllable electrostatic dissipation capability. Furthermore, the porous interface has weak reflectivity for sound waves, allowing some sound wave energy to penetrate into the underlying structure, causing sound loss. Therefore, the density of the low-sound-loss layer 60 is controlled at 2.2. The above can improve the performance stability of the electrostatic dissipation layer 30 and also improve the acoustic performance.

[0107] In some examples, the size of the low sound loss layer 60 along the first direction T1 can be greater than or equal to 2nm and less than or equal to 50nm, such as 2nm, 5nm, 10nm, 15nm, or other values ​​such as 50nm. In this application embodiment, no specific limitation is made on the size of the low sound loss layer 60 along the first direction T1.

[0108] Here, the dimension of the low sound loss layer 60 along the first direction T1 can be understood as the distance between the relative outer walls of the low sound loss layer 60 along the first direction T1, that is, the thickness of the low sound loss layer 60 as commonly understood.

[0109] It should be noted that controlling the thickness of the low-sound-loss layer 60 between 2nm and 50nm achieves both interface densification and acoustic wave reflection with an extremely thin thickness, without significantly affecting the overall dielectric properties. .

[0110] In some embodiments of this application, the thickness design of the first silicon oxide layer, the electrostatic dissipation layer 30, and the low acoustic loss layer 60 takes into account various performance characteristics (RF loss, ESD, etc.). The decoupling and balancing of factors such as sound loss, stress, and cost allows each layer to play a dominant role within its optimal thickness window, while avoiding the negative effects of any one layer from dominating the overall performance.

[0111] In some embodiments of this application, the interface state density of the first silicon oxide layer 20 may be less than 1× .

[0112] Here, the interface state density is an important indicator characterizing the smoothness and integrity of the contact interface between the first silicon oxide layer 20 and the substrate layer 10 (or the trap layer 50). The lower the interface state density value, the fewer dangling bonds and defects at the interface, the smoother the interface, the less recombination and scattering of charge carriers at the interface, the higher the Q value, and the lower the power consumption.

[0113] In some examples, the first silicon oxide layer 20 can be fabricated by thermal oxidation to obtain an extremely low interface state density, which is one of the significant advantages of thermal oxidation over deposition.

[0114] In some embodiments, the dielectric loss tangent tanδ of the first silicon oxide layer 20 can be less than 1 / 2 tanδ. (@1GHz). Here, "@" can be understood as: obtained under the test frequency condition of 1GHz.

[0115] Here, the dielectric loss tangent is an important parameter characterizing the energy loss of a material in an alternating electric field. The smaller the value, the less energy loss of the radio frequency signal due to dielectric polarization relaxation during transmission.

[0116] In some examples, the first silicon oxide layer 20 can be fabricated by thermal oxidation, which can reduce the dielectric loss tangent to below 5×10^(-4), resulting in extremely low transmission loss of the composite film 100 in the radio frequency band.

[0117] Therefore, the first silicon oxide layer 20, with its extremely low interface state density and dielectric loss tangent, dominates the Q value, resulting in extremely low radio frequency loss and ensuring that the composite film 100 has a higher Q value.

[0118] It is important to note that the first silicon oxide layer, the electrostatic dissipation layer 30, and the low acoustic loss layer 60, located between the substrate layer and the functional layer, work together to enable the composite film to simultaneously satisfy high Q value, low RF loss, and high performance. Requirements include ESD resistance and high reliability.

[0119] Next, examples of forming the layers of the composite film 100 are given exemplarily.

[0120] In some embodiments, the first silicon oxide layer 20 can be formed by thermally oxidizing the top of the substrate layer 10 toward the side of the first silicon oxide layer 20, and the unoxidized remaining portion of the substrate layer 10 is retained to continue to perform its functions such as mechanical support and basic substrate.

[0121] In other embodiments, the first silicon oxide layer 20 can be formed on the top side of the trap layer 50 facing the first silicon oxide layer 20 by thermal oxidation. The unoxidized remaining portion of the trap layer 50 remains between the substrate layer 10 and the first silicon oxide layer 20, continuing to function as the trap layer 50. The thermal oxidation process can simultaneously anneal the trap layer 50, eliminating the need for an additional annealing step for the trap layer 50.

[0122] It is easy to understand that the thermal oxidation method for forming the first silicon dioxide layer 20 is a process in which silicon material reacts with oxygen in a high-temperature oxygen-containing atmosphere to generate silicon dioxide. The advantages are: the generated silicon dioxide layer and the substrate layer 10 have an atomically smooth interface with a low interface state density; the intrinsic dielectric loss of the silicon dioxide layer is extremely low; and the thickness of the silicon dioxide layer can be precisely adjusted by controlling the oxidation temperature, time, and oxygen flow rate.

[0123] In some embodiments, the electrostatic dissipation layer 30 can be formed on the first silicon oxide layer 20 along the first direction T1 by plasma-enhanced chemical vapor deposition (PECVD).

[0124] It is easy to understand that the PECVD process has advantages such as low deposition temperature, good film thickness uniformity, and strong composition controllability, making it suitable for preparing electrostatic dissipation layers 30 with specific silicon-oxygen atomic ratios and nitrogen doping concentrations.

[0125] In some examples, the PECVD process uses silane ( ) and nitrous oxide ( ) as the reactant gas, with nitrogen ( ) or ammonia ( The doping source is 30. By adjusting the flow rate ratio of the reactant gas, the silicon-oxygen atom ratio in the electrostatic dissipation layer 30 can be controlled; by adjusting the flow rate of the doping source, the nitrogen doping concentration in the film can be controlled.

[0126] Accordingly, during the deposition process, and The reaction generates a Si-O bond network structure, while or The introduction of nitrogen-doping allows some Si-O bonds to be replaced by Si-N bonds. Since the PECVD process can be performed at relatively low temperatures (typically 200°C to 400°C), it does not cause thermal damage to the formed first silicon oxide layer 20 and substrate layer 10, and has excellent process compatibility.

[0127] In some embodiments of this application, when it is necessary to form an electrostatic dissipation layer 30 with a gradient silicon-oxygen atomic ratio and nitrogen concentration distribution, the electrostatic dissipation layer 30 can be adjusted in real time during the PECVD deposition process. , as well as or Traffic.

[0128] In some examples, a higher [percentage] was used in the early stages of the deposition to form the electrostatic dissipation layer 30. / Flow ratio and lower or The flow rate is chosen to form a low silicon-oxygen atom ratio (e.g., 0.6) and a low nitrogen concentration (e.g., ≤1). The first thin film layer 31; then gradually decreasing in size. / Flow ratio and increase or The flow rate is adjusted to form a second thin film layer 32 and a third thin film layer 33 with increasing silicon-oxygen atomic ratio and nitrogen concentration.

[0129] In some implementations, after PECVD deposition, a rapid annealing post-treatment can be performed to stabilize the nitrogen doping distribution and adjust the film stress. The rapid annealing post-treatment can be carried out in a nitrogen atmosphere at a temperature of 400°C to 450°C for 30 to 60 seconds. Rapid annealing enables the doped nitrogen atoms to undergo short-range diffusion and rearrangement within the silicon oxide network, forming a more stable Si-N bond state, while simultaneously eliminating some deposition defects and stabilizing the resistivity within the target window range.

[0130] In some embodiments of this application, the low acoustic loss layer 60 can be formed on the electrostatic dissipation layer 30 by physical vapor deposition (PVD) or atomic layer deposition (ALD).

[0131] For example, PVD methods such as sputtering deposition can prepare silicon oxide films with high density and uniform thickness at lower temperatures.

[0132] For example, the ALD method is based on a self-limiting surface reaction, depositing only a single-atom-thick layer of material per cycle, thus enabling atomic-level thickness precision control and extremely high film density.

[0133] Therefore, the silicon oxide low acoustic loss layer 60 prepared by PVD or ALD can achieve a density of 2.2. In summary, the high-density, low-sound-loss layer 60 has higher acoustic impedance, which can more effectively confine sound wave energy within the functional layer 40, reduce sound leakage towards the substrate, thereby reducing sound loss and improving the Q value.

[0134] In this embodiment, the functional layer 40 can be formed by ion implantation-bonding-annealing stripping technology.

[0135] The material of the functional wafer 401 can be any one of lithium niobate, lithium tantalate, silicon carbide, silicon, gallium nitride, or gallium arsenide, preferably a lithium niobate or lithium tantalate single crystal wafer.

[0136] The functional wafer has a first side and a second side. Ion implantation is performed on the functional wafer 401 from the first side. The implanted ions can be one or more of hydrogen ions, helium ions, nitrogen ions, oxygen ions, or argon ions. The ion implantation dose can be [missing information]. The ion implantation energy is 30 ~5 .

[0137] After ion implantation, a functional layer 40, a separation layer 42, and a residual layer 43 are sequentially formed inside the functional wafer 401, starting from the first surface. The separation layer 42 is rich in implanted ions and becomes the vulnerable surface for subsequent peeling. Then, the implanted surface (i.e., the first surface) of the functional wafer 401 is bonded to the substrate layer 10, which has already formed the first silicon oxide layer 20, the electrostatic dissipation layer 30 (and optionally the low acoustic loss layer 60). Before bonding, the bonding surface can be surface-activated, such as by plasma activation, to enhance the bonding strength. After bonding, a bonded body is obtained. The bonded body is then annealed; the annealing temperature can be from 100°C to 600°C, and the annealing time can be from 1 hour to 24 hours. During annealing, the implanted ions in the separation layer 42 form gas and generate bubbles. When the bubbles merge together, the separation layer 42 splits, and the residual layer 43 separates and falls off from the separation layer 42. The functional layer 40 remains on the electrostatic dissipation layer 30 (or low acoustic loss layer 60), thereby completing the transfer of the functional layer 40 and the preparation of the composite film 100. After annealing, the exposed surface of the functional layer 40 can be polished (e.g., chemical mechanical polishing) to remove the residual material from the separation layer 42 and obtain a smooth surface of the functional layer 40.

[0138] In some embodiments, the Q value of the composite film 100 can be stably maintained in the range of 1900 to 4000. It can be 6% to 15%, for example, in the examples, the Q value reaches 2500 or 4000. Reaching 12% or 13%. The aforementioned Q value and... The scope indicates that the composite thin film 100 of this application has achieved excellent levels in terms of RF loss and electromechanical conversion efficiency, and can meet the requirements of high-performance RF front-end devices.

[0139] Figure 5 This is a flowchart illustrating a method for preparing a composite thin film according to an embodiment of this application. Figure 1 ; Figure 6 This is a schematic diagram of the substrate layer in a method for preparing a composite thin film according to an embodiment of this application. (Combined with...) Figure 5 and Figure 6 As shown, based on the same concept, this application embodiment also provides a method for preparing a composite film 100, which includes at least steps S10 to S40.

[0140] Step S10: Provide substrate layer 10 (see...) Figure 6 ).

[0141] Here, substrate 10 is used to provide mechanical support and basic substrate functions.

[0142] In some examples, the substrate 10 is made of silicon (Si), such as a single-crystal silicon wafer.

[0143] Step S20: Prepare a first silicon oxide layer 20 on the substrate layer 10.

[0144] In some examples, the interface state density of the first silicon oxide layer 20 can be less than [amount missing]. .

[0145] In some examples, the dielectric loss tangent tanδ of the first silicon oxide layer 20 can be less than 1 / 2 tanδ. (@1 GHz).

[0146] Step S30: An electrostatic dissipation layer 30 is prepared on the side of the first silicon oxide layer 20 away from the substrate layer 10 along the first direction T1. The electrostatic dissipation layer 30 serves as a dissipation channel for dissipating static charge.

[0147] In some examples, the electrostatic dissipation layer 30 comprises silicon and oxygen elements, and the silicon-to-oxygen atomic ratio (Si / O) of the silicon and oxygen elements is greater than or equal to 0.6 and less than or equal to 0.9, i.e., 0.6 ≤ Si / O ≤ 0.9.

[0148] Step S40: Prepare a functional layer 40 on the side of the electrostatic dissipation layer 30 that is opposite to the first silicon oxide layer 20 to obtain a composite film 100.

[0149] According to steps S10 to S40: a substrate layer 10, a first silicon oxide layer 20, an electrostatic dissipation layer 30, and a functional layer 40 are stacked along the first direction T1. The electrostatic dissipation layer 30 serves as a dissipation channel to discharge static charge. When static charge is generated during subsequent processing, this static charge can be quickly conducted away through the electrostatic dissipation layer, preventing local electric field breakdown of the functional layer or device electrodes. This improves the anti-electrostatic discharge performance of the composite film in subsequent processing steps, prevents ESD failure, and enhances reliability.

[0150] Figure 7 This is a schematic diagram illustrating the fabrication of a first silicon oxide layer on a substrate in a method for preparing a composite thin film according to an embodiment of this application. (Combined with...) Figure 7 As shown, in some embodiments of this application, the substrate layer 10 has a first surface and a second surface disposed opposite to each other along the first direction T1, and step S20 is implemented in the following manner: A first silicon oxide layer 20 is formed by thermal oxidation on the first surface of the substrate layer 10.

[0151] Here, the first surface can be understood as the surface of the substrate layer 10 used to form the first silicon oxide layer 20 and the functional layer 40, i.e., the main surface facing the subsequent thin film deposition and bonding processes. The second surface can be understood as the other surface opposite the first surface, the surface used for support or mounting.

[0152] It should be noted that the definitions of the first surface and the second surface are only used to describe the orientation relationship between the two sides of the substrate layer 10 and do not change due to the orientation of the wafer or composite film 100 in space. Even if the wafer is flipped during the bonding or transfer process, the first surface refers to the side surface that was originally used to form the first silicon oxide layer 20, and the second surface refers to the other side surface that is opposite to it along the first direction T1.

[0153] Thermal oxidation can be understood as: placing the substrate 10 in a high-temperature oxidizing atmosphere, causing the silicon atoms on the first surface of the substrate 10 to chemically react with oxygen atoms, oxidizing to produce silicon dioxide (SiO2). The process method for the first silicon oxide layer 20, formed by thermal oxidation, has an atomically ordered lattice arrangement, extremely high density, and extremely low interface defect density, which is the basis for subsequent low-loss radio frequency transmission and acoustic wave reflection.

[0154] In some embodiments of this application, the thermal oxidation to form the first silicon oxide layer 20 can be achieved in the following ways: First, the silicon substrate is placed into a high-temperature oxidation furnace. The oxidation furnace is usually a horizontal tube furnace or a vertical furnace, and the furnace body has a precise temperature control system and a gas flow control system.

[0155] Next, the oxidation furnace is heated to the thermal oxidation temperature. The heating process is typically carried out in an inert gas atmosphere (such as nitrogen or argon) to prevent unintended oxidation of the silicon surface during the heating process. The thermal oxidation temperature range can be from 900°C to 1200°C, for example, 900°C, 950°C, 1000°C, 1050°C, 1100°C, 1150°C, or 1200°C. Too low a temperature will result in a slow oxidation rate and a deterioration in the quality of the oxide layer; too high a temperature may introduce excessive thermal stress.

[0156] Next, after the furnace temperature stabilizes to the target temperature, an oxidizing gas is introduced into the furnace tube to oxidize the first surface of the silicon substrate.

[0157] After oxidation is complete, turn off the oxidizing gas and switch to an inert gas atmosphere (such as nitrogen). Gradually lower the furnace temperature to room temperature and remove the silicon substrate. During the cooling process, maintain inert gas protection to prevent the silicon substrate from undergoing unintended oxidation with oxygen in the air at high temperatures during the removal process.

[0158] In some examples, after thermal oxidation is completed, the formed first silicon oxide layer 20 can be annealed to further reduce the interface state density and eliminate defects introduced during the oxidation process.

[0159] In some examples, after thermal oxidation, the surface of the first silicon oxide layer 20 can be planarized to obtain an atomically smooth surface, providing a better interface for the subsequent deposition of the electrostatic dissipation layer 30. After the planarization treatment, the surface roughness (Ra) of the first silicon oxide layer 20 can be controlled below 0.5 nm.

[0160] Through the above scheme, a first silicon oxide layer 20 is formed by thermal oxidation on the first surface of the substrate layer 10. By utilizing the inherent high-quality interface growth characteristics of the thermal oxidation process, a first silicon oxide layer 20 with the required interface state density and dielectric loss tangent is formed, which provides a fundamental guarantee for the composite film 100 to achieve low radio frequency loss and high Q value.

[0161] Figure 8 This is a schematic diagram of the preparation of a trap layer on a substrate in a method for preparing a composite thin film provided in this application embodiment; Figure 9 This is a schematic diagram illustrating the preparation of a first silicon oxide layer on a trap layer according to a method for preparing a composite thin film provided in this application embodiment. (Combined with...) Figure 8 and Figure 9 As shown, in some embodiments of this application, the substrate layer 10 has a first surface and a second surface disposed opposite to each other along the first direction T1, and step S20 can be implemented in the following manner: A trap layer 50 is deposited on the first surface of the substrate layer 10; a first silicon oxide layer 20 is formed by thermal oxidation on the side of the trap layer 50 away from the substrate layer 10.

[0162] Here, trap layer 50 is used to capture charge carriers and avoid the PSC effect.

[0163] In some examples, the trap layer 50 can be deposited on the first surface of the substrate layer 10 by methods such as chemical vapor deposition (CVD) or physical vapor deposition (PVD).

[0164] In some examples, the material of the trap layer 50 can be polycrystalline silicon or amorphous silicon.

[0165] In some examples, the top of the trap layer 50, facing away from the substrate layer 10, is thermally oxidized along the first direction T1, transforming the top material of the trap layer 50 into silicon oxide. This forms a first silicon oxide layer 20 on top of the trap layer 50, while the remaining portion remains between the substrate layer 10 and the first silicon oxide layer 20, functioning as the trap layer 50 to trap free carriers. In this way, the thermal oxidation process not only prepares a high-quality first silicon oxide layer 20 but also achieves functional integration of the trap layer 50, thus enabling annealing of the trap layer 50.

[0166] Figure 10A This is a schematic diagram of the preparation of an electrostatic dissipation layer on a first silicon oxide layer in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 10BThis is a schematic diagram of the preparation of an electrostatic dissipation layer on a first silicon oxide layer in a method for preparing a composite thin film provided in this application embodiment. Figure 2 The diagrams show layer structures with and without trap layer 50.

[0167] Combination Figure 10A and Figure 10B As shown, in some embodiments of this application, the "preparation of an electrostatic dissipation layer 30 on the side of the first silicon oxide layer 20 away from the substrate layer 10" can be achieved by the following steps: an electrostatic dissipation layer 30 is formed on the side of the first silicon oxide layer 20 away from the substrate layer 10 by plasma-enhanced chemical vapor deposition.

[0168] In some other embodiments of this application, the "preparation of an electrostatic dissipation layer 30 on the side of the first silicon oxide layer 20 away from the substrate layer 10" can also be achieved by the following steps: after plasma-enhanced chemical vapor deposition is completed, a rapid annealing post-treatment is performed to form an electrostatic dissipation layer 30 on the side of the first silicon oxide layer 20 away from the substrate layer 10.

[0169] Plasma-enhanced chemical vapor deposition (PECVD) has the advantages of lower deposition temperature and easier control of film stress compared to chemical vapor deposition (CVD).

[0170] In some examples, with and As a reactant gas, with or PECVD deposition was performed as the doping source. This was achieved by adjusting... , as well as or The flow rate can precisely control the silicon-oxygen atomic ratio and nitrogen doping concentration of the electrostatic dissipation layer 30.

[0171] In some implementations, after PECVD deposition, a rapid thermal annealing (RTP) post-treatment is performed to stabilize the film structure and electrical properties of the electrostatic dissipation layer 30. Rapid annealing allows for a more stable nitrogen doping distribution in the electrostatic dissipation layer 30, more uniform resistivity within the target window, and the elimination of some defects generated during deposition, thereby improving film quality.

[0172] Figure 11 This is a flowchart illustrating a method for preparing a composite thin film according to an embodiment of this application. Figure 2 ; Figure 12A This is a schematic diagram of the structure of a functional wafer in a method for preparing a composite thin film provided in an embodiment of this application; Figure 12B This is a schematic diagram of ion implantation of a functional wafer in a method for preparing a composite thin film according to an embodiment of this application; Figure 12CThis is a schematic diagram of the structure of the injection sheet in a method for preparing a composite thin film provided in this application embodiment. Figure 13A This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 13B This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 2 ; Figure 13A and Figure 13B Schematic diagrams of the bond structure with and without trap layers are shown respectively. Figure 14A This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 1 ; Figure 14B This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 2 ; Figure 14A and Figure 14B Schematic diagrams of bond peeling with and without trap layer 50 are shown respectively.

[0173] Combination Figures 11 to 14B As shown, step S40 can be achieved through steps S41 to S44.

[0174] Step S41: Provide functional wafer 401 (see...) Figure 12A ).

[0175] Step S42: Ion implantation is performed on the functional wafer 401 to obtain an implanted wafer. The implanted wafer includes a functional layer 40, a separation layer 42, and a residual layer 43 distributed along the first direction T1 (see...). Figure 12B ).

[0176] Here, the functional wafer 401 includes a first surface 4011 and a second surface 4012 disposed opposite to each other along the first direction T1. Ions are injected into the functional wafer 401 from the first surface 4011 to form a functional layer 40 on the side where the first surface 4011 is located; and a separation layer 42 and a residual layer 43 are sequentially formed along the direction from the first surface 4011 to the second surface 4012.

[0177] Step S43: Bond the functional layer 40 of the implanted wafer to the electrostatic dissipation layer 30 to obtain a bonded body (see...). Figure 13A or Figure 13B ).

[0178] Here, the first side of the implanted sheet is bonded to the electrostatic dissipation layer 30 to obtain a bonded body.

[0179] Step S44: Anneal the bonded body to remove the separation layer 42 and residual layer 43 (see...) Figure 14A or Figure 14B), to obtain composite film 100 (see Figure 2 or Figure 3 ).

[0180] Through steps S41 to S44: using ion implantation and stripping technology, a high-quality functional layer 40 can be transferred onto the electrostatic dissipation layer 30 to obtain a composite film 100.

[0181] In some examples, the separation layer 42 and the residual layer 43 can be removed by annealing. During annealing, the implanted ions in the separation layer 42 form gas and generate bubbles. After the bubbles grow and merge together, they split at the separation layer 42, and the residual layer 43 automatically separates and falls off, while the functional layer 40 remains on the electrostatic dissipation layer 30. This method does not require additional mechanical stripping or chemical etching steps, the process is simple, and it does not damage the functional layer 40.

[0182] In some examples, after annealing, the exposed surface of the functional layer 40, i.e. the side of the functional layer 40 facing away from the substrate layer 10 along the first direction T1, can be chemically mechanically polished to remove any trace amounts of residue from the separation layer 42 that may remain, thereby obtaining an atomically smooth surface of the functional layer 40.

[0183] Figure 15A This is a schematic diagram of the preparation of a low acoustic loss layer on an electrostatic dissipation layer in a method for preparing a composite thin film provided in this application embodiment; Figure 15B This is a schematic diagram of the bond structure in a method for preparing a composite thin film provided in this application embodiment. Figure 3 ; Figure 15B A schematic diagram of a bond containing a low acoustic loss layer is shown. Figure 15C This is a schematic diagram of the bond peeling structure in a method for preparing a composite thin film provided in this application embodiment. Figure 3 ; Figure 15C A schematic diagram of the bond peeling structure including a low acoustic loss layer is shown. Figures 15A to 15C As shown, in some embodiments of this application, the preparation method may further include the following steps: A low-sound-loss layer 60 is formed on the side of the electrostatic dissipation layer 30 opposite to the first silicon oxide layer 20 (see [link]). Figure 15A ).

[0184] In some examples, a low acoustic loss layer 60 can be formed on the side of the electrostatic dissipation layer 30 away from the first silicon oxide layer 20 by means of physical vapor deposition (PVD) or atomic layer deposition (ALD).

[0185] In some embodiments of this application, "forming a low acoustic loss layer 60 on the side of the electrostatic dissipation layer 30 opposite to the first silicon oxide layer 20" can be achieved in the following way: A low acoustic loss layer 60 is formed on the side of the electrostatic dissipation layer 30 opposite to the first silicon oxide layer 20 by physical vapor deposition (PVD).

[0186] In some embodiments of this application, "forming a low-sound-loss layer 60 on the side of the electrostatic dissipation layer 30 facing away from the first silicon oxide layer 20" can also be achieved in the following ways: A low acoustic loss layer 60 is formed on the side of the electrostatic dissipation layer 30 opposite to the first silicon oxide layer 20 by atomic layer deposition (ALD).

[0187] It should be noted that the embodiments of this application do not limit the formation method of the low sound loss layer 60.

[0188] In some examples, the low-sound-loss layer 60 is a high-density silicon oxide layer used to smooth the acoustic interface and reduce sound loss.

[0189] Accordingly, step S40 may include step S45: Step S45: Fabricate a functional layer 40 on the side of the low acoustic loss layer 60 facing away from the electrostatic dissipation layer 30 (see...) Figure 4 ).

[0190] In some examples, during bonding, the low-loss layer 60 is bonded to the first surface 4011 of the functional layer 40 (see [link]). Figure 15B After annealing and stripping, functional layer 40 remains on low-sound-loss layer 60 (see...). Figure 15C In this way, the low-sound-loss layer 60 serves as an interface modification layer between the functional layer 40 and the electrostatic dissipation layer 30, which can simultaneously optimize acoustic matching and bonding quality.

[0191] In some examples, the low-sound-loss layer 60 is extremely thin and has a high surface flatness, resulting in excellent bonding interface quality between it and the functional layer 40, which helps to further improve the overall performance of the composite film 100.

[0192] In some embodiments of this application, the material of the trap layer 50 is amorphous silicon or polycrystalline silicon.

[0193] In some embodiments of this application, the trap layer 50 can be prepared by low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD). The thickness of the trap layer 50 can be from 50 nm to 500 nm. By forming the trap layer 50 on the substrate, the accumulation of free carriers at the interface between the substrate layer 10 and the first silicon oxide layer 20 can be suppressed, the interface leakage current can be reduced, and the performance stability of the composite film 100 under high-frequency conditions can be improved.

[0194] In some embodiments of this application, the substrate 10 can be made of silicon. Silicon substrates have advantages such as low cost, mature process, and good compatibility with semiconductor processes.

[0195] In some examples, the resistivity of the silicon substrate can be high-resistivity silicon, such as resistivity greater than 1000 Ω·cm, to reduce RF loss.

[0196] In this embodiment, the extremely low interface state density and dielectric loss tangent of the first silicon oxide layer 20 result in extremely low power loss in the radio frequency band, ensuring the high Q-value characteristics of the composite thin film 100. The electrostatic dissipation layer 30, through its silicon-rich and gradient nitrogen-doped structure, provides electrostatic dissipation channels by utilizing the defect energy levels formed by the silicon-rich layer, and simultaneously improves the dielectric constant and... The synergistic effect of the first silicon oxide layer 20 and the electrostatic dissipation layer 30 enables the composite film 100 to simultaneously achieve high Q value, low RF loss, and high efficiency. And ESD resistance.

[0197] Furthermore, the addition of the low-sound-loss layer 60 further reduces sound loss and improves the Q value.

[0198] Furthermore, the trap layer 50 enhances the reliability and stability of the device. The positional relationship, material composition, thickness range, and fabrication process of each functional layer 40 work together to form a complete and high-performance composite thin film 100 solution that meets the stringent requirements of RF front-end devices for key basic materials in the 5G / 6G communication era.

[0199] In some examples, through the above structural design and process control, the Q value of the composite film 100 of this application can be stably maintained in the range of 1900 to 4000, for example, reaching 2500 or 4000 in the embodiments. The efficiency can reach 6% to 15%, for example, 12% or 13% in the embodiments, while possessing low RF loss, ESD resistance, and high reliability. This composite film 100 can be directly applied to the manufacture of RF front-end devices such as filters, duplexers, and modulators, providing them with a high-performance core material basis. In some embodiments, the size of the composite film 100 can be customized according to the specific needs of downstream devices; for example, the wafer size can be 3 inches, 4 inches, 6 inches, 8 inches, or larger to meet different scale production requirements.

[0200] In some embodiments, the composite film 100 of this application may also include other functional insert layers, such as additional adhesion layers, diffusion barrier layers or stress buffer layers provided between the substrate layer 10 and the trap layer 50, between the trap layer 50 and the first silicon oxide layer 20, between the electrostatic dissipation layer 30 and the low sound loss layer 60, or between the low sound loss layer 60 and the functional layer 40. These insert layers do not change the relative positional relationship and main function of the core functional layer 40 (the first silicon oxide layer 20, the electrostatic dissipation layer 30, and the optional low sound loss layer 60), and are all reasonable variations of this application.

[0201] In some examples of this application, when the electrostatic dissipation layer 30 has a three-layer structure, the interface between the first thin film layer 31, the second thin film layer 32, and the third thin film layer 33 can be set as a sharp interface, that is, the composition between each layer changes abruptly at the interface, and a stepwise deposition method is used for preparation. In other examples, the interfaces between the layers can also be set as gradient interfaces, that is, the composition changes continuously at the interface, and a method of preparation is used to continuously adjust the reactive gas flow rate in real time. The advantage of gradient interfaces is that they can avoid stress concentration and charge accumulation caused by abrupt changes in composition, which is beneficial to improving the mechanical stability and electrical uniformity of the film. Regardless of whether abrupt or gradient interfaces are used, as long as the trend of increasing silicon-oxygen atomic ratio and nitrogen content along the thickness direction from bottom to top is achieved, it is within the protection scope of this application.

[0202] In some embodiments, the first silicon oxide layer 20 can be prepared not only by thermal oxidation, but also by high-density plasma chemical vapor deposition (HDP-CVD) or other high-quality silicon oxide deposition methods, provided that the interface state density and dielectric loss tangent are met. However, thermal oxidation remains the preferred embodiment of this application due to its irreplaceable advantages in interface quality and dielectric loss.

[0203] In some examples, the resistivity of the electrostatic dissipation layer 30 can be precisely controlled by adjusting the silicon-to-oxygen ratio and the nitrogen doping concentration.

[0204] In some embodiments of this application, the thickness of the functional layer 40 can be selected according to actual application requirements, for example, it can be from 100 nm to 2000 nm, preferably from 300 nm to 1000 nm. The thickness of the functional layer 40 is determined by its original ion implantation energy and stripping depth, and also affects the acoustic wave transmission characteristics and frequency response of the final device.

[0205] In some examples, the total thickness of the composite film 100 can be the sum of the thickness of the substrate layer 10 and the thicknesses of each functional film layer. The substrate layer 10 is typically several hundred micrometers thick and plays a major role in mechanical support, while the total thickness of the intermediate layers (first silicon oxide layer 20, electrostatic dissipation layer 30, low acoustic loss layer 60, etc.) is typically on the order of several hundred nanometers, a few micrometers, or tens of micrometers. The thickness of the functional layer 40 is on the order of nanometers to submicrometers to micrometers. The reasonable combination of the thicknesses of each film layer enables the composite film 100 to achieve excellent levels in terms of mechanical support, acoustic transmission, electrical performance, and thermal stability.

[0206] As can be seen from the above detailed description, the composite thin film 100 and its preparation method provided in this application achieve synergistic optimization of multiple key performance indicators of the composite thin film 100 through the refined design of the intermediate layer structure between the substrate layer 10 and the functional layer 40, particularly by the synergistic cooperation of the first silicon oxide layer 20 and the electrostatic dissipation layer 30 with a specific composition gradient, and by further introducing optional layers such as the low acoustic loss layer 60 and the trap layer 50. It exhibits excellent ESD resistance and reliability, providing an ideal key material for high-performance RF front-end devices. The fabrication method presented in this application is feasible, compatible, and easy to scale up, showing promising prospects for industrial applications.

[0207] It should be noted that this preparation method is conceived in relation to the aforementioned composite film 100, and has the same technical effects as the aforementioned composite film 100. Technical features and implementation methods not described in this embodiment can be referred to the technical solution of the aforementioned composite film 100, and will not be repeated here.

[0208] The following are exemplary embodiments of a composite film 100 and its preparation method provided in this application.

[0209] First embodiment: This embodiment provides a composite thin film 100, comprising a substrate layer 10, an intermediate layer (which can be understood as the aforementioned first silicon oxide layer 20 and electrostatic dissipation layer 30) and a functional layer 40 stacked from bottom to top. The functional layer 40 is made of lithium tantalate. The intermediate layer includes a first silicon oxide layer (which can be understood as the aforementioned first silicon oxide layer 20) and a second silicon oxide layer (which can be understood as the aforementioned electrostatic dissipation layer 30). The first silicon oxide layer is located between the substrate layer 10 and the second silicon oxide layer, and the second silicon oxide layer is located between the first silicon oxide layer and the functional layer 40.

[0210] In this embodiment, the interface state density of the first silicon oxide layer is less than The dielectric loss tangent tanδ is less than (@1 GHz). The silicon-to-oxygen atomic ratio of the second silicon-oxygen layer ranges from Si / O = 0.6 to 0.9 (inclusive), and the resistivity ranges from... (Including both ends). The second silicon oxide layer is also doped with nitrogen, and along the thickness direction (which can be understood as the first direction T1 mentioned above), the silicon-oxygen atom ratio and nitrogen content in the second silicon oxide layer gradually increase from the bottom near the first silicon oxide layer to the top away from the first silicon oxide layer.

[0211] Specifically, the second silicon oxide layer includes a second silicon oxide bottom layer (which can be understood as the first thin film layer 31 mentioned above), a second silicon oxide intermediate layer (which can be understood as the second thin film layer 32 mentioned above), and a second silicon oxide top layer (which can be understood as the third thin film layer 33 mentioned above). The second silicon oxide bottom layer is located between the first silicon oxide layer and the second silicon oxide intermediate layer, and the second silicon oxide intermediate layer is located between the second silicon oxide bottom layer and the second silicon oxide top layer. The silicon-to-oxygen atomic ratio of the second silicon oxide bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen does not exceed 1%. The silicon-oxygen atomic ratio of the second silicon-oxygen interlayer is Si / O = 0.7~0.8, and the atomic percentage of nitrogen is 2%. ~4 The silicon-oxygen atomic ratio of the second silicon-oxygen top layer is Si / O = 0.8~0.9, and the atomic percentage of nitrogen is 4%. ~6 .

[0212] In this embodiment, the thickness of the first silicon oxide layer is 10 nm, and the thickness of the second silicon oxide layer is 150 nm. Specifically, the thickness of the second silicon oxide bottom layer is 20 nm, the thickness of the second silicon oxide intermediate layer is 100 nm, and the thickness of the second silicon oxide top layer is 30 nm.

[0213] The method for preparing the composite film 100 in the first embodiment includes the following steps: First, prepare a silicon substrate (which can be understood as substrate layer 10 mentioned earlier). Perform thermal oxidation on the silicon substrate to form a first silicon oxide layer on the top surface of the silicon substrate. The unoxidized portion of the silicon substrate serves as substrate layer 10.

[0214] Secondly, a second silicon oxide layer is formed on the first silicon oxide layer using plasma-enhanced chemical vapor deposition (PECVD). The PECVD process uses... and As the reactant gas, with or As a doped gas, by adjusting , as well as or The flow rate forms a second silicon oxide layer, consisting of a second silicon oxide bottom layer, a second silicon oxide intermediate layer, and a second silicon oxide top layer, arranged from bottom to top. The second silicon oxide layer is doped with nitrogen, and along the thickness direction, the silicon-to-oxygen atomic ratio and the nitrogen content gradually increase from the bottom near the first silicon oxide layer to the top away from it. Specifically, the silicon-to-oxygen atomic ratio in the second silicon oxide bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen does not exceed 1%. In the second silicon-oxygen interlayer, the silicon-to-oxygen atomic ratio is Si / O = 0.7~0.8, and the atomic percentage of nitrogen is 2%. ~4 The silicon-oxygen atomic ratio in the second silicon-oxygen top layer is Si / O = 0.8~0.9, and the atomic percentage of nitrogen is 4%. ~6 .

[0215] In this embodiment, the silicon-to-oxygen atomic ratio in the second silicon-oxygen intermediate layer and the second silicon-oxygen top layer, as well as the nitrogen concentration in the second silicon-oxygen bottom layer, the second silicon-oxygen intermediate layer, and the second silicon-oxygen top layer, can be either a smooth transition or a step-like transition. For a smooth transition, the PECVD process needs to be adjusted in real time. , as well as or The flow rate; during the step transition, when forming the second silicon oxide bottom layer, the second silicon oxide intermediate layer, and the second silicon oxide top layer, respectively... , as well as or The flow rates are adjusted to suitable constants, ensuring that the silicon-oxygen atomic ratio and nitrogen content in the second silicon-oxygen bottom layer, the second silicon-oxygen intermediate layer, and the second silicon-oxygen top layer are all fixed values, increasing in a stepwise manner. For example, the silicon-oxygen atomic ratio in the second silicon-oxygen bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen is 1. In the second silicon-oxygen interlayer, the silicon-to-oxygen atomic ratio is Si / O = 0.7, and the atomic percentage of nitrogen is 2%. In the second silicon-oxygen top layer, the silicon-to-oxygen atomic ratio is Si / O = 0.9, and the atomic percentage of nitrogen is 4%. .

[0216] After PECVD deposition, a rapid annealing post-treatment was performed in a nitrogen environment at a temperature of 400°C for 60 seconds to stabilize the film structure and electrical properties of the second silicon oxide layer.

[0217] Next, a functional wafer 401 is prepared, which has a first side and a second side facing each other. Ion implantation is performed on the functional wafer 401 from the first side to obtain an ion-implanted wafer comprising a functional layer 40, a separation layer 42, and a residual layer 43 sequentially from the first side to the second side. In this embodiment, the implanted ions can be one or more of hydrogen ions, helium ions, nitrogen ions, oxygen ions, or argon ions, and the ion implantation dose can be [missing information]. The ion implantation energy can be 30 ~5 (Including both ends of the value).

[0218] Then, the first side of the ion implantation sheet is bonded to the second silicon oxide layer to form a bond. Before bonding, the surface activation treatment (such as plasma activation treatment) of the second silicon oxide layer away from the substrate layer 10 (bonding surface) and the first side of the ion implantation sheet (bonding surface) can be performed to enhance the bonding strength.

[0219] Finally, the bonded composite is annealed at a temperature ranging from 100°C to 600°C for 1 hour to 24 hours in an atmosphere of air or nitrogen. During annealing, the ion-implanted wafer separates at the separation layer 42, leaving the functional layer 40 on the second silicon oxide layer, while the residual layer 43 and the separation layer 42 are removed. After annealing, the exposed surface of the functional layer 40 is polished (e.g., chemical mechanical polishing) to obtain a smooth surface, resulting in the composite film 100.

[0220] The composite film 100 prepared in the first embodiment has a Q value of 2500. With a loss rate of 12%, it features low RF loss, ESD resistance, and high reliability, meeting the requirements of high-performance RF front-end devices.

[0221] Second embodiment: The second embodiment provides a composite thin film 100, comprising a silicon substrate layer 10, an amorphous silicon trap layer 50, an intermediate layer (which can be understood as the aforementioned first silicon oxide layer 20, electrostatic dissipation layer 30, and low acoustic loss layer 60) and a functional layer 40 stacked from bottom to top. The functional layer 40 is made of lithium niobate. The intermediate layer includes a first silicon oxide layer (which can be understood as the aforementioned first silicon oxide layer), a second silicon oxide layer (which can be understood as the aforementioned electrostatic dissipation layer 30), and a third silicon oxide layer (which can be understood as the aforementioned low acoustic loss layer 60). The first silicon oxide layer is located between the silicon substrate layer 10 and the second silicon oxide layer, the second silicon oxide layer is located between the first silicon oxide layer and the third silicon oxide layer, and the third silicon oxide layer is located between the second silicon oxide layer and the functional layer 40.

[0222] In the second embodiment, the interface state density of the first silicon oxide layer is less than The dielectric loss tangent tanδ is less than (@1 GHz). The silicon-to-oxygen atomic ratio of the second silicon-oxygen layer ranges from Si / O = 0.6 to 0.9, and the resistivity ranges from... The second silicon oxide layer is also doped with nitrogen, and along the thickness direction (i.e., the first direction T1), the silicon-to-oxygen atomic ratio and nitrogen content in the second silicon oxide layer gradually increase from the bottom near the first silicon oxide layer to the top away from the first silicon oxide layer. The density of the third silicon oxide layer is greater than or equal to 2.2. .

[0223] The second silicon oxide layer comprises a second silicon oxide bottom layer (which can be understood as the first thin film layer 31 mentioned above), a second silicon oxide intermediate layer (which can be understood as the second thin film layer 32 mentioned above), and a second silicon oxide top layer (which can be understood as the third thin film layer 33 mentioned above). The second silicon oxide bottom layer is located between the first silicon oxide layer and the second silicon oxide intermediate layer, and the second silicon oxide intermediate layer is located between the second silicon oxide bottom layer and the second silicon oxide top layer. The silicon-to-oxygen atomic ratio of the second silicon oxide bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen does not exceed 1%. In the second silicon-oxygen interlayer, the silicon-to-oxygen atomic ratio is Si / O = 0.7~0.8, and the atomic percentage of nitrogen is 2%. ~4 The silicon-oxygen atomic ratio in the second silicon-oxygen top layer is Si / O = 0.8~0.9, and the atomic percentage of nitrogen is 4%. ~6 .

[0224] In this embodiment, the thickness of the first silicon oxide layer is 100 nm, the thickness of the second silicon oxide layer is 500 nm, and the thickness of the third silicon oxide layer is 10 nm. Specifically, the thickness of the second silicon oxide bottom layer is 80 nm, the thickness of the second silicon oxide intermediate layer is 300 nm, and the thickness of the second silicon oxide top layer is 120 nm.

[0225] The method for preparing the composite film 100 in the second embodiment includes the following steps: First, a silicon substrate 10 is prepared. An amorphous silicon layer is formed on the silicon substrate 10 by deposition (such as low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition). Then, the top of the amorphous silicon layer is thermally oxidized to form a first silicon oxide layer, and the unoxidized portion of the amorphous silicon layer serves as an amorphous silicon trap layer 50.

[0226] Secondly, a second silicon oxide layer is formed on the first silicon oxide layer using plasma-enhanced chemical vapor deposition (PECVD). The PECVD process uses... and As the reactant gas, with or As a doped gas, by adjusting , as well as or The flow rate forms a second silicon oxide layer, consisting of a second silicon oxide bottom layer, a second silicon oxide intermediate layer, and a second silicon oxide top layer, arranged from bottom to top. The second silicon oxide layer is doped with nitrogen, and along the thickness direction, the silicon-to-oxygen atomic ratio and the nitrogen content gradually increase from the bottom near the first silicon oxide layer to the top away from it. Specifically, the silicon-to-oxygen atomic ratio in the second silicon oxide bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen does not exceed 1%. In the second silicon-oxygen interlayer, the silicon-to-oxygen atomic ratio is Si / O = 0.7~0.8, and the atomic percentage of nitrogen is 2%. ~4 The silicon-oxygen atomic ratio in the second silicon-oxygen top layer is Si / O = 0.8~0.9, and the atomic percentage of nitrogen is 4%. ~6 .

[0227] In the second embodiment, the silicon-to-oxygen atomic ratio in the second silicon-oxygen intermediate layer and the second silicon-oxygen top layer, as well as the nitrogen concentration in the second silicon-oxygen bottom layer, the second silicon-oxygen intermediate layer, and the second silicon-oxygen top layer, can be either a smooth transition or a step-like transition. For a smooth transition, the PECVD process needs to be adjusted in real time. , as well as or The flow rate; during the step transition, when forming the second silicon oxide bottom layer, the second silicon oxide intermediate layer, and the second silicon oxide top layer, respectively... , as well as or The flow rates are adjusted to suitable constants, ensuring that the silicon-oxygen atomic ratio and nitrogen content in the second silicon-oxygen bottom layer, the second silicon-oxygen intermediate layer, and the second silicon-oxygen top layer are all fixed values, increasing in a stepwise manner. For example, the silicon-oxygen atomic ratio in the second silicon-oxygen bottom layer is Si / O = 0.6, and the atomic percentage of nitrogen is 1. In the second silicon-oxygen interlayer, the silicon-to-oxygen atomic ratio is Si / O = 0.7, and the atomic percentage of nitrogen is 2%. In the second silicon-oxygen top layer, the silicon-to-oxygen atomic ratio is Si / O = 0.9, and the atomic percentage of nitrogen is 4%. .

[0228] After PECVD deposition, a rapid annealing post-treatment was performed in a nitrogen environment at a temperature of 450°C for 30 seconds to stabilize the film structure and electrical properties of the second silicon oxide layer.

[0229] Next, a third silicon oxide layer is formed on the second silicon oxide layer by means of physical vapor deposition (PVD) or atomic layer deposition (ALD).

[0230] Next, a functional wafer 401 is prepared, which has a first side and a second side facing each other. Ion implantation is performed on the functional wafer 401 from the first side to obtain an ion-implanted wafer comprising a functional layer 40, a separation layer 42, and a residual layer 43 sequentially from the first side to the second side. In this embodiment, the implanted ions can be one or more of helium ions, nitrogen ions, oxygen ions, or argon ions, and the ion implantation dose can be [missing information]. The ion implantation energy can be 30 ~5 .

[0231] The first side of the ion implanted wafer is bonded to the third silicon oxide layer on the silicon substrate to form a bond. Before bonding, the surface activation treatment (such as plasma activation treatment) of the third silicon oxide layer away from the silicon substrate layer 10 (bonding surface) and the first side of the ion implanted wafer (bonding surface) can be performed to enhance the bonding strength.

[0232] Finally, the bonded composite is annealed at a temperature ranging from 100°C to 600°C for 1 hour to 24 hours in an atmosphere of air or nitrogen. During annealing, the ion-implanted wafer separates at the separation layer 42, leaving the functional layer 40 on the third silicon oxide layer, while the residual layer 43 and the separation layer 42 are removed. After annealing, the exposed surface of the functional layer 40 is polished (e.g., chemical mechanical polishing) to obtain a smooth surface, resulting in the composite film 100.

[0233] The composite film 100 prepared in the second embodiment has a Q value of 4000. With a loss rate of 13%, it features low RF loss, ESD resistance, and high reliability, meeting the requirements of high-performance RF front-end devices.

[0234] The above embodiments are merely specific embodiments of this application and are not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made based on the technical solution of this application should be included within the scope of protection of this application.

Claims

1. A composite film, characterized in that, include: Substrate layer; A functional layer is formed on one side of the substrate layer along a first direction; A first silicon oxide layer is formed between the substrate layer and the functional layer along the first direction; An electrostatic dissipation layer is formed along the first direction between the first silicon oxide layer and the functional layer. The electrostatic dissipation layer serves as a dissipation channel for dissipating static charge.

2. The composite film according to claim 1, characterized in that, The electrostatic dissipation layer comprises a silicon element component and an oxygen element component, wherein the silicon-oxygen atomic ratio of the silicon element component and the oxygen element component is greater than or equal to 0.6 and less than or equal to 0.

9.

3. The composite film according to claim 2, characterized in that, The electrostatic dissipation layer also includes a nitrogen element component.

4. The composite film according to claim 2 or 3, characterized in that, The silicon-oxygen atom ratio of the electrostatic dissipation layer near the functional layer is greater than the silicon-oxygen atom ratio of the electrostatic dissipation layer near the first oxygen-silicon layer. And / or, the nitrogen content of the electrostatic dissipation layer on the side closer to the functional layer is greater than the nitrogen content of the electrostatic dissipation layer on the side closer to the first oxygen-silicon layer.

5. The composite film according to claim 2 or 3, characterized in that, The electrostatic dissipation layer includes: A first thin film layer is formed along a first direction between the first silicon oxide layer and the functional layer. A second thin film layer is formed along a first direction between the first thin film layer and the functional layer. A third thin film layer is formed along a first direction between the second thin film layer and the functional layer; Wherein, the silicon-to-oxygen atomic ratio of the first thin film layer is less than that of the second thin film layer, and the silicon-to-oxygen atomic ratio of the second thin film layer is less than that of the third thin film layer; and / or, The nitrogen content of the first thin film layer is less than that of the second thin film layer, and the nitrogen content of the second thin film layer is less than that of the third thin film layer.

6. The composite film according to claim 5, characterized in that, The first thin film layer has a silicon-to-oxygen atomic ratio of 0.6; the second thin film layer has a silicon-to-oxygen atomic ratio greater than or equal to 0.7 and less than or equal to 0.8; the third thin film layer has a silicon-to-oxygen atomic ratio greater than or equal to 0.8 and less than or equal to 0.9; and / or, The atomic percentage of nitrogen in the first thin film layer is greater than 0 and less than or equal to 1. The atomic percentage of nitrogen in the second thin film layer is greater than or equal to 2%. and less than or equal to 4 The atomic percentage of nitrogen in the third thin film layer is greater than or equal to 4. And less than or equal to 6 .

7. The composite film according to claim 5, characterized in that, The first thin film layer has a dimension along the first direction that is greater than or equal to 20 nm and less than or equal to 80 nm; and / or, The second thin film layer has a dimension along the first direction that is greater than or equal to 60 nm and less than or equal to 300 nm; and / or, The dimension of the third thin film layer along the first direction is greater than or equal to 30 nm and less than or equal to 120 nm.

8. The composite film according to claim 1, characterized in that, The first silicon oxide layer has a dimension along the first direction that is greater than or equal to 10 nm and less than or equal to 100 nm; and / or, The size of the electrostatic dissipation layer along the first direction is greater than or equal to 150 nm and less than or equal to 500 nm.

9. The composite film according to claim 1, characterized in that, It also includes a trap layer, which is disposed between the substrate layer and the first silicon oxide layer along the first direction; the trap layer is a polycrystalline silicon layer or an amorphous silicon layer.

10. The composite film according to claim 1, characterized in that, It also includes a low-sound-loss layer, which is formed along a first direction between the electrostatic dissipation layer and the functional layer; The low-sound-loss layer is an oxygen-silicon layer.

11. The composite film according to claim 10, characterized in that, The low acoustic loss layer has a dimension along the first direction greater than or equal to 2 nm and less than or equal to 50 nm; and / or, The density of the low-sound-loss layer is ≥2.

2. .

12. A method for preparing a composite thin film, characterized in that, Includes the following steps: Provide a substrate layer; A first silicon oxide layer is prepared on the substrate layer; An electrostatic dissipation layer is prepared on the side of the first silicon oxide layer away from the substrate layer along the first direction. The electrostatic dissipation layer serves as a dissipation channel for dissipating static charge. A functional layer is prepared on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer to obtain a composite film.

13. The method for preparing the composite thin film according to claim 12, characterized in that, The substrate layer has a first surface and a second surface disposed opposite to each other along a first direction. The fabrication of the first silicon oxide layer on the substrate layer includes: thermally oxidizing the first surface of the substrate layer to form the first silicon oxide layer; and / or depositing a trap layer on the first surface of the substrate layer, and thermally oxidizing the trap layer on the side facing away from the substrate layer to form the first silicon oxide layer; and / or... The step of fabricating an electrostatic dissipation layer on the side of the first silicon oxide layer opposite to the substrate layer includes: forming the electrostatic dissipation layer on the side of the first silicon oxide layer opposite to the substrate layer by plasma-enhanced chemical vapor deposition; or, forming the electrostatic dissipation layer on the side of the first silicon oxide layer opposite to the substrate layer by performing a rapid annealing post-treatment after plasma-enhanced chemical vapor deposition; and / or... The step of fabricating a functional layer on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer includes: Provide functional wafers; Ion implantation is performed on a functional wafer to obtain an implanted wafer, the implanted wafer comprising a functional layer, a separation layer and a residual mass layer distributed along a first direction; The functional layer of the injection sheet is bonded to the electrostatic dissipation layer to obtain a bonded body; The bonded body is annealed to remove the separation layer and the residual layer, resulting in a composite film.

14. The method for preparing the composite thin film according to claim 12, characterized in that, The preparation method further includes: A low acoustic loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer. The step of fabricating a functional layer on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer to obtain a composite thin film includes: The functional layer is prepared on the side of the low acoustic loss layer that is opposite to the electrostatic dissipation layer.

15. The method for preparing the composite thin film according to claim 14, characterized in that, The formation of a low acoustic loss layer on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer includes: The low acoustic loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer by physical vapor deposition; or... The low acoustic loss layer is formed on the side of the electrostatic dissipation layer opposite to the first silicon oxide layer by atomic layer deposition.

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