Class D amplifier circuit, audio processing chip, and information processing device

Abstract

The utility model discloses a class-D amplifier circuit, an audio processing chip and an information processing device, the class-D amplifier circuit comprises an input unit, an integrator, a pulse width modulation unit, a driving unit, a filtering unit and a feedback network, and the class-D amplifier circuit is characterized by further comprising a duty ratio regulation and control unit and an audio processing unit, the duty ratio regulation and control unit is provided with an input end and an output end, the input end is connected with the integrator, the output end is connected with the pulse width modulation unit, and the duty ratio regulation and control unit is used for detecting the amplitude of an integral signal provided by the integrator to generate a logic signal; according to the logic signal, amplitude adjustment and / or common-mode voltage adjustment are / is carried out on a reference signal input to the pulse width modulation unit, so that the duty ratio of a pulse width modulation signal output to the driving unit by the pulse width modulation unit is adjusted; therefore, the power consumption can be reduced under the condition that the common-mode feedback stability and the common-mode rejection ratio of a signal path are not influenced.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor integrated circuits, and in particular to a class D amplifier circuit, an audio processing chip and an information processing device. Background Art

[0002] The Class D amplifier circuit is a switch-mode amplifier that switches at high frequencies to produce a rectangular waveform at the output of the amplifier. It is more efficient than the Class AB linear amplifier and is currently widely used in speaker drivers for portable speakers, mobile phones, televisions, etc.

[0003] In medium and high power applications, a filter unit is added to the output end of the Class D amplifier circuit to reduce electromagnetic interference (EMI) and improve working efficiency. Figure 1 As shown, the input signal VIN input to the class D amplifier circuit is output to an external circuit (such as a speaker) after passing through an input unit 10, an integrator 20, a pulse width modulation unit 30, a driving unit 40 and a filtering unit 60, wherein the output of the driving unit 40 is fed back to the integrator 20 through a feedback network 50 to suppress errors. A comparator is generally provided in the pulse width modulation unit 30 of this conventional class D amplifier circuit, and the comparator is used to compare the reference signal (triangular wave signal) input to the pulse width modulation unit 30 with the integrated signal INT_VO output by the integrator 20, and generate a pulse width modulation signal PWM according to the comparison result, and the driving unit 40 is used to generate a driving signal for driving an external circuit according to the pulse width modulation signal PWM, and the driving signal generates an inductor current IL after passing through the inductor L in the filtering unit 60, and the current ripple of the inductor current IL is related to the duty cycle of the driving signal.

[0004] Figure 2 FIG. 4 shows a schematic diagram of the duty cycle of the driving signal and its corresponding inductor current, as shown in FIG. Figure 2 As shown, the driving signal is a square wave, and its duty cycle is positively correlated with the current ripple of the corresponding inductor current IL. Among them, a driving signal with a duty cycle of 50% will generate a large current ripple on the inductor L, consume additional power on the driving unit 40 composed of power transistors, affect the efficiency of the class D amplifier circuit, and significantly reduce the circuit efficiency at a relatively low output power. When the duty cycle of the driving signal decreases from 50% to 20%, although the current ripple can be greatly improved, the power consumption of the driving unit 40 can be saved, and the efficiency of the class D amplifier circuit can be improved, the driving signal with a low average duty cycle will cause clipping when the output power is high, and increase the total harmonic distortion (THD).

[0005] Therefore, a new class D amplifier circuit is yet to be proposed to solve the above problems. Utility Model Content

[0006] In view of the above problems, the purpose of the present invention is to provide a class D amplifier circuit, an audio processing chip and an information processing device, so as to reduce power consumption without affecting the common-mode feedback stability and common-mode rejection ratio of the signal path.

[0007] According to one aspect of the utility model, there is provided a class D amplifier circuit, comprising an input unit, an integrator, a pulse width modulation unit, a driving unit, a filtering unit and a feedback network, wherein the class D amplifier circuit further comprises: a duty cycle control unit having an input end and an output end, wherein the input end is connected to the integrator, and the output end is connected to the pulse width modulation unit, wherein the duty cycle control unit is used to detect the amplitude of an integrated signal provided by the integrator to generate a logic signal, and to adjust the amplitude and / or common mode voltage of a reference signal input to the pulse width modulation unit according to the logic signal, so as to adjust the duty cycle of the pulse width modulation signal output by the pulse width modulation unit to the driving unit.

[0008] Optionally, the duty cycle control unit includes: a low-pass filtering module connected to the integrator, used to perform low-pass filtering on the integrated signal; an amplitude detection module connected to the low-pass filtering module, used to detect the amplitude of the integrated signal after low-pass filtering to generate the logic signal; a delay controller connected to the amplitude detection module, used to generate an amplitude adjustment control signal according to the logic signal; an amplitude adjustment unit connected to the delay controller, used to receive the amplitude adjustment control signal, wherein the amplitude adjustment unit performs amplitude adjustment and / or common-mode voltage adjustment on the reference signal within a duty cycle adjustment time according to the amplitude adjustment control signal to adjust the duty cycle of the pulse width modulation signal.

[0009] Optionally, the pulse width modulation unit includes: a comparator, a positive input terminal connected to the output terminal of the duty cycle control unit, a negative input terminal connected to the integrator to receive the integrated signal, and an output terminal providing the pulse width modulation signal to the driving unit.

[0010] Optionally, the filtering unit includes: an inductor, a first end of which serves as an input end of the filtering unit and is connected to the driving unit for receiving a driving signal provided by the driving unit; and a capacitor connected between a second end of the inductor and ground, wherein the second end of the inductor serves as an output end of the filtering unit to provide the filtered driving signal to an external circuit.

[0011] According to another aspect of the utility model, there is provided an audio processing chip, comprising a class D amplifier circuit as an output stage unit of the audio processing chip, the class D amplifier circuit comprising an input unit, an integrator, a pulse width modulation unit, a driving unit, a filtering unit and a feedback network, characterized in that the class D amplifier circuit further comprises: a duty cycle control unit, which has an input end and an output end, the input end is connected to the integrator, and the output end is connected to the pulse width modulation unit, wherein the duty cycle control unit is used to detect the amplitude of an integrated signal provided by the integrator to generate a logic signal, and to adjust the amplitude and / or common mode voltage of a reference signal of the pulse width modulation unit according to the logic signal, so as to adjust the duty cycle of the pulse width modulation signal output by the pulse width modulation unit to the driving unit.

[0012] Optionally, the duty cycle control unit includes: a low-pass filtering module connected to the integrator, used to perform low-pass filtering on the integrated signal; an amplitude detection module connected to the low-pass filtering module, used to detect the amplitude of the integrated signal after low-pass filtering to generate the logic signal; a delay controller connected to the amplitude detection module, used to generate an amplitude adjustment control signal according to the logic signal; an amplitude adjustment unit connected to the delay controller, used to receive the amplitude adjustment control signal, wherein the amplitude adjustment unit performs amplitude adjustment and / or common-mode voltage adjustment on the reference signal within a duty cycle adjustment time according to the amplitude adjustment control signal to adjust the duty cycle of the pulse width modulation signal.

[0013] Optionally, the pulse width modulation unit includes: a comparator, a positive input terminal connected to the output terminal of the duty cycle control unit, a negative input terminal connected to the integrator to receive the integrated signal, and an output terminal providing the pulse width modulation signal to the driving unit.

[0014] Optionally, the filtering unit includes: an inductor, a first end of which serves as an input end of the filtering unit and is connected to the driving unit for receiving a driving signal provided by the driving unit; and a capacitor connected between a second end of the inductor and ground, wherein the second end of the inductor serves as an output end of the filtering unit to provide the filtered driving signal to an external circuit.

[0015] According to a third aspect of the utility model, there is provided an information processing device, characterized in that it comprises: the audio processing chip as described above.

[0016] Optionally, the information processing device is an electronic device selected from the group consisting of a speaker device, a wireless speaker device, a display device, a head-mounted display device, a projection device, a digital camera, an in-car entertainment system, a smart TV, a smart phone, a smart watch, a tablet computer, a desktop computer, a notebook computer, an all-in-one computer, a financial transaction device, and an access control device.

[0017] The class D amplifier circuit, audio processing chip and information processing device provided by the utility model adjust the amplitude and / or common-mode voltage of the reference signal input to the pulse width modulation unit according to the amplitude of the integrated signal, so that the duty cycle of the pulse width modulation signal output by the pulse width modulation unit can be adaptively adjusted according to the amplitude of the integrated signal, thereby controlling the duty cycle of the driving signal output by the driving unit to change with the level of the input signal, thereby achieving the purpose of improving circuit efficiency and reducing power consumption when the output power is low, and not increasing the total harmonic distortion of the circuit when the output power is high. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other purposes, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A structural block diagram of a class D amplifier circuit according to the prior art is shown;

[0020] Figure 2 A schematic diagram showing the duty cycle of a driving signal and the corresponding inductor current;

[0021] Figure 3 A schematic structural diagram of a class D amplifier circuit according to an embodiment of the utility model is shown;

[0022] Figure 4 A schematic diagram of the structure of a duty cycle control unit according to an embodiment of the utility model is shown;

[0023] Figure 5 A schematic diagram showing first to fourth thresholds preset in an amplitude detection module according to an embodiment of the utility model is shown;

[0024] Figure 6 The timing diagram of the class D amplifier circuit according to the embodiment of the utility model is shown. DETAILED DESCRIPTION

[0025] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements or modules are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0026] It should be understood that in the following description, a "circuit" may include a single or multiple combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by programmable circuits. When an element or circuit is said to be "connected to" another element or an element or circuit is said to be "connected between" two nodes, it may be directly coupled or connected to another element or there may be an intermediate element, and the connection between the elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected to" another element, it means that there is no intermediate element between the two.

[0027] At the same time, certain words are used in this patent specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This patent specification and claims do not use differences in names as a way to distinguish components, but rather use differences in components' functions as the criteria for distinction.

[0028] In addition, it should be noted that, in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements defined by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements.

[0029] Figure 3 FIG. 4 shows a schematic structural diagram of a class D amplifier circuit according to an embodiment of the utility model. Figure 3 As shown, the class D amplifier circuit includes an input unit 100, an integrator 200, a pulse width modulation unit 300, a driving unit 400, a feedback network 500, a duty cycle control unit 600 and a filtering unit 700. The class D amplifier circuit can be implemented in an integrated circuit.

[0030] The input unit 100 is connected to the integrator 200, and is used to receive an input signal VIN, and process the input signal VIN and output it to the integrator 200. The input unit 100 includes, for example, a selectable or variable resistor, and the gain of the input signal VIN is affected by controlling the resistance value of the selectable or variable resistor.

[0031] The input end of the feedback network 500 is connected to the output end of the driving unit 400 , and the output end is connected to the input end of the integrator 200 , and is used to feed back the driving signal output by the driving unit 400 to the integrator 200 for error suppression.

[0032] The integrator 200 outputs an integration signal INT_VO according to the output signal of the input unit 100 and the feedback signal provided by the feedback network 500 to suppress the error of the driving signal output by the driving unit 400 and improve the total harmonic distortion of the class D amplifier circuit. The integrator 200 may include many integrator stages connected in sequence. If the integrator 200 includes multiple integration stages, the input end of each integration stage is coupled to the output end of the previous integration stage. The amplitude of the integration signal INT_VO is positively correlated with the level of the input signal VIN. When the input signal VIN is at a high level, the integration signal INT_VO has a high amplitude. When the input signal VIN is at a low level, the integration signal INT_VO has a low amplitude.

[0033] The pulse width modulation unit 300 is connected to the integrator 200, and is used to generate a pulse width modulation signal PWM according to a reference signal (triangular wave signal) and an integrated signal INT_VO. The reference signal is generated by a triangular wave generator, which can be arranged inside the pulse width modulation unit 300 or outside the pulse width modulation unit 300. In the following embodiments, the triangular wave generator is arranged outside the pulse width modulation unit 300 as an example.

[0034] The driving unit 400 is connected to the pulse width modulation unit 300 and is used to generate a driving signal according to the pulse width modulation signal PWM. The driving unit 400 includes a power transistor for driving an external circuit (such as a speaker), which generates a driving signal with a specific duty cycle under the control of the pulse width modulation signal PWM.

[0035] The filter unit 700 includes an inductor L and a capacitor C. The first end of the inductor L serves as an input end of the filter unit 700 and is connected to the driving unit 400 to receive a driving signal. The capacitor C is connected between the second end of the inductor L and the ground. The second end of the inductor L also serves as an output end of the filter unit 700 to output the filtered driving signal to an external circuit. The driving signal will generate an inductor current IL after passing through the inductor L. The current ripple of the inductor current IL is proportional to the duty cycle of the driving signal.

[0036] The input end of the duty cycle control unit 600 is connected to the integrator 200, and the output end is connected to the pulse width modulation unit 300, which is used to detect the amplitude of the integrated signal INT_VO to generate a logic signal, and adjust the amplitude and / or common mode voltage of the reference signal input to the pulse width modulation unit according to the logic signal to change the duty cycle of the pulse width modulation signal PWM, so that the drive signal changes with the amplitude of the integrated signal INT_VO.

[0037] Furthermore, in one embodiment, the logic signal directly adjusts the amplitude and / or common-mode voltage of the reference voltage. In another embodiment, the logic signal controls the triangle wave generator so that the triangle wave signal generator directly outputs the required reference signal.

[0038] Figure 4 The structure diagram of the duty cycle control unit according to the embodiment of the utility model is shown as follows: Figure 4 As shown, the duty cycle control unit 600 includes a low-pass filtering module 610 , an amplitude detection module 620 , a delay controller 630 and an amplitude adjustment unit 640 .

[0039] The low-pass filtering module 610 , for example, includes a low-pass filter, is connected to the integrator 200 , and is configured to receive the integrated signal INT_VO and perform low-pass filtering on the integrated signal INT_VO.

[0040] The amplitude detection module 620 is connected to the low-pass filtering module 610 , and is used for performing an amplitude detection on the low-pass filtered integrated signal INT_VO to generate a logic signal.

[0041] The delay controller 630 is connected to the amplitude detection module 620 and is used to generate an amplitude adjustment control signal according to the logic signal.

[0042] The amplitude adjustment unit 640 is connected to the delay controller 630 and is used to adjust the amplitude and / or common mode voltage of the reference signal input to the pulse width modulation unit 300 according to the amplitude adjustment control signal to change the duty cycle of the pulse width modulation signal PWM provided by the pulse width modulation unit 300.

[0043] Figure 5 FIG. 4 is a schematic diagram showing the first to fourth threshold values ​​preset in the amplitude detection module according to an embodiment of the utility model, as shown in FIG. Figure 5 As shown, the amplitude detection module 620 is preset with a first threshold VT1, a second threshold VT2, a third threshold VT1_HYS, and a fourth threshold VT2_HSY.

[0044] In the case where the initial state of the integral signal INT_VO has a low amplitude, the driving signal has a relatively low initial duty cycle D0. At this time, the amplitude detection module 620 compares the integral signal INT_VO with the first threshold VT1. If the comparison result shows that the amplitude is lower than the first threshold VT1, the level of the logic signal remains unchanged. If the comparison result shows that the amplitude is higher than the first threshold VT1, the level of the logic signal is flipped, thereby controlling the delay controller 630 and the amplitude adjustment unit 640 to work.

[0045] Specifically, if the amplitude detection of the integral signal INT_VO is higher than the first threshold value VT1, the amplitude adjustment unit 640 performs amplitude adjustment and / or common-mode voltage adjustment on the reference signal within a duty cycle adjustment time according to the amplitude adjustment control signal, thereby increasing the initial duty cycle of the drive signal to the first duty cycle D1, D1>D0, and then, if it is detected that the amplitude of the integral signal INT_VO is greater than the second threshold value VT2, the duty cycle of the drive signal is increased from duty cycle D1 to duty cycle D2, D2>D1.

[0046] On the contrary, when the driving signal has a duty cycle D1, if the amplitude of the integral signal INT_VO is less than the third threshold VT1_HYS, the duty cycle of the driving signal is reduced from duty cycle D1 to duty cycle D0; when the driving signal has a duty cycle D2, if the amplitude of the integral signal INT_VO is less than the fourth threshold VT2_HYS, the duty cycle of the driving signal is reduced from duty cycle D2 to duty cycle D1.

[0047] Figure 6 The timing diagram of the class D amplifier circuit according to the embodiment of the utility model is shown.

[0048] like Figure 6 As shown, assuming that the initial state driving signal has a duty cycle D1, if the amplitude detection module 620 detects that the amplitude of the integral signal INT_VO is less than the third threshold VT1_HYS, the amplitude adjustment unit 640 will adjust the amplitude and / or the common mode voltage of the reference signal within a duty cycle reduction time according to the amplitude adjustment control signal, thereby reducing the duty cycle of the driving signal from the duty cycle D1 to the initial duty cycle D0 (e.g., 50%→10%). At this time, the amplitude detection module 620 continues to perform amplitude size detection. If the amplitude of the integral signal VO_INT is detected to be higher than the first threshold VT1, the amplitude adjustment unit 640 will adjust the amplitude and / or the common mode voltage of the reference signal within a duty cycle increase time according to the amplitude adjustment control signal, thereby increasing the initial duty cycle D0 to the first duty cycle D1 (e.g., 10%→50%).

[0049] According to the class D amplifier circuit provided by the embodiment of the utility model, the reference signal input to the pulse width modulation unit 300 is amplitude-adjusted and / or the common-mode voltage is adjusted according to the amplitude of the integral signal INT_VO, so that the pulse width modulation signal PWM output by the pulse width modulation unit 300 can be adaptively adjusted according to the amplitude of the integral signal INT_VO, so as to control the duty cycle of the drive signal output by the drive unit 400 to change with the level of the input signal VIN, so as to achieve the purpose of improving the circuit efficiency and reducing the power consumption when the output power is low, and not increasing the total harmonic distortion of the circuit when the output power is high, and the circuit will not affect the common-mode feedback stability and common-mode rejection ratio of the signal path.

[0050] Of course, a duty cycle control module can also be set between the integrator and the pulse width modulation unit, so that the duty cycle control module adjusts the common-mode offset voltage of the integrated signal according to the level of the input signal to change the average duty cycle of the drive signal. However, although this method can change the average duty cycle of the drive signal, improve the efficiency of the Class D amplifier circuit, and reduce power consumption, changing the common-mode voltage of the integrated signal will affect the common-mode feedback stability and common-mode rejection ratio of the signal path, thereby affecting the performance of the Class D amplifier circuit, such as noise and THD. Therefore, this method is not recommended.

[0051] The present invention also discloses an audio processing chip. The audio processing chip uses the above-mentioned Class D amplifier circuit as an output stage circuit unit.

[0052] Furthermore, the present invention also discloses an information processing device, comprising the audio processing chip of the present invention as described above. In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a speaker device, a wireless speaker device, a display device, a head-mounted display device, a projection device, a digital camera, a car entertainment system, a smart TV, a smart phone, a smart watch, a tablet computer, a desktop computer, a notebook computer, an all-in-one computer, a financial transaction device, and a door access device.

[0053] According to the embodiments of the present invention as described above, these embodiments do not describe all the details in detail, nor do they limit the present invention to specific embodiments. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that technicians in the relevant technical field can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention and their equivalents.

Claims

1. A class D amplifier circuit, comprising an input unit, an integrator, a pulse width modulation unit, a driving unit, a filtering unit and a feedback network, characterized in that: The class D amplifier circuit further comprises: A duty cycle control unit has an input end and an output end, wherein the input end is connected to the integrator, and the output end is connected to the pulse width modulation unit. Among them, the duty cycle control unit is used to detect the amplitude of the integrated signal provided by the integrator to generate a logic signal, and adjust the amplitude and / or common mode voltage of a reference signal input to the pulse width modulation unit according to the logic signal to adjust the duty cycle of the pulse width modulation signal output by the pulse width modulation unit to the driving unit.

2. The class D amplifier circuit according to claim 1, wherein: The duty cycle control unit comprises: A low-pass filtering module, connected to the integrator, for performing low-pass filtering on the integrated signal; An amplitude detection module, connected to the low-pass filtering module, for detecting the amplitude of the low-pass filtered integrated signal to generate the logic signal; A delay controller, connected to the amplitude detection module, for generating an amplitude adjustment control signal according to the logic signal; an amplitude adjustment unit, connected to the delay controller, for receiving the amplitude adjustment control signal, The amplitude adjustment unit is used to adjust the amplitude and / or common mode voltage of the reference signal within a duty cycle adjustment time according to the amplitude adjustment control signal, so as to adjust the duty cycle of the pulse width modulation signal.

3. The class D amplifier circuit according to claim 1, wherein: The pulse width modulation unit comprises: A comparator has a positive input terminal connected to the output terminal of the duty cycle control unit, a negative input terminal connected to the integrator to receive the integrated signal, and an output terminal providing the pulse width modulation signal to the driving unit.

4. The class D amplifier circuit according to claim 1, wherein: The filtering unit comprises: an inductor, a first end of which serves as an input end of the filtering unit and is connected to the driving unit to receive a driving signal provided by the driving unit; A capacitor connected between the second end of the inductor and ground, The second end of the inductor also serves as the output end of the filter unit to provide the filtered driving signal to the external circuit.

5. An audio processing chip, characterized in that: include: A class D amplifier circuit as an output stage unit of the audio processing chip, the class D amplifier circuit includes an input unit, an integrator, a pulse width modulation unit, a driving unit, a filtering unit and a feedback network, characterized in that the class D amplifier circuit further includes: A duty cycle control unit has an input end and an output end, wherein the input end is connected to the integrator, and the output end is connected to the pulse width modulation unit. Among them, the duty cycle control unit is used to detect the amplitude of the integrated signal provided by the integrator to generate a logic signal, and adjust the amplitude and / or common mode voltage of a reference signal input to the pulse width modulation unit according to the logic signal to adjust the duty cycle of the pulse width modulation signal output by the pulse width modulation unit to the driving unit.

6. The audio processing chip according to claim 5, characterized in that: The duty cycle control unit comprises: A low-pass filtering module, connected to the integrator, for performing low-pass filtering on the integrated signal; An amplitude detection module, connected to the low-pass filtering module, for detecting the amplitude of the low-pass filtered integrated signal to generate the logic signal; A delay controller, connected to the amplitude detection module, for generating an amplitude adjustment control signal according to the logic signal; an amplitude adjustment unit, connected to the delay controller, for receiving the amplitude adjustment control signal, The amplitude adjustment unit is used to adjust the amplitude and / or common mode voltage of the reference signal within a duty cycle adjustment time according to the amplitude adjustment control signal, so as to adjust the duty cycle of the pulse width modulation signal.

7. The audio processing chip according to claim 5, characterized in that: The pulse width modulation unit comprises: A comparator has a positive input terminal connected to the output terminal of the duty cycle control unit, a negative input terminal connected to the integrator to receive the integrated signal, and an output terminal providing the pulse width modulation signal to the driving unit.

8. The audio processing chip according to claim 5, characterized in that: The filtering unit comprises: an inductor, a first end of which serves as an input end of the filtering unit and is connected to the driving unit to receive a driving signal provided by the driving unit; A capacitor connected between the second end of the inductor and ground, The second end of the inductor also serves as the output end of the filter unit to provide the filtered driving signal to the external circuit.

9. An information processing device, characterized in that: include: An audio processing chip as described in any one of claims 5 to 8.

10. The information processing device according to claim 9, characterized in that: The information processing device is an electronic device selected from the group consisting of a speaker device, a wireless speaker device, a display device, a head-mounted display device, a projection device, a digital camera, a car entertainment system, a smart TV, a smart phone, a smart watch, a tablet computer, a desktop computer, a notebook computer, an all-in-one computer, a financial transaction device, and an access control device.

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