Selective epitaxial silicon-based ridge optical waveguide
By selectively epitaxially growing the germanium layer on the SOI substrate, forming a smooth ridge-type optical waveguide sidewall and flat plate part, the optical wave loss problem caused by the roughness of the silicon-based ridge-type optical waveguide sidewall is solved, and lower optical waves are achieved Transmission loss and more consistent with the design optical mode field, while compatible with CMOS equipment technology.
Patent Information
- Application Number
- CN202420183861.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-25
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2034-01-25
AI Technical Summary
The prior art has limitations in reducing the roughness of the sidewall of the silicon-based ridge optical waveguide, resulting in high optical wave transmission losses, and improved methods may change the waveguide morphology, introduce stress and defects, and are incompatible with the CMOS production line equipment process.
采用选择性外延硅基脊型光波导，通过在SOI衬底的顶层硅上选择性外延生长锗层，形成平滑的脊型光波导侧壁和平板部分，避免了干法刻蚀导致的粗糙度，保持了光模场的设计一致性。
It significantly reduces the scattering loss of optical wave propagation, maintains the design consistency of the optical mode field, avoids the introduction of stress and defects, and is compatible with CMOS equipment processes.
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Figure CN222259620U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductor manufacturing, in particular to a selective epitaxial silicon-based ridge-type optical waveguide. Background Art
[0002] In the past decade, large-scale photonic integrated circuits have been widely used in optical communications, optical quantum computing, and high-sensitivity optical sensors, which has attracted the interest of academia and industry and enabled them to develop rapidly. Nano-optical waveguides based on silicon on insulator (SOI) substrates have become a typical structure in silicon-based photonic integrated circuits due to their low light transmission loss, ultra-high integration, and compatibility with complementary metal-oxide-semiconductor (CMOS) manufacturing processes. With the help of the high refractive index difference (Δn~2) between the core silicon and the cladding silicon dioxide, silicon nano-optical waveguides have very compact structural dimensions (hundreds of nanometers) and allow very small turning radius (as low as a few microns), laying a solid material and structural foundation for the high-density integration of optoelectronic systems. On the other hand, the high refractive index difference between the core and cladding of silicon waveguides also makes the transmission loss of light waves highly sensitive to the roughness scattering of the waveguide sidewalls, which brings major challenges to silicon waveguides and even silicon photonic integrated chips. For example, a sidewall etching roughness of 10 nanometers is enough to cause severe transmission loss of tens of dB / cm (see Kevin K. Lee et al., Fabrication of ultralow-loss Si / SiO2 waveguides by roughness reduction, Optics Letters, 2001, 26(23): 1888-1890).
[0003] Academics and industry continue to work on reducing the optical loss caused by roughness scattering of nano-silicon waveguides. In addition to improving the photolithography and etching processes, more research focuses on the smoothing of silicon waveguide sidewalls after etching, such as smoothing the silicon surface by oxidation (China Patent Publication No. CN117139850A), promoting atomic migration on the silicon surface by annealing in a hydrogen atmosphere (China Patent Authorization No. CN1277135C, CN107132617B), laser reflow or modification of the silicon surface (China Patent Publication No. CN117139850A), etc. These methods have proven to be effective in reducing the roughness of silicon sidewalls and reducing optical transmission losses, but they also bring some problems. For example, the oxidation method consumes the thickness of the silicon core layer, changes the waveguide morphology and optical mode field, and brings additional stress and defects; the high temperature and vacuum of hydrogen atmosphere annealing, and the high implementation conditions will also make the square waveguide round and deviate from the designed optical mode field; laser processing requires additional special equipment, which is incompatible with CMOS production line equipment and processes. The most commonly used waveguides in silicon photonic chips are strip waveguides and ridge waveguides. Strip waveguides with rectangular cross-sections are most commonly used to transmit optical signals, so there are many studies on their roughness scattering losses and their improvements. Rib waveguides with "convex" cross-sections are easy to dope and connect to metal electrodes. In addition to transmitting optical signals, they have a wider range of uses, such as for constructing passive and active devices such as waveguide gratings, optical phase shifters, modulators and detectors. However, there are relatively few studies on the losses caused by the roughness of ridge waveguides and their improvements.
[0004] Figure 1 The schematic diagram of the cross-sectional structure of a conventional SOI silicon ridge optical waveguide is shown in Figure 1. The SOI substrate is composed of a supporting silicon substrate, a buried oxide layer and a top silicon layer. The ridge optical waveguide formed on the SOI substrate by optical lithography and dry etching of the top silicon layer includes a silicon ridge waveguide and a silicon slab, which are covered by a buried oxide layer and a silicon oxide layer deposited after etching. The sidewalls of the silicon slab, the surface of the silicon slab and the sidewalls of the ridge waveguide are all rough surfaces after dry etching, especially the etched sidewalls of the ridge waveguide and the sidewalls of the silicon slab are much rougher than the surface of the silicon slab. Only the surface of the ridge waveguide is the original top silicon surface, which is relatively smooth. If the roughness of these waveguide sidewalls and the surface of the silicon slab can be reduced, the waveguide loss will be effectively reduced. For a reasonably designed ridge optical waveguide, the optical mode field is mainly distributed in the ridge optical waveguide part, and is less distributed in the silicon slab and the cladding. The waveguide loss caused by the roughness of the ridge waveguide sidewall is more serious than that of the silicon slab sidewall, so it is more important to reduce the roughness of the ridge waveguide sidewall.
[0005] Due to the limitations of existing technologies in improving the sidewall roughness of silicon waveguides and the lack of research in the field of ridge optical waveguides, it is necessary to propose a sidewall roughness improvement method that can make up for the shortcomings of existing methods and is suitable for ridge optical waveguides. Utility Model Content
[0006] In view of the problems existing in the prior art, a selective epitaxial silicon-based ridge optical waveguide is provided. The top silicon of the SOI substrate is used to make a ridge optical waveguide plate, and then a germanium layer is selectively epitaxially grown on the plate, which effectively improves the roughness of each surface.
[0007] The utility model proposes a selective epitaxial silicon-based ridge optical waveguide, comprising:
[0008] SOI substrate, including silicon substrate, buried oxide layer and top silicon from bottom to top;
[0009] A silicon slab layer, made of the top silicon layer of the SOI substrate, serving as the slab portion of the ridge-type optical waveguide;
[0010] Selectively epitaxial silicon, selectively epitaxially growing a silicon layer on the central portion of the upper surface of the silicon slab layer to form a protruding portion of a ridge-type optical waveguide; and
[0011] The second silicon oxide layer completely covers the plate portion and the protruding portion of the ridge type optical waveguide.
[0012] As a preferred solution, the thickness of the top silicon layer is equal to the thickness of the slab portion of the ridge type optical waveguide.
[0013] As a preferred solution, the silicon flat layer is a flat pattern formed by photolithography and dry etching of the top silicon layer.
[0014] As a preferred solution, a first silicon oxide layer is deposited on the surface of the silicon flat layer, an epitaxial growth window is opened in the first silicon oxide layer to expose the top silicon layer, and the selective epitaxial silicon is formed by epitaxial growth in the epitaxial growth window.
[0015] As a preferred solution, the resistivity of the silicon substrate of the SOI substrate is 0.01-10 k ohm·cm.
[0016] As a preferred solution, the buried oxide layer of the SOI substrate has a thickness of 0.1 to 3 microns.
[0017] As a preferred solution, the thickness of the top silicon layer of the SOI substrate is 0.05 to 3 microns.
[0018] As a preferred solution, the thickness of the selective epitaxial silicon is 0.05-3 microns.
[0019] As a preferred solution, the thickness of the second silicon oxide layer 4 is 1-3 microns.
[0020] Compared with the prior art, the beneficial effects of adopting the above technical solution are as follows: the side wall of the ridge-type optical waveguide proposed by the utility model is a smooth epitaxial silicon surface that has not been etched, which can significantly reduce the scattering loss of light wave propagation compared to the rough side wall surface of the conventional ridge-type optical waveguide that has been dry-etched; at the same time, the thickness of the silicon layer of the flat part of the ridge-type optical waveguide, that is, the original thickness of the top silicon of the SOI substrate has not been etched, which is more accurate and uniform than the thickness of the top silicon of the conventional ridge-type optical waveguide that has been etched, so the optical mode field is more in line with the design, and less light leaks out of the waveguide and causes loss. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 This is a cross-sectional view of a conventional silicon-based ridge optical waveguide.
[0022] Figure 2 This is a cross-sectional view of a selective epitaxial silicon-based ridge optical waveguide proposed in one embodiment of the present invention.
[0023] Figure 3 This is a simplified process flow diagram for fabricating a selective epitaxial silicon-based ridge optical waveguide according to an embodiment of the present invention.
[0024] Figure 4 It is a cross-sectional schematic diagram of a process for manufacturing a selective epitaxial silicon-based ridge optical waveguide according to an embodiment of the present invention.
[0025] Figure numerals: 1-SOI substrate, 2-silicon flat layer, 3-selective epitaxial silicon, 4-second silicon oxide layer, 11-silicon substrate, 12-buried oxide layer, 13-top silicon, 2T-upper surface of the flat part of the ridge type optical waveguide, 2S-side wall of the flat part of the ridge type optical waveguide, 3T-upper surface of the raised part of the ridge type optical waveguide, 3S-side wall of the raised part of the ridge type optical waveguide. DETAILED DESCRIPTION
[0026] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar modules or modules with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be construed as limitations on the present application. On the contrary, the embodiments of the present application include all changes, modifications and equivalents that fall within the spirit and connotation of the appended claims.
[0027] In order to effectively reduce the roughness of the waveguide sidewall and reduce the light wave transmission loss, the embodiment of the utility model proposes a selective epitaxial silicon-based ridge optical waveguide, which can significantly improve the roughness of each surface of the ridge optical waveguide, and also avoids the problems of the prior art such as changing the waveguide morphology and optical mode field, introducing stress and defects, and high implementation conditions, and is well compatible with CMOS equipment processes.
[0028] Please refer to Figure 2 The selective epitaxial silicon-based ridge optical waveguide mainly includes several parts: SOI substrate 1, silicon flat layer 2, selective epitaxial silicon 3 and second silicon oxide layer 4. Specifically:
[0029] The SOI substrate 1 serves as the basis of the ridge optical waveguide, and includes a silicon substrate 11, a buried oxide layer 12, and a top silicon layer 13 from bottom to top. In one embodiment, the resistivity of the silicon substrate 11 is 0.01-10k ohm cm, and a material with a higher resistivity is preferred to reduce the parasitic effect of the substrate, which is more beneficial to the performance of the silicon photonic chip; the thickness of the buried oxide layer 12 is 0.1-3 microns, and a SOI material with a thicker buried oxide layer 12 is preferred, firstly to ensure that the buried oxide layer 12 has sufficient thickness to act as a lower cladding to limit light, and secondly to reduce the parasitic capacitance of the silicon substrate 11 to improve the RF bandwidth of active devices (such as modulators, detectors, etc.); the thickness of the top silicon is 0.05-3 microns, firstly to facilitate the waveguide design, and secondly to ensure a certain thickness to grow a high-quality silicon epitaxial layer.
[0030] The silicon slab layer 2 is directly made of the top silicon layer 13 of the SOI substrate 1 as the slab portion of the ridge-type optical waveguide. Since the top silicon layer 13 of the SOI substrate 1 is used to make the slab portion of the ridge-type optical waveguide, its thickness needs to be customized in advance, that is, the thickness of the top silicon layer 13 of the SOI substrate 1 should be equal to the designed thickness of the slab portion of the ridge-type optical waveguide. In one embodiment, the top silicon layer 13 is photolithographically and dry-etched to define the slab portion pattern of the ridge-type optical waveguide.
[0031] The selective epitaxial silicon 3 is formed by selectively epitaxially growing a silicon layer on the silicon flat layer 2, which serves as the raised portion of the ridge-type optical waveguide. In practical applications, during the formation of the selective epitaxial silicon 3, it is necessary to first deposit a first silicon oxide layer on the upper surface of the silicon flat layer 2, and then use photolithography and dry etching to expose the central area of the silicon flat layer 2 to form an epitaxial window, and then selectively epitaxially grow a silicon layer in the epitaxial window to form the raised portion of the ridge-type optical waveguide, and finally remove the first silicon oxide layer. In one embodiment, the thickness of the selective epitaxial silicon 3 is 0.05-3 microns.
[0032] The second silicon oxide layer 4 completely covers the slab portion and the protruding portion of the ridge type optical waveguide. In one embodiment, the thickness of the second silicon oxide layer 4 is 1-3 microns.
[0033] It should be noted that when performing selective silicon epitaxy, the step of removing the first silicon oxide layer is essential. This is because the second silicon oxide layer 4 needs to be deposited later to complete the wrapping process of the flat portion and the raised portion of the ridge-type optical waveguide. If the first silicon oxide layer is not removed, the second silicon oxide layer 4 may not be filled properly due to the tiny gap between the first silicon oxide layer and the selective epitaxial silicon 3, thereby causing the mode field in the ridge-type optical waveguide to be distorted and deviate from the design.
[0034] In the selective epitaxial silicon-based ridge optical waveguide proposed in this embodiment, only the flat sidewall 2S of the ridge optical waveguide is relatively rough after dry etching, while the flat upper surface 2T of the ridge optical waveguide is the original surface of the top silicon 13, and the convex sidewall 3S of the ridge optical waveguide and the convex upper surface 3T of the ridge optical waveguide are the side and surface of the selective epitaxial silicon 3, which have not been dry etched and are relatively smooth. Figure 1 Compared with the conventional silicon ridge waveguide shown in Figure 2 The raised part of the ridge-type optical waveguide has smoother sidewalls and upper surfaces, which can reduce roughness scattering and light wave transmission loss. The thickness uniformity of the original top silicon layer and the epitaxial layer is better than the thickness uniformity of dry etching. Epitaxy also avoids plasma damage caused by silicon dry etching. Therefore, in terms of transmission loss of the optical waveguide and uniformity within the wafer, the selective epitaxial silicon-based ridge-type optical waveguide proposed in this embodiment is superior to the conventional ridge-type optical waveguide.
[0035] Please refer to Figure 3 , Figure 4 The utility model embodiment also proposes to make Figure 2 The method for selective epitaxy of a silicon-based ridge optical waveguide is shown. The method comprises:
[0036] (a) providing an SOI substrate 1, wherein the SOI substrate 1 comprises a silicon substrate 11, a buried oxide layer 12 and a top silicon layer 13 from bottom to top.
[0037] In this embodiment, an 8-inch P(100)SOI substrate 1 is selected, the substrate thickness is 725 microns, the resistivity is 10 ohm·cm, the buried oxide layer 12 thickness is 3 microns, and the top silicon thickness is 0.15 microns.
[0038] (b) Forming the planar portion of the ridge-type optical waveguide by photolithography and dry etching the top silicon layer 13. The planar portion of the ridge-type optical waveguide is etched out in the top silicon layer 13 of the SOI substrate 1 by photolithography and dry etching, and terminated on the buried oxide layer 12.
[0039] (c) Depositing a first silicon oxide layer: In this embodiment, a first silicon oxide layer is deposited by plasma enhanced chemical vapor deposition (PECVD) to a thickness of 0.1 micrometers to cover the plate portion of the ridge optical waveguide that has been etched.
[0040] (d) Photolithography and dry etching are used to expose the central area of the flat plate portion to form a selective epitaxial window. In this embodiment, the ridge optical waveguide area is first exposed by photolithography, and then the first silicon oxide layer is etched to expose the top silicon surface by dry etching or dry etching first and then wet etching to form a window area for epitaxial growth.
[0041] (e) A silicon layer is selectively epitaxially grown in the selective epitaxial window to form a raised portion of a ridge-type optical waveguide. In this embodiment, the selective epitaxially grown silicon layer is single crystal silicon with a thickness of 0.07 micrometers.
[0042] (f) Removing the first silicon oxide layer: In this embodiment, a dilute hydrofluoric acid solution is used to wet-process remove the remaining first silicon oxide layer.
[0043] (g) Depositing a second silicon oxide layer to wrap the flat plate portion and the protruding portion of the ridge type optical waveguide. In this embodiment, the second silicon oxide layer 4 is deposited by PECVD with a thickness of 1.5 microns.
[0044] (h) The second silicon oxide layer 4 is polished by chemical mechanical polishing process to make the entire surface of the second silicon oxide layer 4 flat, thereby completing the production of the selective epitaxial silicon-based ridge optical waveguide.
[0045] The selective epitaxial silicon ridge optical waveguide proposed by the utility model has two significant advantages: first, the side wall of the ridge optical waveguide is a smooth epitaxial silicon surface that has not been etched, which can significantly reduce the scattering loss of light wave propagation compared to the rough side wall surface of the conventional ridge optical waveguide that has been dry-etched; second, the thickness of the silicon layer of the flat plate part of the ridge optical waveguide, that is, the original thickness of the top silicon of the SOI substrate has not been etched, which is more accurate and more uniform than the thickness of the top silicon of the conventional ridge optical waveguide that has been etched, so the optical mode field is more in line with the design, and less light leaks out of the waveguide to cause loss.
[0046] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0047] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.
[0048] Similarly, it should be understood that in order to streamline the present application and aid in understanding one or more of the various aspects, in the above description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the disclosed method should not be interpreted as reflecting the following intention: the claimed application requires more features than the features explicitly recited in each claim. More specifically, as reflected in the claims, the utility model aspects lie in less than all the features of the single embodiment disclosed above. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, with each claim itself serving as a separate embodiment of the present application.
[0049] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments can be used in any combination.
Claims
1. A selective epitaxial silicon-based ridge optical waveguide, characterized in that: include: SOI substrate, including silicon substrate, buried oxide layer and top silicon from bottom to top; A silicon slab layer, made of the top silicon layer of the SOI substrate, serving as the slab portion of the ridge-type optical waveguide; Selective epitaxial silicon, selectively epitaxially growing a silicon layer at the center of the upper surface of the silicon slab layer to form a protruding portion of a ridge-type optical waveguide; as well as, The second silicon oxide layer completely covers the plate portion and the protruding portion of the ridge type optical waveguide.
2. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The thickness of the top silicon layer is equal to the thickness of the slab portion of the ridge type optical waveguide.
3. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The silicon flat layer is a flat pattern formed by photolithography and dry etching of the top silicon layer.
4. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: A first silicon oxide layer is deposited on the surface of the silicon flat plate layer. An epitaxial growth window is opened in the first silicon oxide layer to expose the top silicon layer. The selective epitaxial silicon is formed by epitaxial growth in the epitaxial growth window.
5. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The resistivity of the silicon substrate of the SOI substrate is 0.01-10 k ohm·cm.
6. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The buried oxide layer thickness of the SOI substrate is 0.1 to 3 microns.
7. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The thickness of the top silicon layer of the SOI substrate is 0.05 to 3 microns.
8. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The thickness of the selective epitaxial silicon is 0.05-3 microns.
9. The selective epitaxial silicon-based ridge optical waveguide according to claim 1, characterized in that: The thickness of the second silicon oxide layer 4 is 1-3 microns.