Quadplexer and communication equipment
By using filter networks and matching circuits of series and parallel resonant branches in the four-mechanical device, the filter passband matching problem is solved, signal transmission efficiency and performance are improved, and return loss is reduced.
Patent Information
- Application Number
- CN202421101181.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-20
- Publication Date
- 2025-01-10
- Estimated Expiration
- 2034-05-20
AI Technical Summary
The passband matching problem of the filter in the four-mechanical device leads to a decrease in signal transmission efficiency, an increase in insertion loss and an increase in standing wave ratio, which is difficult to effectively solve in the prior art.
A filter network consisting of multiple series and parallel resonant branches is used to optimize the passband matching of the filter by setting up series inductance and parallel resonant branches, and a matching circuit is set at the common port to offset the capacitive characteristics and improve the input impedance.
The passband matching of each filter in the multiplexer is improved, the return loss is reduced, and the signal transmission efficiency and performance are improved.
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Figure CN222339371U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of radio frequency, and more specifically, to a quadplexer and communication equipment. Background Art
[0002] Quadplexers are widely used in the RF (Radio Frequency) field, especially in wireless communication, broadcasting, radar, satellite communication and other systems. The function of the multiplexer is to realize the multiplexing, separation, routing and isolation of RF signals to meet the needs of coexistence and collaborative work of multiple RF functions in the same system.
[0003] A quadplexer usually includes multiple filters with different passbands, and the filter may include a filter network composed of resonators. The filter can pass the desired frequency of the signal and block the undesired frequency. However, within the designed passband range, the filter is prone to the input and output impedance not reaching the ideal matching state, resulting in problems such as reduced signal transmission efficiency, increased insertion loss, increased standing wave ratio or intra-band fluctuations. Therefore, it is desirable in the industry to provide a method that can improve the passband matching of each filter in the multiplexer. Utility Model Content
[0004] In view of the above technical problems, the utility model provides a circuit structure for a multiplexer, thereby improving the passband matching of each filter in the multiplexer.
[0005] A brief overview of the present invention will be given below in order to provide a basic understanding of certain aspects of the present invention. It should be understood that this overview is not an exhaustive overview of the present invention. It is not intended to identify key or important parts of the present invention, nor is it intended to limit the scope of the present invention. Its purpose is simply to present certain concepts in a simplified form as a prelude to a more detailed description discussed later.
[0006] According to one aspect of the utility model, a quadplexer is provided, comprising: a common port, a first filter, a second filter, a third filter and a fourth filter; the first filter, the second filter, the third filter and the fourth filter each have a first end and a second end and a filtering network composed of a plurality of series resonant branches and a plurality of parallel resonant branches between the first end and the second end; a first series inductor is arranged between the first end of the first filter and the series resonant branch closest to the common port in the first filter; a second series inductor is arranged between the first end of the second filter and the series resonant branch closest to the common port in the second filter; a third series inductor is arranged between the first end of the third filter and the series resonant branch closest to the common port in the third filter; and a fourth series inductor is arranged between the first end of the fourth filter and the series resonant branch closest to the common port in the fourth filter.
[0007] Furthermore, the inductance values of the first series inductor, the second series inductor, the third series inductor and the fourth series inductor are 0.1 nH-10 nH.
[0008] Furthermore, the first filter has passbands of other filters adjacent to it on its low-frequency side of the passband, the fourth filter has passbands of other filters adjacent to it on its low-frequency side of the passband, and the gap between the passband of the first filter and the passbands of other filters adjacent to its low-frequency passband is smaller than the bandwidth of the passband of the first filter; the gap between the passband of the fourth filter and the passbands of other filters adjacent to its low-frequency passband is smaller than the bandwidth of the passband of the fourth filter.
[0009] Further, the maximum inductance value of the first series inductor and the fourth series inductor is smaller than the minimum inductance value of the second series inductor and the third series inductor.
[0010] Furthermore, the series resonant branch closest to the common port in each filter is closer to the common port than all parallel resonant branches in each filter.
[0011] Furthermore, a first matching circuit is provided between the common port and the ground to offset the capacitive characteristics of the plurality of filters as a whole.
[0012] Furthermore, a second matching circuit is provided between the second end of each filter and the ground.
[0013] Furthermore, each filter has a topology structure of 5 series and 4 parallel, 4 series and 3 parallel, 3 series and 2 parallel, 3 series and 4 parallel, and 4 series and 4 parallel.
[0014] Furthermore, the first filter is a transmitting filter with a passband frequency range of 1920MHz to 1980MHz; the second filter has a passband frequency range of 2110MHz to 2170MHz; the third filter has a passband frequency range of 1710MHz to 1785MHz; and the fourth filter has a passband frequency range of 1805MHz to 1880MHz.
[0015] According to another aspect of the present invention, a communication device is provided, the communication device comprising any one of the quadplexers described above. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The specific contents of the utility model are described below with reference to the accompanying drawings, which will help to more easily understand the above and other purposes, features and advantages of the utility model. The accompanying drawings are only for illustrating the principles of the utility model. The sizes and relative positions of the units in the accompanying drawings do not need to be drawn in proportion.
[0017] Figure 1 The basic circuit structure block diagram of the quadplexer provided by the utility model is shown;
[0018] Figure 2 A circuit diagram of a quadplexer provided by the utility model;
[0019] Figure 3 The figure shows the amplitude-frequency response of each filter in the B1+B3 quadplexer provided by the present invention;
[0020] Figure 4 A specific circuit structure diagram of the quadplexer provided by the utility model is shown;
[0021] Figure 5 Show Figure 4 The return loss curve comparison diagram of the circuit structure of the multiplexer shown and the circuit structure of the multiplexer in the first comparative example.
[0022] Figure 6 Show Figure 4 A return loss comparison diagram of the circuit structure of the multiplexer shown and the circuit structure of the multiplexer in the second comparative example. DETAILED DESCRIPTION
[0023] Below, exemplary disclosures of the present invention will be described in conjunction with the accompanying drawings. For the sake of clarity and conciseness, not all features of implementing the present invention are described in the specification. However, it should be understood that many decisions specific to the present invention may be made in the process of developing any such implementation of the present invention in order to achieve the specific goals of the developer, and these decisions may vary from one utility model to another.
[0024] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only the device structure closely related to the solution according to the present invention is shown in the drawings, while other details that are not closely related to the present invention are omitted.
[0025] It should be understood that the present invention is not limited to the described implementation forms due to the following description with reference to the accompanying drawings. In the present invention, features between different implementations can be replaced or borrowed, and one or more features can be omitted in one implementation, if feasible.
[0026] The following is a detailed description of the present solution using a quadplexer including B1+B3 as an example. Specifically, the quadplexer includes a B1 band receiving filter, a B1 band transmitting filter, a B3 band receiving filter, and a B3 band transmitting filter. It is used to adapt to the broad network coverage of the B1 band and the B3 band, and to adapt to communication equipment that uses the two as a carrier aggregation combination. Those skilled in the art should understand that the multiplexer provided by the present invention is not specifically a B1+B3 quadplexer, and other types of multiplexers including multiple filters with different passbands are also within the protection scope of the present invention.
[0027] See also Figure 1 , Figure 1 The basic circuit structure block diagram of the quadplexer provided by the utility model is shown, and the quadplexer includes a common port A, a B1 transmit filter 100, a B3 transmit filter 200, a B1 receive filter 110, and a B3 receive filter 210. That is, the first filter, the second filter, the third filter, and the fourth filter are respectively the B1 transmit filter 100, the B1 receive filter 110, the B3 transmit filter 200, and the B3 receive filter 210. The B1 transmit filter 100, the B3 transmit filter 200, the B1 receive filter 110, and the B3 receive filter 210 each have a first end and a second end, wherein the first end is close to the common port A.
[0028] The common port A is an external port for sending and receiving radio waves through an antenna element (not shown in the figure); the input end of the B1 transmitting filter 100, that is, the second end of the B1 transmitting filter 100, is connected to the port B1TXP, and the output end of the B1 transmitting filter 100, that is, the first end of the B1 transmitting filter 100, is connected to the common port A; the input end of the B1 receiving filter 110, that is, the first end of the B1 receiving filter 110, is connected to the common port A, and the output end of the B1 receiving filter 110, that is, the second end of the B1 receiving filter 110, is connected to the port B1RXP; the input end of the B3 transmitting filter 200, that is, the second end of the B3 transmitting filter 200, is connected to the port B3TXP, and the output end of the B3 transmitting filter 200, that is, the first end of the B3 transmitting filter 200, is connected to the common port A; the input end of the B3 receiving filter 210, that is, the first end of the B3 receiving filter 210, is connected to the common port A, and the output end of the B3 receiving filter 210, that is, the second end of the B3 receiving filter 210, is connected to the port B3RXP.
[0029] Furthermore, the B1 receiving filter 110 , the B3 receiving filter 210 , the B1 transmitting filter 100 , and the B3 transmitting filter 200 may each include a plurality of series resonant branches and a plurality of parallel resonant branches, and the plurality of series resonant branches may form a filter network.
[0030] The following uses the B1 transmit filter 100 as a representative to illustrate the arrangement of the series resonant branches and the parallel resonant branches. M The common port A and the port B1TXP are sequentially arranged between the common port A and the series resonant branch SL1, between adjacent series resonant branches, and between the Mth series resonant branch SL M There is a connection node between port B1TXP, that is, there are (M+1) connection nodes T1N1-T1N M+1 , where M is a natural number.
[0031] The first parallel resonant branch P1L I One end is connected to the connection node T1N I+1 , the first parallel resonant branch P1L I The other end is connected to the variable module M1U, which is selected from the ground potential, the shared inductance or a combination of the above options, 1≤I≤P. I When the other end of the variable module M1U is connected to the shared inductor, the first parallel resonant branch P1L I At least one other parallel resonant branch is connected in parallel to one end of the common inductor.
[0032] In one embodiment, if Figure 1 As shown, in the series resonant branch S1L1-S1L M The series resonant units S1Z1-S1Z are respectively provided on M , in the parallel resonant branch P1L1-P1L P The parallel resonant units P1Z1-P1Z are respectively provided on P .
[0033] Furthermore, for the series resonant unit S1Z1-S1Z M And parallel resonant unit P1Z1-P1Z P For example, the resonance unit may be selected from a single resonance unit, a series-parallel connection of the resonance unit and the inductor element, and a series-parallel connection of the resonance unit and the capacitor element. Specifically, the resonance unit includes at least one resonator or multiple resonators. When the resonance unit includes multiple resonators, the multiple resonators are connected in series and / or in parallel.
[0034] Furthermore, when the series resonant unit S1Z1-S1Z M And parallel resonant unit P1Z1-P1Z P When the series connection of the resonant unit and at least one inductor is selected, the inductance values of the inductors between different resonant units may be equal or unequal.M And parallel resonant unit P1Z1-P1Z P When the parallel connection of the resonance unit and the capacitor element is selected, the capacitance values of the capacitor elements between different resonance units may be equal or different.
[0035] It can be understood that the configuration of the series resonant branches and the parallel resonant branches of the B3 transmit filter 200 , the B1 receive filter 110 and the B3 receive filter 210 can refer to the configuration of the B1 transmit filter 100 , and will not be repeated here.
[0036] In the connection mode of the series resonant branch and the parallel resonant branch of each filter in the quadplexer of the utility model, the series resonant branch in each filter is connected to the common port before the parallel resonant branch. The reason is that the filters influence each other due to the mutual connection. By connecting the series resonant branch in each filter to the common port before the parallel resonant branch, the input impedance of each filter can be increased, the influence of the remaining filters on a certain filter when it is working can be reduced, and the performance of the quadplexer can be improved.
[0037] In another embodiment, Figure 1 As shown, if necessary, at least one of the B1 receiving filter 110, the B3 receiving filter 210, the B1 transmitting filter 100, and the B3 transmitting filter 200 in the quadplexer of the utility model may be provided with a matching branch at the respective second ends. Specifically, the matching circuit M1C2 may be provided at the port B1TXP of the B1 transmitting filter 100, the matching circuit M3C2 may be provided at the port B3TXP of the B3 transmitting filter 200, the matching circuit M2C2 may be provided at the port B1RXP of the B1 receiving filter 110, and the matching circuit M4C2 may be provided at the port B3RXP of the B3 receiving filter 210.
[0038] Further, when the matching branch M1C2 is set at the port B1TXP of the B1 transmit filter 100, it can be set in series at the node N M+1 and port B1TXP, or the matching branch M1C2 can be arranged in parallel at the node N of the B1 transmit filter 100. M+1 and ground. At this time, the matching branch M1C2 is used to match the impedance of the B1 transmit filter 100 itself to avoid signal reflection and signal loss. The matching branch M1C2 can be various series-parallel combinations of capacitors and / or inductors.
[0039] It can be understood that when the matching branch M3C2 is set at the port B13TXP of the B3 transmit filter 200, the matching branch M2C2 is set at the port B1RX of the B1 receive filter 110, and the matching branch M4C2 is set at the port B3RP of the B3 receive filter 210, the manner and function are the same as when the matching branch M1C2 is set at the port B1TX of the B1 transmit filter 100, and will not be repeated here.
[0040] Continue reading Figure 1 ,exist Figure 1 A first matching circuit MC1 is further arranged between the common port A of the circuit structure and the ground potential. The first matching circuit MC1 exhibiting inductive properties is arranged to offset the capacitive characteristics of the filters in the quadplexer as a whole, so that the B1 transmit filter 100, the B1 receive filter 110, the B3 transmit filter 200 and the B3 receive filter 210 are impedance matched with each other to avoid deterioration of insertion loss.
[0041] See also Figure 2 , Figure 2 The circuit diagram of the quadplexer provided by the utility model is shown in FIG. Figure 2 As shown, in Figure 1 Based on the basic circuit structure block diagram of the quadplexer, the utility model sets a series inductor Ls1 between the output end of the B1 transmitting filter 100, i.e., the first end thereof, and the series resonant branch S1L1 closest to the common port; sets a series inductor Ls2 between the input end of the B1 receiving filter 110, i.e., the first end thereof, and the series resonant branch S2L1 closest to the common port; sets a series inductor Ls3 between the output end of the B3 transmitting filter 200, i.e., the first end thereof, and the series resonant branch S3L1 closest to the common port; sets a series inductor Ls4 between the input end of the B3 receiving filter 210, i.e., the first end thereof, and the series resonant branch S4L1 closest to the common port. In the utility model, the return loss of the corresponding filter is improved by setting the series inductor Ls1, the series inductor Ls2, the series inductor Ls3, and the series resonant branch S4L1 closest to the common port, especially by adding the series inductor Ls1 and the series inductor Ls4.
[0042] See also Figure 3 , Figure 3 The figure shows the amplitude-frequency response of each filter in the B1+B3 quadruplicater provided by the present invention. Figure 3It can be known that the passband B3RX of the B3 receiving filter 210 adjacent to the B1 transmitting filter 100 is located at the low frequency side of the passband B1TX of the B1 transmitting filter 100, and the passband B3TX of the B3 transmitting filter 200 adjacent to the B3 receiving filter 210 is located at the low frequency side of the passband B3RX of the B3 receiving filter 210, and the gap between the passband B1TX of the B1 transmitting filter 100 and the passband B3RX of the B3 receiving filter 210 is smaller than the bandwidth of the passband B1TX of the B1 transmitting filter 100, and the gap between the passband B3RX of the B3 receiving filter 210 and the passband B3TX of the transmitting filter 200 is smaller than the bandwidth of the passband B3RX of the B3 receiving filter 210. At this time, the largest inductance value of the series inductance Ls1 and the series inductance Ls4 is set to be smaller than the smallest inductance value of the series inductance Ls2 and the series inductance Ls3. In the present invention, better passband matching can be obtained by setting the inductance value as described above.
[0043] See also Figure 4 , Figure 4 A specific circuit structure diagram of the quadplexer provided by the utility model is shown. As shown in the figure, there is a first matching circuit composed of an inductor Lmc with an inductance value of 0.1nH-20nH between the common port A and the ground potential.
[0044] The B1 transmit filter 100 is connected between the common port A and the port B1TXP. The B1 transmit filter 100 includes a series inductor Ls1 and five series resonant branches connected in series between the common port A and the port B1TXP. There are connection nodes N1, T1N2-T1N6 between the common port A, the series inductor Ls1, the five series resonant branches and the port B1TXP.
[0045] A series inductor Ls1 and a resonator s1 are provided between the connection node N1 and the connection node T1N2, a resonator s2 is provided between the connection node T1N2 and the connection node T1N3, a resonator s3 is provided between the connection node T1N3 and the connection node T1N4, a resonator s4 is provided between the connection node T1N4 and the connection node T1N5, and a resonator s5 is provided between the connection node T1N5 and the connection node T1N6. The inductance value of the series inductor Ls1 can be set to 0.1-10 nH.
[0046] The connecting node T1N2 is connected to a parallel resonant branch, and a resonator p1 is arranged on the parallel resonant branch; the connecting node T1N3 is connected to a parallel resonant branch, and a resonator p2 is arranged on the parallel resonant branch; the connecting node T1N4 is connected to a parallel resonant branch, and a resonator p3 is arranged on the parallel resonant branch; the connecting node T1N5 is connected to a parallel resonant branch, and a resonator p4 is arranged on the parallel resonant branch.
[0047] Further, one end of resonator p1 is connected to connection node T1N2, the other end of resonator p1 is connected to inductor L1, and inductor L1 is connected to ground potential; one end of resonator p2 is connected to connection node T1N3, the other end of resonator p2 is connected to inductor L2, and inductor L2 is connected to ground potential; one end of resonator p3 is connected to connection node T1N4, one end of resonator p4 is connected to connection node T1N5, resonator p3 and resonator p4 are connected in parallel and then connected to common inductor L3, and common inductor L3 is connected to ground potential. Specifically, the inductance values of inductor L1, inductor L2 and inductor L3 can be set to 0.01-10nH.
[0048] Optionally, a matching circuit consisting of an inductor L7 may be arranged in parallel between the port B1TXP and the ground potential to match the impedance of the B1 transmit filter 100 itself.
[0049] The B1 receiving filter 110 is connected between the common port A and the port B1RXP, and includes a series inductor Ls2 and five series resonant branches connected in series between the common port A and the port B1RXP. Connection nodes N1, T2N1-T2N5 are provided between the common port A, the series inductor Ls2, the five series resonant branches and the port B1RXP.
[0050] A series inductor Ls2 and a resonator s6 are provided between the connection node N1 and the connection node T2N2, a resonator s7 is provided between the connection node T2N2 and the connection node T2N3, a resonator s8 is provided between the connection node T2N3 and the connection node T2N4, a resonator s9 is provided between the connection node T2N4 and the connection node T2N5, and a resonator s10 is provided between the connection node T2N5 and the connection node T2N6. The inductance value of the series inductor Ls2 can be set to 0.1nH-20nH.
[0051] The connecting node T2N2 is connected to a parallel resonant branch, and a resonator p5 may be arranged on the parallel resonant branch; the connecting node T2N3 is connected to a parallel resonant branch, and a resonator p6 may be arranged on the parallel resonant branch; the connecting node T2N4 is connected to a parallel resonant branch, and a resonator p7 may be arranged on the parallel resonant branch; the connecting node T2N5 is connected to a parallel resonant branch, and a resonator p8 may be arranged on the parallel resonant branch.
[0052] Further, one end of resonator p5 is connected to connection node T2N2, the other end of resonator p5 is connected to inductor L5, and inductor L5 is connected to ground potential; one end of resonator p6 is connected to connection node T2N3, the other end of resonator p6 is connected to inductor L6, and inductor L6 is connected to ground potential; one end of resonator p7 is connected to connection node T2N4, one end of resonator p8 is connected to connection node T2N5, resonator p7 and resonator p8 are connected in parallel and connected to common inductor L7, and common inductor L7 is connected to ground potential. Specifically, the inductance value of inductor L5-L7 can be set to 0.01-10nH.
[0053] Optionally, a matching circuit consisting of an inductor L8 may be provided between the port B1RXP and the ground potential to match the impedance of the B1 receive filter 110 itself.
[0054] The B3 transmit filter 200 is connected between the common port A and the port B3TXP. The B3 transmit filter 200 includes a series inductor unit Ls3 and five series resonant branches connected in series between the common port A and the port B3TXP, and connection nodes N1, T3N2-T3N6 are provided between the common port A, the five series resonant branches and the second transmit port B1TXP.
[0055] A series inductor Ls3 and a resonator s11 are provided between the connection node T3N1 and the connection node T3N2, a resonator s12 is provided between the connection node T3N2 and the connection node T3N3, a resonator s13 is provided between the connection node T3N3 and the connection node T3N4, a resonator s14 is provided between the connection node T3N4 and the connection node T3N5, and a resonator s15 is provided between the connection node T3N5 and the connection node T3N6. The inductance value of the series inductor Ls3 can be set to 0.1nH-10nH.
[0056] The connecting node T3N2 is connected to a parallel resonant branch, and a resonator p9 may be arranged on the parallel resonant branch; the connecting node T3N3 is connected to a parallel resonant branch, and a resonator p10 may be arranged on the parallel resonant branch; the connecting node is connected to a parallel resonant branch PL3, and a resonator p11 may be arranged on the parallel resonant branch; the connecting node is connected to a parallel resonant branch, and a resonator p12 is arranged on the parallel resonant branch.
[0057] Further, one end of resonator p9 is connected to connection node T3N2, the other end of resonator p9 is connected to inductor L9, and inductor L9 is connected to ground potential; one end of resonator p10 is connected to connection node T3N3, the other end of resonator p10 is connected to inductor L10, and inductor L10 is connected to ground potential; one end of resonator p11 is connected to connection node T3N4, one end of resonator p12 is connected to connection node T3N5, resonator p11 and resonator p12 are connected in parallel to common inductor L11, and common inductor L13 is connected to ground potential. Specifically, the inductance values of inductor L9, inductor L10 and inductor L11 can be set to 0.01-10nH.
[0058] Optionally, an inductor L12 may be provided between the port B3TX and the ground potential to match the impedance of the B3 transmit filter 200 itself.
[0059] The B3 receiving filter 210 is connected between the common port A and the port B3RXP. The B3 receiving filter includes a series inductor Ls4 and five series resonant branches connected in series between the common port A and the port B3RXP. There are connection nodes N1, T4N2-T4N5 between the common port A, the five series resonant branches and the second receiving port B3RXP.
[0060] A series inductor Ls4 and a resonator s16 are provided in series between the connection node T4N1 and the connection node T4N2, a resonator s17 is provided between the connection node T4N2 and the connection node T4N3, a resonator s18 is provided between the connection node T4N3 and the connection node T4N4, a resonator s19 is provided between the connection node T4N4 and the connection node T4N5, and a resonator s20 is provided between the connection node T4N5 and the connection node T4N6. The inductance value of the series inductor Ls4 can be set to 0.1nH-20nH.
[0061] The connecting node T4N2 is connected to a parallel resonant branch, and a resonator p13 may be provided on the parallel resonant branch; the connecting node T4N3 is connected to a parallel resonant branch, and a resonator p14 may be provided on the parallel resonant branch; the connecting node T4N4 is connected to a parallel resonant branch, and a resonator p15 may be provided on the parallel resonant branch; the connecting node T4N5 is connected to a parallel resonant branch, and a resonator p16 is provided on the parallel resonant branch.
[0062] Further, one end of the resonator p13 is connected to the connection node T4N2, and the other end of the resonator p13 is connected to the inductor L14, and the inductor L14 is connected to the ground potential; one end of the resonator p14 is connected to the connection node T4N3, and the other end of the resonator p14 is connected to the inductor L15, and the inductor L15 is connected to the ground potential; one end of the resonator p15 is connected to the connection node T4N4, and one end of the resonator p16 is connected to the connection node T4N5. After the resonator p15 and the resonator p16 are connected in parallel, they are connected to the common inductor L15, and the common inductor L15 is connected to the ground potential. Specifically, the inductance values of the inductor L13, the inductor L14 and the inductor L15 can be set to 0.1-10nH.
[0063] Optionally, an inductor L19 may be provided between the port B3RXP and the ground potential to match the impedance of the B3 receive filter 210 itself.
[0064] Those skilled in the art may further understand that the specific circuit structure of the quadplexer of the present invention is merely illustrative and should not be considered as a limitation on the specific circuit structure of the quadplexer of the present invention. The specific circuit structure of the quadplexer of the present invention may be modified in various ways without violating the limitations of the aforementioned block diagram description.
[0065] It should be further understood by those skilled in the art that, although each filter of the quadplexer in this embodiment adopts a 5-series-4-parallel structure, the circuit structure of each filter can be a transmitting filter with any order and topology, for example, it can be 4-series-4-parallel, 4-series-3-parallel, 3-series-2-parallel, or 3-series-4-parallel, etc., including any number of series resonant units and parallel resonant units. All these variations and combination schemes are within the scope of the present utility model. It is worth noting that 5-series-4-parallel, 4-series-3-parallel, 3-series-2-parallel, 3-series-4-parallel and 4-series-4-parallel are the circuit topological structures of the filter. For example, taking 5-series-4-parallel as an example, the filter represented by it includes 5 series resonators and 4 parallel resonators, and the 5 series resonators are connected in sequence, and the parallel resonators are connected in parallel to the connection nodes between two adjacent series resonators.
[0066] based on Figure 4 The circuit structure of the multiplexer shown in the figure is the circuit structure of the multiplexer of the first comparative example of the present invention, except that the series resistors Ls1 and Ls4 are removed, and the rest of the configurations are the same.
[0067] See also Figure 5 , Figure 5 Show Figure 4 The return loss curve comparison diagram of the circuit structure of the multiplexer shown in the figure and the circuit structure of the multiplexer in the first comparative example. Figure 4 The return loss curve of the multiplexer shown in FIG. 1 is a thin line indicating the return loss curve of the multiplexer in the first comparative example. Figure 5 It can be seen that in the multiplexer circuit structure provided by the present invention, the return loss performance of the B1 transmitting filter and the B3 receiving filter is improved by about 3-5 dB due to the addition of the series resistor Ls1 and the series resistor Ls4.
[0068] based on Figure 4 In the multiplexer circuit structure shown in the second comparative example of the present invention, the largest inductance value among the series resistors Ls1 and Ls4 is not set to be smaller than the smallest inductance value among the series inductor Ls2 and Ls3, and the other settings are the same.
[0069] See also Figure 6 , Figure 6 Show Figure 4 The return loss comparison diagram of the circuit structure of the multiplexer shown in FIG. 1 and the circuit structure of the multiplexer in the second comparative example. Figure 6 It can be seen that the passband mismatch of each filter of the multiplexer in the second comparative example is serious; and in the multiplexer circuit structure provided by the utility model, since the inductance values of the series resistors Ls1 and Ls4 satisfy the size relationship between the inductance values of the series inductors Ls2 and Ls3, each filter in the multiplexer provided by the utility model has better passband matching.
[0070] Furthermore, the quadplexer can be used in electronic devices, such as desktop computers, notebooks, smart phones, smart watches, wearable devices, Internet server intelligent voice systems, routers, automotive electronic devices, Internet of Things (IoT) devices, medical devices, etc.
[0071] The present invention is described above in conjunction with specific implementation schemes, but those skilled in the art should be aware that these descriptions are exemplary and are not intended to limit the scope of protection of the present invention. Those skilled in the art can make various modifications and variations to the present invention based on the spirit and principles of the present invention, and these modifications and variations are also within the scope of the present invention.
Claims
1. A quadplexer, characterized in that: include: a common port, a first filter, a second filter, a third filter, and a fourth filter; The first filter, the second filter, the third filter and the fourth filter each have a first end and a second end and a filter network composed of a plurality of series resonant branches and a plurality of parallel resonant branches between the first end and the second end; A first series inductor is arranged between the first end of the first filter and the series resonant branch closest to the common port in the first filter; A second series inductor is arranged between the first end of the second filter and the series resonant branch closest to the common port in the second filter; A third series inductor is arranged between the first end of the third filter and the series resonant branch closest to the common port in the third filter; A fourth series inductor is arranged between the first end of the fourth filter and the series resonant branch closest to the common port in the fourth filter.
2. The quadplexer according to claim 1, wherein: The inductance values of the first series inductor, the second series inductor, the third series inductor and the fourth series inductor are 0.1 nH-10 nH.
3. The quadplexer according to claim 1 or 2, wherein: The first filter has passbands of other filters adjacent to it on its low-frequency side of the passband, the fourth filter has passbands of other filters adjacent to it on its low-frequency side of the passband, and the gap between the passband of the first filter and the passbands of other filters adjacent to its low-frequency passband is smaller than the bandwidth of the passband of the first filter; the gap between the passband of the fourth filter and the passbands of other filters adjacent to its low-frequency passband is smaller than the bandwidth of the passband of the fourth filter.
4. The quadplexer according to claim 3, wherein: The maximum inductance value among the first series inductor and the fourth series inductor is smaller than the minimum inductance value among the second series inductor and the third series inductor.
5. The quadplexer according to claim 4, wherein: The series resonant branch closest to the common port in each filter is closer to the common port than all parallel resonant branches in each filter.
6. The quadplexer according to claim 5, wherein: A first matching circuit is provided between the common port and the ground to offset the capacitive characteristics of the plurality of filters as a whole.
7. The quadplexer according to any one of claims 1 to 2 and 4 to 6, characterized in that: A second matching circuit is provided between the second end of each filter and the ground.
8. The quadplexer according to claim 7, wherein: Each filter has a topology of 5 series and 4 parallel, 4 series and 3 parallel, 3 series and 2 parallel, 3 series and 4 parallel, and 4 series and 4 parallel.
9. The quadplexer according to any one of claims 1-2, 4-6, and 8, characterized in that: The first filter passband frequency range is a transmitting filter of 1920MHz to 1980MHz; the second filter passband frequency range is 2110MHz to 2170MHz; the third filter passband frequency range is 1710MHz to 1785MHz; the fourth filter passband frequency range is 1805MHz to 1880MHz.
10. A communication device, characterized in that: The communication device comprises the quadplexer according to any one of claims 1 to 9.