Hybrid packaging radio frequency module and electronic equipment thereof

Abstract

The utility model provides a hybrid packaging radio frequency module and an electronic device thereof, and the hybrid packaging radio frequency module comprises a substrate which is provided with a solder mask on the upper surface and comprises an opening for exposing a contact on the upper surface of the substrate; the at least one wafer-level packaging filter chip, the at least one bump filter and the at least one non-filter element chip are configured in the opening of the solder mask layer and are electrically connected with the contacts of the substrate, and a gap is formed between the at least one wafer-level packaging filter chip, the at least one bump filter and the at least one non-filter element chip and the upper surface of the substrate; the black film of a double-layer film structure is arranged above the substrate so as to cover the substrate, the at least one wafer level packaging filter chip, the at least one bump filter and the at least one non-filter element chip; a cavity structure exists between the at least one wafer level packaging filter chip, the at least one bump filter and the at least one non-filter element chip and the upper surface of the substrate, and the hardness of an inner layer film of the double-layer film structure is configured to be higher than that of an outer layer film.

Description

Technical Field

[0001] The utility model generally relates to chip packaging, and specifically relates to a hybrid packaged radio frequency module and an electronic device thereof. Background Art

[0002] In current communication systems, especially 5G systems, filter devices (e.g., surface acoustic wave filters) are widely used in RF front-end chip design. RF modules that include filter devices have high requirements for the packaging of filter devices. It is necessary to ensure that the functional sensor part of the filter device, that is, the surface of the interdigital transducer and resonator, has a clean cavity to ensure that it can work properly.

[0003] Currently, the packaging of filter devices is often in the form of WLP (wafer-level packaging) or CSP (conventional substrate packaging). For RF modules containing filter devices, traditional plastic packaging is often used to plasticize the WLP or CSP filter into the module substrate.

[0004] The existing CSP filter module packaging solution has the following disadvantages: 1) The filter components have a substrate, and the size and thickness are larger after secondary packaging; 2) The filter components have a substrate, and the cost is higher; 3) The filter components need to be packaged in advance, and the process cycle is longer; 4) The traditional plastic packaging process has high pressure, high stress, and poor reliability.

[0005] In addition, as the size of communication terminals tends to be increasingly miniaturized, it is necessary to package multiple or more different chips in the same packaging carrier to meet the requirements of mobile terminals for miniaturization. However, mixed packaging in the same packaging carrier will result in a large difference in the stress distribution on the carrier. In the current process, different chips need to be packaged using different process classifications (for example, by using an adapter board to package on the same packaging carrier). The above operation further increases the packaging cost. Therefore, a reliable packaging structure that can cope with complex stress conditions is needed. Utility Model Content

[0006] The utility model adopts a double-layer epoxy resin black film to mix and package the wafer-level packaged filter, the filter containing only bumps, and the non-filter components in a radio frequency module, thereby avoiding the problems of high stress, high cost, and low reliability caused by the use of CSP filters.

[0007] One aspect of the utility model provides a hybrid packaged radio frequency module, comprising: a substrate (package carrier), the upper surface of which is provided with a solder resist layer, the solder resist layer being provided with openings in the solder resist layer to expose contacts on the upper surface of the substrate; at least one wafer-level packaged filter chip, the wafer-level packaged filter chip being provided in the openings in the solder resist layer, and being electrically connected to contacts of the substrate through pins of the chip, and having a gap between the at least one wafer-level packaged filter chip and the upper surface of the substrate; at least one bump filter, the bump filter being provided in the openings in the solder resist layer, and being electrically connected to contacts of the substrate through bumps, and the at least one bump filter being electrically connected to contacts of the substrate There is a gap between the upper surfaces of the substrate; at least one non-filter component chip, which is arranged in the opening of the solder resist layer, and is electrically connected to the contacts of the substrate through the pins of the chip, and there is a gap between the at least one non-filter component chip and the upper surface of the substrate; a black film with a double-layer film structure, which is arranged above the substrate to cover the substrate, at least one wafer-level package filter chip, at least one bump filter and at least one non-filter component chip, so that there is a cavity structure between the at least one wafer-level package filter chip, at least one bump filter and at least one non-filter component chip and the upper surface of the substrate.

[0008] One aspect of the utility model provides a hybrid packaged radio frequency module, wherein the black film is configured as a double-layer epoxy resin film.

[0009] One aspect of the utility model provides a hybrid packaged radio frequency module, wherein the double-layer epoxy resin film is configured as two layers of epoxy resin films including materials with different thermal expansion coefficients.

[0010] One aspect of the utility model provides a hybrid packaged radio frequency module, wherein the hardness of the inner layer of the double-layer epoxy resin film is configured to be higher than the hardness of the outer layer film to reduce packaging stress.

[0011] One aspect of the utility model provides a hybrid packaged radio frequency module, wherein the solder resist layer is configured to include solder resist ink, DAF film, insulating tape, epoxy resin film, phenolic resin film, polyimide film or liquid crystal polymer film.

[0012] One aspect of the utility model provides a hybrid package radio frequency module, wherein the bumps are configured to include tinned copper pillars or pure tin balls.

[0013] One aspect of the present invention provides a hybrid packaged radio frequency module, wherein the non-filter component chip is configured to include at least one of a power amplifier, a low noise amplifier, and a radio frequency switch chip.

[0014] One aspect of the present invention provides a hybrid packaged radio frequency module, wherein the height of the cavity structure is configured to be within the range of 1-100 μm.

[0015] One aspect of the utility model provides a hybrid packaged radio frequency module, wherein the black film is configured to be bonded to a substrate, at least one wafer-level packaged filter chip, at least one bump filter, and at least one non-filter component chip through low pressure.

[0016] One aspect of the present invention provides an electronic device having a hybrid packaged radio frequency module according to any one of the above items. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic diagram showing a substrate packaging structure of a current filter packaging chip;

[0018] Figure 2 is a schematic diagram showing a hybrid packaged radio frequency module structure according to an embodiment of the utility model;

[0019] Figure 3 is a flow chart showing a chip packaging process according to an embodiment of the present utility model; and

[0020] Figure 4 It is a schematic diagram of the packaging formation process of the hybrid packaging RF module according to an embodiment of the utility model. DETAILED DESCRIPTION

[0021] Before proceeding to the following detailed description, it may be advantageous to set forth the definitions of certain words and phrases used throughout the utility model document. The terms "coupling", "connection" and their derivatives refer to any direct or indirect communication or connection between two or more elements, regardless of whether those elements are in physical contact with each other. The terms "transmission", "reception" and "communication" and their derivatives cover direct and indirect communication. The terms "include" and "comprising" and their derivatives refer to including but not limited to. The term "or" is inclusive, meaning and / or. The phrase "associated with..." and its derivatives refer to including, including within, interconnecting, containing, contained within, connecting or with...connecting, coupling or with...coupling, communicating with, cooperating, interweaving, parallel, approaching, binding or with...binding, having, having attributes, having a relationship or with...having a relationship, etc. The term "controller" refers to any device, system or part thereof that controls at least one operation. Such a controller can be implemented with hardware, or a combination of hardware and software and / or firmware. The functions associated with any particular controller can be centralized or distributed, whether local or remote. The phrase "at least one of", when used with a list of items, means that different combinations of one or more of the listed items may be used, and only one of the items in the list may be required. For example, "at least one of A, B, C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0022] Definitions for other specific words and phrases are provided throughout this document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0023] In the present utility model document, the application combination of modules and the division level of sub-modules are only used for illustration, and the application combination of modules and the division level of sub-modules may have different modes without departing from the scope of the present disclosure.

[0024] Figure 1 Schematic diagram showing the substrate packaging structure of the current filter packaging chip. Figure 1 As shown, in order to ensure that there are cavities on the surfaces of the structures such as the interdigital transducer and the resonator under the filter chip to ensure that they can work normally, a dam needs to be formed above the solder mask layer of the carrier board to prevent the packaging material used for packaging from penetrating into the cavity at the bottom of the chip. However, when forming the dam above the solder mask layer, it is necessary to additionally consider the parameters of the dam, and an additional process is required to control the shape of the dam during the manufacturing process of the dam, thereby increasing the cost of the package.

[0025] If packaging is performed simply using ordinary molding compounds (e.g., powdered or columnar molding compounds) without forming a dam, the penetration of the molding compounds cannot be avoided. In addition, when multiple chips are packaged on the same packaging substrate, different chips will generate different stresses on the packaging substrate, resulting in a more complex stress distribution of the entire packaging module. Ordinary molding materials will not be able to guarantee stress release and the integrity of the cavity structure when facing mixed packaging scenarios.

[0026] Figure 2 It is a schematic diagram showing the structure of a hybrid packaged radio frequency module according to an embodiment of the utility model.

[0027] like Figure 2 As shown, a solder resist layer is arranged on a substrate (package carrier), wherein the solder resist layer has a plurality of solder resist openings for soldering contacts of the substrate and filter chips and non-filter components.

[0028] The filter chip includes a wafer-level packaged filter chip and a filter chip containing only bumps (bump filters). The wafer-level packaged filter chip has an internal cavity for an interdigital transducer and a resonator.

[0029] Among them, the non-filter component can be configured as a chip of a power amplifier, a low noise amplifier, a radio frequency switch, or can also be other types of components.

[0030] Among them, the solder resist layer may be configured as a part of the substrate, and it is configured to include solder resist ink, DAF film, insulating tape, epoxy resin film, phenolic resin film, polyimide film or liquid crystal polymer film.

[0031] In the opening of the solder resist layer, contacts are arranged for forming electrical connections between the pins of the wafer-level package filter and the non-filter components and the substrate, and for generating electrical connections between the bumps of the bump filter and the substrate. According to an embodiment of the utility model, the pins can be electrically welded to the contacts through solder. According to an embodiment of the utility model, the bumps can be formed by metal materials, for example, copper pillars with tin or pure tin balls.

[0032] According to an embodiment of the present invention, the solder resist layer is configured to have a plurality of openings, and a wafer-level package filter, a bump filter or a non-filter component is configured in each opening.

[0033] The wafer-level packaged filter and non-filter components are connected to the substrate by means of surface mounting technology, and are electrically connected to the substrate through their chip pins, wherein a gap structure exists between the wafer-level packaged filter and non-filter components and the upper surface of the substrate, and the height of the gap structure is configured to be within the range of 1-100 μm.

[0034] The bump filter is connected to the substrate by surface mounting technology, wherein there is a gap structure between the bump filter chip and the upper surface of the substrate for arranging the interdigital transducer arranged at the bottom of the filter chip, wherein the height of the gap structure is configured to be within the range of 1-100 μm.

[0035] A double layer of epoxy resin black film is arranged above the filter chip and the non-filter components. The black film is adhered to the filter chip and the non-filter components through a low-pressure process and cured at high temperature to seal and protect the filter chip and the non-filter components.

[0036] The outer layer of the double-layer epoxy resin film is relatively soft, has good fluidity, and is easy to flow and fit as a whole. The inner layer is relatively hard, and contact with the chip can reduce packaging stress and achieve better reliability. The double-layer epoxy resin film meets the fluidity and hardness requirements of the outer and inner layers by doping fillers. According to an embodiment of the utility model, the inner and outer layers of the double-layer epoxy resin film are preferably configured to have a thickness of 120 μm respectively.

[0037] In addition, the black film is configured as a double-layer epoxy resin film, which is two layers of materials with different thermal expansion coefficients to match its intended functions, wherein the outer layer of the double-layer epoxy resin film is configured to have a larger thermal expansion coefficient than the inner layer.

[0038] According to an embodiment of the present invention, the substrate is configured as a resin substrate and includes a multi-layer metal wiring to achieve electrical connection between the packaged multiple chips and the outside of the substrate.

[0039] Figure 2 The package structure formed based on the embedded substrate process according to the embodiment of the utility model is shown. However, the above embodiment is only used for example, and those skilled in the art may also make corresponding modifications to it without departing from the scope of the utility model. For example, the pins of the wafer-level package filter and non-filter components may also be connected to the substrate contacts through pure tin bumps.

[0040] Figure 3 is a flow chart showing a chip packaging process according to an embodiment of the present utility model; and Figure 4 It is a schematic diagram of the packaging formation process of the hybrid packaging RF module according to an embodiment of the utility model.

[0041] refer to Figure 3 In step S201, a substrate is provided, and at least one SAW filter chip with bumps, at least one wafer-level packaged filter chip, and at least one non-filter component chip with bumps are provided.

[0042] In step S202, different components are flip-chip soldered onto a carrier by surface mount technology (SMT). After the different components are flip-chip soldered onto the substrate, a gap structure exists between the lower surface of the component and the upper surface of the substrate, and the height of the gap structure is configured to be within the range of 1-100 μm.

[0043] At step S203, a double-layer epoxy resin black film is pressed and affixed to a carrier board containing different components, and a cavity structure is formed under the different components. Since a variety of different types of chips are packaged, it is necessary to consider the different stress requirements of different types of chips. In addition, the chips that need to be packaged include SAW filter chips that only have bumps. The overall stress of the chip structure of the hybrid package is relatively large, and low-pressure bonding is required to balance the packaging stress. Therefore, it is necessary to consider materials that can be low-pressure bonded to ensure that the required cavity structure is formed under the bump filter. Through the double-layer film structure, the packaging of the hybrid chip is achieved without the need for an additional adapter plate.

[0044] According to the embodiment of the utility model, the black film is configured as a double-layer epoxy resin film, which is two layers of materials with different thermal expansion coefficients to match the functions to be achieved. Among them, the outer layer of the double-layer epoxy resin film is softer, has better fluidity, and is easy to flow and fit as a whole, while the inner layer is harder and can reduce packaging stress when in contact with the chip, achieving better reliability effects.

[0045] According to an embodiment of the utility model, the double-layer epoxy resin film is configured to adjust its fluidity and expansion coefficient by impurity filling. For example, the outer epoxy resin film and the inner epoxy resin film are filled with different filling coefficients so that the hardness of the outer film is lower than the hardness of the inner film.

[0046] For devices with different packaging forms, a low-pressure plastic sealing process is used with a double-layer epoxy resin black film, which can greatly reduce the plastic sealing pressure in the traditional packaging process, from about 6MPa to 0.2MPa, improve the mechanical strength of the bumps, and improve the reliability of the overall module structure. Among them, since the filter chip of the wafer-level package itself has completed the wafer-level packaging, its interdigital transducer surface already has a cavity structure, and whether to perform wafer-level packaging can be decided based on the actual product performance requirements. The interdigital transducer of the bump filter needs to form a cavity with the substrate and the double-layer epoxy resin black film, which has met the performance requirements and low cost requirements.

[0047] In step S204, high temperature baking is performed to solidify the double-layer epoxy resin black film, wherein the solidification temperature is configured to be 100-150° C., and the solidification time is configured to be 3 hours at 150° C.

[0048] In step S205 , laser marking and cutting processes are performed to complete the packaging of the module chip.

[0049] According to the embodiments of the utility model, a double-layer epoxy resin black film is used to replace the structure of the traditional plastic packaging process, thereby greatly reducing the packaging stress; a wafer-level packaging filter and a filter package containing only bumps are used to replace the CSP package, thereby overcoming the shortcomings of high stress and poor reliability, and enhancing the flexibility of design; a related RF module is formed by a mixed package including at least one wafer-level package, at least one bump filter, and at least one non-filter element, so that the reliability of the module is enhanced and the integration is further increased; in addition, through black film bonding and packaging, the bottom of all devices are cavities, so as to ensure that the filter chip meets and complies with the performance requirements and realizes the low cost requirements.

[0050] The utility model also provides an electronic device, including the above-mentioned hybrid packaging RF module packaging structure. By adopting the packaging structure, different types of chips are packaged through a black film with a double-layer epoxy resin film, which improves the overall flow fit while reducing the packaging stress, thereby reducing the process cost and improving product reliability and production efficiency.

[0051] Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. The present disclosure is intended to encompass such changes and modifications as fall within the scope of the appended claims.

[0052] Any description in the utility model should not be understood as implying that any particular element, step or function is an essential element that must be included in the scope of the claims. The scope of the utility model subject matter is limited only by the claims.

Claims

1. A hybrid package radio frequency module, characterized in that: include: A substrate having an upper surface thereof configured with a solder resist layer, wherein the solder resist layer is configured with openings in the solder resist layer to expose contacts on the upper surface of the substrate; At least one wafer-level packaged filter chip, the wafer-level packaged filter chip is arranged in the opening of the solder resist layer, is electrically connected to the contacts of the substrate through the pins of the chip, and has a gap between the at least one wafer-level packaged filter chip and the upper surface of the substrate; At least one bump filter, the bump filter is arranged in the opening of the solder resist layer, is electrically connected to the contact of the substrate through the bump, and has a gap between the at least one bump filter and the upper surface of the substrate; At least one non-filter component chip, the non-filter component chip is arranged in the opening of the solder resist layer, is electrically connected to the contacts of the substrate through the pins of the chip, and has a gap between the at least one non-filter component chip and the upper surface of the substrate; A black film with a double-layer film structure is arranged above a substrate to cover the substrate, at least one wafer-level package filter chip, at least one bump filter and at least one non-filter element chip, so that a cavity structure exists between at least one wafer-level package filter chip, at least one bump filter and at least one non-filter element chip and the upper surface of the substrate, wherein the hardness of the inner film of the double-layer film structure is configured to be higher than the hardness of the outer film.

2. The hybrid package radio frequency module according to claim 1, characterized in that: The black film is configured as a double-layer epoxy resin film.

3. The hybrid package RF module according to claim 2, characterized in that: The double-layer epoxy resin film is configured as two layers of epoxy resin films including materials having different thermal expansion coefficients.

4. The hybrid package radio frequency module according to claim 1, characterized in that: The thickness of the inner film of the double-layer film structure was configured to be 120 μm, and the thickness of the outer film of the double-layer film structure was configured to be 120 μm.

5. The hybrid package radio frequency module according to claim 1, characterized in that: The solder resist layer is configured to include solder resist ink, a DAF film, an insulating tape, an epoxy resin film, a phenolic resin film, a polyimide film, or a liquid crystal polymer film.

6. The hybrid package radio frequency module according to claim 1, characterized in that: The bumps are configured to include copper pillars with tin or pure tin balls.

7. The hybrid package radio frequency module according to claim 1, characterized in that: The non-filter component chip is configured as at least one of a chip including a power amplifier, a low noise amplifier, and a radio frequency switch.

8. The hybrid package radio frequency module according to claim 1, characterized in that: The height of the cavity structure is configured to be in the range of 1-100 μm.

9. The hybrid package radio frequency module according to claim 1, characterized in that: The black film is configured to be bonded to a substrate, at least one wafer-level package filter chip, at least one bump filter, and at least one non-filter element chip by a low pressure of 0.2 MPa.

10. An electronic device, characterized in that: A hybrid packaged radio frequency module according to any one of claims 1-9.

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