Optical fiber link circuit based on high-capacity FPGA

By designing a optical fiber link circuit based on a large -capacity FPGA, including the 24th route parallel light launch module, the 24th road parallel light receiving module, the 12 -line parallel light transceiver module, and the power supply module, the existing technology cannot meet the multi -link The problem of optical fiber data transmission achieves faster transmission rates and more data transmission.

CN222423683UActive Publication Date: 2025-01-28ZHEJIANG TIANHONG WAVE CONTROL ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202420880621.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-25
Publication Date
2025-01-28
Estimated Expiration
2034-04-25

AI Technical Summary

Technical Problem

The existing FPGA fiber optic link modules are mainly optical transceiver and receive integrated modules, which cannot meet the fiber optic data transmission requirements of multiple links, and the transmission rate and data capacity are limited.

Method used

Designed a optical fiber link circuit based on a large -capacity FPGA, including the 24th route parallel light launch module, the 24th route parallel light receiving module, the 12 -line parallel light receiving all -in -one module, and the power supply module. Fiber data transmission.

Benefits of technology

A faster transmission rate and more data transmission are achieved, and the multi -link fiber optic data transmission needs of FPGA chips are met.

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Abstract

The utility model discloses an optical fiber link circuit based on a large-capacity FPGA, which comprises a 24-path parallel light emitting module D89, a 24-path parallel light receiving module D90, a 12-path parallel light receiving and transmitting integrated module D91 and a power supply module, and a 24-path emitting pin of the 24-path parallel light emitting module D89 is used for converting a high-speed signal of an FPGA chip into an optical signal and emitting the optical signal. According to the optical fiber link circuit based on the large-capacity FPGA disclosed by the utility model, linkage is carried out through the 24-path parallel light emitting module D89, the 24-path parallel light receiving module D90, the 12-path parallel light receiving and transmitting integrated module D91 and the power supply module, so that starting of each module is selected according to requirements, and multi-link optical fiber data transmission of an FPGA chip is met; therefore, the method has the advantages of higher transmission rate, more transmission data and the like.
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Description

Technical Field

[0001] The utility model belongs to the technical field of FPGA optical fiber transmission, and in particular relates to an optical fiber link circuit based on a large-capacity FPGA. Background Art

[0002] Based on the continuous changes in market requirements and design concepts, the capacity requirements for FPGA boards are becoming larger and larger. As a result, the design requirements for various parts of FPGA boards are constantly increasing. Many existing optical fiber links for FPGAs only have optical transceiver modules, which have limited optical fiber receiving and transmitting links and cannot meet the requirements of multi-link optical fiber data transmission.

[0003] Therefore, further improvements are made to the above problems. Utility Model Content

[0004] The main purpose of the utility model is to provide a fiber optic link circuit based on a large-capacity FPGA, which is linked by a 24-channel parallel optical transmitting module D89, a 24-channel parallel optical receiving module D90, a 12-channel parallel optical transceiver integrated module D91 and a power supply module, so that each module can be enabled according to demand, thereby meeting the multi-link optical fiber data transmission of the FPGA chip, thereby having the advantages of faster transmission rate, more transmission data, etc.

[0005] To achieve the above purpose, the utility model provides a fiber link circuit based on a large-capacity FPGA, including a 24-way parallel optical transmitter module D89, a 24-way parallel optical receiver module D90, a 12-way parallel optical transceiver integrated module D91 and a power supply module, wherein:

[0006] The 24 transmitting pins (a total of 24, each corresponding to two pins) of the 24-way parallel optical transmitting module D89 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it;

[0007] The 24 receiving pins (a total of 24, each corresponding to two pins) of the 24-way parallel optical receiving module D90 are used to receive external optical fiber information and transmit it to the FPGA chip;

[0008] The 12 transmitting pins (a total of 12, each corresponding to two pins) of the 12-way parallel optical transceiver integrated module D91 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it, and the 12 receiving pins (a total of 12, each corresponding to two pins) of the 12-way parallel optical transceiver integrated module D91 are used to receive external optical fiber information and transmit it to the FPGA chip;

[0009] The power supply module includes a first power supply unit, a second power supply unit, a third power supply unit and a fourth power supply unit. The first power supply unit is electrically connected to the 24-way parallel optical transmitting module D89, the second power supply unit is electrically connected to the 24-way parallel optical receiving module D90, and the third power supply unit and the fourth power supply unit are electrically connected to the 12-way parallel optical transceiver module D91 respectively.

[0010] As a further preferred technical solution of the above technical solution, the first power supply unit includes a magnetic bead L2, the first end of the magnetic bead L2 is connected to the input power supply end and the second end of the magnetic bead L2 is connected to the first output power supply end (F1_VCCT3.3), and the second end of the magnetic bead L2 is grounded through capacitor C1252, capacitor C1256, capacitor C1260, capacitor C1264, capacitor C1268 and capacitor C1272 respectively.

[0011] As a further preferred technical solution of the above technical solution, the second power supply unit includes a magnetic bead L3, the first end of the magnetic bead L3 is connected to the input power supply terminal and the second end of the magnetic bead L3 is connected to the second output power supply terminal (F2_VCCR3.3), and the second end of the magnetic bead L3 is grounded through capacitor C1253, capacitor C1257, capacitor C1261, capacitor C1265, capacitor C1269 and capacitor C1273 respectively.

[0012] As a further preferred technical solution of the above technical solution, the third power supply unit includes a magnetic bead L4, a first end of the magnetic bead L4 is connected to the input power supply terminal and a second end of the magnetic bead L4 is connected to the third output power supply terminal (F3_VCCR3.3), and the second end of the magnetic bead L4 is grounded through capacitor C1254, capacitor C1258, capacitor C1262, capacitor C1266, capacitor C1270 and capacitor C1274 respectively;

[0013] The fourth power supply unit includes a magnetic bead L5, a first end of the magnetic bead L5 is connected to the input power supply terminal and a second end of the magnetic bead L5 is connected to the fourth output power supply terminal (F3_VCCT3.3), and the second end of the magnetic bead L5 is grounded through capacitor C1255, capacitor C1259, capacitor C1263, capacitor C1267, capacitor C1271 and capacitor C1275.

[0014] As a further preferred technical solution of the above technical solution, the first output power supply terminal is electrically connected to the power supply terminal of the 24-way parallel optical transmitting module D89; the second output power supply terminal is electrically connected to the power supply terminal of the 24-way parallel optical receiving module D90; the third output power supply terminal is electrically connected to the receiving power supply terminal of the 12-way parallel optical transceiver module D91; the fourth output power supply terminal is electrically connected to the transmitting power supply terminal of the 12-way parallel optical transceiver module D91. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The utility model discloses a circuit diagram of a 24-channel parallel optical transmission module of an optical fiber link circuit based on a large-capacity FPGA.

[0016] Figure 2 The utility model discloses a circuit diagram of a 24-channel parallel optical receiving module of an optical fiber link circuit based on a large-capacity FPGA.

[0017] Figure 3 The utility model discloses a circuit diagram of a 12-channel parallel optical transceiver integrated module of an optical fiber link circuit based on a large-capacity FPGA.

[0018] Figure 4 The utility model discloses a circuit diagram of a power supply module of an optical fiber link circuit based on a large-capacity FPGA. DETAILED DESCRIPTION

[0019] The following description is used to disclose the utility model so that those skilled in the art can implement the utility model. The preferred embodiments described below are only examples, and those skilled in the art can think of other obvious variations. The basic principles of the utility model defined in the following description can be applied to other embodiments, variations, improvements, equivalents, and other technical solutions that do not deviate from the spirit and scope of the utility model.

[0020] The utility model discloses an optical fiber link circuit based on a large-capacity FPGA. The specific embodiments of the utility model are further described below in conjunction with preferred embodiments.

[0021] In the embodiments of the present invention, those skilled in the art note that the FPGA chip and the like involved in the present invention may be regarded as prior art.

[0022] Preferred embodiments.

[0023] like Figure 1-4 As shown, the utility model discloses a fiber link circuit based on a large-capacity FPGA, including a 24-channel parallel optical transmitter module D89, a 24-channel parallel optical receiver module D90, a 12-channel parallel optical transceiver integrated module D91 and a power supply module, wherein:

[0024] The 24 transmitting pins (a total of 24, each corresponding to two pins) of the 24-way parallel optical transmitting module D89 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it;

[0025] The 24 receiving pins (a total of 24, each corresponding to two pins) of the 24-way parallel optical receiving module D90 are used to receive external optical fiber information and transmit it to the FPGA chip;

[0026] The 12 transmitting pins (a total of 12, each corresponding to two pins) of the 12-way parallel optical transceiver integrated module D91 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it, and the 12 receiving pins (a total of 12, each corresponding to two pins) of the 12-way parallel optical transceiver integrated module D91 are used to receive external optical fiber information and transmit it to the FPGA chip;

[0027] The power supply module includes a first power supply unit, a second power supply unit, a third power supply unit and a fourth power supply unit. The first power supply unit is electrically connected to the 24-way parallel optical transmitting module D89, the second power supply unit is electrically connected to the 24-way parallel optical receiving module D90, and the third power supply unit and the fourth power supply unit are electrically connected to the 12-way parallel optical transceiver module D91 respectively.

[0028] Specifically, the first power supply unit includes a magnetic bead L2, a first end of the magnetic bead L2 is connected to the input power supply end and a second end of the magnetic bead L2 is connected to the first output power supply end (F1_VCCT3.3), and the second end of the magnetic bead L2 is grounded through capacitor C1252, capacitor C1256, capacitor C1260, capacitor C1264, capacitor C1268 and capacitor C1272 (capacitors are used for filtering).

[0029] More specifically, the second power supply unit includes a magnetic bead L3, a first end of the magnetic bead L3 is connected to the input power terminal and a second end of the magnetic bead L3 is connected to the second output power terminal (F2_VCCR3.3), and the second end of the magnetic bead L3 is grounded through capacitor C1253, capacitor C1257, capacitor C1261, capacitor C1265, capacitor C1269 and capacitor C1273 (capacitors for filtering).

[0030] Furthermore, the third power supply unit includes a magnetic bead L4, a first end of the magnetic bead L4 is connected to the input power supply terminal and a second end of the magnetic bead L4 is connected to the third output power supply terminal (F3_VCCR3.3), and the second end of the magnetic bead L4 is grounded through capacitor C1254, capacitor C1258, capacitor C1262, capacitor C1266, capacitor C1270 and capacitor C1274 (capacitors are used for filtering).

[0031] The fourth power supply unit includes a magnetic bead L5, a first end of the magnetic bead L5 is connected to the input power supply terminal and a second end of the magnetic bead L5 is connected to the fourth output power supply terminal (F3_VCCT3.3), and the second end of the magnetic bead L5 is grounded through capacitor C1255, capacitor C1259, capacitor C1263, capacitor C1267, capacitor C1271 and capacitor C1275 (capacitors are used for filtering).

[0032] Furthermore, the first output power terminal is electrically connected to the power supply terminal of the 24-way parallel optical transmitting module D89; the second output power terminal is electrically connected to the power supply terminal of the 24-way parallel optical receiving module D90; the third output power terminal is electrically connected to the receiving power supply terminal of the 12-way parallel optical transceiver module D91; and the fourth output power terminal is electrically connected to the transmitting power supply terminal of the 12-way parallel optical transceiver module D91.

[0033] For the utility model, if the optical fiber link required by the FPGA chip does not exceed 12 channels, the 12-channel parallel optical transceiver module D91 can be used for operation. If the optical fiber link required by the FPGA chip exceeds 12 channels, the 24-channel parallel optical transmitter module D89 and the 24-channel parallel optical receiver module D90 need to be started to work, so as to realize multi-link optical fiber data transmission, which has the advantages of faster transmission rate and more transmission data.

[0034] For D89 HTG8533 24-channel parallel optical transmitter module, it is a high-performance press-fit 24-channel parallel optical transmitter module for very short distance parallel multi-channel optical interconnection data communication. The central wavelength of the module is 850nm, powered by a single 3.30V power supply, and the single-channel transmission rate is 25.78125Gbps;

[0035] For the D90 HTG8534 24-channel parallel optical receiver module, HTG8534A-MH-DA8YY is a high-performance press-fit 24-channel parallel optical receiver module for very short-distance parallel multi-channel optical interconnect data communication. The module has a central wavelength of 850nm, a single 3.30V power supply, and a single-channel transmission rate of 25.78125Gbps;

[0036] For D91 HTG8532 12-channel parallel optical transceiver module, HTG8532A-MD-DA8YY is a high-performance press-fit 12-channel parallel optical transceiver module for very short distance parallel multi-channel optical interconnect data communication. The central wavelength of the module is 850nm, powered by a single 3.30V power supply, and the single-channel transmission rate is 25.78125Gbps.

[0037] It is worth mentioning that the technical features such as FPGA chips involved in this utility model patent application should be regarded as prior art. The specific structure, working principle and possible control method and spatial layout method of these technical features can be selected according to the conventional methods in the field, and should not be regarded as the invention point of this utility model patent. This utility model patent will not be further elaborated.

[0038] For those skilled in the art, it is still possible to modify the technical solutions described in the aforementioned embodiments, or to make equivalent substitutions for some of the technical features therein. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present utility model should be included in the protection scope of the present utility model.

Claims

1. A fiber link circuit based on a large-capacity FPGA, characterized in that: It includes a 24-channel parallel optical transmitter module D89, a 24-channel parallel optical receiver module D90, a 12-channel parallel optical transceiver integrated module D91 and a power supply module, wherein: The 24-way transmitting pins of the 24-way parallel optical transmitting module D89 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it; The 24 receiving pins of the 24-channel parallel optical receiving module D90 are used to receive external optical fiber information and transmit it to the FPGA chip; The 12-way transmitting pins of the 12-way parallel optical transceiver integrated module D91 are used to convert the high-speed signal of the FPGA chip into an optical signal and transmit it, and the 12-way receiving pins of the 12-way parallel optical transceiver integrated module D91 are used to receive external optical fiber information and transmit it to the FPGA chip; The power supply module includes a first power supply unit, a second power supply unit, a third power supply unit and a fourth power supply unit. The first power supply unit is electrically connected to the 24-way parallel optical transmitting module D89, the second power supply unit is electrically connected to the 24-way parallel optical receiving module D90, and the third power supply unit and the fourth power supply unit are electrically connected to the 12-way parallel optical transceiver module D91 respectively.

2. The optical fiber link circuit based on a large-capacity FPGA according to claim 1, characterized in that: The first power supply unit includes a magnetic bead L2, a first end of the magnetic bead L2 is connected to the input power end and a second end of the magnetic bead L2 is connected to the first output power end, and the second end of the magnetic bead L2 is grounded through capacitor C1252, capacitor C1256, capacitor C1260, capacitor C1264, capacitor C1268 and capacitor C1272 respectively.

3. The optical fiber link circuit based on a large-capacity FPGA according to claim 2, characterized in that: The second power supply unit includes a magnetic bead L3, a first end of the magnetic bead L3 is connected to the input power supply end and a second end of the magnetic bead L3 is connected to the second output power supply end, and the second end of the magnetic bead L3 is grounded through capacitor C1253, capacitor C1257, capacitor C1261, capacitor C1265, capacitor C1269 and capacitor C1273 respectively.

4. The optical fiber link circuit based on a large-capacity FPGA according to claim 3, characterized in that: The third power supply unit includes a magnetic bead L4, a first end of the magnetic bead L4 is connected to the input power supply end and a second end of the magnetic bead L4 is connected to the third output power supply end, and the second end of the magnetic bead L4 is grounded through capacitor C1254, capacitor C1258, capacitor C1262, capacitor C1266, capacitor C1270 and capacitor C1274 respectively; The fourth power supply unit includes a magnetic bead L5, a first end of the magnetic bead L5 is connected to the input power supply terminal and a second end of the magnetic bead L5 is connected to the fourth output power supply terminal, and the second end of the magnetic bead L5 is grounded through capacitor C1255, capacitor C1259, capacitor C1263, capacitor C1267, capacitor C1271 and capacitor C1275 respectively.

5. The optical fiber link circuit based on a large-capacity FPGA according to claim 4, characterized in that: The first output power terminal is electrically connected to the power supply terminal of the 24-way parallel optical transmitting module D89; the second output power terminal is electrically connected to the power supply terminal of the 24-way parallel optical receiving module D90; the third output power terminal is electrically connected to the receiving power supply terminal of the 12-way parallel optical transceiver module D91; the fourth output power terminal is electrically connected to the transmitting power supply terminal of the 12-way parallel optical transceiver module D91.