Analog circuit for inhibiting ISI in millimeter wave CMOS TX channel

Abstract

The utility model discloses an analog circuit for inhibiting ISI in a millimeter wave CMOS TX channel. The analog circuit comprises a first compensation module, a second compensation module and a TX link, the second compensation module, the first compensation module and the TX link are electrically connected in sequence; the first compensation module is used for controlling a switch of a TX link so as to reduce interference between symbols; and the second compensation module is used for dynamically compensating the frequency spectrum response of the channel so as to realize flatter broadband response. By implementing the millimeter wave CMOS TX, the signal quality of the millimeter wave CMOS TX is further improved, and a technical foundation is laid for realizing ultra-high order modulation.

Description

Technical Field

[0001] The utility model relates to the technical field of anti-interference, in particular to an analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel. Background Art

[0002] Inter-symbol interference (ISI) causes noise to be superimposed in the time domain, degrading the signal-to-noise ratio (SNR), and further deteriorating linearity, EVM, and other indicators. Therefore, how to suppress ISI is a very important issue.

[0003] In high-speed SerDes (SerDes), there are relatively mature solutions for mitigating ISI, including CTLE and DFE architectures. However, these technologies have yet to be applied in millimeter-wave CMOS TX channels. The conflict between increasing communication capacity and limited spectrum resources has led to increasingly higher signal modulation orders, placing higher demands on CMOS EVM. Therefore, ISI mitigation has become a key issue in CMOS TX channel design. It is important to note that in the field of millimeter-wave CMOS TX design, most current solutions do not consider ISI mitigation. This is primarily because spectrum shortages in the millimeter-wave band are not as severe as in lower frequency bands. However, as communication capacity continues to expand, spectrum resources in the millimeter-wave band will eventually become scarce, necessitating the adoption of higher-order modulation technologies. Therefore, mitigating ISI intersymbol interference (ISI) remains a key research issue in millimeter-wave TX. Utility Model Content

[0004] As communication capacity continues to expand, spectrum resources in the millimeter wave band will eventually become scarce. However, there is currently no effective solution to suppress inter-symbol interference (ISI) in millimeter wave TX.

[0005] To address the above issues, an analog circuit for suppressing ISI in millimeter-wave CMOS TX channels is proposed. A first compensation module is set to control the switch of the TX link to reduce interference between signal symbols. A second compensation module is set to dynamically compensate the channel's spectral response to achieve a flatter broadband response. This further improves the signal quality (SNR, linearity, EVM, and other indicators) of millimeter-wave CMOS TX and lays the technical foundation for realizing ultra-high-order modulation (such as 1024QAM).

[0006] An analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel, comprising:

[0007] a first compensation module;

[0008] a second compensation module;

[0009] TX link;

[0010] The second compensation module, the first compensation module, and the TX link are electrically connected in sequence;

[0011] The second compensation module is used to dynamically compensate the spectral response of the channel to achieve a flatter broadband response;

[0012] The first compensation module is used to control the switch of the TX link to reduce interference between signal symbols.

[0013] In conjunction with the analog circuit for suppressing ISI in the millimeter-wave CMOS TX channel described in the present invention, in a first possible implementation manner, the first compensation module includes:

[0014] signal slope detector;

[0015] Comparator;

[0016] The signal slope detector is electrically connected to the first input terminal of the comparator, and the second input terminal of the comparator is used to input a set threshold;

[0017] The signal slope detector is used to detect the slope information of the rising edge or falling edge of the signal and transmit it to the comparator;

[0018] The comparator is used to compare the slope value of the rising edge or falling edge of the signal with a set threshold value, and output an electrical signal according to the comparison result.

[0019] In combination with the first possible implementation manner of the present invention, in a second possible implementation manner, the first compensation module further includes:

[0020] Switch unit;

[0021] The positive output terminal and the negative output terminal of the switch unit are electrically connected;

[0022] The output end of the comparator is electrically connected to the input end of the switch unit, and is used to control the switch unit according to the electrical signal.

[0023] If the slope value is lower than the set threshold, the switch unit is controlled to disconnect the TX link in a specified period.

[0024] In conjunction with the analog circuit for suppressing ISI in the millimeter-wave CMOS TX channel described in the present invention, in a third possible implementation, the second compensation module includes:

[0025] First MOS tube;

[0026] Second MOS tube;

[0027] a first capacitor;

[0028] First inductor;

[0029] Second inductor;

[0030] The third inductor;

[0031] The drain of the first MOS transistor and the drain of the second MOS transistor are electrically connected to the first end and the positive output end of the first inductor, and the first end and the negative output end of the second inductor respectively;

[0032] The source of the first MOS transistor and the source of the second MOS transistor are electrically connected to the first end and the second end of the first capacitor respectively and are grounded;

[0033] The second end of the first inductor and the second end of the second inductor are electrically connected to the first end and the second end of the third inductor respectively;

[0034] The gate of the first MOS transistor and the gate of the second MOS transistor are connected to the positive input terminal and the negative input terminal of the signal respectively.

[0035] In combination with the second possible implementation manner of the present invention, in a fourth possible implementation manner, the switch unit includes:

[0036] A third MOS tube, a fourth MOS tube, a fifth MOS tube, and a sixth MOS tube;

[0037] The drain of the third MOS tube and the drain of the fourth MOS tube are connected to the positive output end;

[0038] The source of the third MOS tube and the source of the fourth MOS tube are grounded;

[0039] The gate of the third MOS transistor and the gate of the fourth MOS transistor are electrically connected to the output end of the comparator;

[0040] The source of the fifth MOS transistor and the source of the sixth MOS transistor are electrically connected to the output end of the comparator and are grounded;

[0041] The gate of the fifth MOS transistor is electrically connected to the positive output terminal and the drain of the sixth MOS transistor;

[0042] The gate of the sixth MOS transistor is electrically connected to the negative output terminal and the drain of the fifth MOS transistor.

[0043] In combination with the fourth possible implementation manner of the present invention, in a fifth possible implementation manner, the prescribed period is one tenth of the signal period.

[0044] In conjunction with the analog circuit for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention, in a sixth possible implementation, the TX link includes:

[0045] a first signal isolator;

[0046] Gain amplifier;

[0047] a second signal isolator;

[0048] Power amplifier;

[0049] a third signal isolator;

[0050] RF antenna;

[0051] The first signal isolator, the gain amplifier, the second signal isolator, the power amplifier, the third signal isolator, and the radio frequency antenna are electrically connected in sequence.

[0052] The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel described in the present invention implements a first compensation module to control the switch of the TX link to reduce interference between signal symbols. A second compensation module is provided to dynamically compensate the channel's spectral response to achieve a flatter broadband response. This further improves the signal quality (indicators such as signal-to-noise ratio, linearity, and EVM) of the millimeter-wave CMOS TX and lays a technical foundation for implementing ultra-high-order modulation (such as 1024QAM). BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0054] Figure 1 This is a schematic diagram of the connection of the analog circuit module for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention;

[0055] Figure 2 This is a schematic diagram of the analog circuit structure connection for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention;

[0056] Figure 3 This is a schematic diagram of the circuit structure connection of the second compensation module in the present invention;

[0057] Figure 4 This is a schematic diagram of the circuit structure connection of the first compensation module in the present invention;

[0058] Figure 5 This is a schematic diagram of the signal waveform in the present invention. DETAILED DESCRIPTION

[0059] The following is a clear and complete description of the technical solutions of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, other embodiments obtained by ordinary technicians in this field without creative work are all within the scope of protection of the present invention.

[0060] Unless otherwise defined, all technical and scientific terms used herein have the same meanings as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0061] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0062] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0063] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0064] As communication capacity continues to expand, spectrum resources in the millimeter wave band will eventually become scarce. However, there is currently no effective solution to suppress inter-symbol interference (ISI) in millimeter wave TX.

[0065] To solve the above problems, an analog circuit for suppressing ISI in millimeter-wave CMOS TX channel is proposed.

[0066] An analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel, such as Figure 1 , Figure 1 This is a schematic diagram of the analog circuit modules for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention. The module includes a first compensation module 100 (discrete time channel compensation), a second compensation module 200 (continuous time channel compensation), and a TX link 300. The second compensation module 200 (continuous time channel compensation), the first compensation module 100 (discrete time channel compensation), and the TX link 300 are electrically connected in sequence. The second compensation module 200 (continuous time channel compensation) is used to dynamically compensate for the spectral response of the channel to achieve a flatter broadband response. The first compensation module 100 (discrete time channel compensation) is used to control the switching of the TX link 300 to reduce interference between signal symbols.

[0067] The first compensation module 100 (discrete time channel compensation) is a discrete time channel compensation module, and the second compensation module 200 (continuous time channel compensation) is a continuous time channel compensation module. In this application, two modules are designed on the TX link 300 before mixing, including the first compensation module 100 (discrete time channel compensation) (discrete time channel compensation module) and the second compensation module 200 (continuous time channel compensation) (continuous time channel compensation module).

[0068] The first compensation module 100 (discrete time channel compensation) primarily controls the switching of the TX link 300. When the slope of the rising or falling signal edge falls below a set threshold, the switch on the TX link 300 is triggered to open for one-tenth of the signal cycle. When the slope of the falling or rising edge exceeds a set threshold, the signal link remains switched on. This signal conditioning minimizes interference between signal symbols. By configuring the first compensation module 100 (discrete time channel compensation) to control the switching of the TX link 300, interference between signal symbols is minimized. The second compensation module 200 (continuous time channel compensation) dynamically compensates the channel's spectral response to achieve a flatter wideband response. This further improves the signal quality (SNR, linearity, EVM, and other metrics) of millimeter-wave CMOS TX systems, laying the technical foundation for ultra-high-order modulation (such as 1024QAM).

[0069] Specifically, such as Figure 4 , Figure 4 This is a schematic diagram of the circuit structure connection of the first compensation module 100 (discrete time channel compensation) in the present invention. The first compensation module 100 (discrete time channel compensation) includes a signal slope detector 110 (singnal slop detector) and a comparator 120 (comparator). The signal slope detector 110 (singnal slop detector) is electrically connected to a first input terminal of the comparator 120 (comparator), and a second input terminal of the comparator 120 (comparator) is used to input a set threshold value. The signal slope detector 110 (singnal slop detector) is used to detect the slope information of the rising edge or falling edge of the signal and transmit it to the comparator 120 (comparator). The comparator 120 (comparator) is used to compare the slope value with the set threshold value and output an electrical signal based on the comparison result.

[0070] Furthermore, the first compensation module 100 (discrete time channel compensation) further includes a switch unit 130; the positive output terminal and the negative output terminal of the switch unit 130 are electrically connected; the output terminal of the comparator 120 (comparator) is electrically connected to the input terminal of the switch unit 130, and is used to control the switch unit 130 according to the electrical signal: Figure 5 , Figure 5 Schematic diagram of the signal waveforms in the present invention. If the slope of the rising or falling edge of the signal is lower than a set threshold, the switch unit 130 is controlled to disconnect the TX link 300 at a specified period. If the slope of the rising or falling edge of the signal is higher than the set threshold, the existing switch state is maintained unchanged.

[0071] Preferably, the prescribed period is one tenth the length of the signal period.

[0072] Specifically, such as Figure 3 , Figure 3 This is a schematic diagram of the circuit structure connection of the second compensation module 200 (continuous timechannel compensation) in the present invention. The second compensation module 200 (continuous timechannel compensation) includes a first MOS transistor Q1, a second MOS transistor Q2, a first capacitor C1, a first inductor L1, a second inductor L2, and a third inductor L3. The drain of the first MOS transistor Q1 and the drain of the second MOS transistor Q2 are electrically connected to the first end and the positive output end of the first inductor L1, and the first end and the negative output end of the second inductor L2, respectively. The source of the first MOS transistor Q1 and the source of the second MOS transistor Q2 are electrically connected to the first end and the second end of the first capacitor C1, respectively, and are grounded. The second end of the first inductor L1 and the second end of the second inductor L2 are electrically connected to the first end and the second end of the third inductor L3, respectively. The gates of the first MOS transistor Q1 and the second MOS transistor Q2 are connected to the positive input end and the negative input end of the signal, respectively.

[0073] Specifically, such as Figure 4The switch unit 130 includes a third MOS transistor Q3, a fourth MOS transistor Q4, a fifth MOS transistor Q5, and a sixth MOS transistor Q6. The drain of the third MOS transistor Q3 and the drain of the fourth MOS transistor Q4 are connected to the positive output terminal. The source of the third MOS transistor Q3 and the source of the fourth MOS transistor Q4 are grounded. The gate of the third MOS transistor Q3 and the gate of the fourth MOS transistor Q4 are electrically connected to the output terminal of the comparator 120 (comparator). The source of the fifth MOS transistor Q5 and the source of the sixth MOS transistor Q6 are electrically connected to the output terminal of the comparator 120 (comparator) and to ground. The gate of the fifth MOS transistor Q5 is electrically connected to the positive output terminal and the drain of the sixth MOS transistor Q6. The gate of the sixth MOS transistor Q6 is electrically connected to the negative output terminal and the drain of the fifth MOS transistor Q5.

[0074] Furthermore, if Figure 2 , Figure 2 This is a schematic diagram of the analog circuit structure connection for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention; the TX link includes a first signal isolator 310, a gain amplifier 320, a second signal isolator 330, a power amplifier 340, a third signal isolator 350, and an RF antenna; the first signal isolator 310, the gain amplifier 320, the second signal isolator 330, the power amplifier 340, the third signal isolator 350, and the RF antenna are electrically connected in sequence.

[0075] The analog circuit for suppressing ISI in the millimeter-wave CMOS TX channel of the present invention implements a first compensation module to control the switch of the TX link to reduce interference between signal symbols. A second compensation module is provided to dynamically compensate the channel's spectral response to achieve a flatter broadband response. This further improves the signal quality (indicators such as signal-to-noise ratio, linearity, and EVM) of the millimeter-wave CMOS TX and lays a technical foundation for implementing ultra-high-order modulation (such as 1024QAM).

[0076] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel, characterized in that: include: A first compensation module; A second compensation module; TX link; The first compensation module, the second compensation module, and the TX link are electrically connected in sequence; The first compensation module is used to control the switch of the TX link to reduce the interference between symbols; The second compensation module is used to dynamically compensate the frequency spectrum response of the channel to achieve a flatter broadband response.

2. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to claim 1, characterized in that: The first compensation module comprises: signal slope detector; Comparator; The signal slope detector is electrically connected to the first input terminal of the comparator, and the second input terminal of the comparator is used to input a set threshold value; The signal slope detector is used to detect the slope information of the rising edge or falling edge of the signal and transmit it to the comparator; The comparator is used to compare the slope value of the rising edge or falling edge of the signal with a set threshold value, and output an electrical signal according to the comparison result.

3. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to claim 2, characterized in that: The first compensation module also includes: Switching unit; The switch unit is electrically connected to the positive output terminal and the negative output terminal respectively; The output end of the comparator is electrically connected to the input end of the switch unit, and is used to control the switch unit according to the electrical signal: If the slope value is lower than the set threshold, the switch unit is controlled to disconnect the TX link in a specified period.

4. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to claim 1, characterized in that: The second compensation module comprises: The first MOS tube; The second MOS tube; a first capacitor; First inductor; The second inductor; The third inductor; The drain of the first MOS tube and the drain of the second MOS tube are electrically connected to the first end and the positive output end of the first inductor, and the first end and the negative output end of the second inductor respectively; The source of the first MOS tube and the source of the second MOS tube are electrically connected to the first end and the second end of the first capacitor respectively and are grounded; The second end of the first inductor and the second end of the second inductor are electrically connected to the first end and the second end of the third inductor respectively; The gate of the first MOS tube and the gate of the second MOS tube are connected to the positive input terminal and the negative input terminal of the signal respectively.

5. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to claim 3, characterized in that: The switch unit comprises: A third MOS tube, a fourth MOS tube, a fifth MOS tube, and a sixth MOS tube; The drain of the third MOS tube and the drain of the fourth MOS tube are connected to the positive output terminal; The source of the third MOS tube and the source of the fourth MOS tube are grounded; The gate of the third MOS tube and the gate of the fourth MOS tube are electrically connected to the output end of the comparator; The source of the fifth MOS tube and the source of the sixth MOS tube are electrically connected to the output end of the comparator and are grounded; The gate of the fifth MOS tube is electrically connected to the positive output terminal and the drain of the sixth MOS tube; The gate of the sixth MOS tube is electrically connected to the negative output terminal and the drain of the fifth MOS tube.

6. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to claim 5, characterized in that: The prescribed period is one tenth of the signal period.

7. The analog circuit for suppressing ISI in a millimeter-wave CMOS TX channel according to any one of claims 1 to 6, characterized in that: The TX link includes: a first signal isolator; Gain amplifier; a second signal isolator; Power amplifier; A third signal isolator; RF antenna; The first signal isolator, the gain amplifier, the second signal isolator, the power amplifier, the third signal isolator, and the radio frequency antenna are electrically connected in sequence.

Images