JTAG adapter plate
By designing a JTAG adapter board that includes standard JTAG interface and multiple specifications toggle interfaces, the compatibility problem between the non-standard JTAG interface of the target board and the standard interface of the emulator is solved, and the functions of JTAG boundary scanning and burning are realized. .
Patent Information
- Application Number
- CN202323543072.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-25
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2033-12-25
AI Technical Summary
When the target board uses a non-standard JTAG interface, it is difficult to directly connect to the emulator using a standard interface, resulting in the inability to realize functions such as JTAG boundary scanning and burning.
A JTAG adapter board is designed, including a PCB adapter board, a standard JTAG interface and a variety of JTAG adapter interfaces with different specifications. The goal is achieved by connecting the signal pins of the non-standard JTAG interface with the signal pins of the standard JTAG interface. Indirect connection between the board and the emulator.
Through the JTAG adapter board, the target board can be connected to the emulator to realize operations such as JTAG boundary scanning and writing, solving the compatibility problem between non-standard JTAG interfaces and standard interfaces.
Smart Images

Figure CN222531007U_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the technical field of circuit boards, and in particular, relates to a JTAG adapter board. Background Art
[0002] The existing standard JTAG interfaces include 14-pin interfaces and 20-pin interfaces. Common emulator sockets are generally adapted to the standard JTAG interface of 2x7pin with a pitch of 2.54mm. The JTAG interface of 2X7pin package with a pitch of 2.54mm occupies more PCB board area and space.
[0003] When the target board is small, has many components, and has limited layout space, a JTAG interface that is smaller than the standard JTAG interface is usually used. Since the emulator uses the standard JTAG interface, it is difficult to connect the target board to the emulator, and functions such as JTAG boundary scanning and burning cannot be implemented. Utility Model Content
[0004] The present application provides a JTAG adapter board, which can solve the problem that a target board using a non-standard JTAG interface is difficult to directly connect to an emulator using a standard interface.
[0005] The present application provides a JTAG adapter board, including a PCB adapter board, a standard JTAG interface, and a first JTAG adapter interface, a second JTAG adapter interface, and a third JTAG adapter interface, which are smaller in size than the standard JTAG interface and have different specifications. The standard JTAG interface, the first JTAG adapter interface, the second JTAG adapter interface, and the third JTAG adapter interface are respectively arranged around the PCB adapter board, and the signal pins of the first JTAG adapter interface, the second JTAG adapter interface, and the third JTAG adapter interface are all connected to the signal pins of the standard JTAG interface.
[0006] Optionally, the standard JTAG interface is a 2x7pin standard JTAG interface with a pitch of 2.54mm.
[0007] Optionally, the first JTAG adapter is a 1x7pin single-row female header with a pitch of 1.27mm.
[0008] Optionally, the second JTAG adapter is a 2x4pin double-row female header with a pitch of 1.27mm.
[0009] Optionally, the third JTAG adapter is a 1x8pin FPC socket with a pitch of 0.5mm.
[0010] Optionally, the PCB adapter board is a rectangular printed circuit board, and the standard JTAG interface, the first JTAG adapter interface, the second JTAG adapter interface and the third JTAG adapter interface are respectively arranged on four sides of the PCB adapter board.
[0011] Optionally, the signal pins of the standard JTAG interface include VCC, GND, TRST, TMS, TDO, TDI and TCK, and the VCC, GND, TRST, TMS, TDO, TDI and TCK of the first JTAG adapter interface are connected one-to-one with the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the second JTAG adapter interface are connected one-to-one with the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the third JTAG adapter interface are connected one-to-one with the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface.
[0012] Optionally, an LED light is also provided on the PCB adapter board, the positive pole of the LED light is connected to the VCC of the standard JTAG interface, and the negative pole of the LED light is connected to the GND of the standard JTAG interface.
[0013] The above solution of the present application has the following beneficial effects:
[0014] In the present application, a standard JTAG interface that can be connected to an emulator is set on a PCB adapter board, and the signal pins of a first JTAG adapter, a second JTAG adapter and a third JTAG adapter that can be applicable to a non-standard JTAG interface on a target board are connected to the signal pins of a standard JTAG interface, so as to connect to the target board through the first JTAG adapter, the second JTAG adapter or the third JTAG adapter, thereby indirectly connecting the target board to the standard JTAG interface, and connecting the standard JTAG interface to the emulator to connect to a terminal device to implement JTAG boundary scanning and burning operations on the target board.
[0015] Other beneficial effects of the present application will be described in detail in the subsequent specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0017] Figure 1 A schematic diagram of the JTAG adapter board provided for this application;
[0018] Figure 2 The package diagram of a 1x7 pin single-row female header with a pitch of 1.27 mm provided for this application;
[0019] Figure 3 The package diagram of the 2x4pin double-row female header with a pitch of 1.27mm provided for this application;
[0020] Figure 4 The package diagram of the 1x8pin FPC socket with a pitch of 0.5mm provided for this application;
[0021] Figure 5 A schematic diagram of a PCB adapter board, a standard JTAG interface, a first JTAG adapter, a second JTAG adapter, and a third JTAG adapter provided in this application;
[0022] Figure 6 A schematic diagram of the connection relationship between the standard JTAG interface, the first JTAG adapter interface, the second JTAG adapter interface, the third JTAG adapter interface and the LED lamp provided in this application;
[0023] Figure 7 Schematic diagram of the usage flow of the JTAG adapter board provided for this application.
[0024] [Description of Reference Numerals]
[0025] 1. PCB adapter board; 2. Standard JTAG interface; 3. First JTAG adapter interface; 4. Second JTAG adapter interface; 5. Third JTAG adapter interface. DETAILED DESCRIPTION
[0026] In order to facilitate the understanding of the present application, the present application will be described more comprehensively with reference to the relevant drawings below. The preferred embodiments of the present application are provided in the drawings. However, the present application can be implemented in many other different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the understanding of the disclosure of the present application more thorough and comprehensive.
[0027] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.
[0028] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0029] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.
[0031] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.
[0032] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways.
[0033] Currently, it is difficult for a target board using a non-standard JTAG interface to be directly connected to an emulator using a standard interface.
[0034] In view of the above problems, the present application provides a JTAG adapter board, such as Figure 1As shown, the JTAG adapter board includes a PCB adapter board 1, a standard JTAG interface 2, and a first JTAG adapter interface 3, a second JTAG adapter interface 4 and a third JTAG adapter interface 5 which are smaller in size than the standard JTAG interface 2 and have different specifications. The standard JTAG interface 2, the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 are respectively arranged around the PCB adapter board 1, and the signal pins of the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 are all connected to the signal pins of the standard JTAG interface 2.
[0035] In the present application, a standard JTAG interface 2 that can be connected to an emulator is set on a PCB adapter board 1, and the signal pins of a first JTAG adapter interface 3, a second JTAG adapter interface 4 and a third JTAG adapter interface 5 that can be applicable to a non-standard JTAG interface on a target board are connected to the signal pins of the standard JTAG interface 2, so as to connect to the target board through the first JTAG adapter interface 3, the second JTAG adapter interface 4 or the third JTAG adapter interface 5, thereby indirectly connecting the target board to the standard JTAG interface 2, and connecting the standard JTAG interface 2 to the emulator to connect to a terminal device to realize JTAG boundary scanning and burning operations on the target board.
[0036] In some embodiments of the present application, the standard JTAG interface 2 is a 2x7 pin standard JTAG interface with a pitch of 2.54 mm.
[0037] Since the emulator socket is generally compatible with a standard JTAG interface with a 2x7 pin spacing of 2.54 mm, this application adopts a standard JTAG interface with a 2x7 pin spacing of 2.54 mm so that the JTAG adapter board provided by this application can be better connected to the emulator.
[0038] In some embodiments of the present application, Figure 2 and Figure 5 As shown, the first JTAG transfer interface 3 is a 1x7 pin single-row female header with a pitch of 1.27 mm.
[0039] The above-mentioned first JTAG adapter 3 adopts a single-row female header of 1x7pin with a pitch of 1.27mm, which can be adapted to the package on the target board with a pitch of 1x7pin pin header with a pitch of 1.27mm. For example, in some electric wrench projects, due to the small space of the target board, it is impossible to reserve a standard JTAG interface of 2x7pin with a pitch of 2.54mm. Therefore, based on the actual wiring and layout conditions, a pin header package of 1x7pin with a pitch of 1.27mm is selected. At this time, the first JTAG adapter 3 in the JTAG adapter board provided by the present application can be used to connect to the target board, and the standard JTAG interface 2 of the present application can be connected to the emulator, and the emulator is then connected to the terminal device to realize JTAG boundary scanning and burning operations on the target board, thereby realizing JTAG transfer.
[0040] In some embodiments of the present application, Figure 3 and Figure 5 As shown, the second JTAG transfer interface 4 is a 2x4 pin double-row female header with a pitch of 1.27 mm.
[0041] The above-mentioned second JTAG adapter 4 adopts a double-row female header of 2x4pin with a pitch of 1.27mm, which can adapt to the package on the target board with a pitch of 2x4pin with a pitch of 1.27mm. For example, in some electric drill projects, because the space of the target board is small and narrow, it is impossible to reserve a standard JTAG interface of 2x7pin with a pitch of 2.54mm. Therefore, based on the actual wiring and layout conditions, a 2x4pin header package with a pitch of 1.27mm is selected. At this time, the second JTAG adapter 4 in the JTAG adapter board provided by the present application can be used to connect to the target board, and the standard JTAG interface 2 of the present application can be connected to the emulator, and the emulator is then connected to the terminal device to realize JTAG boundary scanning and burning operations on the target board, thereby realizing JTAG conversion.
[0042] In some embodiments of the present application, Figure 4 and Figure 5 As shown, the third JTAG transfer interface 5 is a 1x8pin FPC socket with a pitch of 0.5mm.
[0043] The above-mentioned third JTAG adapter 5 adopts a 1x8pin FPC socket with a pitch of 0.5mm, which can be adapted to the package on the target board with a 1x8pin FPC socket with a pitch of 0.5mm. For example, in some projects, due to the small space of the target board, it is impossible to reserve a standard JTAG interface of 2x7pin with a pitch of 2.54mm, and a 1x8pin FPC socket with a pitch of 0.5mm is selected in combination with the actual wiring and layout conditions. At this time, the third JTAG adapter 5 in the JTAG adapter board provided by the present application can be used to connect to the target board, and the standard JTAG interface 2 of the present application can be connected to the emulator, and the emulator is then connected to the terminal device to realize JTAG boundary scanning and burning operations on the target board.
[0044] In some embodiments of the present application, Figure 1 and Figure 5 As shown, the PCB adapter board 1 is a rectangular printed circuit board, and the standard JTAG interface 2, the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 are respectively arranged on the four sides of the PCB adapter board 1.
[0045] The PCB adapter board 1 is set as a rectangular printed circuit board, and the standard JTAG interface 2, the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 are respectively set on the four sides of the PCB adapter board 1, so that the spatial layout can be reasonable to prevent the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 from interfering with each other when connected to the target board.
[0046] It should be noted that the specifications of the above-mentioned standard JTAG interface 2, the first JTAG adapter interface 3, the second JTAG adapter interface 4 and the third JTAG adapter interface 5 can be set according to needs.
[0047] In some embodiments of the present application, Figure 6As shown, the signal pins of the standard JTAG interface 2 include VCC, GND, TRST, TMS, TDO, TDI and TCK. The VCC (3.3V can be used, represented by 3V3 in the figure), GND, TRST, TMS, TDO, TDI and TCK of the first JTAG adapter 3 are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface 2 in a one-to-one correspondence; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the second JTAG adapter 4 are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface 2 in a one-to-one correspondence; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the third JTAG adapter 5 are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface 2 in a one-to-one correspondence. The signal pins of the first JTAG adapter 3, the signal pins of the second JTAG adapter 4 and the signal pins of the third JTAG adapter 5 are connected in parallel with each other and are connected correspondingly to the signal pins of the standard JTAG interface 2. In this way, only any one of the first JTAG adapter 4 and the third JTAG adapter 5 needs to be connected to the target board, and the standard JTAG interface on the adapter board is connected to the emulator, so as to realize the transfer of the JTAG signal from the debugging target board to the emulator.
[0048] In some embodiments of the present application, Figure 6 As shown, an LED lamp is also provided on the PCB adapter board 1 , the positive pole of the LED lamp is connected to the VCC of the standard JTAG interface, and the negative pole of the LED lamp is connected to the GND of the standard JTAG interface 2 .
[0049] When the JTAG adapter board is successfully connected to the target board, the LED light on the adapter board will be powered and light up to indicate that the JTAG adapter board is successfully connected to the target board.
[0050] In some embodiments of the present application, Figure 7 As shown, the JTAG interface on the target board needs to match the JTAG interface on the JTAG adapter board. Select the one that is adapted to the target board among the first JTAG adapter 3, the second JTAG adapter 4 and the third JTAG adapter 5 to connect to the target board, and then connect the standard JTAG interface on the adapter board to the emulator. The emulator is connected to the PC via a USB cable to realize JTAG boundary scanning and burning operations on the target board.
[0051] The above is a preferred embodiment of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles described in the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.
Claims
1. A JTAG adapter board, characterized in that: It includes a PCB adapter board, a standard JTAG interface, and a first JTAG adapter interface, a second JTAG adapter interface and a third JTAG adapter interface which are smaller in size than the standard JTAG interface and have different specifications. The standard JTAG interface, the first JTAG adapter interface, the second JTAG adapter interface and the third JTAG adapter interface are respectively arranged around the PCB adapter board, and the signal pins of the first JTAG adapter interface, the second JTAG adapter interface and the third JTAG adapter interface are all connected to the signal pins of the standard JTAG interface.
2. The JTAG adapter board according to claim 1, characterized in that: The standard JTAG interface is a 2x7 pin standard JTAG interface with a pitch of 2.54 mm.
3. The JTAG adapter board according to claim 1, characterized in that: The first JTAG adapter is a 1x7 pin single-row female header with a pitch of 1.27 mm.
4. The JTAG adapter board according to claim 1, characterized in that: The second JTAG adapter is a 2x4pin double-row female header with a pitch of 1.27mm.
5. The JTAG adapter board according to claim 1, characterized in that: The third JTAG adapter is a 1x8pin FPC socket with a pitch of 0.5mm.
6. The JTAG adapter board according to claim 1, characterized in that: The PCB adapter board is a rectangular printed circuit board, and the standard JTAG interface, the first JTAG adapter interface, the second JTAG adapter interface and the third JTAG adapter interface are respectively arranged on four sides of the PCB adapter board.
7. The JTAG adapter board according to claim 1, characterized in that: The signal pins of the standard JTAG interface include VCC, GND, TRST, TMS, TDO, TDI and TCK. The VCC, GND, TRST, TMS, TDO, TDI and TCK of the first JTAG adapter interface are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface in a one-to-one correspondence; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the second JTAG adapter interface are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface in a one-to-one correspondence; the VCC, GND, TRST, TMS, TDO, TDI and TCK of the third JTAG adapter interface are connected to the VCC, GND, TRST, TMS, TDO, TDI and TCK of the standard JTAG interface in a one-to-one correspondence.
8. The JTAG adapter board according to claim 7, characterized in that: The PCB adapter board An LED lamp is also provided on the device, and the positive electrode of the LED lamp is connected to the VCC of the standard JTAG interface. The cathode of the LED lamp is connected to the GND of the standard JTAG interface.