Semiconductor device

Abstract

A semiconductor device relates to the field of design and manufacture of semiconductor devices and comprises a substrate, a semiconductor laminated layer, a first electrode, a second electrode, a first grid electrode, a second grid electrode and a dielectric layer, the dielectric layer is continuously formed on the semiconductor laminated layer between the first electrode and the first grid electrode, on the side surfaces of the first control layer and the second control layer, on the semiconductor laminated layer between the first control layer and the second control layer, between the first control layer and the first grid electrode metal, and between the second control layer and the second grid electrode metal; and the second control layer and the second gate metal are arranged on the semiconductor lamination layer between the second control layer and the second gate metal and between the second control layer and the second electrode. The method has the advantages that the surface state and the current collapse effect are improved, and the gate breakdown voltage is improved.

Description

Technical Field

[0001] The utility model relates to a semiconductor device with improved structure, in particular to a semiconductor apparatus. Background Art

[0002] See also Figure 1 A conventional semiconductor device has the following structure: from bottom to top, substrate 1, semiconductor stack 2, first electrode 3, first gate 4, second gate 5, and second electrode 6. Semiconductor stack 2 comprises a first semiconductor layer 2A located below and a second semiconductor layer 2B located above. First gate 4 comprises a first control layer 4A and a first gate metal 4B. Second gate 5 comprises a second control layer 5A and a second gate metal 5B. The reliability of this semiconductor device in bidirectional switch applications is significantly affected by the gate withstand voltage and surface states, leading to failure during use. Summary of the Invention

[0003] The purpose of the utility model is to provide an improved semiconductor device.

[0004] To achieve the above-mentioned objectives, the semiconductor device provided by the present invention includes a substrate; a semiconductor stack formed on the substrate; a first electrode and a second electrode formed on the semiconductor stack with a spacing therebetween; a first gate and a second gate formed on the semiconductor stack with a spacing therebetween, and the first gate is formed between the first electrode and the second electrode, and the second gate is formed between the first gate and the second electrode, the first gate is composed of a first control layer and a first gate metal, and the second gate is composed of a second control layer and a second gate metal; a dielectric layer, the dielectric layer is continuously formed on the semiconductor stack between the first electrode and the first gate, on the sides of the first control layer and the second control layer, on the semiconductor stack between the first control layer and the second control layer, between the first control layer and the first gate metal, between the second control layer and the second gate metal, and on the semiconductor stack between the second control layer and the second electrode.

[0005] It can be seen from the above scheme that since a continuous dielectric layer is set between the first electrode and the second electrode, the part of the dielectric layer located under the first gate metal and the second gate metal serves as an insulating layer to reduce gate leakage and increase the gate breakdown voltage, while the other part serves as a passivation layer to improve the surface state of the semiconductor device, thereby improving the current collapse effect.

[0006] A further solution is that the stack consists of a first semiconductor layer and a second semiconductor layer located below the first semiconductor layer.

[0007] A further solution is that both the first electrode and the second electrode pass through the second semiconductor layer and are formed on the semiconductor stack so as to be embedded in the first semiconductor layer.

[0008] Another further solution is to further include a buffer layer, wherein the buffer layer is formed between the substrate and the semiconductor stack.

[0009] To achieve the above-mentioned purpose, the present invention provides another semiconductor device including a substrate; a semiconductor stack formed on the substrate; a first electrode and a second electrode formed on the semiconductor stack with a gap between them; a first gate formed on the semiconductor stack, and the first gate is formed between the first electrode and the second electrode, the first gate being composed of a first control layer and a first gate metal; and a dielectric layer continuously formed on the semiconductor stack between the first electrode and the first gate, on the side of the first control layer, and on the semiconductor stack between the first control layer and the second electrode.

[0010] It can be seen from the above scheme that since a continuous dielectric layer is set between the first electrode and the second electrode, the part of the dielectric layer located under the first gate metal acts as an insulating layer to reduce gate leakage and increase the gate breakdown voltage, while the other part acts as a passivation layer to improve the surface state of the semiconductor device, thereby improving the current collapse effect.

[0011] A further solution is that the stack consists of a first semiconductor layer and a second semiconductor layer located below the first semiconductor layer.

[0012] A further solution is that both the first electrode and the second electrode pass through the second semiconductor layer and are formed on the semiconductor stack so as to be embedded in the first semiconductor layer.

[0013] Another further solution is to further include a buffer layer, wherein the buffer layer is formed between the substrate and the semiconductor stack. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic structural diagram of an existing semiconductor device;

[0015] Figure 2 is a structural diagram of the first embodiment;

[0016] Figures 3 to 6 is a schematic diagram of the formation process of the first embodiment;

[0017] Figure 7 is a schematic structural diagram of the second embodiment;

[0018] Figure 8 is a schematic structural diagram of a third embodiment;

[0019] Figure 9 It is a structural diagram of the fourth embodiment.

[0020] Wherein: substrate 1; semiconductor stack 2; first semiconductor layer 2A; second semiconductor layer 2B; first electrode 3; first gate 4; first control layer 4A; first gate metal 4B; second gate 5; second control layer 5A; second gate metal 5B; second electrode 6; dielectric layer 7; various parts 71-76 of continuous dielectric layer 7.

[0021] The present invention will be described in detail below with reference to various embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0022] The following only describes the differences between the semiconductor device of the present invention and the conventional semiconductor device. Figure 1 The same reference numerals as those in the conventional semiconductor device shown in the drawings indicate that the same structure is used, and therefore, the conventional semiconductor device can be implemented in accordance with the conventional technology.

[0023] First practical example

[0024] See also Figure 2 The semiconductor device of the present invention has a continuous dielectric layer 7 formed on the semiconductor stack 2, that is, between the first electrode 3 and the second electrode 6 on the second semiconductor layer 2B. The dielectric layer 7 is composed of a portion 71 located between the first electrode 3 and the first gate 4, a portion 72 located on the sides of the first control layer 4A and the second control layer 5A, a portion 73 located between the first control layer 4A and the second control layer 5A, a portion 74 between the first control layer 4A and the first gate metal 4B and between the second control layer 5A and the second gate metal 5B, and a portion 75 between the second control layer 5A and the second electrode 6.

[0025] The manufacturing process of semiconductor devices is as follows:

[0026] See also Figure 3 A semiconductor stack 2 is formed on a substrate 1 made of sapphire. The semiconductor stack 2 includes, from bottom to top, a first semiconductor layer 2A made of undoped GaN and a second semiconductor layer 2B made of undoped AlGaN. The second semiconductor layer 2B is alternately formed by a first control layer 4A and a second control layer 5A made of P-type GaN.

[0027] See also Figure 4 A dielectric layer 7 is formed to cover the second semiconductor layer 2B, the first control layer 4A and the second control layer 5A. The dielectric layer 7 may be made of materials such as AlN, Al2O3, and SiNx.

[0028] See also Figure 5, prepare a first gate metal 4B and a second gate metal 5B.

[0029] See also Figure 6 , prepare the first electrode 3 and the second electrode 6, titanium and aluminum are stacked on the second semiconductor layer 2B, and the first electrode 3 and the second electrode 6, one of which serves as the source and the other as the drain, are alternately formed on the second semiconductor layer 2B.

[0030] Second embodiment

[0031] The following describes in detail only the differences between this embodiment and the first embodiment, and the other structures are the same as those of the first embodiment. Figure 7 In the second embodiment, the substrate is made of silicon material. In addition, the first electrode 3 and the second electrode 6 both pass downward through the second semiconductor layer 2B and are embedded in the first semiconductor layer 2A to be formed on the semiconductor stack 2. The embedded depth is about 40 nm.

[0032] Third embodiment

[0033] See also Figure 8 The difference between this embodiment and the first embodiment lies in the semiconductor device of the second control layer 5A and the second gate metal 5B. Therefore, the shape of the continuous dielectric layer 7 also changes. That is, the portion 73 between the first control layer 4A and the second control layer 5A, the portion 74 between the second control layer 5A and the second gate metal 5B, and the portion 75 between the second control layer 5A and the second electrode 6 are relatively reduced, while the portion 76 between the second control layer 5A and the second electrode 6 is increased.

[0034] Fourth embodiment

[0035] See also Figure 9 The difference between this example and the third embodiment is that the substrate is made of silicon material. In addition, the first electrode 3 and the second electrode 6 both pass downward through the second semiconductor layer 2B and are embedded in the first semiconductor layer 2A to be formed on the semiconductor stack 2. The embedding depth is about 40nm.

Claims

1. A semiconductor device comprising: a substrate; a semiconductor stack formed on the substrate; A first electrode and a second electrode are formed on the semiconductor stack at intervals from each other; A first gate and a second gate are formed on the semiconductor stack at a distance from each other, and the first gate is formed between the first electrode and the second electrode, and the second gate is formed between the first gate and the second electrode, the first gate is composed of a first control layer and a first gate metal, and the second gate is composed of a second control layer and a second gate metal; Features: A dielectric layer is continuously formed on the semiconductor stack between the first electrode and the first gate, on the sides of the first control layer and the second control layer, on the semiconductor stack between the first control layer and the second control layer, between the first control layer and the first gate metal, between the second control layer and the second gate metal, and between the second control layer and the second electrode.

2. The semiconductor device according to claim 1, wherein: The stacked layer is composed of a first semiconductor layer and a second semiconductor layer located below the first semiconductor layer.

3. The semiconductor device according to claim 2, wherein: The first electrode and the second electrode both pass through the second semiconductor layer and are formed on the semiconductor stack so as to be embedded in the first semiconductor layer.

4. The semiconductor device according to any one of claims 1 to 3, characterized in that: A buffer layer is also included, and the buffer layer is formed between the substrate and the semiconductor stack.

5. A semiconductor device comprising: a substrate; a semiconductor stack formed on the substrate; A first electrode and a second electrode are formed on the semiconductor stack at intervals from each other; A first gate is formed on the semiconductor stack, and the first gate is formed between the first electrode and the second electrode, and the first gate is composed of a first control layer and a first gate metal; Features: A dielectric layer is continuously formed on the semiconductor stack between the first electrode and the first gate, on a side of the first control layer, and on the semiconductor stack between the first control layer and the second electrode.

6. The semiconductor device according to claim 5, wherein: The stacked layer is composed of a first semiconductor layer and a second semiconductor layer located below the first semiconductor layer.

7. The semiconductor device according to claim 6, wherein: The first electrode and the second electrode both pass through the second semiconductor layer and are formed on the semiconductor stack so as to be embedded in the first semiconductor layer.

8. The semiconductor device according to any one of claims 5 to 7, characterized in that: A buffer layer is also included, and the buffer layer is formed between the substrate and the semiconductor stack.

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