On-chip all-optical switching network device, semiconductor device and manufacturing method thereof

Abstract

The invention provides an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof. The on-chip all-optical switching network device comprises: a photonic chip formed with at least two photonic integrated circuit sub-chips optically interconnected with each other; the at least two optical switching control analog electric chips are respectively arranged on the at least two photon integrated circuit sub-chips; each photon integrated circuit sub-chip is internally provided with at least one on-chip optical switch, at least two communication nodes suitable for communicating with an external device, and a plurality of first type optical waveguides used for connecting the on-chip optical switch and the communication nodes; on the photon chip, communication between any two communication nodes is realized through at least one on-chip optical switch. According to the invention, through the plurality of on-chip optical switches, a series of digital electric chips can carry out parallel processing on information at the same time, and the requirements of an artificial intelligence algorithm on computing power and bandwidth can be better met.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and more specifically, to an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof. Background Art

[0002] VLSI technology has become the pillar supporting the development and evolution of the information society. Various types of chips widely used in information systems usually rely on the upgrade of electronic chip process technology to achieve their performance improvement and power consumption optimization. However, as electronic chip technology gradually approaches the physical limit, the pace of Moore's Law is slowing down, and the cost of manufacturing large chips using advanced processes is getting higher and higher.

[0003] The rapid development of new AI applications such as the latest ChatGPT and other AI-generated content (AIGC) has placed increasing demands on computing systems for computing power. In addition, as the total chip area increases, the time and energy cost of data transfer also increase.

[0004] Traditional information interconnection is mainly achieved through electronic conduction through copper media, and the speed and distance of electronic information transmission are limited by the resistance and capacitance time constants and electrical losses, resulting in a significant increase in the cross-section of the required copper wire as the transmission speed and distance increase. In addition, the signal crosstalk between electronic information transmission channels restricts the energy consumption and bandwidth density of the interconnection. The power consumption and bandwidth density issues of electrical interconnection between chips limit the development of higher-performance chip systems. Traditional electrical interconnection interfaces are sensitive to interconnection distances, which limits the interconnection architecture between digital electrical chips. For point-to-point interconnection networks, each SerDes interface (the SerDes is the abbreviation of SERializer / DESerializer in English) needs to access a specific single XPU (the XPU refers to a processing unit used in an artificial intelligence computing system), which reduces the bandwidth between each pair of XPUs. Summary of the invention

[0005] In view of the above-mentioned defects in electronic information transmission, the present invention provides an on-chip all-optical switching network device, a semiconductor device and a manufacturing method thereof.

[0006] According to a first aspect of the present invention, an embodiment of the present invention provides an on-chip all-optical switching network device, comprising:

[0007] a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; and

[0008] At least two optical switching control analog electrical chips, respectively arranged on the at least two photonic integrated circuit sub-chips;

[0009] Each of the photonic integrated circuit sub-chips comprises: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; on the photonic chip, any two of the communication nodes communicate via at least one on-chip optical switch.

[0010] Wherein, on the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

[0011] In some embodiments of the present invention, each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units. The at least two electro-optical conversion units are optically connected to at least two on-chip optical switches via first-type optical waveguides, respectively; and the at least two photoelectric conversion units are optically connected to output ports of at least two on-chip optical switches via another first-type optical waveguide, respectively.

[0012] In some embodiments of the present invention, the number of electro-optical conversion units and photoelectric conversion units of each communication node is equal to the total number of on-chip optical switches on the photonic chip.

[0013] In some embodiments of the present invention, each of the on-chip optical switches has a plurality of input ports and a plurality of output ports, wherein the number of input ports of each of the on-chip optical switches is equal to the total number of communication nodes on the photonic chip, and the number of output ports of each of the on-chip optical switches is equal to the total number of communication nodes provided on the photonic chip.

[0014] In some embodiments of the present invention, the multiple input ports of each of the on-chip optical switches are optically connected to at least one electro-optical conversion unit in each of the communication nodes through a plurality of different first-type optical waveguides; the multiple output ports of each of the on-chip optical switches are optically connected to at least one optoelectronic conversion unit in each of the communication nodes through another plurality of different first-type optical waveguides.

[0015] In some embodiments of the present invention, the on-chip optical switching network is configured such that an optical path connecting any two communication nodes includes at least one on-chip optical switch.

[0016] In some embodiments of the present invention, the electro-optical conversion unit includes a modulator; and / or, the photoelectric conversion unit includes a detector. In some embodiments of the present invention, the at least two electro-optical conversion units include a modulator array composed of the modulators; and / or, the at least two photoelectric conversion units include a detector array composed of the detectors.

[0017] In some embodiments of the present invention, in the communication node, the modulator and the detector are arranged side by side or alternately.

[0018] In some embodiments of the invention, the modulator comprises a micro-ring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. In some embodiments of the invention, the detector comprises a micro-ring detector or a photodiode.

[0019] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips further comprises: an optical input coupler and an optical power splitter.

[0020] In the photonic chip, an optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and

[0021] The optical power separator is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip through another first-type optical waveguide and is configured to separate the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

[0022] In some embodiments of the present invention, the optical input coupler comprises a grating coupler or an end face coupler.

[0023] In some embodiments of the present invention, in the photonic chip, the first type optical waveguides of two adjacent photonic integrated circuit sub-chips are optically interconnected.

[0024] In some embodiments of the present invention, the optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are constructed as a structure in which the waveguide cross-section gradually increases from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip, so as to facilitate the alignment of the optical waveguides of the two photonic integrated circuit sub-chips at the junction.

[0025] In some embodiments of the present invention, each of the photonic integrated circuit sub-chips also has a second type of optical waveguide located at a different layer from the first type of optical waveguide; wherein one or more of the on-chip optical switch, electro-optical conversion unit, optoelectronic conversion unit, optical input coupler, and optical power separator are optically connected to the corresponding first type of optical waveguide through different second type optical waveguides; the second type of optical waveguide is optically connected to the first type of optical waveguide through an evanescent wave coupler. In some embodiments of the present invention, the first type of optical waveguide includes a silicon nitride waveguide. In some embodiments of the present invention, the second type of optical waveguide includes a silicon waveguide.

[0026] In some embodiments of the present invention, the on-chip optical switch is a silicon optical switch, comprising a plurality of optical switching units. The optical switching control analog electrical chip is configured to control the plurality of optical switching units to arrange and switch data transmitted in the on-chip optical switching network. In some embodiments of the present invention, the on-chip optical switch is arranged at the same layer as the communication node. In some embodiments of the present invention, the optical switching unit has a Mach-Zehnder interferometer structure.

[0027] In some embodiments of the present invention, the photonic integrated circuit sub-chip is manufactured by exposing using a full mask mask.

[0028] According to a second aspect of the present invention, an embodiment of the present invention provides a semiconductor device, comprising:

[0029] The on-chip all-optical switching network device according to any one of the embodiments of the first aspect of the present invention;

[0030] a plurality of analog electrical chips connected to the on-chip all-optical switching network device and configured so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0031] A plurality of digital electrical chips, each of which is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

[0032] In some embodiments of the present invention, the information transmission path connecting any two analog electronic chips includes at least one on-chip optical switch.

[0033] In some embodiments of the present invention, an information transmission path connecting any two digital electronic chips includes at least one optical path, and the optical path includes at least one on-chip optical switch.

[0034] In some embodiments of the present invention, the semiconductor device further comprises a substrate, wherein the photonic chip is mounted on the substrate; the plurality of analog electrical chips are respectively mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are respectively mounted on the substrate.

[0035] In some embodiments of the present invention, on the photonic integrated circuit sub-chip, the analog electrical chip is arranged in a one-to-one correspondence with the communication node and is located above the communication node.

[0036] According to a third aspect of the present invention, an embodiment of the present invention provides a method for manufacturing the on-chip all-optical switching network device according to the first aspect of the present invention, comprising:

[0037] providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; and

[0038] Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips;

[0039] Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence;

[0040] Among them, on the photonic integrated circuit sub-chip, any two communication nodes communicate with each other via at least one on-chip optical switch.

[0041] In some embodiments of the present invention, the photonic integrated circuit sub-chip is manufactured by exposing using a full mask mask.

[0042] According to a fourth aspect of the present invention, an embodiment of the present invention provides a method for manufacturing the semiconductor device according to the second aspect of the present invention, comprising:

[0043] Provide an on-chip all-optical switching network device as described in the first aspect of the present invention;

[0044] Providing a plurality of analog electrical chips, connecting the plurality of analog electrical chips to the on-chip all-optical switching network device and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0045] A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

[0046] In some embodiments of the present invention, the method for manufacturing the semiconductor device further comprises:

[0047] providing a substrate;

[0048] Mounting the photonic chip on the substrate;

[0049] The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are mounted on the substrate, respectively.

[0050] The application of the present invention has the following effects and advantages:

[0051] In some embodiments of the present invention, multiple photonic integrated circuit sub-chips made by exposure using a full mask mask are spliced ​​through waveguides to form a photonic chip, and the photonic chip is used as an intermediary layer to connect electrical chips, which can solve the power consumption and bandwidth density bottlenecks of chip-to-chip interconnection. In the photonic chip, the on-chip optical switch can be expanded horizontally, and the horizontal expansion of the on-chip optical switch can realize parallel processing of information by any number of digital electrical chips at the same time, thereby better meeting the requirements of artificial intelligence algorithms for computing power and bandwidth.

[0052] In some embodiments of the present invention, the analog electronic chip and the digital electronic chip are separated on two different chips. This can not only optimize the performance of each chip in different process steps, but also solve the problem of slow iteration cycle of analog electronic chip products, and further improve the yield of the overall system.

[0053] In some embodiments of the present invention, the on-chip optical switching network of the present invention reuses multiple analog electrical chips and multiple digital electrical chips, and is composed of interconnected photonic chips spliced ​​by full mask. Except for the silicon nitride exposure mask that connects the optical coupler of the input laser to the communication node, the exposure mask of other components on the photonic integrated circuit sub-chip is exactly the same, saving the chip flow cost. While improving the system energy efficiency ratio, it breaks through the limitation of the chip mask size, effectively increases the overall area of ​​the digital electrical chip, and improves the total computing throughput of the system.

[0054] In addition, traditional computing systems need to be fully connected using PCB routing through long-distance SerDes. Compared with traditional solutions, the on-chip optical switching network of the present invention enables computing chips (i.e., digital electronic chips) to be interconnected using ultra-short-distance SerDes or parallel interfaces, reducing interconnection power consumption. In addition, the use of an on-chip optical switching network can make the interconnection between chips no longer static, but reconfigurable on site. This can bring many benefits, for example, the topology can be changed according to the specific machine learning model. From the perspective of topological structure, the requirements of different machine learning models for data flow can be roughly divided into three categories, namely: data parallelism, each chip loads the entire model, and different chips process different data in the data set; model parallelism, some layers in the model are particularly large, so each chip is only responsible for a part of the calculation in such a large layer; and pipeline parallelism, different layers in the model are handed over to different chips for calculation, and different data flows correspond to different computing interconnection topologies. The present invention uses reconfigurable optical interconnects to quickly switch between different inter-chip interconnect topologies, which can effectively improve bandwidth utilization and the scalability of artificial intelligence chips, that is, multiple chips can efficiently and reliably work together to accelerate such large models. In addition, the entire on-chip optical switch consumes only a few hundred milliwatts of power, which is several orders of magnitude lower than the power consumption of electrical switches.

[0055] In addition, the commercial implementation of silicon optical switches usually has problems with fiber coupling and polarization correlation, while the present invention uses an optical switch used directly on the chip (i.e., an on-chip optical switch) to avoid these problems. Traditional optical switches usually use optical fibers as input and output interfaces, and the spacing between array optical fibers is usually 250um or 127um. For optical switches with dozens of input and output optical ports, it will not only occupy a large chip area, but also reduce the coupling yield between the optical fiber and the chip, making the optical coupling loss problem more serious. The present invention overcomes the problem of optical coupling loss by using an optical switch used directly on the chip. In addition, since conventional sub-micron-sized silicon waveguides on insulators have strong birefringence characteristics, the effective refractive index of transverse electric field and transverse magnetic field polarization is very different, so the couplers and phase shifters based on this also have polarization correlation. For optical switches with optical fiber input and output, how to reduce the polarization dependence of the device has always been a difficult problem in the design of silicon-based optical switching. In the present invention, an optical switch used directly on the chip is used, and the waveguide input and output polarization is fixed and single, which cleverly avoids the difficulty of polarization correlation of silicon optical switches, and the waveguide input and output have better stability. The on-chip optical switch is compatible with the silicon photonic process of the photonic chip, which simplifies the process flow and saves costs.

[0056] The various aspects, features, advantages, etc. of the present invention will be described in detail below in conjunction with the accompanying drawings. According to the following detailed description in conjunction with the accompanying drawings, the above aspects, features, advantages, etc. of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] Figure 1 FIG. 4 is a schematic diagram showing a planar layout of an on-chip all-optical switching network device according to an embodiment of the present invention.

[0058] Figure 2 It is shown Figure 1 Schematic diagram of a stitching coupler for optical waveguide interconnection of adjacent photonic integrated circuit sub-chips.

[0059] Figure 3 It is shown Figure 1 Schematic diagram of the evanescent wave coupler that interconnects the optical waveguides at different layers in a photonic integrated circuit sub-chip.

[0060] Figure 4 is a schematic diagram showing an on-chip optical switch composed of a plurality of optical switching units.

[0061] Figure 5 It is shown Figure 4 Schematic diagram of the structure of the optical switching unit.

[0062] Figure 6 It is shown Figure 1 Schematic diagram of the connection topology between four communication nodes on an on-chip all-optical switching network device.

[0063] Figure 7 FIG. 1 is a schematic diagram showing a planar layout of a semiconductor device according to an embodiment of the present invention.

[0064] Figure 8 It is shown Figure 7 Schematic diagram of a packaging structure of a semiconductor device.

[0065] Fig. 9 FIG. 4 is a schematic diagram of a planar layout of a semiconductor device according to another embodiment of the present invention.

[0066] Fig.10 FIG. 4 is a schematic diagram of a planar layout of a semiconductor device according to still another embodiment of the present invention. DETAILED DESCRIPTION

[0067] Exemplary embodiments will be described in more detail below with reference to the accompanying drawings. Certain terms may be used in the description for reference only, and these terms are not intended to limit the scope of protection. For example, terms such as "top", "bottom", "upper", "lower", "above..." and "below..." may be used to refer to directions in the accompanying drawings used as reference. Terms such as "front", "back", "back", "side", "outside" and "inside" may be used to describe the orientation and / or position of parts of a component in a consistent but arbitrary reference system, which can be clearly understood by reference to the text describing the component in question and the associated drawings. Unless the context clearly indicates, "first", "second" and other similar numerical terms do not imply an order or sequence.

[0068] It should be understood that when an element or feature is referred to as being "on another element or layer," "connected to" or "coupled to" another element or layer, it can be directly on, connected to or coupled to the other element or feature, or one or more intervening elements or features may be present. In addition, it should be further understood that when an element or feature is referred to as being "between" two elements or features, it can be the only element or feature between the two elements or features, or one or more intervening elements or features may also be present.

[0069] The terms used herein are for the purpose of describing specific embodiments, but are not intended to limit the present invention. Such terms may include the words specifically mentioned herein, their derivative words and words of similar meanings. As used herein, the singular forms "one" and "a kind of" are intended to also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "comprise", "include" and "have" specify the existence of stated features, integral bodies, steps, operations, elements and / or parts in this article, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or their sets. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Expressions such as "at least one of..." modify the entire list of elements when they are before the list of elements, rather than modifying the separate elements of the list.

[0070] As used herein, "substantially," "about," and the like are used as terms of approximation rather than as terms of degree, and are intended to take into account the inherent variations in measured or calculated values ​​that one of ordinary skill in the art will recognize. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively.

[0071] Figure 1An exemplary embodiment of an on-chip all-optical switching network device of the present invention is shown. In an exemplary embodiment, the on-chip all-optical switching network device includes a photonic chip 100, and the photonic chip 100 includes a photonic integrated circuit sub-chip 110 and a photonic integrated circuit sub-chip 120 that are optically interconnected with each other. In some embodiments of the present invention, a full mask mask is used to expose the photonic chip 100 to form the photonic integrated circuit sub-chip in the photonic chip, and two adjacent photonic integrated circuit sub-chips are optically interconnected. Each of the photonic integrated circuit sub-chips has a plurality of first-type optical waveguides 401 and an on-chip optical switch 202.

[0072] In an exemplary embodiment, the optical waveguides at the junction or interface 403 of adjacent photonic integrated circuit sub-chips 110 and 120 are optically connected via a splicing coupler. The structure of the splicing coupler is as follows: Figure 2 As shown, for example, the first type optical waveguides 401 on both sides of the interface 403 are configured as follows: the waveguide cross section gradually increases from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip (for example, a trumpet shape, a cone shape), so that the coupling surface becomes larger, the alignment tolerance of adjacent first type optical waveguides 401 at the photonic integrated circuit sub-chip interface is increased, and the coupling efficiency is improved. The first type optical waveguide 401 includes a waveguide connecting the following communication node and the on-chip optical switch 202, and a waveguide connecting the following optical input coupler 405 and the optical power splitter 404.

[0073] In an exemplary embodiment, if Figure 1 As shown, two communication nodes are arranged on each of the photonic integrated circuit sub-chips, so that four communication nodes, namely node 0, node 1, node 2 and node 3, are arranged on the photonic chip 100. The communication nodes are respectively configured to be suitable for communicating with an external device (for example, the analog electronic chip 102 described later). On the photonic chip, node 0, node 1, node 2 and node 3 are optically interconnected via a plurality of first type optical waveguides 401 and any one of the on-chip optical switches 202. In addition, the on-chip all-optical switching network device also includes an optical switching control analog electronic chip (see Figure 7 and Figure 8 103 in ). Figure 7 and Figure 8 As shown, on the photonic chip 100, the optical switching control analog electrical chip 103 is located above the on-chip optical switch 202 to facilitate control of the on-chip optical switch.

[0074] In some embodiments of the present invention, each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units. The number of electro-optical conversion units and photoelectric conversion units of each of the communication nodes is equal to that of the total number of on-chip optical switches in the photonic chip. Each of the on-chip optical switches has multiple input ports and multiple output ports. The number of input ports of each on-chip optical switch is equal to the total number of communication nodes on the photonic chip, and the number of output ports of each on-chip optical switch is equal to the number of communication nodes set on the photonic chip. Thus, each communication node can exchange information with each on-chip optical switch.

[0075] In an exemplary embodiment, the electro-optical conversion unit includes a modulator 200, and the photoelectric conversion unit includes a detector 201. Two modulators 200 constitute a modulator array, two detectors 201 constitute a detector array, and the modulator 200 and the detector 201 are arranged in parallel. In an optional embodiment of the present invention, the modulator and the detector can be arranged in an alternating arrangement. In some embodiments of the present invention, the modulator 200 includes a microring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator. In some embodiments of the present invention, the detector 201 includes a microring detector or a photodiode.

[0076] In an exemplary embodiment, the two modulators 200 are optically connected to the input port of the on-chip optical switch in the photonic integrated circuit sub-chips 110 and 120 via two first-type optical waveguides 401, respectively; the two detectors 201 are optically connected to the output port of the on-chip optical switch in the photonic integrated circuit sub-chips 110 and 120 via two other first-type optical waveguides 401, respectively. In an exemplary embodiment, the modulators and detectors are optically connected to the corresponding first-type optical waveguides 401 via different second-type optical waveguides 400. In the photonic integrated circuit sub-chip (or photonic chip), the second-type optical waveguide 400 and the first-type optical waveguide 401 are located in different layers. In order to achieve optical connection of waveguides located in different layers, as shown in FIG. Figure 3 As shown, an evanescent wave coupler 402 is formed between the second type optical waveguide 400 and the first type optical waveguide 401, and the evanescent wave coupler 402 optically connects the second type optical waveguide 400 with the first type optical waveguide 401. In an exemplary embodiment, the input and output ports of the on-chip optical switch are connected to the corresponding first type optical waveguides through other corresponding second type optical waveguides.

[0077] In an exemplary embodiment, Figure 1As shown, each on-chip optical switch 202 has 4 input ports and 4 output ports. The 4 input ports of each on-chip optical switch 202 are connected to a modulator 200 of node 0, a modulator 200 of node 1, a modulator 200 of node 2, and a modulator 200 of node 3 through 4 first optical waveguides 401; the 4 output ports of each on-chip optical switch 202 are connected to a detector 201 of node 0, a detector 201 of node 1, a detector 201 of node 2, and a detector 201 of node 3 through another 4 first optical waveguides 401.

[0078] The on-chip optical switch 202 includes a plurality of optical switching units. Figure 4 As shown, the on-chip optical switch 202 is a 4x4 on-chip optical switch, which is composed of 16 optical switching units 406 arranged in a 4x4 matrix format. By controlling the signal output port of each switching unit, Figure 4 Any combination of paths between the four-channel input and the four-channel output in the example embodiment, and the insertion loss on each path is independent of the path. Figure 5 As shown, the optical switching unit 406 has a Mach-Zehnder interferometer structure, and is composed of an electro-optical or thermo-optical phase shifter 407 and a 2x2 beam splitter 408. The optical switching control analog electrical chip 103 described later is configured to control the upper and lower arm electro-optical or thermo-optical phase shifters 407 to change the amplitude and thus change the output port position, thereby arranging and switching the data transmitted in the on-chip optical switching network.

[0079] Thus, the connection topology structure formed between the four communication nodes on the on-chip all-optical switching network device via each on-chip optical switch 202 is as follows: Figure 6 As shown, each communication node is optically interconnected with four communication nodes including itself via any optical switching network 601. The optical path can be reconstructed through the central optical switching network 601, and the path connecting the input and output can be changed in real time. Figure 6 As shown, for example, the information sent by node 0 can be transmitted to node 0, node 1, node 2, and node 3 respectively through the optical switching network 601.

[0080] In an exemplary embodiment, Figure 1As shown, each of the photonic integrated circuit sub-chips of the photonic chip 100 also has an optical input coupler 405 and an optical power separator 404. The optical input coupler 405 of one of the photonic integrated circuit sub-chips (e.g., the first photonic integrated circuit sub-chip or the second photonic integrated circuit sub-chip) is connected to the optical power separator 404 through a first type optical waveguide 401, and is configured to couple light from an off-chip light source into the photonic chip 100. The optical power separator 404 is configured to separate the light from the optical input coupler 405 into a plurality of optical outputs, wherein each of the plurality of optical outputs has substantially the same power, and the plurality of optical outputs are transmitted to each modulator 200 via a plurality of second type optical waveguides 400. As shown in FIG. Figure 1 As shown, the light input by the optical input coupler 405 on the first photonic integrated circuit sub-chip is transmitted to the modulators 200 on the two photonic integrated circuit sub-chips through the first type optical waveguide 401, the second type optical waveguide 400, or further separated by the optical power separator 404 via the second type optical waveguide 400. The first type optical waveguide 401 connecting the optical input coupler 405 and the optical power separator 404 can be connected to the second type optical waveguide 400 for optical input via an evanescent wave coupler, and the second type optical waveguide 400 for optical input is connected to the modulator 200. In some embodiments of the present invention, the first type optical waveguide 401 includes a silicon nitride waveguide. In some embodiments of the present invention, the second type optical waveguide 400 includes a silicon waveguide.

[0081] In some embodiments of the present invention, the optical input coupler, optical power separator, modulator, detector, on-chip optical switch, and second-type optical waveguide are arranged in the same layer, and the output end of the optical input coupler, the input and output ends of the optical power separator, the input and output ends of the modulator, the input end of the detector, and the input and output ends of the on-chip optical switch are respectively connected to the corresponding first-type optical waveguide 401 through different second-type optical waveguides 400, wherein the second-type optical waveguide 400 is connected to the corresponding first-type optical waveguide 401 through an evanescent wave coupler.

[0082] In some embodiments of the present invention, the optical input coupler 405 includes a grating coupler or an end face coupler. The optical power separator 404 includes a beam splitter.

[0083] From the above, it can be known that in the embodiment of the present invention, multiple photonic integrated circuit sub-chips made by exposure using a full mask mask are spliced ​​through waveguides to form a photonic chip, and the photonic chip is used as an intermediate layer to connect electrical chips, thereby solving the power consumption and bandwidth density bottlenecks of chip-to-chip interconnection. Except for the different exposure masks of the first type of optical waveguide connecting the optical input coupler 405 and the optical power separator 404, the exposure masks of other components on the photonic integrated circuit sub-chip are exactly the same, thus saving chip tape-out costs.

[0084] Applying the on-chip all-optical switching network device of the embodiment of the present invention to an artificial intelligence chip can obtain advantages such as achieving a higher system energy efficiency ratio. The application of the on-chip all-optical switching network device of the present invention is illustrated below.

[0085] Figure 7 and Figure 8 A semiconductor device is shown, which is an example application of an on-chip all-optical switching network device. The on-chip all-optical switching network device is the on-chip all-optical switching network device described in any of the above embodiments, so the previous figures and figure numbers are referred to in the following description. In an exemplary embodiment, the semiconductor device includes a plurality of digital electrical chips and a plurality of analog electrical chips connected to the on-chip all-optical switching network device of any of the above embodiments, wherein each digital electrical chip is electrically connected to a corresponding analog electrical chip. In an exemplary embodiment, Figure 7 As shown, the four analog electrical chips 102 are configured so that any two analog electrical chips can communicate with each other through the on-chip optical switching network on the photonic chip 100, so that any two digital electrical chips among the multiple digital electrical chips can communicate with each other through at least two of the analog electrical chips and the on-chip optical switching network. Among them, the information transmission path connecting any two analog electrical chips 102 includes at least one on-chip optical switch 202. In other words, any two analog electrical chips can communicate with each other through one on-chip optical switch 202 or through multiple on-chip optical switches 202. The information transmission path connecting any two digital electrical chips 101 includes at least one optical path, and the optical path includes at least one on-chip optical switch 202. In other words, any two digital electrical chips can communicate with each other through at least one on-chip optical switch 202.

[0086] In an exemplary embodiment, the semiconductor device includes a substrate 104. The photonic chip 100 is mounted on the substrate 104. The photonic chip 100 has the photonic integrated circuit sub-chip described in any of the above embodiments, that is, the above-mentioned on-chip optical switching network is formed on the photonic chip 100. Four analog electrical chips 102 are respectively mounted at the communication nodes on the photonic chip 100, that is, Figure 7As shown, the analog electric chip 102 is mounted on the position where the modulator or modulator array and the detector or detector array are located, and is in communication connection with the modulator and the detector. Four digital electric chips 101 are around the photonic chip 100 and mounted on a substrate 104. A digital electric chip 101 is mounted on the substrate near each analog electric chip 102, and the digital electric chip 101 and the corresponding analog electric chip 102 can be interconnected through an ultra-short distance SerDes interface or a parallel interface.

[0087] Combine the following Figures 1 to 8 The information transmission of the semiconductor device is described. The light generated by the laser module 300 is coupled into the photonic chip 100 via the optical fiber array 301 and the optical input coupler 405, and the light is transmitted to the modulator 200 via the first type optical waveguide 409 (or further through the optical power separator 404) and the second type optical waveguide 400 connected to the modulator 200.

[0088] The low-speed parallel signal (i.e., digital information) of the digital electronic chip 101 at the transmitting end is converted into a high-speed serial signal via a SerDes interface or a parallel interface, and is transmitted to the corresponding analog electronic chip 102 through the wiring structure (e.g., metal routing) on ​​the substrate 104 and the silicon through-hole 501 of the photonic chip 100. The analog electronic chip 102 generates an electrical signal for modulating light based on the received high-speed serial signal. The modulator 200 modulates the input light based on the electrical signal of the analog electronic chip to obtain a modulated optical signal, thereby loading the information carried by the electrical signal into the modulated optical signal. The modulated optical signal modulated by the modulator 200 is transmitted to the input port of the corresponding on-chip optical switch 202 via the second type optical waveguide 400 and the first type optical waveguide 401. The on-chip optical switch 202 determines the output port and reconstructs the optical path under the control of the optical switching control analog electronic chip 103. The modulated optical signal is output from the determined output port of the on-chip optical switch 202, and is transmitted to the detector 201 at the receiving end via the first type optical waveguide 401 and the second type optical waveguide 400 optically connected to the output port. In some embodiments of the present invention, the first type optical waveguide 401 is a silicon nitride waveguide, the on-chip switch 202 is a silicon optical switch, and the input port and output port of the on-chip optical switch 202 are silicon waveguides (i.e., the second type optical waveguide 400). Therefore, the first type optical waveguide 401 is connected to the input port and output port of the on-chip optical switch 202 through an evanescent wave coupler. The on-chip optical switch 202 is formed in the process of forming the photonic integrated circuit sub-chip, is compatible with other silicon optical processes, and has a simple process.

[0089] The detector 201 converts the received modulated optical signal into an analog electrical signal through photoelectric conversion, and sends it to the corresponding analog electrical chip 102 at the receiving end. The analog electrical chip 102 at the receiving end processes the received electrical signal and transmits it to the SerDes interface or serial interface on the corresponding digital electrical chip 101 at the receiving end through the through silicon via 501 of the photonic chip 100 and the wiring structure (such as metal wiring) on ​​the substrate 104. The SerDes interface or parallel interface converts the serial signal into a parallel signal, thereby realizing the communication between the digital electrical chip at the transmitting end and the digital electrical chip at the receiving end.

[0090] In some embodiments of the present invention, four digital electronic chips 101 can be configured to transmit, receive and process data in parallel via two on-chip optical switches 202 , so that the system bandwidth of the semiconductor device using the present invention can be significantly improved compared to the prior art.

[0091] exist Figure 1-8 In an example implementation, the first digital electrical chip can communicate with the second digital electrical chip through one of the on-chip optical switches, and the first digital electrical chip can also communicate with the second digital electrical chip through two on-chip switches at the same time. The first digital electrical chip can also communicate with the second digital electrical chip through one of the on-chip optical switches and communicate with the third digital electrical chip through another on-chip optical switch at the same time.

[0092] According to the above embodiments, the present invention uses a photonic chip 100 formed by splicing multiple full-mask-size photonic integrated circuit sub-chips through waveguides as an intermediary layer to integrate a series of analog electrical chips 102, and the analog electrical chip 102 and a series of digital electrical chips 101 around the photonic chip 100 are connected through a SerDes interface or a parallel interface. By loading (for example, modulating) the information on different analog electrical chips on optical signals, and then allowing the optical signals to shuttle at high speed in the on-chip all-optical switching network of the photonic chip 100, the data is arranged and exchanged through the on-chip optical switch in the center, and the information interconnection between different analog electrical chips is completed, so that different digital electrical chips can form an organic whole through electro-optical conversion, photoelectric conversion and optical interconnection. In some embodiments, by integrating a series of modulator arrays and detector arrays under different analog electrical chips, a large amount of information can be transmitted between chips without being limited by power consumption and bandwidth density. By cleverly arranging the positions of modulators or modulator arrays, detectors or detector arrays, on-chip optical switches and corresponding analog electrical chips, the effective bandwidth of digital electrical chips can be increased, thereby improving the system computing utilization.

[0093] It should be noted that the present invention does not limit the number of photonic integrated circuit sub-chips with on-chip optical switches on the photonic chip 100, and the photonic integrated circuit sub-chips (on-chip optical switches) of the above exemplary embodiment can be expanded according to application requirements to achieve more communication between digital electronic chips and improve system bandwidth and computing power. Fig. 9 As shown, in another embodiment of the semiconductor device of the present invention, three photonic integrated circuit sub-chips are formed on the photonic chip 100, and the three photonic integrated circuit sub-chips are arranged in parallel in sequence, and each photonic integrated circuit sub-chip is provided with a 6x6 on-chip optical switch 203 and two analog electrical chips 102. The 6×6 on-chip optical switch is composed of 36 optical switching units arranged in a 6×6 matrix format. By controlling the signal output port of each switching unit, any combination of paths between six-channel input and six-channel output can be achieved, and the insertion loss on each path is independent of the path. Therefore, six analog electrical chips 102, three 6x6 on-chip optical switches 203 and their optical switching control analog electrical chips 103 are arranged on the photonic chip 100. Corresponding to the analog electrical chip 102, six photonic transceiver devices (TX / RX) 105 are formed in the photonic chip 100, and six digital electrical chips 101 are arranged on the substrate 104 outside the photonic chip 100. In some embodiments, the photon transceiver device (TX / RX) 105 includes a modulator or a modulator array, a detector or a detector array. For example, the photon transmitter (TX) includes a modulator or a modulator array, and the photon receiver (RX) includes a detector or a detector array. Although not shown, it should be understood that the optical waveguide wiring in the photon chip 100 is similar to the embodiment described above, that is, the six input ports of each 6x6 on-chip optical switch 203 are optically connected to the photon transmitters of the six photon transceiver devices via six first-type optical waveguides, and the six output ports are optically connected to the photon receivers of the six photon transceiver devices via another six first-type optical waveguides. Thus, the six digital electrical chips 101 of the semiconductor device of this embodiment can communicate with each other through the on-chip optical switching network formed by any one of the 6x6 on-chip optical switches 203. Since the six digital electrical chips 101 can be configured to transmit, receive and process data in parallel, the system bandwidth and computing power of the semiconductor device using the present invention can be greatly improved.

[0094] like Fig.10 As shown, in a semiconductor device of another embodiment of the present invention, four photonic integrated circuit sub-chips are arranged side by side on a photonic chip 100, and each photonic integrated circuit sub-chip is provided with an 8x8 on-chip optical switch 204 and two analog electrical chips 102, so that eight digital electrical chips 101 are arranged on a substrate 104 outside the photonic chip 100. In addition, Fig.10Other structures of the semiconductor device shown are Figure 8 The corresponding structures shown are similar. Fig.10 In the semiconductor device shown, eight digital electronic chips 101 can communicate with each other through an on-chip optical switching network formed by any 8x8 on-chip optical switch 204. The 8×8 on-chip optical switch is composed of 64 optical switching units arranged in an 8×8 matrix format. By controlling the signal output port of each switching unit, any combination of paths between eight-channel input and eight-channel output can be achieved, and the insertion loss on each path is independent of the path. It should be understood that the present invention is not limited to this. According to the scale of the optoelectronic computing system, a photonic chip formed with more photonic integrated circuit sub-chips with on-chip optical switches can be used to achieve communication between more digital electronic chips. Through the horizontal expansion of the on-chip optical switch (for example, two or more on-chip optical switches can be set on each photonic integrated circuit sub-chip), a series of digital electronic chips can simultaneously process information in parallel, which can better meet the requirements of artificial intelligence algorithms for computing power and bandwidth. Compared with the existing artificial intelligence computing system, the optoelectronic computing system using the on-chip all-optical switching network device or semiconductor device of the present invention can integrate more computing chips and storage chips, and the use of optical interconnection can ensure organic information interconnection between them, thereby providing a higher system energy efficiency ratio.

[0095] In addition, an embodiment of the present invention provides a method for manufacturing an on-chip all-optical switching network device as described in any one of the above embodiments, comprising:

[0096] providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; and

[0097] Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips;

[0098] Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; any two of the communication nodes communicate via at least one on-chip optical switch;

[0099] Wherein, on the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

[0100] In some embodiments of the present invention, the photonic integrated circuit sub-chip is made by exposure using a full mask mask. The structures of the photonic chip and the photonic integrated circuit sub-chip are as described above and will not be repeated here.

[0101] In addition, an embodiment of the present invention provides a method for manufacturing the semiconductor device described in any one of the above embodiments, comprising:

[0102] Provide an on-chip all-optical switching network device as described in any one of the above embodiments, the structure of the on-chip all-optical switching network device is as described above, which will not be repeated here;

[0103] Providing a plurality of analog electrical chips, and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; and

[0104] A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

[0105] In some embodiments of the present invention, the method for manufacturing the semiconductor device further comprises:

[0106] providing a substrate;

[0107] Mounting the photonic chip on the substrate;

[0108] The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are mounted on the substrate, respectively.

[0109] In some embodiments of the present invention, analog electrical chips and digital electrical chips are provided separately, which can not only optimize the performance of each chip in different process steps, but also solve the problem of slow iteration cycle of analog electrical chip products, and further improve the yield of the overall system.

[0110] In some embodiments of the present invention, an on-chip optical switching network is formed in a photonic chip by splicing fully masked photonic integrated circuit sub-chips. Except for the silicon nitride exposure mask connecting the optical coupler of the input laser and the communication node, the exposure masks of other components on the photonic integrated circuit sub-chip are exactly the same, thus saving chip tape-out costs.

[0111] Those skilled in the art should understand that what is disclosed above is only an implementation mode of the present invention, and it certainly cannot be used to limit the scope of rights requested for patent protection in this application. Equivalent changes made according to the implementation mode of the present invention are still within the scope covered by the claims of this application.

[0112] For example, in an optional embodiment of the present invention, the photonic chip is bonded to an interposer, and the interposer is mounted on a substrate. The interposer can be made of materials such as silicon, glass, and ceramics, and mainly plays a supporting role to ensure that the photonic chip is not prone to warping and fragmentation. In an optional embodiment of the present invention, a photonic chip including a photonic integrated circuit sub-chip can be arranged on the upper surface of the interposer, and the digital electronic chip can be arranged on the lower surface of the interposer. In an optional embodiment, the analog electronic chip can also be arranged on the substrate and connected to the photonic integrated circuit sub-chip through metal wiring. Those skilled in the art should understand that these variations also fall within the scope of protection of this application.

Claims

1. An on-chip all-optical switching network device, characterized in that: include: a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; as well as At least two optical switching control analog electrical chips, respectively arranged on the at least two photonic integrated circuit sub-chips; Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; On the photonic chip, any two communication nodes communicate with each other via at least one on-chip optical switch.

2. The device according to claim 1, characterized in that On the photonic integrated circuit sub-chip, the optical switching control analog electrical chip is located above the on-chip optical switch so as to control the on-chip optical switch.

3. The device according to claim 1, characterized in that Each of the communication nodes includes at least two electro-optical conversion units and at least two photoelectric conversion units; The at least two electro-optical conversion units are optically connected to the at least two on-chip optical switches via the first type of optical waveguides respectively; The at least two photoelectric conversion units are optically connected to output ports of the at least two on-chip optical switches via another of the first-type optical waveguides, respectively.

4. The device according to claim 3, characterized in that The number of electro-optical conversion units and photoelectric conversion units of each communication node is equal to the total number of the on-chip optical switches on the photonic chip.

5. The device according to claim 3, characterized in that Each of the on-chip optical switches has a plurality of input ports and a plurality of output ports; The number of the input ports of each on-chip optical switch is equal to the number of the output ports, which are equal to the total number of communication nodes on the photonic chip.

6. The device according to claim 5, characterized in that The multiple input ports of each of the on-chip optical switches are optically connected to at least one electro-optical conversion unit in each of the communication nodes through a plurality of different first-type optical waveguides; The multiple output ports of each of the on-chip optical switches are optically connected to at least one optoelectronic conversion unit in each of the communication nodes through another plurality of different first-type optical waveguides.

7. The device according to claim 3, characterized in that The electro-optical conversion unit includes a modulator; and / or the photoelectric conversion unit includes a detector.

8. The device according to claim 7, characterized in that The at least two electro-optical conversion units include a modulator array composed of the modulators; and / or The at least two photoelectric conversion units include a detector array composed of the detectors.

9. The device according to claim 8, characterized in that In the communication node, the modulator and the detector are arranged side by side or alternately.

10. The device according to claim 7, characterized in that The modulator includes a micro-ring modulator, a Mach-Zehnder modulator, or an electro-absorption modulator.

11. The device according to claim 7, characterized in that The detector comprises a micro-ring detector or a photodiode.

12. The device according to claim 7, characterized in that Each of the photonic integrated circuit sub-chips also has: an optical input coupler and an optical power separator, wherein: In the photonic chip, an optical input coupler on one of the photonic integrated circuit sub-chips is configured to couple light from an off-chip light source into the photonic chip; and The optical power separator is optically connected to the optical input coupler configured to couple light from an off-chip light source into the photonic chip through another first-type optical waveguide and is configured to separate the light from the optical input coupler into multiple optical outputs, wherein each of the multiple optical outputs has substantially the same power, and the multiple optical outputs are transmitted to each modulator.

13. The device according to claim 12, characterized in that In the photonic chip, the first type optical waveguides of two adjacent photonic integrated circuit sub-chips are optically interconnected.

14. The device according to claim 13, characterized in that The first type of optical waveguides facing each other at the junction of two adjacent photonic integrated circuit sub-chips are constructed as a structure in which the waveguide cross section gradually increases from one photonic integrated circuit sub-chip toward another photonic integrated circuit sub-chip.

15. The device according to claim 12, characterized in that Each of the photonic integrated circuit sub-chips also has a second type of optical waveguide located at a different layer from the first type of optical waveguide; wherein one or more of the on-chip optical switch, the electro-optical conversion unit, the optoelectronic conversion unit, the optical input coupler, and the optical power splitter are optically connected to the corresponding first-type optical waveguide through different second-type optical waveguides; The second type optical waveguide is optically connected to the first type optical waveguide via an evanescent wave coupler.

16. The device according to claim 15, characterized in that The first type optical waveguide includes a silicon nitride waveguide; and the second type optical waveguide includes a silicon waveguide.

17. The device according to claim 1, characterized in that The on-chip optical switch is a silicon optical switch, comprising a plurality of optical switching units; The optical switching control analog electrical chip is configured to control the multiple optical switching units to arrange and switch data transmitted in the on-chip optical switching network.

18. The device according to claim 17, characterized in that The optical switching unit has a Mach-Zehnder interferometer structure.

19. The device according to claim 17, characterized in that The on-chip optical switch is arranged at the same layer as the communication node.

20. The device according to any one of claims 1 to 19, characterized in that The photonic integrated circuit sub-chip is manufactured by exposure using a full-mask mask.

21. A semiconductor device comprising: The on-chip all-optical switching network device according to any one of claims 1 to 20; A plurality of analog electrical chips connected to the on-chip all-optical switching network device and configured so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; as well as A plurality of digital electrical chips, each of which is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

22. The semiconductor device according to claim 21, wherein: Also includes a substrate, Wherein, the photonic chip is mounted on the substrate, The plurality of analog electrical chips are respectively mounted on corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are respectively mounted on the substrate.

23. The semiconductor device according to claim 22, wherein: On the photonic integrated circuit sub-chip, the analog electrical chip is arranged in a one-to-one correspondence with the communication node and is located above the communication node.

24. A method for manufacturing the on-chip all-optical switching network device according to any one of claims 1 to 20, comprising: providing a photonic chip in which at least two photonic integrated circuit sub-chips are formed, and adjacent photonic integrated circuit sub-chips are optically interconnected with each other; as well as Providing at least two optical switching control analog electrical chips, which are respectively arranged on the at least two photonic integrated circuit sub-chips; Each of the photonic integrated circuit sub-chips has: at least one on-chip optical switch, at least two communication nodes suitable for communicating with external devices, and a plurality of first-type optical waveguides for connecting the on-chip optical switch and the communication nodes, wherein the on-chip optical switch and the optical switching control analog electrical chip are arranged in a one-to-one correspondence; Among them, on the photonic integrated circuit sub-chip, any two communication nodes communicate with each other via at least one on-chip optical switch.

25. A method for manufacturing the semiconductor device according to any one of claims 21 to 23, comprising: Provide an on-chip all-optical switching network device as described in any one of claims 1 to 20; Providing a plurality of analog electrical chips, connecting the plurality of analog electrical chips to the on-chip all-optical switching network device and configuring the plurality of analog electrical chips so that any two analog electrical chips can communicate with each other through at least one on-chip optical switch in the on-chip all-optical switching network device; as well as A plurality of digital electrical chips are provided, and each digital electrical chip is electrically connected to a corresponding analog electrical chip, so that any two of the plurality of digital electrical chips can communicate with each other via at least two of the analog electrical chips and the at least one on-chip optical switch.

26. The method according to claim 25, characterized in that Also includes: providing a substrate; Mounting the photonic chip on the substrate; The plurality of analog electrical chips are mounted on the corresponding photonic integrated circuit sub-chips on the photonic chip, and the digital electrical chips corresponding to each analog electrical chip are mounted on the substrate, respectively.

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