Image sensor and electronic device

Abstract

The utility model provides an image sensor and an electronic device, and the preparation method comprises the steps: forming a first groove and a second groove in a semiconductor substrate through different steps, forming a light-absorbing material layer in the first groove based on different process steps, and forming a light-transmitting material layer in the second groove. According to the structure and the process, high sensitivity of the same color and low crosstalk among different signals can be considered at the same time, the flexibility of device preparation is improved, and the optimization of corresponding structure performance is facilitated; on the basis of ensuring each structural performance, the process steps of preparation of the image sensor comprising the absorbing material layer and the light-transmitting material layer can be simplified, the design of different steps can also widen the application field of the image sensor and improve the image quality, and in addition, the design of the utility model can also improve the image quality in a phase focusing pixel unit. And the accuracy of pixel combination is improved on the basis of realizing the focusing function.

Description

Technical Field

[0001] The utility model belongs to the technical field of image acquisition, and in particular relates to an image sensor and corresponding electronic equipment. Background Art

[0002] Image sensors are an important component of digital cameras. Depending on the components, they can be divided into two categories: CCD (Charge Coup led Device) and CMOS (Complementary Meta l-Oxide Semiconductor). With the continuous development of CMOS integrated circuit manufacturing technology, especially the design and manufacturing technology of CMOS image sensors, CMOS image sensors have gradually replaced CCD image sensors and become the mainstream. Compared with other technologies, CMOS image sensors have the advantages of low voltage, low power consumption, low cost and high integration, and have important application value in the fields of machine vision, consumer electronics, high-definition monitoring and medical imaging.

[0003] In addition, near-infrared (NIR) imaging is a very valuable technology that can be used in a variety of applications, including agriculture, food testing, medical diagnosis and environmental monitoring. NIR cameras use CMOS technology to capture images in the infrared wavelength range below visible light, revealing information hidden below the ordinary spectrum. NIR imaging is an infrared band between visible light and thermal infrared imaging. This band includes light that cannot be perceived by the human eye and can be used to measure the chemical composition, moisture content and temperature of objects. Therefore, it has a wide range of applications in agriculture, medicine and food industry.

[0004] However, in CIS pixel design, if the crosstalk between different colors is high, it will affect the color purity and color noise, so this part needs to be reduced as much as possible, but at the same time, the higher the sensitivity of the pixel, the better. Therefore, it is crucial to design a structure and manufacturing process that can take into account both high sensitivity and low crosstalk of the same color. In addition, quantum efficiency QE (Quantum Efficiency) is also an indicator that CMOS image sensors focus on, especially the main problem facing the response in the near-infrared band is the small QE value. For example, in some CMOS image sensors, the QE at 550nm is nearly 70%, while the QE at 900nm is only about 10%. In addition, due to the low QE value, in order to image in the near-infrared band, the power of the fill light source needs to be increased, which will cause a sharp increase in the heat loss of the system, which not only increases energy consumption but also reduces the reliability of the system. In addition, the demand for phase focusing technology in CI S equipment is also increasing, and effective means are needed to achieve focusing and improve image quality.

[0005] Therefore, it is necessary to provide an image sensor and a method for manufacturing the same, and an electronic device to solve the problems of sensitivity and crosstalk requirements in the prior art and to design an effective manufacturing process. Utility Model Content

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide an image sensor and an electronic device for solving the problems of improving the sensitivity and crosstalk of the image sensor in the prior art and how to prepare the corresponding image sensor structure.

[0007] In order to achieve the above-mentioned object and other related objects, the utility model provides a method for preparing an image sensor, the preparation method comprising:

[0008] Providing a semiconductor substrate, the semiconductor substrate comprising a device function layer of a first doping type;

[0009] preparing a semiconductor device in the device functional layer from the first surface of the semiconductor substrate, the semiconductor device comprising a photoelectric conversion element of a second doping type different from the first doping type;

[0010] preparing a first trench in the device functional layer from the second surface of the semiconductor substrate;

[0011] Preparing a modified auxiliary film layer on the surface of the first groove;

[0012] Preparing a light absorbing material layer on the surface of the modified auxiliary film layer;

[0013] preparing a second trench in the device functional layer from the second surface of the semiconductor substrate, wherein the second trench is prepared from a surface exposed from the second surface of the semiconductor substrate;

[0014] Preparing a modified functional film layer on the surface of the second groove, the surface of the semiconductor substrate around the second groove, and the surface where the modified auxiliary film layer and the light absorbing material layer are exposed;

[0015] A light-transmitting material layer is prepared on the surface of the modified functional film layer in the second groove; wherein the first groove and the second groove are prepared between adjacent semiconductor devices.

[0016] Optionally, the steps of preparing the modified auxiliary film layer and the light absorbing material layer include:

[0017] forming an initial layer of a modified auxiliary film on the surface of the first groove and the surface of the semiconductor substrate around the first groove; forming an initial layer of a light absorbing material layer on the surface of the initial layer of the modified auxiliary film;

[0018] Wherein, the modified auxiliary film layer and the light absorbing material layer are formed based on the modified auxiliary film initial layer and the light absorbing material layer initial layer by a step separation method, and the step separation method includes:

[0019] A first removal process is used to remove at least the initial layer of the light absorbing material layer around the first groove to obtain the light absorbing material layer, and after the light absorbing material layer is formed, a second removal process is used to remove the initial layer of the modified auxiliary film around the first groove to obtain the modified auxiliary film layer.

[0020] Optionally, the material of the light absorbing material layer is selected as a metal material, and the modified auxiliary film layer is selected as at least one of an oxide layer and a nitride layer. Optionally, the first removal process adopts a chemical mechanical polishing process, and the second removal process adopts a photolithography etching process. Optionally, in the first removal process, the selection ratio of the initial layer of the modified auxiliary film and the initial layer of the light absorbing material layer is in the range of (0.5-3):10. Optionally, the light-transmitting material layer is selected as at least one of an oxide layer, a nitride layer and an organic material layer, and the modified functional film layer is selected as at least one of an oxide layer and a nitride layer.

[0021] Optionally, an interconnection structure layer is prepared on the first surface of the semiconductor substrate, and a reference potential is provided to the device functional layer based on the electrical connection structure in the interconnection structure layer and through the light absorbing material layer located in the first groove. Optionally, an isolation structure is formed from the first surface of the semiconductor substrate before forming the first groove, and the first groove and the second groove are both prepared from the second surface corresponding to the isolation structure.

[0022] Optionally, the image sensor comprises a pixel array composed of a plurality of pixel units arranged in an array, wherein the pixel unit comprises an isolation structure defined by a first groove, a second groove and an internal filler. Optionally, phase focusing is achieved based on sub-pixels in the pixel unit, and image signals are acquired based on merging of each sub-pixel.

[0023] Optionally, the first groove is arranged at the periphery of the pixel unit, and the second groove is arranged inside the pixel unit, and the second groove located inside divides the pixel unit to obtain at least two sub-pixels.

[0024] Optionally, the first groove is arranged in a first diagonal area around the pixel unit, and the second groove is arranged in a second diagonal area around the pixel unit and inside the pixel unit, so as to form a double isolation structure located on the periphery of each pixel unit based on the pixel unit itself and the adjacent pixel unit.

[0025] Optionally, the center of the pixel unit corresponding to the second groove has a central recessed area, the central recessed area corresponds to a transistor arrangement area, the transistor arrangement area at least includes a floating diffusion node and a source follower transistor, and at least corresponds to the central recessed area to form a quantum efficiency improvement channel between adjacent sub-pixels.

[0026] Optionally, a plurality of adjacent sub-pixels in the pixel unit form a sub-pixel group, and an end of the second groove in each sub-pixel group close to one side of the first groove has an edge interaction area.

[0027] The utility model also provides an image sensor, which can be prepared by the preparation method described above, or by other methods. The image sensor includes:

[0028] A semiconductor substrate, wherein the semiconductor substrate comprises a device functional layer of a first doping type;

[0029] a semiconductor device located in the device functional layer, the semiconductor device comprising a photoelectric conversion element having a second doping type different from the first doping type;

[0030] A first trench and a second trench are respectively arranged in the device functional layer, and the first trench and the second trench are prepared between adjacent semiconductor devices;

[0031] A modified auxiliary film layer and a light absorbing material layer are sequentially disposed on the surface of the first groove; and

[0032] The modified functional film layer and the light-transmitting material layer are sequentially arranged on the surface of the second groove.

[0033] Optionally, the image sensor includes a pixel array consisting of a plurality of pixel units arranged in an array, and the pixel unit includes an isolation structure defined by the first trench, the second trench and an internal filler.

[0034] Optionally, the first groove is arranged at the periphery of the pixel unit, and the second groove is arranged inside the pixel unit, and the second groove located inside divides the pixel unit to obtain at least two sub-pixels.

[0035] Optionally, the first groove is arranged in a first diagonal area around the pixel unit, and the second groove is arranged in a second diagonal area around the pixel unit and inside the pixel unit, so as to form a double isolation structure located on the periphery of each pixel unit based on the pixel unit itself and adjacent pixel units.

[0036] Optionally, the center of the pixel unit corresponding to the second groove has a central recessed area, the central recessed area corresponds to a transistor arrangement area, the transistor arrangement area at least includes a floating diffusion node and a source follower transistor, and at least corresponds to the central recessed area to form a quantum efficiency improvement channel between adjacent sub-pixels.

[0037] Optionally, a plurality of adjacent sub-pixels in the pixel unit form a sub-pixel group, and an end portion of the second groove in each sub-pixel group close to a side of the first groove has an edge interaction region.

[0038] Optionally, the light-absorbing material layer is selected as a metal material, the modified auxiliary film layer is selected as at least one of an oxide layer and a nitride layer, the light-transmitting material layer is selected as at least one of an oxide layer, a nitride layer and an organic material layer, and the modified functional film layer is selected as at least one of an oxide layer and a nitride layer.

[0039] Optionally, the image sensor further comprises an interconnection structure layer located on the first surface of the semiconductor substrate, wherein a reference potential is provided to the device functional layer based on an electrical connection structure in the interconnection structure layer and through the light absorbing material layer located in the first groove.

[0040] Optionally, the depth of the second trench is less than that of the first trench, and the aspect ratio of the first trench is the same as or different from that of the second trench, so as to improve the quantum efficiency of the corresponding region based on the height difference between the two trenches.

[0041] The utility model also provides an electronic device, comprising the image sensor as described in any of the above solutions.

[0042] As described above, the image sensor and electronic device of the utility model have the following beneficial effects: the application forms a first groove and a second groove in a semiconductor substrate in different steps, and forms a light-absorbing material layer and a light-transmitting material layer therein accordingly based on different process steps, thereby being able to take into account both high sensitivity of the same color and low crosstalk between different signals, thereby improving the flexibility of device preparation, and being conducive to optimizing the performance of the corresponding structure, preventing multiple processes from being performed on a certain structure, affecting the performance of the final structure, and simplifying the process steps for preparing an image sensor including an absorption material layer and a light-transmitting material layer while ensuring the performance of each structure. The design of different steps can also broaden its application field and improve image quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 Shown is a basic structural block diagram of an image sensor system.

[0044] Figure 2 Shown is a schematic diagram of a pixel circuit of an image sensor.

[0045] Figure 3 Shown is a flow chart of image sensor preparation in an embodiment of the present application.

[0046] Figure 4 Shown is a schematic diagram of providing a semiconductor substrate in the preparation of an image sensor according to an embodiment of the present application.

[0047] Figure 5 Shown is a schematic diagram of forming an isolation structure during the preparation of an image sensor according to an embodiment of the present application.

[0048] Figure 6 Shown is a schematic diagram of forming an interconnection structure layer during the preparation of an image sensor according to an embodiment of the present application.

[0049] Figure 7 Shown is a schematic diagram of forming a first trench during the preparation of an image sensor according to an embodiment of the present application.

[0050] Figure 8 Shown is a diagram of forming an initial layer of a modified auxiliary film in the preparation of an image sensor according to an embodiment of the present application.

[0051] Fig. 9 Shown is a schematic diagram of forming an initial layer of light-absorbing material in the preparation of an image sensor according to an embodiment of the present application.

[0052] Fig.10 Shown is a schematic diagram of forming a light absorbing material layer during the preparation of an image sensor according to an embodiment of the present application.

[0053] Fig.11 Shown is a schematic diagram of forming a modified auxiliary film layer in the preparation of an image sensor according to an embodiment of the present application.

[0054] Fig.12 Shown is a schematic diagram of forming a second groove in the preparation of an image sensor according to an embodiment of the present application.

[0055] Fig.13 Shown is a schematic diagram of forming a modified functional film layer during the preparation of an image sensor according to an embodiment of the present application.

[0056] Fig.14 Shown is a schematic diagram of forming a light-transmitting material layer during the preparation of an image sensor according to an embodiment of the present application.

[0057] Fig.15 It is a schematic diagram showing the formation of a balancing layer during the preparation of an image sensor according to an embodiment of the present application.

[0058] Fig.16 A schematic diagram of an image sensor with an electrical connection structure formed therein is shown.

[0059] Fig.17 A schematic diagram of an image sensor having first grooves and second grooves of different depths prepared in the present application is shown.

[0060] Figure 18-Figure 23 Shown is a schematic diagram of a pixel unit of an image sensor prepared in the present application.

[0061] Component number description

[0062] 101-semiconductor substrate; 102-isolation structure; 103-first groove; 104-modified auxiliary film initial layer; 105-light-absorbing material initial layer; 106-light-absorbing material layer; 107-modified auxiliary film layer; 108-second groove; 109-modified functional film layer; 110-light-transmitting material layer; 111-balance layer; 201-interconnection structure layer; 202-transistor gate; 203-electrical connection structure; 204-electrical interconnection layer. DETAILED DESCRIPTION

[0063] The following is an explanation of the implementation of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific implementations, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0064] It should be emphasized that the term “include / comprises” when used herein refers to the presence of features, integers, steps or components, but does not exclude the presence or addition of one or more other features, integers, steps or components.

[0065] Features described and / or shown for one embodiment may be used in one or more other embodiments in the same or similar manner, combined with features in other embodiments, or replace features in other embodiments. For example, when describing the embodiments of the present invention in detail, for ease of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale. The schematic view is only an example and should not limit the scope of protection of the present invention. In actual production, the three-dimensional space dimensions of length, width and depth should be included.

[0066] For ease of description, spatial relationship words such as "under", "below", "below", "below", "above", "on", etc. may be used herein to describe the relationship of one element or feature shown in the drawings to other elements or features. It will be understood that these spatial relationship words are intended to include other directions of the device in use or operation in addition to the direction depicted in the drawings. In addition, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or there can be one or more intervening layers. The structure described as a first feature being "above" a second feature can include embodiments in which the first and second features are formed in direct contact, and can also include embodiments in which additional features are formed between the first and second features, so that the first and second features may not be in direct contact.

[0067] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and therefore the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complicated.

[0068] Figure 1 The basic structure block diagram of an image sensor system is shown. The image sensor includes a readout circuit and a control circuit connected to a pixel array. In addition, a functional logic unit is connected to the readout circuit, and the readout circuit and the control circuit are connected to a status register to realize the control of the pixel array. The pixel array includes a plurality of pixels (P1, P2, P3) arranged in rows (R1, R2, R3...Ry) and columns (C1, C2, C3...Cx). The pixel signal output by the pixel array is output to the readout circuit via the column line. In some applications, after the pixel acquires the image data, it is read out using the readout mode specified by the status register and then transmitted to the functional logic unit. In a specific implementation, the readout circuit may include an analog-to-digital conversion (ADC) circuit and other circuits.

[0069] In some applications, the state register may include a programmable selection system to determine whether the readout system is exposed and read out through a rolling exposure mode (rolling shutter) or a global exposure mode (global shutter). The functional logic unit may store raw image data or image data after image processing. In some implementations, the readout circuit can read out a row of image data at a time along the readout column line. Of course, other methods can also be used to read out image data. The operation of the control circuit can be determined by the current setting of the state register. For example, the control circuit generates a shutter signal for controlling image acquisition. In some applications, this shutter signal can be a global exposure signal so that all pixels of the pixel array simultaneously acquire their image data through a single acquisition window. In other applications, this shutter signal can also be a rolling exposure signal so that the pixels of each pixel row of the pixel array continuously implement exposure and reading operations through the acquisition window.

[0070] Figure 2 A schematic diagram of a pixel unit in an image sensor is shown. Figure 2 As shown in the figure, each pixel unit includes a photoelectric conversion element (e.g., a photodiode) and a pixel circuit (as shown in the dotted box in the figure). The photodiode can be a buried photodiode (PPD) used in current image sensors. In one application example, the pixel circuit includes a reset transistor (RST), a source follower transistor (SF), and a pixel selection transistor (RS), which are connected to the transistors shown in the figure. Figure 2 The transfer transistor (TX) and photodiode shown in . In a stacked structure application example, the pixel circuit includes a reset transistor, a source follower transistor, a pixel selection transistor disposed on a first circuit chip, and also includes a transfer transistor disposed on a second circuit chip, and the photodiode in the second circuit chip is connected to other transistors in the first circuit chip based on the transfer transistor. In a further application example, the pixel circuit may also include a gain control transistor (DCG) connected between a floating diffusion region (FD) and a reset transistor. During operation, the photoelectric conversion element generates photocharges in response to incident light during exposure, the transfer transistor is connected to a transfer signal, which controls the transfer transistor to transfer the accumulated charge in the photoelectric conversion element to the floating diffusion region, the reset transistor is connected between the power supply voltage and the floating diffusion region, responds to the reset signal to reset the sensor pixel circuit (for example, discharges or charges the floating diffusion region and the photodiode to the current voltage), the floating diffusion region is connected to the gate of the source follower transistor, the source follower transistor is connected between the power supply voltage and the pixel selection transistor, responds to the potential of the floating diffusion region and outputs it, the pixel selection transistor connects the source follower transistor and the bit line, responds to the pixel selection control signal to implement pixel selection readout and outputs it to the readout column.

[0071] However, in the CIS pixel design, if the crosstalk between different colors is high, it will affect the color purity and color noise, so this part needs to be reduced as much as possible, but at the same time, the higher the sensitivity of the pixel, the better. Therefore, the structure and manufacturing process design that can take into account both high sensitivity and low crosstalk of the same color are crucial. In addition, quantum efficiency QE is also an indicator that CMOS image sensors focus on, especially the main problem facing the near-infrared band response is the small QE value. In addition, the demand for phase focusing technology in CI S equipment is also increasing, and effective means are needed to achieve focusing to improve image quality. The utility model can effectively improve the above problems by designing the structure and process of the image sensor.

[0072] This will be described in detail below with reference to embodiments.

[0073] Embodiment 1:

[0074] See also Figure 3 As shown, this embodiment provides a method for preparing an image sensor. Figure 3 The flowchart of the preparation method is shown, wherein the preparation method comprises the following steps:

[0075] S1: providing a semiconductor substrate, wherein the semiconductor substrate comprises a device functional layer of a first doping type;

[0076] S2: preparing a semiconductor device in the device functional layer from the first surface of the semiconductor substrate, wherein the semiconductor device includes a photoelectric conversion element of a second doping type different from the first doping type;

[0077] S3: preparing a first trench in the device functional layer from the second surface of the semiconductor substrate;

[0078] S4: preparing a modified auxiliary film layer on the surface of the first groove;

[0079] S5: preparing a light absorbing material layer on the surface of the modified auxiliary film layer;

[0080] S6: preparing a second trench in the device functional layer from the second surface of the semiconductor substrate, wherein the second trench is prepared from a surface exposed from the second surface of the semiconductor substrate;

[0081] S7: preparing a modified functional film layer on the surface of the second groove, the surface of the semiconductor substrate around the second groove, and the exposed surface of the modified auxiliary film layer and the light absorbing material layer;

[0082] S8: preparing a light-transmitting material layer on the surface of the modified functional film layer in the second groove; wherein the first groove and the second groove are prepared between adjacent semiconductor devices.

[0083] In the preparation of the image sensor of this embodiment, the first groove and the second groove are formed in different steps based on the semiconductor substrate, and the light-absorbing material layer and the light-transmitting material layer are formed therein correspondingly based on different process steps, so that high sensitivity of the same color and low crosstalk between different signals can be taken into account at the same time, and it is beneficial to optimize the corresponding structural performance, and the process steps for preparing the image sensor including the absorption material layer and the light-transmitting material layer can be simplified, while optimizing the structural performance and saving costs. The design of different steps can also broaden its application field and improve image quality. It should be noted that the preparation order corresponding to the existing process in the above steps can be changed according to actual needs, as long as it does not affect the realization of the beneficial effects of the present application.

[0084] The preparation of the image sensor of the present application will be described in detail below with reference to specific embodiments.

[0085] First, if Figure 4 As shown, step S1 is performed to provide a semiconductor substrate 101, and the semiconductor substrate 101 includes a device functional layer of a first doping type (not shown in the figure); wherein, in this embodiment, the first doping type is described as P type, of course, in other examples it can also be N type according to actual needs.

[0086] In one example, the device functional layer may be a part of the semiconductor substrate 101, for example, it may be an epitaxial layer (EPI) formed on a semiconductor substrate (such as a silicon substrate), and the epitaxial layer may be a P-type silicon epitaxial layer, which may be directly formed by an epitaxial process or may be formed by other methods of an existing process. In this case, the semiconductor substrate and the epitaxial layer constitute the semiconductor substrate 101. In one implementation, each functional region (including semiconductor devices) in the image sensor is prepared in the device functional layer; in other implementations, the semiconductor substrate 101 as a whole may be considered to be a device functional layer of the first doping type, in which case the functional region in the image sensor may be prepared in the semiconductor substrate 101. Of course, if necessary, the structure required for the image sensor may also be prepared in the semiconductor substrate or in other material layers. Further, a back-illuminated image sensor may be prepared based on the semiconductor substrate and the device functional layer.

[0087] Specifically, the semiconductor substrate 101 has a first surface 101a (upper surface) and a second surface 101b (lower surface) opposite to each other. The semiconductor substrate 101 may be a structure composed of a single material layer, including but not limited to a silicon substrate, and its material may be single crystal silicon, single crystal germanium, polycrystalline silicon, amorphous silicon, or a silicon germanium compound, etc. Of course, the semiconductor substrate 101 may also be silicon on insulator SOI, etc. In addition, the semiconductor substrate 101 may also have an N-type doped or P-type doped region to meet actual needs.

[0088] In addition, the semiconductor substrate 101 as the substrate of the image sensor may also be a multi-layer structure, such as including a semiconductor substrate and an epitaxial layer formed on the surface of the semiconductor substrate, and the epitaxial layer is used as a device functional layer to realize the preparation of the image sensor device. In addition, in other embodiments, the semiconductor substrate 101 can be any structure used to prepare the image sensor functional area in the field of image sensors, and the photosensitive element, each transistor of the CMOS image sensor can be prepared based on the semiconductor substrate 101, and interconnection wiring can be performed.

[0089] Then, if Figure 5 and Figure 6 As shown, step S2 is performed to prepare a semiconductor device in the device functional layer from the first surface 101a of the semiconductor substrate 101, and the semiconductor device includes a photoelectric conversion element of a second doping type different from the first doping type; in this embodiment, the second doping type is described as N type.

[0090] Specifically, the semiconductor device (not shown in the figure) may include a photoelectric conversion element and each transistor of a corresponding pixel circuit of an image sensor, and of course, it may also be a pixel circuit device of other CIS in the prior art to achieve the functions of image acquisition and subsequent imaging. Among them, the pixel circuit may include the transmission transistor described above, etc., which can be seen in Fig.16 and Fig.17 As shown, the transistor gate 202 is schematically shown.

[0091] like Figure 5 As shown, in one example, the preparation of the image sensor also includes the step of preparing an isolation structure 102 in the device functional layer from the first surface 101a of the semiconductor substrate 101. Optionally, the isolation structure 102 can be an ion doping isolation, and the doping type is opposite to the type of the photoelectric conversion element. In this embodiment, the isolation structure 102 is selected as a P-type doping isolation. Among them, the isolation structure 102 can be formed by ion doping, for example, by ion doping before the semiconductor device is prepared. In an optional example, the subsequent first trench and the second trench are both formed at the position of the isolation region 102.

[0092] In one implementation, the semiconductor base 101 includes a semiconductor substrate and an epitaxial layer, the epitaxial layer serves as a device functional layer, and the isolation structure 102 penetrates the device functional layer. Of course, in other implementations, the depth of the isolation structure 102 can be set according to the location or requirements of the photoelectric conversion element for isolation.

[0093] like Figure 6As shown, in one example, after forming the semiconductor device, the method further includes forming an interconnection structure layer 201 on one side of the first surface 101a of the semiconductor substrate 101. The interconnection structure layer 201 includes a dielectric layer and a multi-layer interconnection structure layer, which can realize electrical interconnection and lead-out between semiconductor devices. In other examples, a supporting substrate can be further formed on the interconnection structure layer 201 to perform subsequent processes.

[0094] Then, if Figure 7 As shown, step S3 is performed to prepare a first trench 103 in the device functional layer from the second surface 101 b of the semiconductor substrate 101 .

[0095] Specifically, the structure prepared above is flipped over, and subsequent processes are performed from the second surface 101b of the semiconductor substrate 101, wherein the semiconductor substrate 101 may be thinned after flipping, for example, thinned to a position with an isolation structure 102. In one implementation, it may be thinned to an epitaxial layer.

[0096] Regarding the formation of the first trench 103 , in one implementation, first, the deep trench isolation structure is patterned by a photolithography process; then, an etching process is performed to prepare a deep trench isolation structure in the first back side deep trench isolation structure region defined by the photolithography process, thereby obtaining the first trench 103 .

[0097] Optionally, the depth of the first trench 103 is greater than 0.5um, for example, 1μm, 2μm, 5μm; the depth of the first trench 103 is less than or equal to the thickness of the remaining semiconductor substrate 101, for example, the thickness of the remaining semiconductor substrate 101 can be the thickness of the epitaxial layer. In an optional example, the thickness of the remaining semiconductor substrate 101 is between 1um and 15um, for example, 4μm, 7μm, 10μm.

[0098] Then, if Figures 8 to 11 As shown, step S4 and step S5 are performed to prepare a modified auxiliary film layer 107 on the surface of the first groove 103 , and to prepare a light absorbing material layer 106 on the surface of the modified auxiliary film layer 107 .

[0099] In this embodiment, the steps of preparing the modified auxiliary film layer 107 and the light absorbing material layer 106 include:

[0100] First, if Figure 8 As shown, a modified auxiliary film initial layer 104 is formed on the surface of the first trench 103 and the surface of the semiconductor substrate 101 around the first trench 103; then, as shown Fig. 9As shown, the light absorbing material layer initial layer 105 is filled in the first groove 103 and its surroundings; that is, the light absorbing material layer initial layer 105 is formed on the surface of the modified auxiliary film initial layer 104; further, the modified auxiliary film layer 107 and the light absorbing material layer 106 are formed by step separation, wherein the step separation method includes:

[0101] like Fig.10 and Fig.11 As shown, a first removal process is used to remove at least the initial layer 105 of the light absorbing material layer around the first groove 103 to obtain the light absorbing material layer 106 . After the light absorbing material layer 106 is formed, a second removal process is used to remove the initial layer 104 of the modified auxiliary film around the first groove to obtain the modified auxiliary film layer 107 .

[0102] Specifically, in Figure 8 In the corresponding process of forming the modified auxiliary film initial layer 104, the surface covering layer is prepared. The modified auxiliary film initial layer 104 can be prepared by one or more of ALD (atomic layer deposition), CVD (chemical vapor deposition), and PVD (physical vapor deposition) technologies.

[0103] The modified auxiliary film initial layer 104 may be a laminated structure composed of one or more oxide layers and nitride material layers. For example, it may be one or more material layers composed of aluminum oxide, silicon oxide, silicon nitride, hafnium oxide, and tantalum oxide, that is, the modified auxiliary film initial layer 104 may be a single layer or multiple layers, and the multiple layers may be different combinations of the above materials. In one example, the thickness of each layer of the modified auxiliary film initial layer 104 single layer or multiple layers is between 10nm and 100nm, for example, it may be 20nm, 50nm, or 80nm.

[0104] Specifically, in Fig. 9 In the corresponding process of forming the initial light absorbing material layer 105 , the initial light absorbing material layer 105 may be prepared by using one or a combination of ALD (atomic layer deposition), CVD (chemical vapor deposition), and PVD (physical vapor deposition) technologies.

[0105] Among them, the material of the initial layer 105 of the light-absorbing material layer is a light-absorbing material (a material with low transmittance to visible light), for example, a metal material such as tungsten, aluminum, copper, etc., that is, in this embodiment, the initial layer 105 of the light-absorbing material layer is a metal material layer, which can be a tungsten layer, which is beneficial to the overall process design.

[0106] In one example, the initial layer 105 of the light absorbing material layer completely or partially fills the first groove 103 . In this example, the area corresponding to the entire surface of the first groove 103 is covered with the initial layer 105 of the light absorbing material layer.

[0107] Specifically, in Fig.10 In the corresponding first removal process, the light absorbing material layer initial layer 105 on the surface of the semiconductor substrate 101 can be partially polished by a CMP (chemical mechanical polishing) process, so that no light absorbing material layer initial layer 105 remains on the surface of the semiconductor substrate 101, and the surface is completely the modified auxiliary film initial layer 104.

[0108] Specifically, in Fig.11 In the corresponding second removal process, a process of removing the modified auxiliary film initial layer 104 on the surface of the semiconductor substrate 101 is performed. Optionally, a removal area of ​​the modified auxiliary film initial layer 104 is defined by a photolithography process, and then the modified auxiliary film initial layer 104 in the area to be removed is etched away by an etching process, wherein the removal area is the area except the first deep trench 103.

[0109] It should be noted that in the present application, the modified auxiliary film initial layer 104 is used as an etching stop layer for the light-absorbing material layer initial layer 105, and at the same time as a dielectric layer between the light-absorbing material layer 106 and the first groove surface of the semiconductor substrate, and as a part of the material layer of a subsequent isolation structure, which is beneficial to ensuring the performance of the isolation structure while optimizing the process steps. Preferably, the light-absorbing material layer 106 is selected as a metal material; in addition, in the subsequent removal process, further, the first removal process of the light-absorbing material layer initial layer 105 is selected as CMP, and the second removal process of the modified auxiliary film initial layer 104 as an etching stop layer is selected as a photolithography etching process, which is beneficial to the removal of the metal material and prevent its influence on the device performance due to obstruction or residue, and optimizes the removal process of the modified auxiliary film initial layer 104, which is beneficial to prevent damage to the semiconductor substrate during the process. Among them, corresponding to the design of the above-mentioned two materials, in the first removal process, the selection ratio of the modified auxiliary film initial layer 104 and the light absorbing material layer initial layer 105 is in the range of (0.5-3):10, for example, it can be 1:10, 1.5:10, 2:10, 2.5:10, etc., which is conducive to the implementation of the two removal processes.

[0110] Then, if Fig.12 As shown, step S6 is performed to prepare a second trench 108 in the device functional layer from the second surface 101b of the semiconductor substrate 101, wherein the second trench 108 is prepared from the exposed surface of the second surface 101b of the semiconductor substrate 101. In this embodiment, before the second trench is prepared, only the first trench has the prepared filler, and the material on the surface of the semiconductor substrate around the first trench is removed.

[0111] Specifically, in one implementation, during the preparation of the second trench 108, first, the deep trench is patterned by a photolithography process; then, an etching process is performed to prepare a deep trench isolation structure in the second back side deep trench isolation structure area defined by the photolithography process to obtain the second trench 108.

[0112] Optionally, the depth of the second trench 108 is greater than 0.5um, for example, 1μm, 2μm, 5μm; the depth of the second trench 108 is less than or equal to the thickness of the remaining semiconductor substrate 101, for example, the thickness of the remaining semiconductor substrate 101 can be the thickness of the epitaxial layer. In an optional example, the thickness of the remaining semiconductor substrate 101 is between 1um and 15um, for example, 4μm, 7μm, 10μm.

[0113] Then, if Fig.13 As shown, step S7 is performed to prepare a modified functional film layer 109 on the surface of the second trench 108 , the surface of the semiconductor substrate 101 around the second trench 108 , and the exposed surface of the modified auxiliary film layer 107 and the light absorbing material layer 106 .

[0114] Specifically, during the preparation process of the modified functional film layer 109 , the modified functional film layer 109 may be prepared by using one or a combination of ALD (atomic layer deposition), CVD (chemical vapor deposition), and PVD (physical vapor deposition) technologies.

[0115] The modified functional film layer 109 may be a laminated structure composed of one or more oxide layers and nitride material layers. For example, it may be one or more material layers composed of aluminum oxide, silicon oxide, hafnium oxide, and tantalum oxide, that is, the modified functional film layer 109 may be a single layer or multiple layers, and the multiple layers may be different combinations of the above materials. In an optional example, the thickness of each layer of the modified functional film layer 109 single layer or multiple layers is between 1nm and 100nm, for example, it may be 2nm, 8nm, 20nm, 50nm, or 80nm.

[0116] Finally, if Fig.14 As shown, step S8 is performed to prepare a light-transmitting material layer 110 on the surface of the modified functional film layer 109 in the second groove 108 .

[0117] Specifically, during the preparation of the light-transmitting material layer 110, the light-transmitting material layer 110 may be prepared by one or more of ALD (atomic layer deposition), CVD (chemical vapor deposition), and PVD (physical vapor deposition) technologies. In this embodiment, the material of the light-transmitting material layer 110 is a light-transmitting material (a material with a high transmittance to visible light), and the light-transmitting material layer 110 may be a laminated structure composed of one or more of an oxide material layer, a nitride material layer, and an organic material layer. For example, a material layer such as silicon oxide, aluminum oxide, silicon nitride, and polyimide may be selected.

[0118] In one example, the transparent material layer 110 is completely or partially filled in the second groove 108, and the entire surface area of ​​the second groove 108 is covered with the transparent material layer 110. In one implementation, the transparent material layer can be removed by CMP while retaining the modified functional film layer 109.

[0119] It should be noted that in this step, the modified functional film layer 109 is directly retained as a part of the structural layer of the image sensor. As a functional layer, the light-transmitting material layer 110 is selected as the above-mentioned optional material, which is conducive to the retention of the modified functional film layer 109 on the basis of ensuring performance and preventing material damage caused by multiple processes thereon. Among them, the light-transmitting material layer 110 can be a portion outside the second groove removed by a photolithography process after deposition, and the portion inside the second groove is retained as an isolation structure. Therefore, through the design of the above process, it is conducive to ensuring the performance of the isolation structure in the second groove while optimizing the preparation of the image sensor.

[0120] As an example, Fig.15 As shown, after forming the light-transmitting material layer 110, a balancing layer 111 may be prepared on the second surface 101b of the semiconductor substrate 101, wherein, in an optional manner, the balancing layer 111 covers the surface of the light-transmitting material layer 110 and the surface of the modified functional film layer 109 around the light-transmitting material layer 110. In one example, the thickness of the balancing layer 111 is greater than the thickness of the modified auxiliary film layer 107, and further, the thickness of the balancing layer 111 is greater than the thickness of the modified functional film layer 109. Its material includes but is not limited to silicon oxide. Based on the design of the balancing layer 111, it is beneficial to achieve material layer flattening on the basis of retaining the modified functional film layer.

[0121] Among them, the first trench 103 and the second trench 108 are prepared between adjacent semiconductor devices, that is, the first trench 103 is prepared between adjacent semiconductor devices, and the second trench 108 is prepared between adjacent semiconductor devices, and the two can be arranged between semiconductor devices based on actual needs according to different fillers. In this embodiment, the positions corresponding to the first trench and the second trench are defined based on the isolation structure 102 formed on the front side, and then the first trench and the second trench are respectively made at the corresponding positions, so as to coordinate the sensitivity and signal crosstalk based on the corresponding light-absorbing material layer 107 and the light-transmitting material layer 110 filled inside, and the light-absorbing material layer 107 is conducive to the improvement of signal crosstalk, and the light-transmitting material layer 110 is conducive to the improvement of sensitivity.

[0122] In addition, structures such as color filters and grids may be further formed on the above structure. Furthermore, the color filter may be an RGGB Bayer array or an RGB IR or other pixel arrangement to complete the preparation of the image sensor.

[0123] like Fig.16 As shown, in one example, an interconnection structure layer 201 of a device functional layer is prepared on the first surface 101a of the semiconductor substrate 101, see Figure 6 Step, based on the electrical connection structure 203 in the interconnection structure layer 101 and through the light absorbing material layer 106 in the first trench 103, a reference potential is applied to the device functional layer. The reference potential can be a negative voltage to improve the crosstalk of signals between devices based on the negative voltage.

[0124] In one implementation, during the process of preparing the interconnection structure layer 201 on the first surface 101a of the semiconductor substrate 101, an electrical connection structure 203 is prepared. Further, when preparing the first groove 103 in the device functional layer of the semiconductor substrate 101 from the second surface 101b of the semiconductor substrate 101, a first groove exposing the electrical connection structure 203 is formed. Then, after forming the modified auxiliary film initial layer 104, a step of partially removing materials to expose the electrical connection structure 203 is also included. Subsequently, an initial layer 105 of the light-absorbing material layer is formed on the surface of the electrical connection structure 203 to achieve electrical interconnection. Of course, the initial layer 105 of the light-absorbing material layer can be directly formed without removing the initial layer 104 of the modified auxiliary film, so as to apply a voltage value to the device functional layer based on the light-absorbing material layer based on potential induction. Further optionally, the electrical connection structure 203 can be prepared by extending from the first surface 101a of the semiconductor substrate 101 to a portion of the depth inside the semiconductor substrate 101. Furthermore, the electrical connection structure 203 is connected to the electrical interconnection layer 204 of the interconnection structure layer for voltage application.

[0125] like Figure 16-17As shown, in one example, the depth of the second trench 108 is less than the depth of the first trench 103, wherein the aspect ratio of the first trench 103 is different from the aspect ratio of the second trench 108, such as Fig.16 As shown, of course, the aspect ratio of the first trench 106 and the aspect ratio of the second trench 108 can also be the same, such as Fig.17 As shown, for the two isolation structures finally formed, Fig.16 The height difference d1 is formed in Fig.17 A height difference d2 is formed in the middle to improve the quantum efficiency of the corresponding area based on the height difference between the two.

[0126] Specifically, based on the area corresponding to the height difference between the two, a channel for signal flow between pixels of the same color can be formed, thereby preventing a certain color pixel signal from overflowing to the adjacent color pixel through the isolation structure at the position of the light-absorbing material layer 107 after saturation, causing signal crosstalk. Furthermore, through the overflow channel of the same color formed in the present application, it is beneficial to improve the linearity of the charge signal converted into a voltage signal when the same color signal is merged. In addition, it is preferably designed that the width of the second groove 108 is smaller than the width of the first groove 103, so that the sensitivity of the pixel unit defined by the second groove 108 can be improved based on the reduced width, that is, the sensitivity can be improved by increasing the filling factor of the photoelectric conversion area.

[0127] For example, in a device for phase focusing of a pixel unit including four pixels, focusing of different phases can be performed based on the four pixels, for example, phase focusing of left and right phase information or upper and lower phase information. At the same time, in the above pixel unit, the signals of the four pixels can be merged to generate image information.

[0128] In one example, if Figures 18 to 23 As shown, the image sensor includes a pixel array, the pixel array includes a plurality of pixel units arranged in an array, the pixel unit includes a first groove 103 and a second groove 108 and an isolation structure defined by an internal filler, wherein the internal filler of the first groove 103 corresponds to a modified auxiliary film layer 106 and an absorption material layer 107, and the internal filler of the second groove 108 corresponds to a modified functional film layer 109 and a light-transmitting material layer 110, and semiconductor devices can be distributed in the pixel unit to generate corresponding image signals. Thus, isolation based on different properties in one pixel unit meets actual needs.

[0129] like Fig.18 As shown, a pixel unit 300 is provided, wherein a first groove 103 is arranged at the periphery of the pixel unit 300, and a second groove 108 is arranged inside the pixel unit 300, wherein the second groove 108 located inside divides a pixel unit to form at least two sub-pixels, and four sub-pixels are shown in the illustrated example.

[0130] like Figure 19-21 As shown, pixel units 400_1 and pixel units 400_1 are provided respectively, and the second groove 108 has a central recessed area 401 corresponding to the center of the pixel unit, wherein the central recessed area 401 corresponds to a transistor arrangement area, and the transistor arrangement area at least includes a floating diffusion node FD and a source follower transistor SF, and at least corresponds to the central recessed area 401 to form a quantum efficiency improvement channel between adjacent sub-pixels. It should be noted that the figure shows a structure shown from the second surface 101b of the semiconductor substrate, and the transistor arrangement area corresponding to the floating diffusion node FD and the source follower transistor SF is formed on the first surface 101a of the semiconductor substrate. In an example, there is a spacing between the edge of the second groove corresponding to the central recessed area 401 (the side close to the first surface of the semiconductor substrate) and the functional area of ​​the transistor, for example, there is a spacing between the bottom of the second groove and the edge of the floating diffusion doping area and the source doping and drain doping of the source follower transistor SF.

[0131] Specifically, in one implementation, the second groove 108 is recessed from the center of the pixel unit to the side to form the recessed area 401, that is, the center of the second grooves of the pixel unit is hollowed out. In a further design, when the second groove 108 is prepared from the second surface 101b, the preparation depth is controlled, that is, the second groove is recessed from the first surface 101a to the inside of the semiconductor substrate. At the same time, the second groove 108 in a pixel unit is in a cross shape when viewed from the second surface 101b, such as Fig. 20 As shown, Fig. 20 Display as Fig.19 The cross-sectional schematic diagram of the pixel unit at the dotted line is shown in , which is conducive to ensuring a certain degree of isolation of pixels within the pixel unit, while improving signal overflow and quantum efficiency through a partial area of ​​the second groove with a smaller depth. Among them, the four pixels in a pixel unit based on the above design can be focused at different phases, for example, phase focusing can be performed through left and right phase information or up and down phase information. At the same time, in the above pixel unit, the signals of the four pixels can be merged to generate image information.

[0132] In addition, in the pixel unit 400_2, the isolation inside the pixel unit can be improved, that is, the first groove 103 is configured to have an extension portion corresponding to the portion of the second groove 108, so as to facilitate the isolation of the edge portion of the pixel unit, and further facilitate the realization of some functions of the recessed area 401. In addition, in the structure of this design, applying a voltage to the absorption material layer in the first groove is conducive to forming an electric field based on the voltage, thereby facilitating the improvement of signal crosstalk and signal transmission during operation based on the electric field.

[0133] like Fig. 22As shown, a pixel unit 500 is provided, wherein at least two adjacent sub-pixels in the pixel unit 500 constitute a sub-pixel group. For example, in the example shown in the figure, four sub-pixels form a sub-pixel group, and signal interaction between the four sub-pixels can be performed based on the periphery. Of course, in other examples, two sub-pixels on the left can form a first sub-pixel group, and two sub-pixels on the right can form a second sub-pixel group, and signal interaction can be performed between every two sub-pixels; wherein the end of the second groove 108 in each sub-pixel group close to the first groove 103 has an edge interaction area 501. wherein, focusing of different phases can be performed based on the four pixels, for example, phase focusing can be performed based on left-right phase information or up-down phase information, and at the same time, in the above-mentioned pixel unit, the signals of the four pixels can be merged to generate image information.

[0134] Specifically, in this example, the sub-pixel group in the same pixel unit can be configured based on the second groove 108, and the signal interaction between the sub-pixels in the group can be realized based on the sub-pixel group. For example, when one of the sub-pixels is saturated, the signal can flow through other sub-pixels in the same sub-pixel group. In one implementation, the edge interaction area 501 can be formed by the second groove 108 being recessed from the edge of the pixel unit to the center to form the edge interaction area 501. In other implementations, the preparation depth can also be controlled when preparing the second groove 108 from the second surface 101b, that is, the second groove is recessed from the first surface 101a to the inside of the semiconductor substrate, and at the same time, the second groove 108 extends from the second surface 101b to the first groove.

[0135] In addition, in other examples, the image sensor may include a substrate contact, which may be arranged in the edge interaction area. The substrate contact is prepared from the first surface 101a of the semiconductor substrate. In one example, the substrate contact may be a P-type doped region, and the semiconductor substrate may be ground potential or negative potential based on the voltage value applied to the substrate contact. In this example, arranging the substrate contact in the edge interaction area is beneficial to the control of the corresponding potential in the pixel unit, and can save the layout area and increase the photosensitive area.

[0136] like Fig.23As shown, another pixel unit 700 is provided, the first groove 103 is arranged in the first diagonal area of ​​the periphery of the pixel unit, and the second groove 108 is arranged in the second diagonal area of ​​the periphery of the pixel unit and inside the pixel unit, so as to form a double isolation structure located on the periphery of each pixel unit 700 based on the pixel unit 700 itself and the adjacent pixel units (not shown in the figure) of the pixel unit 700. Specifically, the formation of the double isolation structure can further facilitate the coordination of isolation between pixel units and improvement of signal sensitivity, and at the same time, different crosstalks can be arranged at different positions of pixels to meet actual needs. Further, the design of the above process of the utility model can facilitate the realization of the above structure.

[0137] Embodiment 2:

[0138] See also Figures 17 to 23 As shown, the present application also provides an image sensor, wherein the image sensor in this embodiment is prepared by the preparation method of the image sensor in the first embodiment, and the relevant structure and corresponding features can be referred to the description in the preparation method, which will not be repeated here. Of course, in other embodiments, it can also be obtained based on other preparation methods, wherein the image sensor includes:

[0139] The semiconductor substrate 101 includes a device functional layer of a first doping type; the semiconductor device is located in the device functional layer and includes a photoelectric conversion element of a second doping type different from the first doping type;

[0140] The first trench 103 and the second trench 108 are respectively disposed in the device functional layer, and the first trench 103 and the second trench 108 are prepared between adjacent semiconductor devices;

[0141] The modified auxiliary film layer 107 and the light absorbing material layer 106 are sequentially disposed on the surface of the first groove 103; and

[0142] The modified functional film layer 109 and the light-transmitting material layer 110 are sequentially disposed on the surface of the second groove 108 .

[0143] As an example, the image sensor includes a pixel array composed of a plurality of pixel units arranged in an array, wherein the pixel unit includes an isolation structure defined by a first trench, a second trench and an internal filling.

[0144] As an example, the first groove is arranged at the periphery of the pixel unit, and the second groove is arranged inside the pixel unit, wherein the second groove located inside divides the pixel unit to obtain at least two sub-pixels.

[0145] As an example, the first trench is arranged in the first diagonal area around the pixel unit, and the second trench is arranged in the second diagonal area around the pixel unit and inside the pixel unit to form a double isolation structure located around each pixel unit based on the pixel unit itself and adjacent pixel units.

[0146] As an example, the center of the pixel unit corresponding to the second groove has a central recessed area, the central recessed area corresponds to a transistor arrangement area, the transistor arrangement area includes at least a floating diffusion node and a source follower transistor, and at least the central recessed area forms a quantum efficiency improvement channel between adjacent sub-pixels.

[0147] As an example, at least two adjacent sub-pixels in a pixel unit form a sub-pixel group, and an end of the second trench in each sub-pixel group close to one side of the first trench has an edge interaction area.

[0148] As an example, the light-absorbing material layer is selected as a metal material layer, the modified auxiliary film layer is selected as at least one of an oxide layer and a nitride layer, the light-transmitting material layer is selected as at least one of an oxide layer, a nitride layer and an organic material layer, and the modified functional film layer is selected as at least one of an oxide layer and a nitride layer.

[0149] As an example, the image sensor further includes an interconnection structure layer located on the first surface of the semiconductor substrate, wherein a reference potential is provided to the device functional layer based on an electrical connection structure in the interconnection structure layer and through a light absorbing material layer located in the first trench.

[0150] As an example, the depth of the second trench is less than that of the first trench, and the aspect ratio of the first trench is the same as or different from that of the second trench, so as to improve the quantum efficiency of the corresponding region based on the height difference between the two trenches.

[0151] Embodiment three:

[0152] The utility model also provides an electronic device, including an image sensor as described in any one of the above schemes. The electronic device can be a security monitoring, vehicle-mounted electronics, mobile phone camera, machine vision and other equipment. The image sensor based on the utility model can obtain high-quality image information and can be used in infrared utilization equipment.

[0153] In summary, the present application forms the first groove and the second groove in different steps, and forms the light-absorbing material layer and the light-transmitting material layer therein correspondingly based on different process steps, so that both high sensitivity of the same color and low crosstalk between different signals can be taken into account, the flexibility of device preparation can be improved, and it is conducive to the optimization of the corresponding structural performance, and it is prevented from performing multiple processes on a certain structure, which affects the performance of the final structure. On the basis of ensuring the performance of each structure, the process steps of preparing the image sensor including the light-absorbing material layer and the light-transmitting material layer can be simplified, and the design of different steps can also broaden its application field and improve image quality. Therefore, the utility model effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0154] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the technology may modify or change the above embodiments without violating the spirit and scope of the present invention. All equivalent modifications or changes made by those with ordinary knowledge in the relevant technical field without departing from the spirit and technical ideas disclosed in the present invention shall still be covered by the claims of the present invention.

Claims

1. An image sensor, characterized in that: The image sensor comprises: A semiconductor substrate, wherein the semiconductor substrate comprises a device functional layer of a first doping type; a semiconductor device located in the device functional layer, the semiconductor device comprising a photoelectric conversion element having a second doping type different from the first doping type; A first trench and a second trench are respectively arranged in the device functional layer, and the first trench and the second trench are prepared between adjacent semiconductor devices; A modified auxiliary film layer and a light absorbing material layer are sequentially disposed on the surface of the first groove; and The modified functional film layer and the light-transmitting material layer are sequentially arranged on the surface of the second groove.

2. The image sensor according to claim 1, wherein: The image sensor includes a pixel array composed of a plurality of pixel units arranged in an array, wherein the pixel unit includes an isolation structure defined by the first trench, the second trench and an internal filling.

3. The image sensor according to claim 2, wherein: The first groove is arranged at the periphery of the pixel unit, and the second groove is arranged inside the pixel unit, wherein the second groove located inside divides the pixel unit to obtain at least two sub-pixels; and / or, the first groove is arranged at a first diagonal area outside the pixel unit, and the second groove is arranged at a second diagonal area outside the pixel unit and inside the pixel unit, so as to form a double isolation structure located on the periphery of each pixel unit based on the pixel unit itself and the adjacent pixel unit.

4. The image sensor according to claim 3, wherein: The second groove has a central recessed area corresponding to the center of the pixel unit, the central recessed area corresponds to a transistor arrangement area, the transistor arrangement area at least includes a floating diffusion node and a source follower transistor, and at least corresponds to the central recessed area to form a quantum efficiency improvement channel between adjacent sub-pixels; And / or, at least two adjacent sub-pixels in the pixel unit form a sub-pixel group, and an end of the second groove in each sub-pixel group close to one side of the first groove has an edge interaction area.

5. The image sensor according to claim 1, wherein: The light-absorbing material layer is selected as a metal material layer, the modified auxiliary film layer is selected as at least one of an oxide layer and a nitride layer, the light-transmitting material layer is selected as at least one of an oxide layer, a nitride layer and an organic material layer, and the modified functional film layer is selected as at least one of an oxide layer and a nitride layer.

6. The image sensor according to claim 1, wherein: The image sensor further includes an interconnection structure layer located on the first surface of the semiconductor substrate, wherein a reference potential is provided to the device function layer based on an electrical connection structure in the interconnection structure layer and through the light absorbing material layer located in the first trench.

7. The image sensor according to claim 1, wherein: The depth of the second trench is less than that of the first trench, and the aspect ratio of the first trench is the same as or different from that of the second trench, so as to improve the quantum efficiency of the corresponding area based on the height difference between the two trenches.

8. The image sensor according to claim 1, wherein: An isolation structure extending inward from the first surface is formed in the semiconductor substrate, and the first trench and the second trench both extend inward from the second surface of the semiconductor substrate and are arranged corresponding to the isolation structure.

9. The image sensor according to any one of claims 2 to 4, characterized in that: Phase focusing is achieved based on the sub-pixels in the pixel unit, and image signals are acquired based on the merging of the sub-pixels.

10. An electronic device, characterized in that: The electronic device comprises the image sensor as claimed in any one of claims 1-9.

Images