High-efficiency voltage converter suitable for multi-output voltage system

Abstract

The utility model discloses a high-efficiency voltage converter suitable for a multi-output voltage system, and belongs to the technical field of switching power supplies. The first load and the second load share the first bridge arm, so that the number of MOS tubes is reduced, the cost is reduced, and the system structure is simplified; meanwhile, the first load and the second load are powered by asymmetric voltage between the first bridge arm and the second bridge arm and asymmetric voltage between the second bridge arm and the third bridge arm respectively, so that adjustment of output voltage is more flexible, the voltage converter adopts PWM modulation, independent voltage regulation control can be achieved, and voltage and frequency are adjusted by changing the duty ratio. In addition, partial voltage of the load can be directly provided by the first direct-current voltage source and the second direct-current voltage source, so that the power needing to be processed by the converter is further reduced, and the overall efficiency is improved. In addition, two resonance circuits are introduced, the zero-voltage condition is achieved in the switching process, the switching loss is effectively reduced, and therefore higher converter efficiency is generated.

Description

Technical Field

[0001] The utility model relates to the technical field of switch power supplies, in particular to a high-efficiency voltage converter suitable for a multi-output voltage system. Background Art

[0002] With the rapid development of electronic technology, electronic equipment has gradually become more complex and diversified, and the demand for power supply voltage levels has become increasingly diversified. Traditional DC converters are no longer able to meet the requirements of modern electronic equipment for high efficiency, high power density, safety and reliability in terms of performance. On the one hand, traditional DC converters are often complex in configuration and contain more devices because they need to meet different voltage levels and power requirements. This not only increases the volume and weight of the converter, but also increases the cost and maintenance difficulty. On the other hand, the output range of traditional DC converters is relatively narrow, which makes it difficult to meet the requirements of diversified voltage levels of electronic equipment. This limits the scope of application and flexibility of the converter. In addition, traditional DC converters generate large power consumption during the switching process, which not only reduces the efficiency of the converter, but also may cause problems such as overheating and damage of the equipment, affecting the reliability and safety of electronic equipment.

[0003] Therefore, how to achieve high efficiency, low power consumption and a wide output range of the voltage converter has become a technical problem that technicians urgently need to overcome. Summary of the invention

[0004] The utility model aims to provide a high-efficiency voltage converter suitable for a multi-output voltage system, so as to overcome the problems of low efficiency, high power consumption and narrow output range of the converter in the prior art.

[0005] The utility model solves the above technical problems through the following technical solutions:

[0006] A high-efficiency voltage converter suitable for a multi-output voltage system comprises a first bridge arm, a second bridge arm and a third bridge arm, wherein the first bridge arm comprises a first MOS tube and a fourth MOS tube, the source of the first MOS tube is connected to the drain of the fourth MOS tube, and serves as the midpoint of the first bridge arm; the second bridge arm comprises a third MOS tube and a sixth MOS tube, the source of the third MOS tube is connected to the drain of the sixth MOS tube, and serves as the midpoint of the second bridge arm; the third bridge arm comprises a fifth MOS tube and a second MOS tube, the source of the fifth MOS tube is connected to the drain of the second MOS tube, and serves as the midpoint of the third bridge arm;

[0007] The first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube are respectively connected in anti-parallel with the first body diode, the second body diode, the third body diode, the fourth body diode, the fifth body diode and the sixth body diode; the first body diode, the second body diode, the third body diode, the fourth body diode, the fifth body diode and the sixth body diode are respectively connected in parallel with the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, the fifth capacitor and the sixth capacitor;

[0008] The midpoint of the first bridge arm is connected to the positive electrode of the first resonant capacitor via the first resonant inductor, the negative electrode of the first resonant capacitor is connected to the first load, the first output filter inductor and the positive electrode of the first DC voltage source in sequence via the midpoint of the second bridge arm, and the negative electrode of the first DC voltage source is connected to the midpoint of the first bridge arm; the midpoint of the first bridge arm is connected to the positive electrode of the second resonant capacitor via the second resonant inductor, the negative electrode of the second resonant capacitor is connected to the second load, the second output filter inductor and the positive electrode of the second DC voltage source in sequence via the midpoint of the third bridge arm, and the negative electrode of the second DC voltage source is connected to the midpoint of the first bridge arm; the first resonant inductor and the first resonant capacitor form a first resonant cavity, and the second resonant inductor and the second resonant capacitor form a second resonant cavity;

[0009] The drains of the first MOS tube, the third MOS tube and the fifth MOS tube are connected together and connected to the positive electrode of the DC input power supply; the sources of the fourth MOS tube, the sixth MOS tube and the second MOS tube are connected together and connected to the negative electrode of the DC input power supply.

[0010] Furthermore, the high-efficiency voltage converter also includes an input resistor, and the drains of the first MOS tube, the third MOS tube and the fifth MOS tube are connected together and connected to the positive electrode of the DC input power supply via the input resistor.

[0011] Furthermore, the high-efficiency voltage converter further includes an input capacitor, which is connected in parallel to the input resistor and the two ends of the DC input power supply.

[0012] Furthermore, the high-efficiency voltage converter adopts PWM modulation, the trigger signals of the first MOS tube, the second MOS tube and the sixth MOS tube are the same, and the trigger signals of the third MOS tube, the fourth MOS tube and the fifth MOS tube are the same;

[0013] The high-efficiency voltage converter includes six modes: [t0, t1) is mode one, [t1, t2) is mode two, [t2, t3) is mode three, [t3, t4) is mode four, [t4, t5) is mode five and [t5, t6) is mode six;

[0014] When the high-efficiency voltage converter is in mode 1, at time t0, the first MOS tube, the second MOS tube and the sixth MOS tube are turned on with zero voltage, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned off, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the sinusoidal trajectory of the negative half cycle to zero to time t1;

[0015] When the high-efficiency voltage converter is in mode 2, at time t1, the first MOS tube, the second MOS tube and the sixth MOS tube are turned on with zero voltage, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned off, and the current of the first resonant cavity and the current of the second resonant cavity increase from zero to the positive half cycle in a sinusoidal trajectory to time t2;

[0016] When the high-efficiency voltage converter is in mode three, at time t2, the first MOS tube, the second MOS tube and the sixth MOS tube are turned off with zero voltage, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned off, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the positive half-cycle sinusoidal trajectory at time t2 to time t3;

[0017] When the high-efficiency voltage converter is in mode 4, at time t3, the first MOS tube, the second MOS tube and the sixth MOS tube are turned off, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned on with zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the positive half-cycle sinusoidal trajectory at time t3 to zero to time t4;

[0018] When the high-efficiency voltage converter is in mode five, at time t4, the first MOS tube, the second MOS tube and the sixth MOS tube are turned off, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned on with zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity increase from zero to the negative half-cycle sinusoidal trajectory to time t5;

[0019] When the high-efficiency voltage converter is in mode six, at time t5, the first MOS tube, the second MOS tube and the sixth MOS tube are turned off, the third MOS tube, the fourth MOS tube and the fifth MOS tube are turned off with zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the negative half-cycle sinusoidal trajectory at time t5 to time t6.

[0020] Furthermore, when the high-efficiency voltage converter is in mode 1, the current on the first load passes through the positive electrode of the DC input power supply, the first MOS transistor, the first DC power supply, the first output filter inductor, the first load, the sixth MOS transistor to the negative electrode of the DC input power supply in sequence to form a loop; the current on the second load passes through the positive electrode of the DC input power supply, the first MOS transistor, the second DC power supply, the second output filter inductor, the second load, the second MOS transistor to the negative electrode of the DC input power supply in sequence to form a loop.

[0021] Furthermore, when the high-efficiency voltage converter is in mode 2, the current on the first load passes through the positive electrode of the DC input power supply, the first MOS transistor, the first DC power supply, the first output filter inductor, the first load, the sixth MOS transistor to the negative electrode of the DC input power supply in sequence to form a loop; the current on the second load passes through the positive electrode of the DC input power supply, the first MOS transistor, the second DC power supply, the second output filter inductor, the second load, the second MOS transistor to the negative electrode of the DC input power supply in sequence to form a loop.

[0022] Furthermore, when the high-efficiency voltage converter is in mode three, the first body diode, the sixth body diode and the second body diode are in the cut-off state, the first capacitor, the sixth capacitor and the second capacitor are in the charging state, the third body diode, the fourth body diode and the fifth body diode are in the conducting state, and the third capacitor, the fourth capacitor and the fifth capacitor are in the discharging state.

[0023] Furthermore, when the high-efficiency voltage converter is in mode four, the current on the first load passes through the positive electrode of the first DC power supply, the first output filter inductor, the first load, the first resonant capacitor, the first resonant inductor to the negative electrode of the first DC power supply in sequence to form a loop; the current on the second load passes through the positive electrode of the second DC power supply, the second output filter inductor, the second load, the second resonant capacitor, the second resonant inductor to the negative electrode of the second DC power supply in sequence to form a loop.

[0024] Furthermore, when the high-efficiency voltage converter is in mode five, the current on the first load passes through the positive electrode of the first DC power supply, the first output filter inductor, the first load, the first resonant capacitor, the first resonant inductor to the negative electrode of the first DC power supply in sequence to form a loop; the current on the second load passes through the positive electrode of the second DC power supply, the second output filter inductor, the second load, the second resonant capacitor, the second resonant inductor to the negative electrode of the second DC power supply in sequence to form a loop.

[0025] Furthermore, when the high-efficiency voltage converter is in mode six, the first body diode, the sixth body diode and the second body diode are in the on state, the first capacitor, the sixth capacitor and the second capacitor are in the discharging state, the third body diode, the fourth body diode and the fifth body diode are in the off state, and the third capacitor, the fourth capacitor and the fifth capacitor are in the charging state.

[0026] Compared with the prior art, the positive and progressive effects of the utility model are:

[0027] The utility model provides a high-efficiency voltage converter suitable for a multi-output voltage system, including a first bridge arm, a second bridge arm and a third bridge arm. The first bridge arm is shared by the first load and the second load, thereby reducing the number of MOS tubes, thereby reducing costs and simplifying the system structure; at the same time, the first load and the second load are respectively powered by the asymmetric voltage between the first bridge arm and the second bridge arm, and between the second bridge arm and the third bridge arm, so that the regulation of the output voltage is more flexible, and the voltage converter adopts PWM modulation, which can realize independent voltage regulation control, and adjust the voltage and frequency by changing the duty cycle; by accurately controlling the zero voltage opening and closing of the six MOS tubes, not only the loss related to the switching device is reduced, but also the stability and reliability of the load voltage are ensured. In addition, part of the voltage of the load can be directly provided by the first DC voltage source and the second DC voltage source, thereby further reducing the power that the converter needs to process and improving the overall efficiency. The high-efficiency voltage converter also introduces two resonant circuits composed of a resonant inductor and a resonant capacitor. The two resonant circuits realize zero voltage conditions during the switching process, effectively reducing the switching loss, thereby generating a higher converter efficiency.

[0028] Furthermore, the high-efficiency voltage converter provided by the utility model is also provided with an input resistor. When the power supply voltage remains unchanged, the input resistor can play a role of current limiting; when the power supply voltage remains unchanged, the input resistor can play a role of voltage dividing.

[0029] Furthermore, the high-efficiency voltage converter provided by the utility model is also provided with an input capacitor for converting voltage fluctuations into energy storage, providing energy storage and smoothing to reduce the interference of noise and voltage fluctuations on the system, and ensuring that the switching power supply is not damaged by voltage fluctuations; at the same time, the input capacitor can also remove noise through filtering, so that the power supply noise and ripple of the system are effectively suppressed, thereby improving the performance and life of the switching power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The drawings in the specification are used to provide further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0031] Figure 1 It is a topological structure diagram of the utility model;

[0032] Figure 2 It is a timing diagram of the utility model;

[0033] Figure 3 It is the topological mode 1 of the utility model;

[0034] Figure 4 It is the topological mode 2 of the utility model;

[0035] Figure 5 It is the topological mode three of the utility model;

[0036] Figure 6 It is the topological mode four of the utility model;

[0037] Figure 7 It is the topological mode five of the utility model;

[0038] Figure 8 This is the topological mode six of the utility model.

[0039] Among them, R d is the input resistance; V dc is the DC input power supply; C d is the input capacitor; E1 is the first DC voltage source; E2 is the second DC voltage source; L 11 is the first output filter inductor; L 22 is the second output filter inductor; R1 is the first load; R2 is the second load; L 12 is the first resonant inductor; L 22 is the second resonant inductor; C 11 is the first resonant capacitor; C 21 is the second resonant capacitor; Q1 is the first MOS tube; Q2 is the second MOS tube; Q3 is the third MOS tube; Q4 is the fourth MOS tube; Q5 is the fifth MOS tube; Q6 is the sixth MOS tube; D1 is the first body diode; D2 is the second body diode; D3 is the third body diode; D4 is the fourth body diode; D5 is the fifth body diode; D6 is the sixth body diode; C1 is the first capacitor; C2 is the second capacitor; C3 is the third capacitor; C4 is the fourth capacitor; C5 is the fifth capacitor; C6 is the sixth capacitor. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solution and advantages of the embodiment of the utility model clearer, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is a part of the embodiment of the utility model, not all of the embodiments. The components of the embodiment of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0041] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0043] In the description of the embodiments of the present utility model, it should be noted that if the terms "upper", "lower", "horizontal", "inner", etc. indicate an orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the utility model product is usually placed when in use, it is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0044] In addition, if the term "horizontal" appears, it does not mean that the component must be absolutely horizontal, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", which does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0045] In the description of the embodiments of the present utility model, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0046] The present invention is further described in detail below in conjunction with the accompanying drawings, which are intended to explain the present invention rather than to limit it.

[0047] See also Figure 1 , a high-efficiency voltage converter suitable for a multi-output voltage system, comprising a DC input power supply V dc , input resistance R d , input capacitor C d , the first resonant inductor L 12 , the first resonant capacitor C 11 , the second resonant inductor L 22 , the second resonant capacitor C 21, first MOS tube Q1, second MOS tube Q2, third MOS tube Q3, fourth MOS tube Q4, fifth MOS tube Q5, sixth MOS tube Q6, first body diode D1, second body diode D2, third body diode D3, fourth body diode D4, fifth body diode D5, sixth body diode D6, first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, fifth capacitor C5, sixth capacitor C6, first load R1, second load R2, first DC voltage source E1, second DC voltage source E2, first output filter inductor L 11 And the second output filter inductor L 22 .

[0048] Among them, the first MOS tube Q1, the second MOS tube Q2, the third MOS tube Q3, the fourth MOS tube Q4, the fifth MOS tube Q5 and the sixth MOS tube Q6 are respectively anti-parallel connected with the first body diode D1, the second body diode D2, the third body diode D3, the fourth body diode D4, the fifth body diode D5 and the sixth body diode D6; the first body diode D1, the second body diode D2, the third body diode D3, the fourth body diode D4, the fifth body diode D5 and the sixth body diode D6 are respectively parallel connected with the first capacitor C1, the second capacitor C2, the third capacitor C3, the fourth capacitor C4, the fifth capacitor C5 and the sixth capacitor C6.

[0049] The drain of the first MOS tube Q1, the drain of the third MOS tube Q3, and the drain of the fifth MOS tube Q5 are connected to the DC input power supply V dc The positive electrode of the first MOS tube Q1 is connected to the drain of the fourth MOS tube Q4, the source of the third MOS tube Q3 is connected to the drain of the sixth MOS tube Q6, and the source of the fifth MOS tube Q5 is connected to the drain of the second MOS tube Q2; the drain of the fourth MOS tube Q4, the drain of the sixth MOS tube Q6, and the drain of the second MOS tube Q2 are connected to the DC input power supply V dc The negative pole of the input capacitor C d One end of the power supply V dc The positive pole is connected to the power supply V dc One end of the input resistor is connected to the DC input power supply V dc The positive terminal and the other end of the input capacitor C d The positive electrode is connected.

[0050] The negative end of the first DC voltage source E1 is connected to the source of the first MOS transistor Q1 and the drain of the fourth MOS transistor Q4. The negative end of the first DC voltage source E1 is connected to the first output filter inductor L 11 One end of the first output filter inductor L 11The other end of the first resonant inductor L is connected to the positive electrode of the first load R1, and the negative end of the first load R1 is connected to the source of the third MOS tube Q3 and the drain of the sixth MOS tube Q6. 12 One end of the first resonant inductor L is connected to the source of the first MOS tube Q1 and the drain of the fourth MOS tube Q4. 12 The other end of the first resonant capacitor C 11 The positive end of the first resonant capacitor C 11 A negative polarity end of the transistor is connected to the source of the third MOS transistor Q3 and the drain of the sixth MOS transistor Q6.

[0051] The negative end of the second DC voltage source E2 is connected to the source of the first MOS transistor Q1 and the drain of the fourth MOS transistor Q4, and the negative end of the second DC voltage source E2 is connected to the second output filter inductor L 22 One end of the second output filter inductor L 22 The other end is connected to the positive electrode of the second load R2, and the negative end of the second load R2 is connected to the source of the fifth MOS tube Q5 and the drain of the second MOS tube Q2.

[0052] The second resonant inductor L 22 One end of the second resonant inductor L is connected to the source of the first MOS tube Q1 and the drain of the fourth MOS tube Q4. 22 The other end of the second resonant capacitor C 21 The positive end of the first resonant capacitor C 11 A negative polarity end of the transistor is connected to the source of the fifth MOS transistor Q5 and the drain of the second MOS transistor Q2.

[0053] See also Figure 2 The high-efficiency voltage converter described in the utility model, without considering the parasitic parameters and losses of the device, has its working timing divided into 6 time periods, among which [t0, t1) is mode one, [t1, t2) is mode two, [t2, t3) is mode three, [t3, t4) is mode four, [t4, t5) is mode five and [t5, t6) is mode six.

[0054] Mode 1

[0055] See also Figure 2 and Figure 3 At time t0: a trigger pulse is applied between the gate G and source S of the first MOS transistor Q1, the sixth MOS transistor Q6, and the second MOS transistor Q2, that is, V gs1 , V gs2 , V gs6 is high level, the voltage between drain D and source S is zero, that is, V ds1 , V ds2 , V ds6=0, thereby realizing zero voltage turn-on of the first MOS transistor Q1, the sixth MOS transistor Q6, and the second MOS transistor Q2, and turning off the third MOS transistor Q3, the fourth MOS transistor Q4, and the fifth MOS transistor Q5. During the period t0 to t1, the first load R1 and the second load R2 are connected by the input DC voltage source V dc Power supply, the current on the first load R1 flows from the DC input power supply V dc Starting from the positive electrode, it passes through the first MOS tube Q1, the DC power supply E1, the first output filter inductor L 11 , after the first load R1 and the sixth MOS tube Q6, it returns to the DC input power supply V dc The current on the second load R2 flows from the DC input power supply V dc Starting from the positive electrode, it passes through the first MOS tube Q1, the DC power supply E2, the second output filter inductor L 22 , and then the second load R2 and the second MOS tube Q2 return to the DC input power supply V dc During this period, the first resonant inductor L 12 , the first resonant capacitor C 11 A positive voltage is applied to both ends of the first resonant cavity, and the current i Lr1 The current flowing through the sixth MOS tube Q6 is the current i flowing through the first MOS tube Q1 and the sixth MOS tube Q6. Lr1 Subtract the current i through the first load R1 o1 , i.e. i Q6 =i Lr1 -i 01 (At this time, i Lr1 The direction is negative to the right), so the current flowing through the sixth MOS tube Q6 will decrease, thereby reducing the current stress and conduction loss. 22 , the second resonant capacitor C 21 A positive voltage is applied to both ends of the resonant cavity 2, and the current i passing through the first MOS transistor Q1 and the second MOS transistor Q2 is Lr2 The current flowing through the second MOS tube Q2 is the current i flowing through the first MOS tube Q1 and the second MOS tube Q2. Lr2 Subtract the current i through the second load R2 o2 , i.e. i Q2 =i Lr2 -i 02 (At this time, i Lr2 The direction is negative to the right), so the current flowing through the second MOS tube Q2 will decrease, thereby reducing the current stress and conduction loss. Lr1 and the sinusoidal current i of the second resonant cavity Lr2When it gradually decreases to zero from the negative half cycle, the circuit enters the next mode two.

[0056] Mode 2

[0057] See also Figure 2 and Figure 4 In the period t1-t2, the working principle of this mode is the same as that of mode 1, except that the sinusoidal current i Lr1 and the sinusoidal current i of the second resonant cavity Lr2 It starts to change from zero to the positive half cycle. This mode ends at time t2.

[0058] Mode Three

[0059] See also Figure 2 and Figure 5 At time t2, the gate trigger signals of the first MOS tube Q1, the sixth MOS tube Q6, and the second MOS tube Q2 are turned off, and the trigger pulse is turned off, that is, V gs1 , V gs2 , V gs6 is zero, and V ds1 , V ds2 , V ds6 =0, thereby realizing zero voltage shutdown of the first MOS transistor Q1, the sixth MOS transistor Q6, and the second MOS transistor Q2. The first MOS transistor Q1, the second MOS transistor Q2, the third MOS transistor Q3, the fourth MOS transistor Q4, the fifth MOS transistor Q5, and the sixth MOS transistor Q6 are all turned off. During the time t2-t3, the current i flowing through the first load R1 o1 , the current i on the second load R2 o2 and flows through the first resonant inductor L 12 The current i Lr1 , the second resonant inductor L 22 The current i Lr2 The first MOS tube Q1, the sixth MOS tube C6 and the second MOS tube C2 are charged, and the third MOS tube C3, the fourth MOS tube Q4 and the fifth MOS tube C5 are discharged at the same time. When the third MOS tube C3, the fourth MOS tube C4 and the fifth MOS tube C5 are completely discharged, the third MOS tube D3, the fourth MOS tube D4 and the fifth MOS tube C5 will start to conduct and be in the on state, clamping the voltage across the third MOS tube Q3, the fourth MOS tube Q4 and the fifth MOS tube Q5 at 0, preparing for the zero voltage opening of the third MOS tube Q3, the fourth MOS tube Q4 and the fifth MOS tube Q5 in the next stage. When the third MOS tube C3, the fourth MOS tube C4 and the fifth MOS tube C5 are completely discharged, the first MOS tube C1, the sixth MOS tube C6 and the second MOS tube C2 are completely charged, and the mode ends.

[0060] Mode Four

[0061] See also Figure 2 and Figure 6 At time t3, a trigger pulse is applied between the gate G and the source S of the third MOS tube Q3, the fourth MOS tube Q4, and the fifth MOS tube Q5, that is, V gs3 , V gs4 , V gs5 is high level, the voltage between drain D and source S is zero, that is, V ds3 , V ds4 , V ds5 =0, thereby realizing zero voltage turn-on of the third MOS tube Q3, the fourth MOS tube Q4, and the fifth MOS tube Q5, and turning off the first MOS tube Q1, the sixth MOS tube Q6, and the second MOS tube Q2. During the time period t3 to t4, the circulating current on the first load R1 passes through the positive electrode of the first DC power supply E1, the first output filter inductor L 11 , the first load R1, the first resonant capacitor C 11 , the first resonant inductor L 12 To the negative electrode of the first DC power supply E1. The circulating current on the second load R2 passes through the positive electrode of the second DC power supply E2, the second output filter inductor L 22 , the second load R2, the second resonant capacitor C 21 , the second resonant inductor L 22 To the negative electrode of the second DC power supply E2. During this period, the first resonant inductor L 12 , the first resonant capacitor C 11 A negative voltage is applied to both ends of the resonant cavity 1, and the current i Lr1 The current flowing through the third MOS tube Q3 is i1 which flows through the fourth MOS tube Q4 and the third MOS tube Q3. Lr1 Subtract the current i through the first load R1 o1 , i.e. i Q3 =i Lr1 -i o1 (At this time, i Lr1 The direction is positive to the left), so the current flowing through the third MOS tube Q3 will decrease, thereby reducing the current stress and conduction loss. 22 , the second resonant capacitor C 21 A negative voltage is applied to both ends of the second resonant cavity, and the current i Lr2 The current flowing through the fifth MOS tube Q5 is the current i flowing through the fourth MOS tube Q4 and the fifth MOS tube Q5. Lr2 Subtract the current i through the second load R2 o2 , i.e. i Q2 =i Lr2-i o2 (At this time, i Lr2 The direction is positive to the left), so the current flowing through the fifth MOS tube Q5 will decrease, thereby reducing the current stress and conduction loss. Lr1 and the current i of the second resonant cavity Lr2 When becomes zero, the circuit enters mode five.

[0062] Mode Five

[0063] See also Figure 2 and Figure 7 The working principle of this mode is the same as that of mode 4, except that the current i in the first resonant cavity is Lr1 and the current i of the second resonant cavity Lr2 It starts from zero and changes to the positive half cycle. This interval ends at time t5.

[0064] Mode Six

[0065] See also Figure 2 and Figure 8 At time t5, the gate trigger signals of the third MOS tube Q3, the fourth MOS tube Q4, and the fifth MOS tube Q5 are turned off, and the first MOS tube Q1, the fourth MOS tube Q4, and the fifth MOS tube Q5 are turned off with zero voltage. During this period, the first MOS tube Q1, the second MOS tube Q2, the third MOS tube Q3, the fourth MOS tube Q4, the fifth MOS tube Q5, and the sixth MOS tube Q6 are all turned off. During the time t5~t6, the current i flowing through the first load R1 o1 , the current i on the second load R2 o2 and flows through the first resonant inductor L 12 The current i Lr1 , the second resonant inductor L 22 The current i Lr2 The MOS tube C4 is charged and the MOS tube C1 is discharged at the same time. The current i flowing through the first load R1 is o1 and flows through the first resonant inductor L 12 The current i Lr1 The first MOS transistor Q1, the sixth MOS transistor C6 and the second MOS transistor C2 are discharged, and the third MOS transistor C3, the fourth MOS transistor Q4 and the fifth MOS transistor C5 are charged at the same time.

[0066] When the first MOS tube C1, the second MOS tube C2, and the sixth MOS tube C6 are completely discharged, the first MOS tube D1, the second MOS tube D2, and the sixth MOS tube C6 will start to conduct electricity, preparing for the zero-voltage opening of the first MOS tube Q1, the second MOS tube Q2, and the sixth MOS tube Q6. When the first MOS tube C1, the second MOS tube C2, and the sixth MOS tube C6 are completely discharged, and the third MOS tube C3, the fourth MOS tube C4, and the fifth MOS tube C5 are completely charged, the mode ends.

[0067] The structure proposed in the utility model adopts PWM modulation to control the opening and closing of six MOS tubes by zero voltage, effectively minimizing the loss associated with the switching device. In addition, most of the voltage of the first load and the second load is also provided by the first DC voltage source E1 and the second DC voltage source E2, so the power processed by the proposed converter is small, which helps to improve efficiency.

[0068] The above content is only for explaining the technical idea of ​​the utility model and cannot be used to limit the protection scope of the utility model. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the utility model shall fall within the protection scope of the claims of the utility model.

Claims

1. A high efficiency voltage converter suitable for a multi-output voltage system, characterized in that: The invention comprises a first bridge arm, a second bridge arm and a third bridge arm, wherein the first bridge arm comprises a first MOS tube (Q1) and a fourth MOS tube (Q4), wherein the source of the first MOS tube (Q1) is connected to the drain of the fourth MOS tube (Q4) as the midpoint of the first bridge arm; the second bridge arm comprises a third MOS tube (Q3) and a sixth MOS tube (Q6), wherein the source of the third MOS tube (Q3) is connected to the drain of the sixth MOS tube (Q6) as the midpoint of the second bridge arm; and the third bridge arm comprises a fifth MOS tube (Q5) and a second MOS tube (Q2), wherein the source of the fifth MOS tube (Q5) is connected to the drain of the second MOS tube (Q2) as the midpoint of the third bridge arm; The first MOS tube (Q1), the second MOS tube (Q2), the third MOS tube (Q3), the fourth MOS tube (Q4), the fifth MOS tube (Q5) and the sixth MOS tube (Q6) are respectively connected in anti-parallel with a first body diode (D1), a second body diode (D2), a third body diode (D3), a fourth body diode (D4), a fifth body diode (D5) and a sixth body diode (D6); the first body diode (D1), the second body diode (D2), the third body diode (D3), the fourth body diode (D4), the fifth body diode (D5) and the sixth body diode (D6) are respectively connected in parallel with a first capacitor (C1), a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a fifth capacitor (C5) and a sixth capacitor (C6); The midpoint of the first bridge arm is connected via a first resonant inductor (L 12 ) connect the first resonant capacitor (C 11 ) is the positive terminal of the first resonant capacitor (C 11 ) is connected to the first load (R1), the first output filter inductor (L 11 ) and the positive electrode of the first DC voltage source (E1), the negative electrode of the first DC voltage source (E1) is connected to the midpoint of the first bridge arm; the midpoint of the first bridge arm is connected via the second resonant inductor (L 22 ) connect the second resonant capacitor (C 21 ) is the positive terminal of the second resonant capacitor (C 21 ) is connected to the second load (R2), the second output filter inductor (L 22 ) and the positive electrode of the second DC voltage source (E2), the negative electrode of the second DC voltage source (E2) is connected to the midpoint of the first bridge arm; the first resonant inductor (L 12 ) and the first resonant capacitor (C 11 ) forms the first resonant cavity, and the second resonant inductor (L 22 ) and the second resonant capacitor (C 21 ) forms a second resonant cavity; The drains of the first MOS tube (Q1), the third MOS tube (Q3) and the fifth MOS tube (Q5) are connected together and connected to a DC input power supply (V dc ) is connected to the positive electrode; the source electrodes of the fourth MOS tube (Q4), the sixth MOS tube (Q6) and the second MOS tube (Q2) are connected together and connected to the DC input power supply (V dc )’s negative terminal.

2. A high efficiency voltage converter suitable for a multi-output voltage system according to claim 1, characterized in that: High efficiency voltage converter also includes input resistance (R d ), the drains of the first MOS tube (Q1), the third MOS tube (Q3) and the fifth MOS tube (Q5) are connected together, and the input resistor (R d ) Connect the DC input power supply (V dc )'s positive electrode.

3. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 2, characterized in that: The high efficiency voltage converter also includes an input capacitor (C d ), input capacitance (C d ) in parallel with the input resistor (R d ) and DC input power (V dc ) at both ends.

4. A high-efficiency voltage converter suitable for a multi-output voltage system according to any one of claims 1 to 3, characterized in that: The high-efficiency voltage converter adopts PWM modulation, the trigger signals of the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are the same, and the trigger signals of the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are the same; The high-efficiency voltage converter includes six modes: [t0, t1) is mode one, [t1, t2) is mode two, [t2, t3) is mode three, [t3, t4) is mode four, [t4, t5) is mode five and [t5, t6) is mode six; When the high-efficiency voltage converter is in mode 1, at time t0, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned on at zero voltage, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned off, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the sinusoidal trajectory of the negative half cycle to zero to time t1; When the high-efficiency voltage converter is in mode 2, at time t1, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned on at zero voltage, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned off, and the current of the first resonant cavity and the current of the second resonant cavity increase from zero to the positive half cycle in a sinusoidal trajectory to time t2; When the high-efficiency voltage converter is in mode three, at time t2, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned off at zero voltage, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned off, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the positive half-cycle sinusoidal trajectory at time t2 to time t3; When the high-efficiency voltage converter is in mode 4, at time t3, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned off, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned on at zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the positive half-cycle sinusoidal trajectory at time t3 to zero to time t4; When the high-efficiency voltage converter is in mode five, at time t4, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned off, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned on at zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity increase from zero to the negative half-cycle sinusoidal trajectory to time t5; When the high-efficiency voltage converter is in mode six, at time t5, the first MOS tube (Q1), the second MOS tube (Q2) and the sixth MOS tube (Q6) are turned off, the third MOS tube (Q3), the fourth MOS tube (Q4) and the fifth MOS tube (Q5) are turned off at zero voltage, and the current of the first resonant cavity and the current of the second resonant cavity decrease from the negative half-cycle sinusoidal trajectory at time t5 to time t6.

5. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode 1, the current on the first load (R1) flows through the DC input power supply (V dc ), the positive electrode of the first MOS tube (Q1), the first DC power supply, the first output filter inductor (L 11 ), the first load (R1), the sixth MOS tube (Q6) to the DC input power supply (V dc ) to form a loop; the current on the second load (R2) flows through the DC input power supply (V dc ), the positive electrode of the first MOS tube (Q1), the second DC power supply, the second output filter inductor (L 22 ), the second load (R2), the second MOS tube (Q2) to the DC input power supply (V dc ) to form a circuit.

6. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode 2, the current on the first load (R1) flows through the DC input power supply (V dc ), the positive electrode of the first MOS tube (Q1), the first DC power supply, the first output filter inductor (L 11 ), the first load (R1), the sixth MOS tube (Q6) to the DC input power supply (V dc ) to form a loop; the current on the second load (R2) flows through the DC input power supply (V dc ), the positive electrode of the first MOS tube (Q1), the second DC power supply, the second output filter inductor (L 22 ), the second load (R2), the second MOS tube (Q2) to the DC input power supply (V dc ) to form a circuit.

7. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode three, the first body diode (D1), the sixth body diode (D6) and the second body diode (D2) are in a cut-off state, the first capacitor (C1), the sixth capacitor (C6) and the second capacitor (C2) are in a charging state, the third body diode (D3), the fourth body diode (D4) and the fifth body diode (D5) are in a conducting state, and the third capacitor (C3), the fourth capacitor (C4) and the fifth capacitor (C5) are in a discharging state.

8. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode 4, the current on the first load (R1) flows sequentially through the positive electrode of the first DC power supply, the first output filter inductor (L 11 )、the first load(R1)、the first resonant capacitor(C 11 )、The first resonant inductor(L 12 ) to the negative electrode of the first DC power supply to form a loop; the current on the second load (R2) passes through the positive electrode of the second DC power supply, the second output filter inductor (L 22 )、the second load (R2), the second resonant capacitor (C 21 )、The second resonant inductor(L 22 ) to the negative electrode of the second DC power supply to form a loop.

9. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode five, the current on the first load (R1) flows sequentially through the positive electrode of the first DC power supply, the first output filter inductor (L 11 )、the first load(R1)、the first resonant capacitor(C 11 )、The first resonant inductor(L 12 ) to the negative electrode of the first DC power supply to form a loop; the current on the second load (R2) passes through the positive electrode of the second DC power supply, the second output filter inductor (L 22 )、the second load (R2), the second resonant capacitor (C 21 )、The second resonant inductor(L 22 ) to the negative electrode of the second DC power supply to form a loop.

10. The high-efficiency voltage converter suitable for a multi-output voltage system according to claim 4, characterized in that: When the high-efficiency voltage converter is in mode six, the first body diode (D1), the sixth body diode (D6) and the second body diode (D2) are in a conducting state, the first capacitor (C1), the sixth capacitor (C6) and the second capacitor (C2) are in a discharging state, the third body diode (D3), the fourth body diode (D4) and the fifth body diode (D5) are in a cut-off state, and the third capacitor (C3), the fourth capacitor (C4) and the fifth capacitor (C5) are in a charging state.

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