A multi-camera synchronous trigger control circuit with one master and multiple slaves

Abstract

The utility model provides a multi-camera synchronous trigger control circuit with one master and multiple slaves, including a master camera and at least one slave camera; the master camera includes a first interface and at least two second interfaces; the slave camera includes a first interface; each second interface is respectively connected to a first interface; the master camera sends a synchronization signal to all first interfaces through all second interfaces. By setting the first interface and multiple groups of second interfaces on the master camera, and setting the first interface on the slave camera, and connecting the second interface to the first interface, the master camera and the slave camera both receive the synchronization signal through the first interface, that is, the master camera and the slave camera both obtain the synchronization signal based on the hardware circuit, and there is no problem that the master camera matches the delay on the slave hardware circuit through software delay, resulting in inconsistent timestamps between the master camera and the slave camera, thereby ensuring the accuracy of the delay and making the timestamps between the master camera and the slave camera consistent.

Description

Technical Field

[0001] The utility model relates to the technical field of industrial vision, in particular to a multi-camera synchronous trigger control circuit with one master and multiple slaves. Background Art

[0002] In industrial applications, multi-camera systems need to meet requirements such as time synchronization and exposure synchronization. Among them, time synchronization can ensure the accuracy of multi-camera system data, mainly solving the problem of inconsistent camera timestamps; exposure synchronization ensures that multiple cameras capture images of the same scene at the same time, reducing image distortion and the appearance of overlapping areas, and improving the accuracy and stability of the system.

[0003] At present, the general design of multi-camera synchronous trigger control with one master and multiple slaves is: the master camera is connected to multiple slave cameras through external lines. After the external trigger signal is sent to the master camera, the master camera generates a trigger signal for each slave camera to use. The master camera matches the delay of the trigger signal of the slave camera through software delay. However, the delay is not accurate enough when using software delay to match the delay on the hardware line of the slave camera, resulting in inconsistent timestamps between the master camera and the slave camera. Utility Model Content

[0004] The technical problem to be solved by the utility model is to provide a multi-camera synchronous trigger control circuit with one master and multiple slaves, so as to ensure the delay accuracy and make the timestamps between the master camera and the slave cameras consistent.

[0005] In order to solve the above technical problems, the technical solution adopted by the utility model is:

[0006] A multi-camera synchronous trigger control circuit with one master and multiple slaves includes a master camera and at least one slave camera; the master camera includes a first interface and at least two second interfaces; the first interface is used to receive synchronization signals, and the second interface is used to send synchronization signals; each of the slave cameras includes one of the first interfaces; and each of the second interfaces is respectively connected to one of the first interfaces.

[0007] Furthermore, the first interface and the second interface are both dedicated clock interfaces.

[0008] Furthermore, the main camera also includes an external trigger interface; the external trigger interface is used to connect to an external device and receive a trigger signal; the main camera generates the synchronization signal according to the trigger signal.

[0009] Furthermore, it also includes at least two cables; each of the second interfaces is connected to the first interface via the connection cable.

[0010] Furthermore, all the cables are of the same specification.

[0011] Furthermore, the main control chips of the master camera and the slave camera both include field programmable gate arrays.

[0012] Furthermore, the master camera and the slave camera both include sensors; the sensor is connected to the first interface, and is used to obtain the synchronization signal received by the first interface, and control the master camera and the slave camera to perform corresponding actions.

[0013] The beneficial effect of the utility model lies in that: by setting the first interface and multiple groups of second interfaces on the master camera, and setting the first interface on the slave camera, and connecting the second interface with the first interface, after the master camera sends a synchronization signal through the second interface, the master camera and the slave camera both receive the synchronization signal through the first interface, that is, the master camera and the slave camera both obtain the synchronization signal based on the hardware circuit, and there is no problem that the master camera matches the delay on the slave machine hardware circuit through software delay, resulting in inconsistent timestamps between the master camera and the slave camera, thereby ensuring the accuracy of the delay and making the timestamps between the master camera and the slave camera consistent. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 This is a multi-camera synchronous trigger control circuit with one master and multiple slaves in the embodiment of the utility model. DETAILED DESCRIPTION

[0015] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.

[0016] In the existing multi-camera synchronous trigger control circuit with one master and multiple slaves, the master camera is connected to multiple slave cameras through external lines. Since the master camera itself has no line connection, the master camera needs to set the delay through software to match the delay of the slave camera caused by the external line, resulting in inconsistent timestamps between the master camera and the slave camera. At the same time, the IO of the existing camera trigger receiving signal uses a non-dedicated clock interface, which has the problem of unstable signal.

[0017] In order to solve the above technical problems, the utility model provides a multi-camera synchronous trigger control circuit with one master and multiple slaves, which is as follows:

[0018] Please refer to Figure 1 , a multi-camera synchronous trigger control circuit with one master and multiple slaves, including a master camera and at least one slave camera; the master camera includes a first interface and at least two second interfaces; the slave camera includes a first interface; each of the second interfaces is respectively connected to one of the first interfaces; the master camera sends a synchronization signal to all the first interfaces through all the second interfaces.

[0019] From the above description, it can be seen that the beneficial effect of the utility model is: by setting a first interface and multiple groups of second interfaces on the master camera, and setting a first interface on the slave camera, and connecting the second interface to the first interface, after the master camera sends a synchronization signal through the second interface, the master camera and the slave camera both receive the synchronization signal through the first interface, that is, the master camera and the slave camera both obtain the synchronization signal based on the hardware circuit, and there is no problem that the master camera matches the delay on the slave machine hardware circuit through software delay, resulting in inconsistent timestamps between the master camera and the slave camera, thereby ensuring the accuracy of the delay and making the timestamps between the master camera and the slave camera consistent.

[0020] Furthermore, the first interface and the second interface are both dedicated clock interfaces.

[0021] It can be seen from the above description that, compared with using a non-dedicated clock interface, the first interface and the second interface both use a dedicated clock interface, so that the signals received by the first interface and the second interface are more stable.

[0022] Furthermore, the main camera also includes an external trigger interface; the external trigger interface is used to connect to an external device and receive a trigger signal; the main camera generates the synchronization signal according to the trigger signal.

[0023] It can be seen from the above description that by providing an external trigger interface on the master camera, the master camera and the slave camera can be controlled based on the external trigger signal.

[0024] Furthermore, it also includes at least two cables; each of the second interfaces is connected to the first interface via the connection cable.

[0025] It can be seen from the above description that the second interface is connected to the first interface through a detachable cable, so that the connection between the master camera and the slave camera is more convenient.

[0026] Furthermore, all the cables are of the same specification.

[0027] From the above description, it can be seen that all cables use the same specifications to ensure the synchronization of delay.

[0028] Furthermore, the main control chips of the master camera and the slave camera both include field programmable gate arrays.

[0029] It can be seen from the above description that both the master camera and the slave camera use FPGA as the main control chip of each unit, so that the master camera and the slave camera can effectively process the received signals.

[0030] Furthermore, the master camera and the slave camera both include sensors; the sensor is connected to the first interface, and is used to obtain the synchronization signal received by the first interface, and control the master camera and the slave camera to perform corresponding actions.

[0031] It can be seen from the above description that both the master camera and the slave camera are provided with sensors, so that synchronization signals can be obtained based on the sensors and the cameras can be controlled to perform corresponding actions.

[0032] The multi-camera synchronous trigger control circuit with one master and multiple slaves provided by the utility model can be applied to a multi-camera system, and is described below through a specific implementation method:

[0033] Embodiment 1

[0034] Please refer to Figure 1 , a multi-camera synchronous trigger control circuit with one master and multiple slaves, comprising a master camera and at least one slave camera; the master camera comprises a first interface and at least two second interfaces; the first interface is used to receive a synchronization signal, and the second interface is used to send a synchronization signal; each of the slave cameras comprises one first interface; each of the second interfaces is respectively connected to one of the first interfaces; wherein, in an optional embodiment, the main control chips of the master camera and the slave camera both comprise a Field Programmable Gate Array (FPGA), that is, the master camera and the slave camera both adopt FPGA as the main control chip; at the same time, the FPGA is provided with a dedicated clock interface, that is, the first interface and the second interface are both dedicated clock interfaces; the dedicated clock IO output signal of the FPGA is more stable, and the dedicated clock IO receiving signal is also more stable.

[0035] The master camera further comprises an external trigger interface; the external trigger interface is used to connect to an external device and receive a trigger signal; the master camera generates the synchronization signal according to the trigger signal. The master camera and the slave camera both comprise a sensor; the sensor is connected to the first interface and is used to obtain the synchronization signal received by the first interface and control the master camera and the slave camera to perform corresponding actions.

[0036] like Figure 1 As shown, the main camera includes a dedicated clock IO, a dedicated clock IO 1 - Dedicated clock IO N ; wherein the dedicated clock IO is used as the first interface of the main camera; dedicated clock IO 1 - Dedicated clock IO NThe slave cameras are each provided with a dedicated clock interface as the second interface; the dedicated clock IO on the master camera 1 Connected to the dedicated clock IO on the main camera, that is, the main camera is connected to the dedicated clock IO 1 Connect to the dedicated clock IO to obtain its own synchronization signal; the dedicated clock IO on the main camera 2 - Dedicated clock IO N , respectively connected with the slave cameras, such as Figure 1 As shown, the dedicated clock IO on the main camera 2 Connect the dedicated clock IO of slave camera 1 to the dedicated clock IO of the master camera 3 Connect to the dedicated clock IO of slave camera 2, and so on.

[0037] In an optional implementation, each of the second interfaces is connected to the first interface via the connection cable. Meanwhile, in a further preferred implementation, all the cables are coaxial cables of the same specification, and the use of cables of the same specification ensures the synchronization of delay.

[0038] Since both the master camera and the slave camera obtain synchronization signals based on hardware circuits, and both transmit signals through external cables of the same specifications, there is no problem of inconsistent timestamps between the master camera and the slave camera due to the master camera matching the delay on the slave hardware circuit through software delay, thereby ensuring the accuracy of delay and making the timestamps between the master camera and the slave camera consistent.

[0039] The specific working principle of the above multi-camera synchronous trigger control circuit with one master and multiple slaves is as follows:

[0040] Includes the entire camera system consisting of a master camera, multiple slave cameras, and multiple cables;

[0041] An external trigger signal is input into the main camera. After being processed by the main camera, the external trigger signal generates corresponding synchronization signals which are transmitted to each unit camera through an external cable for use; wherein each unit camera includes a main camera, slave camera 1, slave camera 2...slave camera N.

[0042] Among them, the FPGA-1 of the main camera uses a dedicated clock IO 1 The output synchronization signal is transmitted back to the dedicated clock interface IO of the FPGA-1 of the main camera through the external cable 1; after the FPGA-1 of the main camera receives the signal and processes and confirms the effect of the signal, it generates a corresponding trigger signal to the sensor, and the sensor takes corresponding action after receiving the trigger signal.

[0043] While the FPGA-1 of the main camera outputs a synchronization signal to the dedicated clock interface IO of the FPGA-1 of the main camera, the FPGA-1 of the main camera transmits the synchronization signal to the dedicated clock interface IO of the FPGA-1 of the main camera. 2 The synchronization signal is output and transmitted to the dedicated clock interface IO of the FPGA-2 of the slave camera 1 through the external cable 2. After the FPGA-2 of the slave camera 1 receives the signal and processes and confirms the effect of the signal, it generates a corresponding trigger signal to the sensor. After receiving the trigger signal, the sensor takes corresponding action.

[0044] Similarly, the main camera's FPGA-1 uses a dedicated clock IO 3 - Dedicated clock IO N Output synchronization signals to slave camera 2 - slave camera N, so that slave camera 2 - slave camera N make corresponding actions.

[0045] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical field, are also included in the patent protection scope of the present invention.

Claims

1. A multi-camera synchronous trigger control circuit with one master and multiple slaves, characterized in that: comprising a master camera and at least one slave camera; The main camera includes a first interface and at least two second interfaces; the first interface is used to receive a synchronization signal, and the second interface is used to send a synchronization signal; Each of the slave cameras comprises one of the first interfaces; Each of the second interfaces is respectively connected to a first interface of the slave camera.

2. The one-master-multiple-slave multi-camera synchronous trigger control circuit according to claim 1, characterized in that: The first interface and the second interface are both dedicated clock interfaces.

3. The one-master-multiple-slave multi-camera synchronous trigger control circuit according to claim 1, characterized in that: The main camera also includes an external trigger interface; The external trigger interface is used to connect to an external device and receive a trigger signal; The main camera generates the synchronization signal according to the trigger signal.

4. The one-master-multiple-slave multi-camera synchronous trigger control circuit according to claim 1, characterized in that: Also includes at least two cables; Each of the second interfaces is connected to the first interface via the cable.

5. The one-master-multiple-slave multi-phase synchronous trigger control circuit according to claim 4, characterized in that: All cables described are of the same specification.

6. The one-master-multiple-slave multi-phase synchronous trigger control circuit according to claim 1, characterized in that: The main control chips of the master camera and the slave camera both include field programmable gate arrays.

7. The one-master-multiple-slave multi-phase synchronous trigger control circuit according to claim 1, characterized in that: The master camera and the slave camera both include sensors; The sensor is connected to the first interface and is used to obtain the synchronization signal received by the first interface and control the master camera and the slave camera to perform corresponding actions.

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