A circuit supporting power-off data transmission communication

Abstract

The utility model discloses a circuit that supports power-off data transmission and communication, so that even after power failure, the computer can directly communicate with the server and other devices. The circuit includes a 1x2 RJ45 interface P1 for connecting the computer and the server through a network cable, a network transformer T1 connected to the 8 data lines of the RJ45 interface P1 on one side, a demultiplexer Ethernet LAN switch U1, U2 whose input common A terminal is connected to the other side of the network transformer T1, and a power switching circuit with a backup battery for switching between mains power and backup battery power. The utility model uses a low-cost multi-channel signal switch circuit combination, which well realizes that when the mains power is lost, the user device can still access the required server and other devices, thereby ensuring the continuous interconnection of the core network data, and will not lose key data due to power failure, which is worthy of promotion.

Description

Technical Field

[0001] The utility model belongs to the technical field of electronic circuits, and in particular relates to a circuit supporting power-off data transmission and communication. Background Art

[0002] At present, Internet communication and Internet access have become popular, and users need to access various servers all the time. When the city power is cut off, the server will continue to work through the UPS power supply, but the devices connected to the server, such as switches and routers, will be disconnected due to power outages, and the user's computer will not be able to access the server. Therefore, it is necessary to design a circuit so that even in the case of a city power outage, the user's computer can still connect to the server through the router on the server or through switches and other devices to maintain normal network operation. Utility Model Content

[0003] The utility model aims to provide a circuit supporting power-off data transmission and communication, so that even after power failure, a computer can directly communicate with a server or other equipment.

[0004] In order to achieve the above purpose, the technical solution adopted by the utility model is as follows:

[0005] A circuit supporting power-off data transmission communication includes a 1x2 RJ45 interface P1 for connecting a computer and a server via a network cable, a network transformer T1 connected to eight data lines of the RJ45 interface P1 on one side, multiplexer Ethernet LAN switches U1 and U2 having a common input A terminal connected to the other side of the network transformer T1, and a power switching circuit with a backup battery for switching between mains power and backup battery power.

[0006] Furthermore, in the utility model, the power switching circuit includes a power switching chip U3, and a backup battery B1 whose positive pole is connected to the power switching chip U3 and whose negative pole is grounded; wherein the power switching chip U3 leads to three interfaces VDD33, VCC-MAIN-3.3V and Vbat for powering the demultiplexer Ethernet LAN switches U1 and U2.

[0007] Further, in the present invention, the model of the network transformer T1 is HST-24051DAR, and the 37th, 38th, 40th, 41st, 43rd, 44th, 46th, and 47th pins of the network transformer T1 are connected to the 1st, 2nd, 3rd, 6th, 4th, 5th, 7th, and 8th pins of the RJ45 interface P1, and the 25th, 26th, 28th, 29th, 31st, 32nd, 34th, and 35th pins of the network transformer T1 are connected to the 11th, 12th, 13th, 16th, 14th, 15th, 17th, and 18th pins of the RJ45 interface P1. Pins 27, 30, 33, 36, 39, 42, 45, and 48 of the network transformer T1 are connected, and one end is connected to the ground after passing through a series resistor R13 and a capacitor C23; pins 2, 3, 5, 6, 8, 9, 11, 12, 14, 15, 17, 18, 20, 21, 23, and 24 of the network transformer T1 are connected to the multiplexer Ethernet LAN switches U1 and U2; pins 1, 4, 7, 10, 13, 16, 19, and 22 of the network transformer T1 are connected to the ground after passing through a capacitor respectively.

[0008] Furthermore, in the present invention, the peripheral circuit structures of the two demultiplexer Ethernet LAN switches U1 and U2 are the same; the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U1 are respectively connected to the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U2 through a 0 ohm resistor; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th, 12th pins of the demultiplexer Ethernet LAN switch U1 are respectively connected to the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U2 through a 0 ohm resistor; Pin 2 is connected to the 12th, 11th, 9th, 8th, 6th, 5th, 3rd, and 2nd pins of the network transformer T1 correspondingly; the 1st, 4th, 8th, and 14th pins of the demultiplexer Ethernet LAN switch U1 are connected and then connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U1 is also connected in parallel with four grounded capacitors C4 to C7; the 39th pin of the demultiplexer Ethernet LAN switch U1 is connected in parallel with two grounded capacitors C1 and C2; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R1;

[0009] The 39th and 21st pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th and 12th pins of the demultiplexer Ethernet LAN switch U2 are correspondingly connected to the 24th, 23rd, 21st, 20th, 18th, 17th, 15th and 14th pins of the network transformer T1; the 1st, 4th, 8th and 14th pins of the demultiplexer Ethernet LAN switch U2 are connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U2 is also connected in parallel with four grounded capacitors C11 to C14; the 39th pin of the demultiplexer Ethernet LAN switch U2 is connected in parallel with two grounded capacitors C8 and C9; the 39th and 21th pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R10;

[0010] Among them, after the 13th pins of the two demultiplexer Ethernet LAN switches U1 and U2 are connected to the resistor R11, the other end of the resistor R11 is connected to the CPU of the peripheral device for receiving the GPIO1 signal; the end of the resistor R11 receiving the GPIO1 signal is also connected to a grounded resistor R12.

[0011] Compared with the prior art, the utility model has the following beneficial effects:

[0012] The utility model uses a low-cost TS3L501E demultiplexer Ethernet LAN switch with a low power mode. When working normally, the data link is set to the internal data communication exchange of the switch chip of the router or switch. After power failure, the data link is set to two network ports directly. Therefore, the computer can directly communicate with the server and other devices even after power failure. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a schematic diagram of the structure of the RJ45 interface P1 in the present utility model.

[0014] Figure 2 It is a structural schematic diagram of the power switching circuit in the utility model.

[0015] Figure 3 It is a structural schematic diagram of the network transformer T1 in the utility model.

[0016] Figure 4 It is a structural schematic diagram of the multiplexer Ethernet LAN switch U1 in the utility model.

[0017] Figure 5 It is a structural schematic diagram of the multiplexer Ethernet LAN switch U2 in the utility model.

[0018] Figure 6 The utility model is a schematic diagram of the circuit for setting the interface level of the Ethernet LAN switches U1 and U2 of the multiplexer signal separator. DETAILED DESCRIPTION

[0019] The present invention is further described below in conjunction with the accompanying drawings and embodiments. The present invention includes but is not limited to the following embodiments.

[0020] like Figures 1 to 6 As shown, the utility model discloses a circuit supporting power-off data transmission communication, including a 1x2 RJ45 interface P1 for connecting a computer and a server via a network cable, a network transformer T1 connected to 8 data lines of the RJ45 interface P1 on one side, a demultiplexer Ethernet LAN switch U1, U2 having an input common A terminal connected to the other side of the network transformer T1, and a power switching circuit with a backup battery for realizing switching between mains power and backup battery power.

[0021] In this embodiment, the power switching circuit includes a power switching chip U3, and a backup battery B1 whose positive pole is connected to the power switching chip U3 and whose negative pole is grounded; wherein, the power switching chip U3 leads to three interfaces VDD33, VCC-MAIN-3.3V and Vbat for powering the demultiplexer Ethernet LAN switches U1 and U2.

[0022] The model of the network transformer T1 is HST-24051DAR, and the 37th, 38th, 40th, 41st, 43rd, 44th, 46th, and 47th pins of the network transformer T1 are connected to the 1st, 2nd, 3rd, 6th, 4th, 5th, 7th, and 8th pins of the RJ45 interface P1, and the 25th, 26th, 28th, 29th, 31st, 32nd, 34th, and 35th pins of the network transformer T1 are connected to the 11th, 12th, 13th, 16th, 14th, 15th, 17th, and 18th pins of the RJ45 interface P1. The 27th, 30th, 33rd, 36th, 39th, 42nd, 45th, 48th pins of transformer T1 are connected and one end thereof is connected to ground via a resistor R13 and a capacitor C23 connected in series; the 2nd, 3rd, 5th, 6th, 8th, 9th, 11th, 12th, 14th, 15th, 17th, 18th, 20th, 21st, 23rd, 24th pins of network transformer T1 are connected to the multiplexer Ethernet LAN switches U1 and U2; the 1st, 4th, 7th, 10th, 13th, 16th, 19th, 22nd pins of network transformer T1 are connected to ground via a capacitor respectively.

[0023] The peripheral circuit structures of the two demultiplexer Ethernet LAN switches U1 and U2 are the same; the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U1 are respectively connected to the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U2 through a 0 ohm resistor; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th, 12th pins of the demultiplexer Ethernet LAN switch U1 are connected to the network transformer The 12th, 11th, 9th, 8th, 6th, 5th, 3rd, and 2nd pins of the demultiplexer Ethernet LAN switch U1 are connected correspondingly; the 1st, 4th, 8th, and 14th pins of the demultiplexer Ethernet LAN switch U1 are connected and then connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U1 is also connected in parallel with four grounded capacitors C4 to C7; the 39th pin of the demultiplexer Ethernet LAN switch U1 is connected in parallel with two grounded capacitors C1 and C2; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R1.

[0024] The 39th and 21st pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th and 12th pins of the demultiplexer Ethernet LAN switch U2 are correspondingly connected to the 24th, 23rd, 21st, 20th, 18th, 17th, 15th and 14th pins of the network transformer T1; the 1st, 4th, 8th and 14th pins of the demultiplexer Ethernet LAN switch U2 are connected and then connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U2 is also connected in parallel with four grounded capacitors C11 to C14; the 39th pin of the demultiplexer Ethernet LAN switch U2 is connected in parallel with two grounded capacitors C8 and C9; the 39th and 21st pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R10.

[0025] Among them, after the 13th pins of the two demultiplexer Ethernet LAN switches U1 and U2 are connected to the resistor R11, the other end of the resistor R11 is connected to the CPU of the peripheral device for receiving the GPIO1 signal; the end of the resistor R11 receiving the GPIO1 signal is also connected to a grounded resistor R12.

[0026] In the above circuit, the computer and server are connected to the 9th and 10th pins of the RJ45 interface P1 through a network cable. The model of the demultiplexer Ethernet LAN switch U1 and U2 is TS3L501E. B1 is a backup battery, and U3 is a power switching chip. When there is normal mains power, VCC-MAIN_3.3V on the board is used to power U1 and U2. When the power is off, it switches to Vbat battery power supply, and Vbat only powers U1 and U2 to maintain long-term operation. C1-C7 is the filter capacitor of U1, C8-C14 is the filter capacitor of U2, and C15-C22 is the filter capacitor on the T1 data line.

[0027] U1, U2 are 11-channel SPDT / 22-bit to 11-bit multiplexer and demultiplexer Ethernet LAN switches with power-off mode. The 5th pin is pulled down to GND through resistors R1 and R10 10K resistors respectively, thus setting it to power-off mode to save battery power.

[0028] The 13th pin of U1 and U2 sets the data link through the GPIO1 of the CPU. When there is AC power, the CPU GPIO1 sets the SET PIN of U1 and U2 to a high level through the resistor R11. The data link of U1 and U2 goes from A0-7 to C0-7, and the C0-7 data goes to the inside of the Switch chip of the routing or switching device, thereby realizing data communication. When the AC power is lost, U1 and U2 are powered by the Vbat battery. At this time, the CPU has no power, and GPIO1 is pulled to GND through the resistors R11 and R12, thereby setting the 13th pin of U1 and U2 to a low level. The data link of U1 and U2 goes from A0-7 to B0-7. The B0-7 data of U1 and U2 is directly connected and then connected through the network transformer to realize the interconnection of the two network ports, so that after the AC power is lost, the user's computer can still be connected to the other party's server and other devices.

[0029] The utility model uses a low-cost multi-channel signal switch circuit combination, which effectively realizes that when the city power is cut off, the user equipment can still access the required server and other other equipment, thereby ensuring the continuous interconnection of core network data and preventing key data from being lost due to power outage. It is worthy of promotion.

[0030] The above embodiment is only one of the preferred implementation modes of the present utility model and should not be used to limit the protection scope of the present utility model. Any changes or modifications that are made to the main design concept and spirit of the present utility model without any substantive significance, as long as the technical problems solved are still consistent with the present utility model, should be included in the protection scope of the present utility model.

Claims

1. A circuit supporting power-off data transmission communication, characterized in that: It includes a 1x2 RJ45 interface P1 for connecting a computer and a server via a network cable, a network transformer T1 having one side connected to 8 data lines of the RJ45 interface P1, multiplexer Ethernet LAN switches U1 and U2 having an input common A terminal connected to the other side of the network transformer T1, and a power switching circuit with a backup battery for switching between AC power and backup battery power.

2. A circuit supporting power-off data transmission and communication according to claim 1, characterized in that: The power switching circuit includes a power switching chip U3, and a backup battery B1 whose positive pole is connected to the power switching chip U3 and whose negative pole is grounded; wherein the power switching chip U3 leads to three interfaces VDD33, VCC-MAIN-3.3V and Vbat for powering the demultiplexer Ethernet LAN switches U1 and U2.

3. A circuit supporting power-off data transmission and communication according to claim 2, characterized in that: The model of the network transformer T1 is HST-24051DAR. The 37th, 38th, 40th, 41st, 43rd, 44th, 46th, and 47th pins of the network transformer T1 are connected to the 1st, 2nd, 3rd, 6th, 4th, 5th, 7th, and 8th pins of the RJ45 interface P1, and the 25th, 26th, 28th, 29th, 31st, 32nd, 34th, and 35th pins of the network transformer T1 are connected to the 11th, 12th, 13th, 16th, 14th, 15th, 17th, and 18th pins of the RJ45 interface P1. The 27th, 30th, 33rd, 36th, 39th, 42nd, 45th, 48th pins of the transformer T1 are connected and one end is connected to the ground after passing through a series resistor R13 and a capacitor C23; the 2nd, 3rd, 5th, 6th, 8th, 9th, 11th, 12th, 14th, 15th, 17th, 18th, 20th, 21st, 23rd, 24th pins of the network transformer T1 are connected to the multiplexer Ethernet LAN switches U1 and U2; the 1st, 4th, 7th, 10th, 13th, 16th, 19th, 22nd pins of the network transformer T1 are connected to the ground after passing through a capacitor respectively.

4. A circuit supporting power-off data transmission and communication according to claim 3, characterized in that: The peripheral circuit structures of the two demultiplexer Ethernet LAN switches U1 and U2 are the same; the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U1 are respectively connected to the 24th, 25th, 28th, 29th, 33rd, 34th, 37th, 38th pins of the demultiplexer Ethernet LAN switch U2 through a 0 ohm resistor; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th, 12th pins of the demultiplexer Ethernet LAN switch U1 are connected to the network transformer The 12th, 11th, 9th, 8th, 6th, 5th, 3rd, and 2nd pins of the demultiplexer Ethernet LAN switch U1 are connected correspondingly; the 1st, 4th, 8th, and 14th pins of the demultiplexer Ethernet LAN switch U1 are connected and then connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U1 is also connected in parallel with four grounded capacitors C4 to C7; the 39th pin of the demultiplexer Ethernet LAN switch U1 is connected in parallel with two grounded capacitors C1 and C2; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R1; The 39th and 21st pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 2nd, 3rd, 6th, 7th, 9th, 10th, 11th and 12th pins of the demultiplexer Ethernet LAN switch U2 are correspondingly connected to the 24th, 23rd, 21st, 20th, 18th, 17th, 15th and 14th pins of the network transformer T1; the 1st, 4th, 8th and 14th pins of the demultiplexer Ethernet LAN switch U2 are connected to VDD33, and the 14th pin of the demultiplexer Ethernet LAN switch U2 is also connected in parallel with four grounded capacitors C11 to C14; the 39th pin of the demultiplexer Ethernet LAN switch U2 is connected in parallel with two grounded capacitors C8 and C9; the 39th and 21th pins of the demultiplexer Ethernet LAN switch U2 are also connected to VDD33; the 5th pin of the demultiplexer Ethernet LAN switch U1 is connected with a grounded resistor R10; Among them, after the 13th pins of the two demultiplexer Ethernet LAN switches U1 and U2 are connected to the resistor R11, the other end of the resistor R11 is connected to the CPU of the peripheral device for receiving the GPIO1 signal; the end of the resistor R11 receiving the GPIO1 signal is also connected to a grounded resistor R12.

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