Multi-channel analog signal test device and test machine

Abstract

The present application relates to a multi-channel analog signal testing device and a testing machine, the device comprising: a control switch; more than two analog signal output channels, each analog signal output channel is connected to a device under test through a corresponding control switch, and outputs an analog signal to the device under test; more than two analog signal acquisition channels, each analog signal acquisition channel is connected to the device under test through a corresponding control switch, and receives an analog signal fed back by the device under test. The analog signal output channel and the analog signal acquisition channel are respectively connected to the device under test through corresponding control switches, and different channels can be connected to the device under test at the same time by switching the control switch, so as to perform multi-channel synchronous testing, thereby improving the test efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of integrated circuit testing, and in particular to a multi-channel analog signal testing device and a testing machine. Background Art

[0002] In the semiconductor device manufacturing process, it is necessary to test the signal parameters generated by the device to verify whether the device can work properly. For example, for devices such as analog-to-digital converters, digital-to-analog converters, and operational amplifiers, the relevant parameters are collected to determine whether the device performance meets the standards. In traditional testing schemes, different mode channels are set for the device, and the controller connects each mode channel for time-division multiplexing switching control. Each mode channel can only be tested separately, which has the disadvantage of low testing efficiency. Utility Model Content

[0003] Based on this, it is necessary to provide a multi-channel analog signal testing device and a testing machine that can improve the testing efficiency in order to solve the above problems.

[0004] The first aspect of the present application provides a multi-channel analog signal testing device, comprising:

[0005] Control switch;

[0006] More than two analog signal output channels, each of which is connected to a device under test through a corresponding control switch to output an analog signal to the device under test;

[0007] There are more than two analog signal acquisition channels, each of which is connected to the device under test through the corresponding control switch to receive the analog signal fed back by the device under test.

[0008] In one embodiment, the analog signal output channel includes a high-frequency analog signal output channel and a high-precision analog signal output channel, the high-frequency analog signal output channel is connected to the device under test through the corresponding control switch, and the high-precision analog signal output channel is connected to the device under test through the corresponding control switch.

[0009] In one embodiment, the analog signal acquisition channel includes a high-frequency analog signal acquisition channel and a high-precision analog signal acquisition channel, the high-frequency analog signal acquisition channel is connected to the device under test through the corresponding control switch, and the high-precision analog signal acquisition channel is connected to the device under test through the corresponding control switch.

[0010] In one embodiment, the analog signal output channel is an arbitrary waveform generator module, and / or the analog signal acquisition channel is a digitizer module.

[0011] In one of the embodiments, the analog signal output channel includes a digital-to-analog converter, an output operational amplifier, an output filter, and an output gain unit connected in sequence, and the output gain unit is connected to the corresponding control switch.

[0012] In one of the embodiments, the analog signal acquisition channel includes an analog-to-digital converter, an acquisition operational amplifier, an acquisition filter and an acquisition gain unit connected in sequence, and the acquisition gain unit is connected to the corresponding control switch.

[0013] In one of the embodiments, the device further includes a main controller, a slave controller and a parameter measurement unit, the main controller is connected to the slave controller, the parameter measurement unit and the control switch, the slave controller is connected to the analog signal output channel and the analog signal acquisition channel, and the parameter measurement unit is connected to the device under test through the corresponding control switch.

[0014] In one of the embodiments, the device further includes a DC bias and common mode circuit, wherein the DC bias and common mode circuit are connected to the slave controller, the analog signal output channel and the analog signal acquisition channel.

[0015] In one of the embodiments, the device further includes a clock converter, wherein the clock converter is connected to the slave controller, the analog signal output channel and the analog signal acquisition channel.

[0016] The second aspect of the present application provides a test machine, including a host computer, a communication board and the above-mentioned multi-channel analog signal testing device, the communication board connecting the host computer and the device under test, the communication board also connecting the main controller and the clock converter in the multi-channel analog signal testing device, and the communication board outputs a working clock to the device under test and the clock converter.

[0017] The multi-channel analog signal test device and test machine mentioned above, the multi-channel analog signal test device includes more than two analog signal output channels and more than two analog signal acquisition channels, each analog signal output channel is connected to the device under test through a corresponding control switch, and outputs an analog signal to the device under test; each analog signal acquisition channel is connected to the device under test through a corresponding control switch, and receives an analog signal fed back by the device under test. The analog signal output channel and the analog signal acquisition channel are connected to the device under test through the corresponding control switches respectively, and different channels can be connected to the device under test at the same time by switching the control switch, so as to perform multi-channel synchronous testing, thereby improving the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of the structure of a multi-channel analog signal testing device in one embodiment;

[0019] Figure 2 is a structural principle diagram of a multi-channel analog signal testing device in another embodiment;

[0020] Figure 3 FIG. 4 is a structural schematic diagram of a testing machine in one embodiment. DETAILED DESCRIPTION

[0021] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0022] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0023] It is understood that the terms "first", "second", etc. used in this application can be used to describe various elements in this article, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. The "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if the connected circuits, modules, units, etc. have transmission of electrical signals or data with each other.

[0024] When used herein, the singular forms "a", "an", and "the" may also include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" and the like specify the presence of stated features, wholes, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0025] For analog-to-digital converters and digital-to-analog converters, the current test scheme uses two modules, AWG (Arbitrary Waveform Generator) and DIG (Digitizer), respectively. In order to cover the frequency band from audio to radio frequency, each module is divided into high-frequency (HF) mode and high-precision (HA) mode. The controller uses time-division multiplexing to switch between the high-frequency mode and the high-precision mode, and the high-frequency mode and the high-precision mode cannot work at the same time. Based on this, the present application provides a multi-channel analog signal testing device, including more than two analog signal output channels, and more than two analog signal acquisition channels. Each analog signal output channel is connected to the device under test through a corresponding control switch to output an analog signal to the device under test; each analog signal acquisition channel is connected to the device under test through a corresponding control switch to receive the analog signal fed back by the device under test. The analog signal output channel and the analog signal acquisition channel are connected to the device under test through the corresponding control switches respectively, and different channels can be connected to the device under test at the same time by switching the control switch, so as to perform multi-channel synchronous testing.

[0026] In one embodiment, Figure 1 As shown, a multi-channel analog signal test device 100 is provided, including a control switch K, an analog signal output channel 110 and an analog signal acquisition channel 120, the number of the analog signal output channels 110 is more than two, the number of the analog signal acquisition channels 120 is more than two, each analog signal output channel 110 is connected to the device under test DUT through the corresponding control switch K, and outputs an analog signal to the device under test DUT; each analog signal acquisition channel 120 is connected to the device under test DUT through the corresponding control switch K, and receives the analog signal fed back by the device under test DUT. Among them, the number of analog signal output channels 110 can be two, three or more, and the number of analog signal acquisition channels 120 can be the same as the analog signal output channels 110. The specific types of the analog signal output channels 110 and the analog signal acquisition channels 120 are not unique, the analog signal output channel 110 can be an arbitrary waveform generator (AWG) module, and / or the analog signal acquisition channel 120 can be a digitizer (DIG) module. According to actual test needs, the corresponding module can be connected to the device under test DUT for testing by switching the control switch K. The control switch K may be a relay or a switch tube, and the switch tube may be a triode or a MOS tube, etc.

[0027] In one embodiment, the analog signal output channel 110 includes a high-frequency analog signal output channel and a high-precision analog signal output channel. The high-frequency analog signal output channel is connected to the device under test DUT through the corresponding control switch K, and the high-precision analog signal output channel is connected to the device under test DUT through the corresponding control switch K. Among them, the specific value ranges of high frequency and high precision are not unique and can be set according to actual needs. Specifically, the two analog signal output channels can be designed with different structures, or designed with the same structure and configured with different parameters, so that the two have different frequencies and precisions, and the channel with high frequency is selected as the high-frequency analog signal output channel, and the channel with high precision is selected as the high-precision analog signal output channel.

[0028] Furthermore, the analog signal acquisition channel 120 includes a high-frequency analog signal acquisition channel and a high-precision analog signal acquisition channel. The high-frequency analog signal acquisition channel is connected to the device under test DUT through the corresponding control switch K, and the high-precision analog signal acquisition channel is connected to the device under test DUT through the corresponding control switch K. Similarly, the two analog signal acquisition channels can be designed with different structures, or designed with the same structure and configured with different parameters, so that the two have different frequencies and precisions, and the channel with high frequency is selected as the high-frequency analog signal acquisition channel, and the channel with high precision is selected as the high-precision analog signal acquisition channel.

[0029] For ease of understanding, the following explanation is given by taking the analog signal output channel 110 including a high-frequency analog signal output channel and a high-precision analog signal output channel, and the analog signal acquisition channel 120 including a high-frequency analog signal acquisition channel and a high-precision analog signal acquisition channel as an example.

[0030] In one embodiment, the analog signal output channel 110 includes a digital-to-analog converter, an output operational amplifier, an output filter, and an output gain unit connected in sequence, and the output gain unit is connected to a corresponding control switch. Specifically, Figure 2As shown, the high-frequency analog signal output channel 112 includes a digital-to-analog converter DAC1, an output operational amplifier OPA1, an output filter LPF1 and an output gain unit GAIN1 connected in sequence, and the output gain unit GAIN1 is connected to a corresponding control switch K. The high-precision analog signal output channel 114 includes a digital-to-analog converter DAC2, an output operational amplifier OPA2, an output filter LPF2 and an output gain unit GAIN2 connected in sequence, and the output gain unit GAIN2 is connected to a corresponding control switch K. The two output ends of the digital-to-analog converter DAC1 are correspondingly connected to the two input ends of the output operational amplifier OPA1, the output end of the output operational amplifier OPA1 is connected to the output filter LPF1, the output filter LPF1 is connected to one of the input ends of the output gain unit GAIN1, and the two output ends of the output gain unit GAIN1 are correspondingly connected to two control switches K, which are then connected to the corresponding pins of the device under test DUT through a pair of contacts. The two output ends of the digital-to-analog converter DAC2 are connected to the two input ends of the output operational amplifier OPA2, the output end of the output operational amplifier OPA2 is connected to the output filter LPF2, the output filter LPF2 is connected to one of the input ends of the output gain unit GAIN2, and the two output ends of the output gain unit GAIN2 are connected to the two control switches K, which are then connected to the corresponding pins of the device under test DUT through a pair of contacts. In this embodiment, the output filter LPF1 and the output filter LPF2 are both low-pass filters.

[0031] In one embodiment, the analog signal acquisition channel 120 includes an analog-to-digital converter, an acquisition operational amplifier, an acquisition filter, and an acquisition gain unit connected in sequence, and the acquisition gain unit is connected to a corresponding control switch. Specifically, Figure 2As shown, the high-frequency analog signal acquisition channel 122 includes an analog-to-digital converter ADC1, an acquisition operational amplifier OPA3, an acquisition filter LPF3 and an acquisition gain unit GAIN3 connected in sequence, and the acquisition gain unit GAIN3 is connected to the corresponding control switch K. The high-precision analog signal acquisition channel 124 includes an analog-to-digital converter ADC2, an acquisition operational amplifier OPA4, an acquisition filter LPF4 and an acquisition gain unit GAIN4 connected in sequence, and the acquisition gain unit GAIN4 is connected to the corresponding control switch K. Among them, the two input ends of the acquisition gain unit GAIN3 are correspondingly connected to two control switches K, and the two control switches K are then connected to the corresponding pins of the device under test DUT through a pair of contacts, and the output end of the acquisition gain unit GAIN3 is connected to the acquisition filter LPF3; the acquisition filter LPF3 is connected to one of the input ends of the acquisition operational amplifier OPA3, and the output end of the acquisition operational amplifier OPA3 is connected to the analog-to-digital converter ADC1. The two input ends of the acquisition gain unit GAIN4 are connected to two control switches K, which are then connected to the corresponding pins of the device under test DUT through a pair of contacts. The output end of the acquisition gain unit GAIN4 is connected to the acquisition filter LPF4; the acquisition filter LPF4 is connected to one of the input ends of the acquisition operational amplifier OPA4, and the output end of the acquisition operational amplifier OPA4 is connected to the analog-to-digital converter ADC2. In this embodiment, the acquisition filter LPF3 and the acquisition filter LPF4 are both low-pass filters.

[0032] In one embodiment, Figure 2 and Figure 3 As shown, the multi-channel analog signal test device 100 also includes a main controller 130, a slave controller 140 and a parameter measurement unit PMU, the main controller 130 is connected to the slave controller 140, the parameter measurement unit PMU and the control switch K, the slave controller 140 is connected to the analog signal output channel 110 and the analog signal acquisition channel 120, and the parameter measurement unit PMU is connected to the device under test DUT through the corresponding control switch K. The main controller 130 and the slave controller 140 can be devices such as FPGA (Field-Programmable Gate Array), MCU (Micro Control Unit), CPU (Central Processing Unit), etc. In this embodiment, the main controller 130 and the slave controller 140 are both FPGA.

[0033] Specifically, the main controller 130 is connected to the control end of the control switch K to control the on and off of the control switch K, thereby switching the signal channel. The main controller 130 receives the waveform file and configuration parameters of the host computer and forwards them to the slave controller 140; the main controller 130 also receives the sampling data output by the slave controller 140 and uploads it to the host computer. Each pair of contacts connected to the device under test DUT by the analog signal output channel 110 is also connected to a parameter measurement unit PMU through a control switch K, and each pair of contacts connected to the device under test DUT by the analog signal acquisition channel 120 is also connected to a parameter measurement unit PMU through a control switch K. The main controller 130 connects each parameter measurement unit PMU and controls the parameter measurement unit PMU to work in different modes to complete FVMV\FVMI\FIMV\FIMI\FNMV related tests.

[0034] Among them, the slave controller 140 may include a waveform file storage unit 142 and a data acquisition storage unit 144. The slave controller 140 sends a signal to the digital-to-analog converter in the analog signal output channel 110 according to the waveform file stored in the waveform file storage unit 142, and the acquisition signal output by the analog-to-digital converter in the analog signal acquisition channel 120 is sent to the data acquisition storage unit 144 of the slave controller 140 for storage. The slave controller 140 can also be connected to the output filter and output gain unit in the analog signal output channel 110, and the acquisition filter and acquisition gain unit in the analog signal acquisition channel 120, and configure the parameters of the relevant filters and gain units. In addition, the slave controller 140 can also be connected to the device under test DUT. The slave controller 140 has an external trigger mode, and the trigger signal Trigger is provided by the device under test DUT, and supports edge triggering.

[0035] In one embodiment, Figure 2 As shown, the multi-channel analog signal test device 100 also includes a DC bias and common mode circuit 150, which is connected to the slave controller 140, the analog signal output channel 110 and the analog signal acquisition channel 120. Specifically, the DC bias and common mode circuit 150 is connected to the output gain unit in the analog signal output channel 110, and the other input end of the acquisition operational amplifier in the analog signal acquisition channel 120. When performing single-ended signal measurement, the DC bias and common mode circuit 150 is connected to the analog signal output channel 110 or the analog signal acquisition channel 120 to provide a DC bias voltage. When performing differential signal measurement, the DC bias and common mode circuit 150 is connected to the analog signal output channel 110 to provide a common mode voltage.

[0036] In one embodiment, Figure 3As shown, the multi-channel analog signal test device 100 further includes a clock converter 160, which is connected to the slave controller 140, the analog signal output channel 110, and the analog signal acquisition channel 120. The slave controller 140 controls the clock converter 160 to convert the input working clock, and outputs the corresponding clock signal to the analog signal output channel 110 and the analog signal acquisition channel 120, so that different clock frequencies can be provided for different channels.

[0037] In one embodiment, Figure 3 As shown, a test machine is also provided, including a host computer 200, a communication board 300 and the above-mentioned multi-channel analog signal test device 100, the communication board 300 connects the host computer 200 and the device under test DUT, the communication board 300 is also connected to the main controller 130 and the clock converter 160 in the multi-channel analog signal test device 100, and the communication board 300 outputs a working clock to the device under test DUT and the clock converter 160. Specifically, the clock unit Clock of the communication board 300 can provide a working clock to the multi-channel analog signal test device 100 and the device under test DUT at the same time to ensure that the clocks are homologous and the phases are synchronized. The host computer 200 can be, but is not limited to, various personal computers, laptops, smart phones, tablet computers and portable wearable devices, and the portable wearable devices can be smart watches, smart bracelets, head-mounted devices, etc. In addition, the test machine may also include a DC power supply 400, and the multi-channel analog signal testing device 100 may also include a power converter 170. The power converter 170 is connected to the DC power supply 400 to convert the DC power output by the DC power supply 400 to power the relevant modules of the multi-channel analog signal testing device 100.

[0038] Specifically, in the test machine, the main controller 130 is mainly responsible for processing data transmission, signal control and basic clock control. The slave controller 140 is mainly responsible for signal acquisition, data processing and analysis, timing control, sampling clock configuration, filter control and gain control. The data transmission function of the main controller 130 refers to the main controller 130 receiving the waveform file and configuration parameters of the host computer 200, forwarding them to the slave controller 140, and forwarding them to the host computer 200 after receiving the data from the slave controller 140. The signal control function of the main controller 130 includes signal internal link and external link switching control, parameter measurement unit PMU and analog signal link switching control, self-calibration function control, etc.

[0039] The slave controller 140 is used to control the analog channel to output analog signals and collect analog signals. When outputting analog signals, the slave controller 140 controls the amplitude, signal frequency, phase, sampling clock, number of sampling points, DC bias or common mode voltage, gain and filter of the output signal of the analog signal output channel 110 according to the preset waveform file or the waveform file sent by the host computer 200. In the analog signal output channel 110, a suitable filter can be selected according to the frequency of the output signal, and in the analog signal output channel 110, a suitable gain can be selected according to the amplitude of the output signal. When collecting analog signals, the slave controller 140 controls the sampling clock, sampling period, number of sampling points, DC bias or common mode voltage, selects gain and filter in the analog signal acquisition channel 120, collects the input signal, and the slave controller 140 processes the waveform data collected by the analog signal acquisition channel 120 and sends it to the main controller 130. In the analog signal acquisition channel 120, a suitable filter can be selected according to the frequency of the input signal, and in the analog signal acquisition channel 120, a suitable gain can be selected according to the amplitude of the input signal.

[0040] When testing, the control command sent by the host computer 200 is sent to the main controller 130 through the communication board 300. The main controller 130 switches to the corresponding test channel according to the control command and sends the test parameters to the slave controller 140. The slave controller 140 configures the sampling clock, filter and gain according to the test parameters, sends the analog signal in the corresponding analog signal output channel 110, or collects the analog signal in the corresponding analog signal acquisition channel 120. The slave controller 140 processes and analyzes the collected data and sends it to the host computer 200, which performs data conversion to obtain the test parameters, thereby realizing the performance test of the device under test DUT. Among them, the high-frequency channel and the high-precision channel can work in parallel, which improves the test efficiency. The clock frequencies of different channels can be the same or different as needed. By setting the clock converter 160 according to the received test parameters from the slave controller 140, different clock frequencies can be provided for different channels. When the parameter measurement unit PMU is working, the main controller 130 controls the relevant control switch K to switch to the PMU path, and controls the parameter measurement unit PMU to work in different modes to complete FVMV\FVMI\FIMV\FIMI\FNMV related tests.

[0041] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0042] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the utility model patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A multi-channel analog signal testing device, characterized in that: include: Control switch; More than two analog signal output channels, each of which is connected to a device under test through a corresponding control switch to output an analog signal to the device under test; There are more than two analog signal acquisition channels, each of which is connected to the device under test through the corresponding control switch to receive the analog signal fed back by the device under test.

2. The device according to claim 1, characterized in that The analog signal output channel includes a high-frequency analog signal output channel and a high-precision analog signal output channel. The high-frequency analog signal output channel is connected to the device under test through the corresponding control switch, and the high-precision analog signal output channel is connected to the device under test through the corresponding control switch.

3. The device according to claim 1, characterized in that The analog signal acquisition channel includes a high-frequency analog signal acquisition channel and a high-precision analog signal acquisition channel. The high-frequency analog signal acquisition channel is connected to the device under test through the corresponding control switch, and the high-precision analog signal acquisition channel is connected to the device under test through the corresponding control switch.

4. The device according to claim 1, characterized in that The analog signal output channel is an arbitrary waveform generator module, and / or the analog signal acquisition channel is a digitizer module.

5. The device according to claim 1, characterized in that The analog signal output channel includes a digital-to-analog converter, an output operational amplifier, an output filter and an output gain unit which are connected in sequence, and the output gain unit is connected to the corresponding control switch.

6. The device according to claim 1, characterized in that The analog signal acquisition channel includes an analog-to-digital converter, an acquisition operational amplifier, an acquisition filter and an acquisition gain unit which are connected in sequence, and the acquisition gain unit is connected to the corresponding control switch.

7. The device according to any one of claims 1 to 6, characterized in that: It also includes a main controller, a slave controller and a parameter measurement unit, the main controller is connected to the slave controller, the parameter measurement unit and the control switch, the slave controller is connected to the analog signal output channel and the analog signal acquisition channel, and the parameter measurement unit is connected to the device under test through the corresponding control switch.

8. The device according to claim 7, characterized in that It also includes a DC bias and common mode circuit, which connects the slave controller, the analog signal output channel and the analog signal acquisition channel.

9. The device according to claim 7, characterized in that It also includes a clock converter, which is connected to the slave controller, the analog signal output channel and the analog signal acquisition channel.

10. A testing machine, characterized in that: It comprises a host computer, a communication board and the multi-channel analog signal testing device according to any one of claims 1 to 9, wherein the communication board is connected to the host computer and the device under test, and the communication board is also connected to a main controller and a clock converter in the multi-channel analog signal testing device, and the communication board outputs a working clock to the device under test and the clock converter.

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