Server mainboard and server

Abstract

The utility model provides a server mainboard and a server, and belongs to the field of servers, the server mainboard comprises a mainboard body and two sets of CPU systems integrated on the mainboard body; the two sets of CPU systems are mutually independent physically; the two sets of CPU systems are redundant to each other; the two sets of CPU systems are respectively connected with a BMC (Baseboard Management Controller), and the two BMCs are interconnected. The server adopts the server mainboard. The system is used for avoiding the realization of computing unit redundancy in two sets of independent servers, and avoiding the design of a plurality of independent computing nodes in one set of complex server to realize the computing unit redundancy.

Description

Technical Field

[0001] The utility model relates to the field of servers, and in particular to a server mainboard and a server. Background Art

[0002] With the development of cloud computing, redundant design in servers has become an indispensable technology to ensure high reliability of business operations.

[0003] The so-called redundancy in a server is to design two identical modules in a server. The most difficult redundancy to achieve in a server is the redundancy of the computing unit, that is, the redundancy of the CPU plus memory combination.

[0004] At present, the commonly used computing unit redundancy method is generally to have two independent servers running the same business. When one server fails, the other server can take over the business and continue to run. Or design multiple independent computing nodes in a complex server. Each node is independent of each other in structure. When multiple nodes are inserted into the chassis, they are connected to a common board (shared middle board) to achieve business redundancy, such as the multi-computing node design methods commonly used in the industry, such as Quad Star and Gemini.

[0005] The first computing unit redundancy method mentioned above requires mutual operation between different servers when a redundant machine fails, which makes maintenance complicated and costly. The second computing unit redundancy method mentioned above requires complex structural support, public board connection, and independent node box installation. Utility Model Content

[0006] The purpose of the present invention is to provide a server motherboard and a server to solve at least one of the above problems.

[0007] In a first aspect, the technical solution of the utility model provides a server motherboard, the server motherboard includes a motherboard body, and the server motherboard also includes two CPU systems integrated on the motherboard body;

[0008] The two CPU systems are physically independent of each other;

[0009] The two CPU systems are mutually redundant;

[0010] Each of the two CPU systems is connected to a BMC, and the two BMCs are interconnected.

[0011] Furthermore, each CPU system includes a CPU, a memory unit, and a PCH;

[0012] In each CPU system, the CPU is connected to the memory unit and PCH respectively, and an independent hard disk is mounted under the PCH;

[0013] The CPUs of the two CPU systems are connected one-to-one with the two BMCs.

[0014] Furthermore, the hard disks mounted under the PCHs of the two CPU systems each include a system hard disk, in which an operating system is installed, and the same services are run in the operating system.

[0015] Furthermore, the two CPU systems are arranged side by side and symmetrically, wherein the CPUs of the two CPU systems are located between the PCHs of the two CPU systems, and in each CPU system, the memory unit of the CPU system is located beside the CPU in the CPU system.

[0016] Furthermore, the server mainboard further comprises a server CPLD integrated on the mainboard body;

[0017] The two BMCs are both connected to the server CPLD.

[0018] Further, the two CPU systems are a main CPU system and a backup CPU system;

[0019] The BMCs connected to the main CPU system and the backup CPU system are interconnected through the I2C bus, so that when the BMC connected to one side is working, the BMC connected to the other side can monitor the heartbeat signal of the BMC connected to the other side, and take over the work of the BMC connected to the other side when the heartbeat signal of the BMC connected to the other side cannot be detected.

[0020] Furthermore, the mainboard body is provided with a PSU slot for plugging in a PSU to provide power to the mainboard body and components integrated on the mainboard body.

[0021] Furthermore, the mainboard body is provided with a network card slot for inserting a network card for sharing by two CPU systems.

[0022] Furthermore, the mainboard body is provided with a fan interface for connecting to a server cooling fan; the server CPLD is connected to the fan interface for managing the rotation speed of the server cooling fan connected to the fan interface.

[0023] In a second aspect, the utility model provides a server, which adopts the server mainboard described in the above aspects.

[0024] Compared with the prior art, the utility model has the following beneficial effects:

[0025] The utility model designs two independent CPU systems on one mainboard, which helps to realize computing unit redundancy in the same server chassis. Two independent servers are not needed. When a redundant machine fails, only the corresponding server machine needs to be found for repair and replacement. There is no need for mutual operation between different servers, which helps to reduce maintenance complexity and reduce maintenance costs.

[0026] The utility model designs two sets of CPU systems on one mainboard, and the mainboard can be fixed in one chassis by simple screws, without the need for an additional common middle plate and independent installation of an independent node box.

[0027] The utility model has reliable design principle, simple structure and very broad application prospect. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the utility model or the technical solutions of the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0029] Figure 1 It is a schematic structural diagram of a server mainboard according to an embodiment of the utility model;

[0030] Figure 2 It is a schematic block diagram of a server mainboard according to an embodiment of the utility model;

[0031] Figure 3 is a schematic structural diagram of a server mainboard according to another embodiment of the utility model;

[0032] Figure 4 is a schematic block diagram of a server mainboard according to another embodiment of the utility model;

[0033] Figure 5 is a schematic structural diagram of a server mainboard according to another embodiment of the utility model;

[0034] Figure 6 A schematic diagram of the structure of a server provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0035] In order to make the technical solution and advantages of the utility model clearer, the technical solution of the utility model will be described clearly and completely in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments.

[0036] The following description of at least one exemplary embodiment is merely illustrative and is not intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0037] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0038] It should be noted that the present invention uses the words "first", "second" and the like to limit the corresponding parts only for the convenience of distinguishing the corresponding parts. If not otherwise stated, the above words have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0039] BMC: Basic Management Control Unit, whose main function is to manage the entire server.

[0040] CPU: Central Processing Unit, the main computing processing unit of the server.

[0041] PCH: Platform Controller Hub, is an integrated circuit chip developed by Intel that is used to connect and control various hardware components of a computer system.

[0042] CPLD: Complex Programmable Logic Device, complex programmable logic device.

[0043] The technical solution of the utility model will be introduced and explained through several embodiments.

[0044] In one embodiment, the server motherboard provided by the utility model includes a motherboard body and two CPU systems integrated on the motherboard body. Figure 1 , Figure 2 The two CPU systems are a first CPU system and a second CPU system.

[0045] The two CPU systems are physically independent of each other.

[0046] The two CPU systems are redundant to each other.

[0047] Each of the two CPU systems is connected to a BMC, and the two BMCs are interconnected.

[0048] The two CPU systems are interconnected through the two BMCs to achieve monitoring and communication between the two CPU systems.

[0049] When in use, the two CPU systems are redundant with each other. When one of the CPU systems fails, the other CPU system can be used.

[0050] The server motherboard provided by the utility model supports two independent CPU systems, which is helpful to realize CPU system redundancy in the same server chassis. There is no need for two independent server chassis, nor is there a need to design a multi-node computing box (i.e., a node box) in one server. The two CPU systems realize monitoring and intercommunication through the interconnection between the two BMCs, and there is no need to add an additional shared middle board, thereby reducing costs.

[0051] In addition, when a server machine that uses this server motherboard to achieve CPU redundancy fails, you only need to find the corresponding server machine for repair and replacement. There is no need to operate between different servers, which reduces the complexity of maintenance and helps to reduce maintenance costs to a certain extent.

[0052] In this embodiment, Figure 2 As shown, the two BMCs are a first BMC and a second BMC, the first CPU system is connected to the first BMC, the second CPU system is connected to the second BMC, and the first BMC and the second BMC are interconnected via an I2C bus.

[0053] Alternatively, if Figure 3 , Figure 4 As shown, each CPU system includes a CPU, a memory unit and a PCH. In each CPU system, the CPU is connected to the memory unit and the PCH respectively, and an independent hard disk is mounted under the PCH. The CPUs of the two CPU systems are connected one-to-one with the two BMCs.

[0054] In this embodiment, Figure 4 As shown, the CPU of the first CPU system is connected to the first BMC, and the CPU of the second CPU system is connected to the second BMC.

[0055] Optionally, the CPUs of the two CPU systems both use microprocessors with X86 architecture.

[0056] Optionally, the hard disks mounted under the PCHs of the two CPU systems each include a system hard disk, an operating system is installed in the system hard disk, and the same services are run in the two operating systems.

[0057] The utility model designs two independent CPU systems on a mainboard, including two CPUs, the two CPUs correspond to their own memories, and two independent PCHs are designed to be interconnected with the CPUs. An independent system disk is mounted under each PCH, and the system disk is equipped with an operating system. At the same time, two independent BMCs are integrated on the mainboard, and the BMCs are used for server chassis management functions. The chassis management includes CPU, memory, PCH operation status management and hard disk management. The same services can be run in the two operating systems. When one of the CPU systems fails and cannot run the services, the operating system and services of the other CPU system are not affected, thereby realizing the redundant design of two CPU systems in one mainboard (the services run by the CPUs of the two CPU systems are independent of each other and there is no interaction).

[0058] It can be understood that the chassis management used by the first BMC includes the operation status management and hard disk management of the CPU, memory unit, PCH of the first CPU system connected to it, and the chassis management used by the second BMC includes the operation status management and hard disk management of the CPU, memory unit, PCH of the second CPU system connected to it.

[0059] In this embodiment, the operating systems installed in the system hard disks mounted under the PCHs of the two CPU systems are the same.

[0060] It is understandable that, in specific implementation, those skilled in the art may also install corresponding operating systems in the system hard disks mounted under the PCHs of the two CPU systems according to actual needs, and the installed operating systems may be the same or different.

[0061] Optionally, the two CPU systems are arranged side by side and symmetrically, wherein the CPUs of the two CPU systems are located between the PCHs of the two CPU systems, and in each CPU system, the memory unit of the CPU system is located beside the CPU in the CPU system.

[0062] Optionally, the server mainboard further includes a server CPLD integrated on the mainboard body;

[0063] The two BMCs are both connected to the server CPLD.

[0064] Optionally, the two CPU systems are a main CPU system and a backup CPU system;

[0065] The BMCs connected to the main CPU system and the backup CPU system are interconnected through the I2C bus, so that when the BMC connected to one side is working (i.e., chassis management work), the BMC connected to the other side can monitor the heartbeat signal of the BMC connected to the other side, and take over the work of the BMC connected to the other side (i.e., chassis management work) when the heartbeat signal of the BMC connected to the other side cannot be detected.

[0066] Among them, in the two CPU systems, the BMC connected to one party (referred to as the "first party") takes over the work of the BMC connected to the other party (referred to as the "second party"), that is, the BMC connected to the first party, on the one hand, controls the CPU, memory unit, PCH, and hard disk of the second party to stop running (that is, controls the second party to stop running services) through the BMC connected to the second party, and on the other hand, controls the operation of its own (that is, the first party) CPU, memory unit, PCH, and hard disk (that is, controls the first party to run services).

[0067] In this embodiment, when the BMC connected to one of the main CPU system and the backup CPU system takes over the work of the BMC connected to the other, the BMC connected to the one can also control the BMC connected to the other to restart, so as to realize the automatic repair function of the BMC.

[0068] For example, after taking over the work of the BMC connected to the main CPU system, the BMC connected to the backup CPU system restarts the BMC connected to the main CPU system.

[0069] If the BMC connected to the main CPU system can be restarted, the BMC connected to the main CPU system monitors the heartbeat signal of the BMC connected to the backup CPU system through the I2C bus in real time after restarting, and takes over the work of the BMC connected to the backup CPU system when the heartbeat signal of the BMC connected to the backup CPU system cannot be detected.

[0070] Similarly, if the BMC connected to the main CPU system takes over the work of the BMC connected to the backup CPU system, the BMC connected to the main CPU system restarts the BMC connected to the backup CPU system after taking over the work of the BMC connected to the backup CPU system.

[0071] It can be understood that when the BMC connected to the main CPU system restarts the BMC connected to the backup CPU system, if the BMC connected to the backup CPU system can be restarted, the BMC connected to the backup CPU system monitors the heartbeat signal of the BMC connected to the main CPU system through the I2C bus in real time after the restart, and takes over the work of the BMC connected to the main CPU system when the heartbeat signal of the BMC connected to the main CPU system cannot be detected.

[0072] The main CPU system is the first CPU system, and the backup CPU system is the second CPU system.

[0073] Alternatively, if Figure 5 As shown, the motherboard body is provided with a PSU slot for plugging in the PSU to provide power to the motherboard body and components integrated on the motherboard body.

[0074] Alternatively, if Figure 5 As shown, the mainboard is provided with a network card slot for inserting a network card for sharing by two CPU systems.

[0075] Alternatively, if Figure 5 As shown, the mainboard body is provided with a fan interface for connecting to a server cooling fan; the server CPLD is connected to the fan interface for controlling the server cooling fan connected to the fan interface.

[0076] In this embodiment, the mainboard body is provided with four fan interfaces, which can be connected to four server cooling fans.

[0077] In the utility model, the BMC connected to the two CPU systems is used for chassis management function. The chassis management of the BMC includes not only the CPU, memory, PCH operation status management and hard disk management of the CPU system connected thereto, but also the power consumption management of the PSU plugged into the PSU slot and the fan management of the server cooling fan connected to the fan interface.

[0078] On the server motherboard provided by the utility model, except for the CPU, memory, PCH, hard disk contained in the two CPU systems and the BMC connected to the two CPU systems respectively, other devices are shared modules, such as the PSU, cooling fan, network card, etc. connected to the motherboard. The PSU supplies power to the entire machine, including supplying power to the motherboard shared by the two CPU systems, and also supplying power to the devices integrated or connected to the motherboard body. The cooling fan is used to dissipate heat for the entire server chassis of the server using the server motherboard provided by the utility model, including dissipating heat for the CPU and memory of the two CPU systems.

[0079] In the utility model, the BMCs connected to the two CPU systems can be jointly responsible for the management of the shared modules according to the pre-set management rules.

[0080] For example, the two BMCs described in the present invention are both connected to the CPLD responsible for the speed management of the cooling fan connected to the fan interface. The two BMCs can send fan management information to the CPLD through the connection channels between each BMC and the CPLD. The CPLD can compare the fan speeds required in the fan management information sent by the two BMCs, and ultimately control the operation of the cooling fan based on the fan management information of the BMC that requires a high speed.

[0081] Other shared modules, such as PSU and peripheral devices, can be managed in the same way as BMC manages fans.

[0082] Figure 6 The utility model provides a server, which adopts the server mainboard described in any one of the above embodiments.

[0083] The same and similar parts between the various embodiments in this specification can be referenced to each other.

[0084] It should be noted that the server motherboard in the present invention is not a dual-channel motherboard in the prior art.

[0085] The dual-channel motherboard in the prior art runs the same operating system, and the two CPUs are in a master-slave relationship. The two CPUs are started from the same startup storage area. If any CPU fails, the other CPU also stops working.

[0086] The utility model designs a two-way independent CPU system on a mainboard, including two independent CPUs, memories, PCHs, BMCs, hard disks and operating systems. The two CPUs are in a dual-master relationship rather than a master-slave relationship. Two sets of mutually redundant services are run in the operating system. The services do not interfere with each other, do not interact with each other, and are independent of each other.

[0087] In the prior art, redundant computing nodes need additional common boards when monitoring each other. The two CPU systems in the present invention are integrated on a common motherboard, which can be fixed in a chassis by simple screws, avoiding the use of common boards and the need for independent node boxes to be installed independently. The present invention uses a relatively simple motherboard installation method, and a simple whole-machine device interconnection method can achieve redundancy of computing nodes.

[0088] The utility model adds an I2C intercommunication channel in the two BMCs, so that when one of the BMCs fails, the other BMC can take over the management of the chassis and the management of all shared modules.

[0089] Although the utility model is described in detail by referring to the accompanying drawings and in combination with the preferred embodiments, the utility model is not limited thereto. Without departing from the spirit and essence of the utility model, ordinary technicians in the field can make various equivalent modifications or substitutions to the embodiments of the utility model, and these modifications or substitutions should be within the scope of the utility model / any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the utility model, which should be included in the protection scope of the utility model. Therefore, the protection scope of the utility model shall be based on the protection scope of the claims.

Claims

1. A server motherboard, comprising a motherboard body, characterized in that: The server motherboard also includes two CPU systems integrated on the motherboard body; The two CPU systems are physically independent of each other; The two CPU systems are mutually redundant; Each of the two CPU systems is connected to a BMC, and the two BMCs are interconnected.

2. The server motherboard according to claim 1, characterized in that: Each CPU system includes a CPU, a memory unit, and a PCH; In each CPU system, the CPU is connected to the memory unit and PCH respectively, and an independent hard disk is mounted under the PCH; The CPUs of the two CPU systems are connected one-to-one with the two BMCs.

3. The server motherboard according to claim 2, characterized in that: The hard disks mounted under the PCHs of the two CPU systems each include a system hard disk, in which an operating system is installed, and the same services are run in the operating system.

4. The server motherboard according to claim 2, characterized in that: The two CPU systems are arranged side by side and symmetrically, wherein the CPUs of the two CPU systems are located between the PCHs of the two CPU systems, and in each CPU system, the memory unit of the CPU system is located beside the CPU in the CPU system.

5. The server motherboard according to any one of claims 1 to 4, characterized in that: The server mainboard also includes a server CPLD integrated on the mainboard body; The two BMCs are both connected to the server CPLD.

6. The server motherboard according to claim 5, characterized in that: The two CPU systems are the main CPU system and the backup CPU system; The BMCs connected to the main CPU system and the backup CPU system are interconnected through the I2C bus, so that when the BMC connected to one side is working, the BMC connected to the other side can monitor the heartbeat signal of the BMC connected to the other side, and take over the work of the BMC connected to the other side when the heartbeat signal of the BMC connected to the other side cannot be detected.

7. The server motherboard according to claim 5, characterized in that: The motherboard body is provided with a PSU slot for plugging in the PSU to provide power to the motherboard body and components integrated on the motherboard body.

8. The server motherboard according to claim 5, characterized in that: The mainboard is equipped with a network card slot for plugging in a network card, which is shared by two CPU systems.

9. The server motherboard according to claim 5, characterized in that: The mainboard body is provided with a fan interface for connecting to a server cooling fan; the server CPLD is connected to the fan interface for managing the rotation speed of the server cooling fan connected to the fan interface.

10. A server, characterized in that: The server adopts the server mainboard described in any one of claims 1 to 9.

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