TOLT packaging structure of MOSFET
By combining drain and source pins, adding through holes and Kelvin source pins, the problem of poor heat dissipation in high power, high frequency, and high temperature scenarios is solved, and higher pin strength, conductivity and MOSFET switching speed are achieved.
Patent Information
- Application Number
- CN202420649677.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-01
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2034-04-01
AI Technical Summary
In high power, high frequency and high temperature application scenarios, the heat dissipation effect of the existing TOLT packaging structure still cannot meet the requirements.
By combining multiple drain pins into one wide pin, combining multiple source pins into one wide pin, and setting multiple through holes at the end of the pin, adding a Kelvin source pin to improve the conductivity and connection firmness of the pin and reduce the impact of parasitic inductance.
Improves pin strength and conductivity, reduces pin resistance and heat generation, enhances connection firmness with the chip, and increases the switching speed of the MOSFET.
Smart Images
Figure CN222801801U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of integrated circuit packaging, in particular to a TOLT packaging structure of a power MOSFET. Background Art
[0002] In ordinary MOSFET packaging, heat dissipation is usually achieved by connecting the metal sheet at the bottom to the heat sink, but this form has some problems, such as large thermal resistance and unsatisfactory heat dissipation effect. TOLT packaged MOSFET devices are a special MOSFET packaging form that dissipates heat through the heat sink on the top to improve the working stability and reliability of the device. Top-heated TOLT packaged MOSFET devices can effectively improve the heat dissipation effect, reduce thermal resistance, and enable the device to work stably in a high temperature environment by directly exposing the heat sink to the outside and connecting it to the heat sink.
[0003] like Figure 1 As shown, in the TOLT package structure, the MOSFET chip 1 is packaged inside the package body 2. The lead frame inside the package is inverted, and the heat sink 3 is exposed on the top of the package. Figure 2 As shown, a power MOSFET of a TOLT package structure is generally provided with a plurality of drain pins 4, source pins 5 and gate pins 6. On one side of the package body, a row of nine drain pins 4 are connected to the top heat sink 3. On the other side of the package body, one gate pin 6 is used for gate control, and the remaining eight source pins 5 are connected to the current source.
[0004] However, although the TOLT packaging structure can improve the heat dissipation effect, its heat dissipation effect still cannot meet the requirements in some high-power, high-frequency, and high-temperature application scenarios. Utility Model Content
[0005] The utility model aims to provide a TOLT packaging structure of a power MOSFET with good heat dissipation effect.
[0006] In an embodiment of the utility model, a TOLT packaging structure of a MOSFET is provided, which includes: a MOSFET chip, a plastic package covering the MOSFET chip and a heat sink arranged on the top of the plastic package, a drain pin arranged on one side of the plastic package and connected to the heat sink, a gate pin and a source pin arranged on the opposite side of the drain pin, the width of the drain pin is equivalent to the width of the heat sink, the gate pin and the source pin are separated by a gap, the width of the gate pin is smaller than the source pin, and the sum of the widths of the gate pin, the source pin and the gap is equivalent to the width of the heat sink.
[0007] In an embodiment of the utility model, a groove is provided in the middle of the drain pin to separate the drain pin into two parts.
[0008] In the embodiment of the utility model, a plurality of through holes are provided at the end of the drain pin.
[0009] In the embodiment of the utility model, a plurality of through holes are provided at the end of the source pin.
[0010] In the embodiment of the utility model, a Kelvin source pin is also provided in the gap.
[0011] Compared with the prior art, the TOLT packaging structure of the MOSFET of the utility model is adopted, and the original multiple drain pins are merged into one wide pin, and the original multiple source pins are merged into one wide pin, which not only enhances the strength of the pin, but also increases the area of the pin, improves the conductivity of the pin, reduces the resistance of the pin, and reduces the heat generation of the pin; in addition, multiple through holes are set at the ends of the source pin and the drain pin, and the through holes can be penetrated during plastic sealing, so that the connection between the pin and the chip is more secure; in addition, a Kelvin source pin is added, which can reduce the influence of parasitic inductance and improve the switching speed of the MOSFET. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] Figure 1 It is a cross-sectional schematic diagram of a TOLT package structure of a MOSFET in the prior art.
[0013] Figure 2 It is a schematic diagram of the planar structure of the TOLT packaging structure of the MOSFET in the prior art.
[0014] Figure 3 It is a schematic diagram of the planar structure of the TOLT packaging structure of the MOSFET of the first embodiment of the utility model.
[0015] Figure 4 It is a schematic diagram of the planar structure of the TOLT packaging structure of the MOSFET of the second embodiment of the utility model.
[0016] Figure 5 It is a schematic diagram of the planar structure of the TOLT packaging structure of the MOSFET of the third embodiment of the utility model. DETAILED DESCRIPTION
[0017] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the utility model and are not used to limit the utility model.
[0018] The implementation of the present utility model is described in detail below in conjunction with specific embodiments.
[0019] like Figure 3 As shown, in an embodiment of the utility model, a TOLT packaging structure of MOSFET is provided, which includes a MOSFET chip 1, a plastic package 2 covering the MOSFET chip 1, a heat sink 3 arranged on the top of the plastic package 2, a drain pin 4 arranged on one side of the plastic package 2 and connected to the heat sink 3, and a gate pin 5 and a source pin 6 arranged on the opposite side of the drain pin 4. The width of the drain pin 4 is equivalent to the width of the heat sink 3. The gate pin 5 and the source pin 6 are separated by a gap 7. The width of the gate pin 5 is smaller than that of the source pin 6, and the sum of the widths of the gate pin 5, the source pin 6 and the gap 7 is equivalent to the width of the heat sink 3.
[0020] The heat sink 2 is connected to the drain of the MOSFET chip 1. The gate pin 5 is connected to the gate of the MOSFET chip 1 through an internal metal wire 51. The source pin 6 is connected to the source of the MOSFET chip 1 through an internal metal wire 61.
[0021] Compared with the TOLT package structure of the prior art in which both the drain pin and the source pin adopt multiple narrow pins, in the TOLT package structure of this embodiment, the multiple narrow pins of the drain pin and the source pin are respectively merged into a wide drain pin 4 and a wide source pin 6, thereby improving the strength of the pin, reducing the resistance of the pin, and reducing the heat generation of the pin.
[0022] Furthermore, the ends of the drain pin 4 and the source pin 6 are provided with a plurality of through holes 8. The through holes 8 are used to allow the package body 2 to pass through the through holes 8 during plastic packaging, thereby increasing the connection strength between the drain pin 4 and the source pin 6 and the package body 2.
[0023] like Figure 4 As shown, the difference from the first embodiment is that in the second embodiment of the present invention, a slot 41 is provided in the middle of the drain pin 4, dividing the drain pin 42 into two parts. Since the larger the metal area, the more difficult it is to control the flatness during cutting and forming. By dividing the drain pin 42 into two parts, the processing difficulty during cutting and forming can be reduced.
[0024] like Figure 5 As shown, the difference from the first embodiment is that in the third embodiment of the present invention, a Kelvin source pin 9 is further provided in the gap 7, which can reduce the influence of parasitic inductance and improve the switching speed of the MOSFET.
[0025] Compared with the prior art, the TOLT packaging structure of the MOSFET of the utility model is adopted, and the original multiple drain pins are merged into one wide pin, and the original multiple source pins are merged into one wide pin, which not only enhances the strength of the pin, but also increases the area of the pin, improves the conductivity of the pin, reduces the resistance of the pin, and reduces the heat generation of the pin; in addition, multiple through holes are set at the ends of the source pin and the drain pin, and the through holes can be penetrated during plastic sealing, so that the connection between the pin and the chip is more secure; in addition, a Kelvin source pin is added, which can reduce the influence of parasitic inductance and improve the switching speed of the MOSFET.
[0026] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.
Claims
1. A TOLT packaging structure of a MOSFET, characterized in that: include: A MOSFET chip, a plastic package covering the MOSFET chip, a heat sink arranged on the top of the plastic package, a drain pin arranged on one side of the plastic package and connected to the heat sink, a gate pin and a source pin arranged on the opposite side of the drain pin, the width of the drain pin is equivalent to the width of the heat sink, the gate pin and the source pin are separated by a gap, the width of the gate pin is smaller than the source pin, and the sum of the widths of the gate pin, the source pin and the gap is equivalent to the width of the heat sink.
2. The TOLT package structure of MOSFET according to claim 1, characterized in that: A slot is provided in the middle of the drain pin, dividing the drain pin into two parts.
3. The TOLT package structure of MOSFET according to claim 1, characterized in that: The end of the drain pin is provided with a plurality of through holes.
4. The TOLT package structure of MOSFET according to claim 1, characterized in that: The end of the source pin is provided with a plurality of through holes.
5. The TOLT package structure of MOSFET according to claim 1, characterized in that: A Kelvin source pin is also disposed in the gap.