Perovskite laminated cell structure and photovoltaic module

Abstract

The utility model is applicable to the technical field of solar power generation, and provides a perovskite laminated cell structure and a photovoltaic assembly, the perovskite laminated cell structure comprises a back contact cell as a bottom cell and a perovskite cell as a top cell, a first back electrode and a second back electrode are arranged on the back of the back contact cell, and the first back electrode and the second back electrode are arranged on the back of the top cell. The insulating anti-reflection passivation layer and the perovskite cell are arranged on the front surface of the silicon substrate, and the side surface of the perovskite cell is provided with a side surface positive electrode and a side surface negative electrode. A back contact cell with an insulating anti-reflection passivation layer is used as a bottom cell, a perovskite cell is prepared on the back contact cell, and a transparent insulating adhesive film does not need to be arranged between the back contact cell and the perovskite cell, so that the optical loss is reduced, the open-circuit voltage and current density of the laminated cell are improved, and the photoelectric conversion efficiency is improved. And the electrodes are arranged at the bottom and the side surfaces of the laminated cell, so that the light receiving surface of the laminated cell is free of metal grid line electrode shading, the optical loss is further reduced, and the cell conversion efficiency is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of solar power generation, and in particular relates to a perovskite stacked battery structure and a photovoltaic component. Background Art

[0002] Perovskite solar cells are solar cells that use perovskite-type organic metal halide semiconductors as light-absorbing materials. Existing perovskite stacked cells can be divided into full perovskite stacked cells, crystalline silicon / perovskite stacked cells, and thin-film cells / perovskite stacked cells. Among them, crystalline silicon / perovskite stacked cells are divided into three combinations: one is a stacking mode in which the two ends of the perovskite cell and the crystalline silicon cell are connected in series, another is a stacking mode in which the perovskite cell and the back-contact crystalline silicon cell are connected in parallel at three ends, and the other is a four-terminal stacking mode in which the perovskite cell and the crystalline silicon cell are independent of each other. In the four-terminal stacking structure, the perovskite cell and the crystalline silicon cell are independent of each other. The perovskite cell is prepared on a substrate, and a transparent insulating film is placed between the two and mechanically laminated.

[0003] However, placing a transparent insulating film between the perovskite cell and the substrate will cause optical losses, and the light-receiving surface of the cell has metal electrodes, which block light and cause optical losses, resulting in low cell conversion efficiency. Utility Model Content

[0004] The embodiment of the utility model provides a perovskite tandem battery structure, aiming to solve the problem of low conversion efficiency caused by optical loss in existing perovskite tandem batteries.

[0005] The embodiment of the utility model is implemented as follows: a perovskite stacked cell structure includes a back contact cell as a bottom cell and a perovskite cell as a top cell, wherein the back contact cell includes a silicon substrate, an insulating anti-reflection passivation layer, a first back electrode and a second back electrode;

[0006] The silicon substrate has a front side and a back side opposite to each other, the back side of the silicon substrate has a first conductive type region and a second conductive type region, the first conductive type region is connected to the first back side electrode, and the second conductive type region is connected to the second back side electrode;

[0007] An insulating anti-reflection passivation layer is disposed on the front side of the silicon substrate;

[0008] The perovskite cell is arranged on an insulating anti-reflection passivation layer, and a side positive electrode and a side negative electrode are arranged on the side of the perovskite cell.

[0009] Furthermore, the perovskite cell is divided into a plurality of sub-cells isolated from each other, and the plurality of sub-cells are connected in series, with the first sub-cell being connected to the side positive electrode and the last sub-cell being connected to the side negative electrode.

[0010] Furthermore, the sub-cell includes a first transparent conductive layer, an electron transport layer, a perovskite absorption layer and a hole transport layer which are sequentially arranged on the insulating anti-reflection passivation layer in a direction away from the silicon substrate, the first transparent conductive layer of the first sub-cell is connected to the side positive electrode, and the first transparent conductive layer of the last sub-cell is connected to the side negative electrode.

[0011] Furthermore, there is a first interval between adjacent first transparent conductive layers, the width of the first interval is W1, and the width of the front surface of the silicon substrate is WK, wherein the ratio of W1 to WK is 0.8:10 to 1.4:10.

[0012] Furthermore, there is a second interval between adjacent electron transport layers, perovskite absorption layers and hole transport layers, and the distance between the second interval and the first interval is W2, wherein the ratio of W1 to W2 is 0.8:1 to 1.2:1.

[0013] Further, the remaining sub-cells except the first sub-cell are all provided with a third interval, and the second interval is located between the first interval and the third interval.

[0014] Furthermore, the perovskite cell also includes a second transparent conductive layer, which is arranged on a side of the hole transport layer away from the perovskite absorption layer.

[0015] Furthermore, the perovskite cell also includes a front anti-reflection layer, which is arranged on a side of the second transparent conductive layer away from the hole transport layer.

[0016] Furthermore, a first interface passivation layer is provided between the electron transport layer and the perovskite absorption layer, and a second interface passivation layer is provided between the perovskite absorption layer and the hole transport layer.

[0017] In a second aspect, the present application also provides a photovoltaic module, comprising the perovskite stacked cell structure as described above.

[0018] The beneficial effect of the present application is that the perovskite stacked cell structure of the present application includes a back contact cell as a bottom cell and a perovskite cell as a top cell, the back contact cell includes a silicon substrate, an insulating anti-reflection passivation layer, a first back electrode and a second back electrode, wherein the silicon substrate has a relative front and back, the back of the silicon substrate has a first conductive type region and a second conductive type region, the first conductive type region is connected to the first back electrode, the second conductive type region is connected to the second back electrode, the insulating anti-reflection passivation layer is arranged on the front of the silicon substrate, the perovskite cell is arranged on the insulating anti-reflection passivation layer, and the side of the perovskite cell is arranged with a side positive electrode and a side negative electrode. By using a back contact cell with an insulating anti-reflection passivation layer as a bottom cell, the perovskite cell is directly prepared on the back contact cell, and a transparent insulating adhesive film does not need to be arranged between the back contact cell and the perovskite cell, thereby reducing optical loss, improving the open circuit voltage and current density of the stacked cell, and the electrodes are arranged at the bottom and side of the stacked cell, so that the light-receiving surface of the stacked cell is not shielded by a metal grid electrode, further reducing optical loss and improving cell conversion efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a structural schematic diagram of an embodiment of a stacked battery provided by the present application;

[0020] Figure 2 It is a schematic structural diagram of a back contact battery of an embodiment of a stacked battery provided in the present application;

[0021] Figure 3 This is a schematic structural diagram of preparing a first transparent conductive layer and marking a first interval in an embodiment of a stacked battery provided by the present application;

[0022] Figure 4 It is a schematic structural diagram of preparing a perovskite cell and marking a second interval in one embodiment of a stacked cell provided in the present application;

[0023] Figure 5 This is a schematic structural diagram of preparing a second transparent conductive layer and marking a third interval in an embodiment of a stacked battery provided by the present application;

[0024] Figure 6 It is a schematic diagram of the structure of preparing side electrodes of an embodiment of the stacked battery provided in the present application. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the utility model clearer, the utility model is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, in which the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the utility model, and cannot be understood as limiting the utility model. In addition, it should be understood that the specific embodiments described herein are only used to explain the utility model and are not used to limit the utility model.

[0026] In the description of the present invention, it should be understood that the terms "length", "width", "up", "down", "left", "right", "horizontal", "top", "bottom", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they should not be understood as limitations on the present invention.

[0027] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0028] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or mutual communication; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0029] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0030] The disclosure below provides many different embodiments or examples for realizing different structures of the utility model. In order to simplify the disclosure of the utility model, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the utility model. In addition, the utility model can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the utility model provides various specific examples of processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.

[0031] The perovskite stacked cell structure of the present application includes a back contact cell as a bottom cell and a perovskite cell as a top cell, wherein the back contact cell includes a silicon substrate, an insulating anti-reflection passivation layer, a first back electrode and a second back electrode, wherein the silicon substrate has a relative front and back, the back of the silicon substrate has a first conductive type region and a second conductive type region, the first conductive type region is connected to the first back electrode, the second conductive type region is connected to the second back electrode, the insulating anti-reflection passivation layer is arranged on the front of the silicon substrate, the perovskite cell is arranged on the insulating anti-reflection passivation layer, and the side of the perovskite cell is arranged with a side positive electrode and a side negative electrode. By using a back contact cell with an insulating anti-reflection passivation layer as a bottom cell, a perovskite cell is directly prepared on the back contact cell, and a transparent insulating adhesive film does not need to be arranged between the back contact cell and the perovskite cell, thereby reducing optical loss, improving the open circuit voltage and current density of the stacked cell, and the electrodes are arranged at the bottom and side of the stacked cell, so that the light-receiving surface of the stacked cell is not shielded by a metal grid electrode, further reducing optical loss and improving cell conversion efficiency.

[0032] Embodiment 1

[0033] like Figures 1 to 6As shown, one embodiment of the present application provides a perovskite stacked cell structure, including a back contact cell 100 as a bottom cell and a perovskite cell 200 as a top cell, wherein the back contact cell 100 includes a silicon substrate 110, an insulating anti-reflection passivation layer 120, a first back electrode 130 and a second back electrode 140;

[0034] The silicon substrate 110 has a front side and a back side opposite to each other. The back side of the silicon substrate 110 has a first conductive type region 111 and a second conductive type region 112. The first conductive type region 111 is connected to the first back side electrode 130, and the second conductive type region 112 is connected to the second back side electrode 140.

[0035] The insulating anti-reflection passivation layer 120 is disposed on the front surface of the silicon substrate 110;

[0036] The perovskite cell 200 is disposed on the insulating anti-reflection passivation layer 120 , and a side positive electrode 210 and a side negative electrode 220 are disposed on the side of the perovskite cell 200 .

[0037] BC (Back Contact) cell is a general term for various types of crystalline silicon solar cells with back contact structures, including but not limited to HPBC, TBC, HBC, etc. Among them, the back contact of BC cell means that both the emitter electrode and the base electrode are located on the back side. On the one hand, the emitter electrode is transferred to the back side of the cell, thereby reducing or eliminating the shading loss of the front grid line and improving the cell efficiency; on the other hand, it is easy to assemble during component packaging. Since all the electrodes are on the back side, the spacing between the cell sheets can be reduced, the packaging density can be improved, and the appearance is beautiful.

[0038] During implementation, the silicon substrate 110 has a front side and a back side opposite to each other. Usually, the front side of the silicon substrate 110 is regarded as a light-receiving side, and the back side of the silicon substrate 110 is regarded as a backlight side, which will not be described in detail.

[0039] A first conductive type region 111 and a second conductive type region 112 are formed on the back side of the silicon substrate 110, wherein the first conductive type region 111 and the second conductive type region 112 include a P-type region and an N-type region. The P-type region and the N-type region refer to silicon formed by doping different elements. For example, silicon doped with boron will form a P-type region, and silicon doped with phosphorus will form an N-type region, which will not be elaborated herein.

[0040] In implementation, when the first conductive type region 111 is a P-type region, the second conductive type region 112 is an N-type region. Similarly, when the first conductive type region 111 is an N-type region, the second conductive type region 112 is a P-type region.

[0041] Optionally, the silicon substrate 110 may be a P-type silicon wafer or an N-type silicon wafer, without limitation. That is, if the silicon substrate 110 is a P-type silicon wafer, the silicon substrate 110 naturally forms a P-type region, and phosphorus elements need to be doped in the silicon substrate to further form an N-type region. Similarly, if the silicon substrate 110 is an N-type silicon wafer, the silicon substrate 110 naturally forms an N-type region, and boron elements need to be doped in the silicon substrate to further form a P-type region.

[0042] It should be noted that the above-mentioned silicon doped with boron and phosphorus to form a P-type region and an N-type region respectively is an example of the embodiments of the present application, and is not a specific limitation of the present application. In other embodiments, silicon is doped with trivalent elements to form a P-type region, such as boron, indium or gallium, and silicon is doped with pentavalent elements to form an N-type region, such as phosphorus, arsenic or antimony, without limitation.

[0043] Optionally, the first conductive type region 111 is connected to the first back electrode 130, and the second conductive type region 112 is connected to the second back electrode 140. When the first conductive type region 111 is a P-type region, the second conductive type region 112 is an N-type region. In this case, the first back electrode 130 can be regarded as a positive grid line, and the second back electrode 140 can be regarded as a negative grid line. Similarly, when the first conductive type region 111 is an N-type region, the second conductive type region 112 is a P-type region. In this case, the first back electrode 130 can be regarded as a negative grid line, and the second back electrode 140 can be regarded as a positive grid line.

[0044] The front side of the silicon substrate 110 is provided with an insulating anti-reflection passivation layer 120, which is used to reduce light reflection, reduce reflection loss, and improve photoelectric conversion efficiency. Optionally, the insulating anti-reflection passivation layer 120 includes but is not limited to SiN x (silicon nitride), Al2O3 (aluminum oxide), SiO2 (silicon oxide), ZnO2 (zinc oxide) and one or more composite insulating films.

[0045] Optionally, the insulating anti-reflection passivation layer 120 may be deposited by using vacuum coating techniques such as PECVD (Plasma Enhanced Chemical Vapor Deposition), PVD (Physical Vapor Deposition), ALD (Atomic Layer Deposition), etc., without limitation.

[0046] After depositing the insulating anti-reflection passivation layer 120, a perovskite cell 200 is further prepared on the insulating anti-reflection passivation layer 120. The perovskite cell 200 is a solar cell that uses a perovskite-type organic metal halide semiconductor as a light-absorbing material, which will not be described in detail. By using the back contact cell 100 containing the insulating anti-reflection passivation layer 120 as a substrate (bottom cell), the back contact cell 100 and the perovskite cell 200 are independent of each other. At the same time, by directly preparing the perovskite cell 200 on the back contact cell 100, there is no insulating film between the two cells, and no lamination process is required, which reduces the preparation cost while avoiding the optical loss caused by the transparent insulating film, thereby improving the current density of the back contact cell 100.

[0047] Optionally, the perovskite stacked cell structure provided in the present application further includes a side positive electrode 210 and a side negative electrode 220, wherein the side positive electrode 210 and the side negative electrode 220 are respectively arranged on the side of the perovskite cell 200, wherein the side positive electrode 210 is the positive grid line of the perovskite cell 200, and the side negative electrode 220 is the negative grid line of the perovskite cell 200. By arranging the first back electrode 130 and the second back electrode 140 on the back of the back contact cell 100, and arranging the side positive electrode 210 and the side negative electrode 220 on the side of the perovskite cell 200, there is no metal grid line on the light-receiving surface of the stacked cell, reducing the optical loss caused by the metal grid line shading on the light-receiving surface, and improving the current density of the stacked cell.

[0048] The perovskite stacked cell structure of the present application includes a back-contact cell 100 as a bottom cell and a perovskite cell 200 as a top cell, wherein the back-contact cell 100 includes a silicon substrate 110, an insulating anti-reflection passivation layer 120, a first back electrode 130 and a second back electrode 140, wherein the silicon substrate 110 has a relative front and back sides, the back side of the silicon substrate 110 has a first conductive type region 111 and a second conductive type region 112, the first conductive type region 111 is connected to the first back electrode 130, the second conductive type region 112 is connected to the second back electrode 140, the insulating anti-reflection passivation layer 120 is arranged on the front side of the silicon substrate 110, the perovskite cell 200 is arranged on the insulating anti-reflection passivation layer 120, and the side of the perovskite cell 200 is provided with a side positive electrode 210 and a side negative electrode 220. By using a back contact cell 100 with an insulating anti-reflection passivation layer 120 as a bottom cell, a perovskite cell 200 is directly prepared on the back contact cell 100, and there is no need to set a transparent insulating adhesive film between the back contact cell 100 and the perovskite cell 200, thereby reducing optical losses and improving the open circuit voltage and current density of the stacked cell. In addition, electrodes are arranged at the bottom and sides of the stacked cell, so that the light-receiving surface of the stacked cell is not shielded by the metal grid electrode, further reducing optical losses and improving the cell conversion efficiency.

[0049] In some optional embodiments, the perovskite cell 200 is divided into a plurality of mutually isolated sub-cells, the plurality of sub-cells are connected in series, the first sub-cell is connected to the side positive electrode 210 , and the last sub-cell is connected to the side negative electrode 220 .

[0050] When implementing, Figure 4 , Figure 5 and Figure 6 As shown, the perovskite cell 200 is divided into several sub-cells by marking, wherein the perovskite cell 200 includes a first transparent conductive layer 230, an electron transport layer 240, a perovskite absorption layer 250 and a hole transport layer 260, and the first transparent conductive layer 230 is marked into a first interval 231, and the width of the first interval 231 is W1, so as to divide the first transparent conductive layer 230 into several blocks.

[0051] Optionally, the width of the front side of the silicon substrate 110 is WK, wherein the ratio of W1 to WK is 0.8:10 to 1.4:10, for example, W1:WK may be 0.9:10, 1:10, 1.1:10 or 1.2:10, etc., without limitation.

[0052] The electron transport layer 240, the perovskite absorption layer 250 and the hole transport layer 260 are marked as a second interval 270, and the distance between the second interval 270 and the first interval 231 is W2. In implementation, W1 and W2 can be equal or different. Exemplarily, the ratio of W1 to W2 is 0.8:1 to 1.2:1, for example, W1:WK can be 0.9:1, 1:1 or 1.1:1, without limitation.

[0053] The remaining subcells except the first subcell are all provided with a third spacer 280, and the second spacer 270 is located between the first spacer 231 and the third spacer 280. The perovskite cell 200 is divided into a number of subcells by scribing, and these subcells are connected in series into a whole, and the side positive electrode 210 and the side negative electrode 220 are respectively connected to the two ends of the series body composed of the subcells, for example, the first subcell is connected to the side positive electrode 210, and the last subcell is connected to the side negative electrode 220. Further, the side positive electrode 210 and the side negative electrode 220 are connected to the first transparent conductive layer 230, for example, the first transparent conductive layer 230 of the first subcell is connected to the side positive electrode 210, and the first transparent conductive layer 230 of the last subcell is connected to the side negative electrode 220, which will not be described in detail.

[0054] In implementation, the first transparent conductive layer 230 is a TCO (Transparent conducting oxide, transparent conductive oxide coating) layer. The TCO layer is a transparent conductive oxide film uniformly coated on the surface by a physical or chemical coating method to collect current.

[0055] Optionally, the TCO layer mainly includes oxides of In (indium), Sn (tin), Zn (zinc) and Cd (cadmium) and their composite multi-oxide thin film materials. For example, the TCO layer can use IZO (indium zinc oxide), ITO (tin-doped indium oxide), IWO (tungsten-doped indium oxide), FTO (fluorine-doped tin oxide), AZO (aluminum-doped zinc oxide) or IZrO (zirconium-doped indium oxide), etc., without limitation.

[0056] The electron transport layer 240 (ETL) is mainly responsible for transporting electrons and inhibiting electron backflow. The electron transport layer 240 is composed of two layers of materials: dense TiO2 (titanium dioxide) and mesoporous TiO2. Among them, dense TiO2 is used to prevent direct contact between the substrate (back contact battery 100) and the perovskite to avoid the transmission of holes to the substrate; mesoporous TiO2 provides a framework and support for the growth of perovskite, forming a porous TiO2 / perovskite mixed layer for transporting electrons. In the preparation process, the ETL material is first coated on the substrate, and then subjected to high-temperature treatment to form a good electron transmission channel.

[0057] The perovskite absorption layer 250 is mainly responsible for absorbing sunlight and converting it into charge carriers. Perovskite materials usually use organic lead halides or all-inorganic lead halides and other materials, a typical representative of which is methylamine lead iodide (CH3NH3Pbl3). These materials can absorb sunlight, generate photoelectrons, and realize photoelectric conversion.

[0058] The hole transport layer 260 (HTL) is mainly responsible for extracting and transporting photogenerated holes and inhibiting hole backflow. Commonly used HTL materials include Spiro-OMeTAD (Chinese name: 2,2',7,7'-tetra-N,N-di(4-methoxyphenyl)amino]-9,9'-spirobifluorene) and the like. In the preparation process, the HTL material is first coated on the electron transport layer 240 (ETL), and then heat-treated or photo-treated to form a good hole transport channel for extracting and transporting photogenerated holes.

[0059] The first back electrode 130, the second back electrode 140, the side positive electrode 210 and the side negative electrode 220 can be formed into a transparent, conductive electrode film by vacuum evaporation or sputtering, and then heat-treated or photo-treated to optimize the electrode performance and improve the photoelectric conversion efficiency of the battery.

[0060] In some embodiments, the perovskite cell 200 further includes a second transparent conductive layer 290 , which is disposed on a side of the hole transport layer 260 away from the perovskite absorption layer 250 .

[0061] In implementation, the second transparent conductive layer 290 is also a TCO layer. For details, please refer to the first transparent conductive layer 230 as a TCO layer, and no further details will be given.

[0062] In some optional embodiments, the perovskite cell 200 further includes a front anti-reflection layer (not shown), which is disposed on a side of the second transparent conductive layer 290 away from the hole transport layer 260 .

[0063] In practice, the front anti-reflection layer is an anti-reflection film disposed on the second transparent conductive layer 290. The anti-reflection film is also called an anti-reflection film, which is used to reduce or eliminate reflected light, thereby increasing the amount of light transmitted and further improving the conversion efficiency of the battery.

[0064] Optionally, the front anti-reflection layer may be made of LiFx (lithium fluoride) or MgFx (magnesium fluoride) or other film layers that reduce light reflection and increase light transmittance. For example, the anti-reflection layer may also be composed of at least one layer of a silicon nitride layer, a silicon oxynitride layer and a silicon oxide layer, without limitation.

[0065] In some optional embodiments, a first interface passivation layer (not shown) is disposed between the electron transport layer 240 and the perovskite absorption layer 250 , and a second interface passivation layer is disposed between the perovskite absorption layer 250 and the hole transport layer 260 .

[0066] In implementation, the first interface passivation layer is a layer of passivation coating, which includes titanium dioxide (TiO2), aluminum oxide (Al2O3) and ferric oxide (Fe2O3), etc., without limitation. This layer of passivation coating can reduce the reflectivity and surface roughness of the battery and improve the photoelectric conversion efficiency of the battery.

[0067] Embodiment 2

[0068] In some optional embodiments, the present application provides a photovoltaic module, comprising the perovskite stacked cell structure as described above.

[0069] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the structure and implementation principle of the photovoltaic assembly described above can refer to the corresponding structure and implementation principle in the aforementioned embodiment 1, and will not be repeated here.

[0070] In some possible embodiments, the perovskite stacked cell structure and photovoltaic module preparation process include the following steps:

[0071] 1. The silicon substrate 110 is a back contact (N-type or P-type) crystalline silicon cell. The first conductive type region 111 and the second conductive type region 112 are located on the back of the silicon substrate 110. At the same time, the first back electrode 130 and the second back electrode 140 are all located on the back of the cell. The light-receiving surface (front side) of the silicon substrate 110 is not blocked by metal grid lines, and the light-receiving surface has an insulating anti-reflection passivation layer 120, such as Figure 2 shown.

[0072] 2. Prepare a first transparent conductive layer 230 on the insulating anti-reflection passivation layer 120, and then divide the first transparent conductive layer 230 into N regions at first intervals 231 by laser or mechanical means, and each region is independently isolated from each other. Figure 3 shown.

[0073] 3. After the first transparent conductive layer 230 is divided into N regions by the first interval 231, an electron transport layer 240 is prepared on the first transparent conductive layer 230, and then a perovskite absorption layer 250 is prepared on the electron transport layer 240, and a hole transport layer 260 is further prepared on the perovskite absorption layer 250, and the electron transport layer 240, the perovskite absorption layer 250 and the hole transport layer 260 are scribed by laser or mechanical means to generate a second interval 270, and the electron transport layer 240, the perovskite absorption layer 250 and the hole transport layer 260 are divided into N regions, and each part is independently isolated from each other, such as Figure 4 shown.

[0074] 4. Further prepare a second transparent conductive layer 290 on the hole transport layer 260, and then scribe the electron transport layer 240, the perovskite absorption layer 250, the hole transport layer 260 and the second transparent conductive layer 290 by laser or mechanical means to generate a third interval 280, and the electron transport layer 240, the perovskite absorption layer 250, the hole transport layer 260 and the second transparent conductive layer 290 are divided into N regions, and each part is independently isolated from each other, such as Figure 5 shown.

[0075] 5. Connect the side positive electrode 210 and the side negative electrode 220 to the first transparent conductive layer 230 at both ends, and the preparation of the perovskite stacked battery structure is completed. Then, the perovskite stacked battery structure is made into a battery assembly through layout, welding, lamination and packaging processes, such as Figure 6 shown.

[0076] The perovskite stacked cell structure of the present application includes a back-contact cell 100 as a bottom cell and a perovskite cell 200 as a top cell, wherein the back-contact cell 100 includes a silicon substrate 110, an insulating anti-reflection passivation layer 120, a first back electrode 130 and a second back electrode 140, wherein the silicon substrate 110 has a relative front and back sides, the back side of the silicon substrate 110 has a first conductive type region 111 and a second conductive type region 112, the first conductive type region 111 is connected to the first back electrode 130, the second conductive type region 112 is connected to the second back electrode 140, the insulating anti-reflection passivation layer 120 is arranged on the front side of the silicon substrate 110, the perovskite cell 200 is arranged on the insulating anti-reflection passivation layer 120, and the side of the perovskite cell 200 is provided with a side positive electrode 210 and a side negative electrode 220. By using a back contact cell 100 with an insulating anti-reflection passivation layer 120 as a bottom cell, a perovskite cell 200 is directly prepared on the back contact cell 100, and there is no need to set a transparent insulating adhesive film between the back contact cell 100 and the perovskite cell 200, thereby reducing optical losses and improving the open circuit voltage and current density of the stacked cell. In addition, electrodes are arranged at the bottom and sides of the stacked cell, so that the light-receiving surface of the stacked cell is not shielded by the metal grid electrode, further reducing optical losses and improving the cell conversion efficiency.

[0077] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A perovskite tandem battery structure, characterized in that: A back contact cell as a bottom cell and a perovskite cell as a top cell, wherein the back contact cell comprises a silicon substrate, an insulating anti-reflection passivation layer, a first back electrode and a second back electrode; The silicon substrate has a front side and a back side opposite to each other, the back side of the silicon substrate has a first conductive type region and a second conductive type region, the first conductive type region is connected to the first back side electrode, and the second conductive type region is connected to the second back side electrode; An insulating anti-reflection passivation layer is arranged on the front side of the silicon substrate; The perovskite cell is arranged on the insulating anti-reflection passivation layer, and a side positive electrode and a side negative electrode are arranged on the side of the perovskite cell.

2. The perovskite stacked battery structure according to claim 1, characterized in that: The perovskite cell is divided into a plurality of sub-cells isolated from each other, and the plurality of sub-cells are connected in series, the first sub-cell is connected to the side positive electrode, and the last sub-cell is connected to the side negative electrode.

3. The perovskite stacked battery structure according to claim 2, characterized in that: The sub-cell comprises a first transparent conductive layer, an electron transport layer, a perovskite absorption layer and a hole transport layer which are sequentially arranged on the insulating anti-reflection passivation layer in a direction away from the silicon substrate, the first transparent conductive layer of the first sub-cell is connected to the side positive electrode, and the first transparent conductive layer of the last sub-cell is connected to the side negative electrode.

4. The perovskite stacked battery structure according to claim 3, characterized in that: There is a first interval between adjacent first transparent conductive layers, the width of the first interval is W1, the width of the front surface of the silicon substrate is WK, wherein the ratio of W1 to WK is 0.8:10 to 1.4:

10.

5. The perovskite stacked battery structure according to claim 4, characterized in that: There is a second interval between the adjacent electron transport layer, the perovskite absorption layer and the hole transport layer, and the distance between the second interval and the first interval is W2, wherein the ratio of W1 to W2 is 0.8:1 to 1.2:

1.

6. The perovskite stacked battery structure according to claim 5, characterized in that: The remaining sub-cells except the first sub-cell are all provided with a third interval, and the second interval is located between the first interval and the third interval.

7. The perovskite stacked battery structure according to claim 3, characterized in that: The perovskite cell further includes a second transparent conductive layer, which is disposed on a side of the hole transport layer away from the perovskite absorption layer.

8. The perovskite stacked battery structure according to claim 7, characterized in that: The perovskite cell further includes a front anti-reflection layer, which is disposed on a side of the second transparent conductive layer away from the hole transport layer.

9. The perovskite stacked cell structure according to any one of claims 3 to 8, characterized in that: A first interface passivation layer is disposed between the electron transport layer and the perovskite absorption layer, and a second interface passivation layer is disposed between the perovskite absorption layer and the hole transport layer.

10. A photovoltaic module, characterized in that: It comprises the perovskite stacked cell structure as claimed in any one of claims 1 to 9.

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