Backward irrigation voltage cut-off circuit, communication module and vehicle

Abstract

The utility model provides a backward irrigation voltage cut-off circuit, a communication module and a vehicle, the backward irrigation voltage cut-off circuit comprises an AND logic module and a cut-off module, a first input end of the AND logic module is connected with a main power supply, a second input end of the AND logic module is connected with an enable pin of a micro control unit MCU, and the cut-off module is connected with the main power supply. The output end of the AND logic module is connected with the first end of the first cut-off module. The second end of the first cut-off module is grounded, and the third end of the first cut-off module is connected with the standby battery and the first end of the second cut-off module. The cut-off modules comprise the first cut-off module and the second cut-off module, when the first end of the cut-off module is in a high level state, the second end and the third end of the cut-off module are in a conducting state, and when the main power supply is powered off and the MCU is set to be in a high resistance state, the cut-off module can cut off the power supply when the main power supply is powered off and the MCU is set to be in a high resistance state. When the first cut-off module is cut off, the second cut-off module is switched on, and the power chip enabling pin is grounded to prevent the power chip from outputting backward flowing voltage.

Description

Technical Field

[0001] The utility model relates to the technical field of circuit safety, in particular to a reverse voltage cut-off circuit. Background Art

[0002] When the main power supply is powered, the supply voltage charges the backup battery through the charging circuit of the backup battery. When the main power supply is cut off and the MCU (Microcontroller Unit) is powered off, the backup battery generates a back-feed voltage due to the incomplete cutoff of the MOS companion diode in the charging circuit of the backup battery. The back-feed voltage is fed back to the power chip through the charging circuit and the power supply selection circuit, and finally the power chip outputs the supply voltage to the MCU, causing the MCU to be in an abnormal power supply state.

[0003] Currently, no effective solution has been proposed to the above problems. Summary of the invention

[0004] The utility model provides a backfeed voltage cutoff circuit, a communication module and a vehicle, as follows:

[0005] A backfeed voltage cutoff circuit, comprising: an AND logic module and a cutoff module, wherein when the first end of the cutoff module is at a high level, the second end and the third end are in a conducting state, and the cutoff module comprises a first cutoff module and a second cutoff module;

[0006] The first input end of the AND logic module is connected to the main power supply, the second input end of the AND logic module is connected to the enable pin of the micro control unit MCU, and the output end of the AND logic module is connected to the first end of the first cutoff module;

[0007] The second end of the first cut-off module is grounded, and the third end of the first cut-off module is connected to the backup battery and the first end of the second cut-off module;

[0008] The second end of the second cutoff module is grounded, and the third end of the second cutoff module is connected to an enable pin of a power chip.

[0009] Optionally, the AND logic module includes a first diode and a second diode;

[0010] The first input end of the AND logic module includes the anode of the first diode, the second input end of the AND logic module includes the anode of the second diode, and the output end of the AND logic module includes the cathode of the first diode and the cathode of the second diode;

[0011] The cathode of the first diode is connected to the cathode of the second diode.

[0012] Optionally, the first cutoff module includes a first MOS tube and a first associated diode;

[0013] The source of the first MOS transistor is connected to the anode of the first associated diode, and the drain of the first MOS transistor is connected to the cathode of the first associated diode;

[0014] The first end of the first cutoff module includes the gate of the first MOS transistor, the second end of the first cutoff module includes the source of the first MOS transistor, and the third end of the first cutoff module includes the drain of the first MOS transistor.

[0015] Optionally, the first cutoff module further includes a first resistor;

[0016] A first end of the first resistor is connected to a gate of the first MOS transistor, and a second end of the first resistor is connected to a source of the first MOS transistor.

[0017] Optionally, the second cutoff module includes a second MOS tube and a second associated diode;

[0018] The source of the second MOS transistor is connected to the anode of the second associated diode, and the drain of the second MOS transistor is connected to the cathode of the second associated diode;

[0019] The second end of the second cutoff module includes the gate of the second MOS tube, the third end of the second cutoff module includes the source of the second MOS tube, and the third end of the second cutoff module includes the drain of the second MOS tube.

[0020] Optionally, the second cutoff module further includes a second resistor;

[0021] A first end of the second resistor is connected to a gate of the second MOS transistor, and a second end of the second resistor is connected to a source of the second MOS transistor.

[0022] Optionally, the second cutoff module further includes a capacitor;

[0023] The first end of the capacitor is connected to the gate of the second MOS transistor, and the second end of the capacitor is connected to the source of the second MOS transistor.

[0024] Optionally, the backfeed voltage cutoff circuit further includes a third resistor, and the third resistor is connected in series between the output end of the AND logic module and the first end of the first cutoff module.

[0025] Optionally, the backfeed voltage cutoff circuit further includes a fourth resistor, and the fourth resistor is connected in series between the backup battery and the third end of the first cutoff module.

[0026] Optionally, the power chip includes a low dropout linear regulator LDO chip.

[0027] A communication module TBOX includes the backfeed voltage cutoff circuit as described above.

[0028] A vehicle comprises the reverse voltage cutoff circuit as described above.

[0029] It can be seen from the above technical scheme that the utility model provides a backfeed voltage cutoff circuit, a communication module and a vehicle, the backfeed voltage cutoff circuit includes a logic module, a first cutoff module, and a second cutoff module, the first input end of the logic module is connected to the main power supply, the second input end of the logic module is connected to the enable pin of the micro control unit MCU, and the output end of the logic module is connected to the first end of the first cutoff module. The second end of the first cutoff module is grounded, and the third end of the first cutoff module is connected to the backup battery and the first end of the second cutoff module. The second end of the second cutoff module is grounded, and the third end of the second cutoff module is connected to the enable pin of the power chip. Since the cutoff module includes the first cutoff module and the second cutoff module, and the second end and the third end of the cutoff module are in a conducting state when the first end of the cutoff module is at a high level, therefore, when the main power supply is cut off, the backup battery has power, and the MCU is set to a high impedance state, the first cutoff module is in a cutoff state, and the second end and the third end of the second cutoff module are in a conducting grounding state, and the power chip enable pin is grounded to prevent the power chip from outputting a backfeed voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0031] Figure 1 A data anomaly schematic diagram provided by the utility model;

[0032] Figure 2 An example of a structural schematic diagram of a battery charging circuit is provided;

[0033] Figure 3 An example of a structural schematic diagram of a power supply selection circuit is shown;

[0034] Figure 4 An example of a structural schematic diagram of a step-down circuit is provided;

[0035] Figure 5 A schematic diagram of the structure of a reverse voltage cut-off circuit provided by the utility model;

[0036] Figure 6 A schematic diagram of the specific structure of a backfeed voltage cutoff circuit provided by the utility model;

[0037] Figure 7 The utility model provides a specific structural diagram of a reverse voltage cut-off circuit. DETAILED DESCRIPTION

[0038] The following will be combined with the drawings in the utility model to clearly and completely describe the technical solution in the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0039] The backfeed voltage cutoff circuit provided by the embodiment of the utility model can be used for the scenario where the enable pin of the low-dropout linear regulator LDO chip is affected by the backfeed voltage and outputs a high level, causing abnormal MCU power supply, and further causing the print log read from the RAM (random access memory) to have character errors after the MCU is powered off and restarted, such as Figure 1 This is a diagram showing a character error in the print log after the MCU is powered off and restarted. Figure 1 Character errors are shown with shadows and rectangular frames. For specific log information, please refer to the prior art, which will not be described in detail in this embodiment.

[0040] cause Figure 1 The main reason why the print log read from the RAM has character errors after the MCU is powered off and restarted is that in the prior art, after the MCU is powered off, the companion diode of the MOS in the battery charging circuit of the backup battery is not completely cut off, resulting in the backflow voltage of the backup battery through the power chip, causing the MCU to be in an abnormal power supply state.

[0041] Specifically, Figure 2 A schematic diagram of a battery charging circuit is shown. Figure 2 It can be seen that in order to prevent the voltage backflow phenomenon in the storage mode (that is, the voltage output of the main power supply and the backup battery are cut off), a voltage cutoff module with a parallel structure of MOS tube Q2 and an associated diode is set in the battery charging circuit in the prior art. Since incomplete cutoff is a characteristic of the parallel structure itself, in the battery charging circuit, the battery voltage BAT3V6 of the backup battery is backflowed to the power supply selection circuit, that is, the ADPT5V network, due to the incomplete cutoff of Q2.

[0042] Further, Figure 3The schematic diagram of the structure of a power supply selection circuit is illustrated. The power supply selection circuit is used to select the power supply voltage and output the voltage. For example, when the main power supply is used, the main power supply voltage is output, and when the backup battery is used, the backup power supply voltage is output. Figure 3 It can be seen that when the main power supply is cut off and the backup battery has power, due to the incomplete cutoff characteristics of the parallel structure of the MOS tube Q10 and the associated diode, the reverse injection voltage ADPT5V is fed back through Q10 to the step-down circuit, that is, the MAIN5V network. Figure 4 The schematic diagram of a buck circuit is shown in the figure. The buck circuit implements buck based on the LDO chip U4. Figure 4 As shown, the voltage MAIN5V outputted from the output end of the power supply selection circuit is inputted into the input VIN pin (pins numbered 7 and 8) of the LDO chip U4 via the inductor L7, and is inputted into the enable pin EN of the LDO chip U4 via L7 and the resistor R60, so that the enable pin EN is at a high level, and the LDO chip U4 is controlled to step down and then output the power supply voltage MAIN3V3 of the ECU from the output VOUT pin (pins numbered 1 and 2). It should be noted that the enable pin EN is used to control whether the VOUT pin outputs voltage. Specifically, when the enable pin EN is at a high level, the VOUT pin outputs voltage. If the enable pin EN is at a low level, the VOUT pin does not output the power supply voltage of the ECU, so that the ECU is in a power-off state. Therefore, when the reverse voltage ADPT5V is input to the LDO chip U4 through the VIN pin, the enable pin EN is at a high level, and the LDO chip U4 will output the ECU's power supply voltage MAIN3V3 through the VOUT pin, resulting in abnormal power supply to the ECU after power failure. It should be noted that the LDO chip U4 also includes an NC pin (labeled 6), an FB pin (labeled 3), a GND pin (labeled 4), and a PGND pin (labeled 9). The functions of each pin can be referred to in the prior art. The specific structures of the battery charging circuit, the power supply selection circuit, and the buck circuit can be referred to the drawings or the prior art, and this embodiment will not be described in detail.

[0043] By the above Figure 2 to Figure 4 As can be seen from the circuit diagram shown, due to the incomplete cutoff characteristics of the parallel structure of the MOS tube and the associated diode, in the storage mode, the reverse voltage generated by the charging circuit is eventually output as the MCU power supply voltage through the LDO chip, causing abnormal power supply to the RAM in the MCU.

[0044] Based on the above reasons, the utility model provides a reverse feeding voltage cutoff circuit, which is added to the enable pin side of the LDO chip U4 to eliminate the reverse feeding voltage generated by the charging circuit in the storage mode. Figure 5 The schematic diagram of the structure of a backfeed voltage cut-off circuit provided by the utility model is as follows: Figure 5 As shown, the utility model provides a backfeed voltage cutoff circuit including an AND logic module 501 and a cutoff module, wherein the cutoff module includes a first cutoff module 502 and a second cutoff module 503. When the first end of the cutoff module is at a high level, the second end and the third end are in a conducting state.

[0045] In this embodiment, the first input end of the logic module is connected to the main power supply, the second input end of the logic module is connected to the enable pin of the micro control unit MCU, and the output end of the logic module is connected to the first end of the first cutoff module.

[0046] It should be noted that the AND logic module refers to a module that can perform an AND logic operation on the level signals input to the first input terminal and the second input terminal and output the operation result through the output terminal. Optionally, the AND logic module may include an AND logic operation chip or an AND gate circuit.

[0047] In this embodiment, the second end of the first cut-off module is grounded, and the third end of the first cut-off module is connected to the backup battery and the first end of the second cut-off module.

[0048] In this embodiment, the second end of the second cutoff module is grounded, and the third end of the second cutoff module is connected to the enable pin of the power chip.

[0049] It can be seen from the above technical scheme that when the main power supply is cut off, the backup battery is powered and the MCU is set to high resistance, the first cutoff module of the backfeed voltage cutoff circuit provided by the embodiment of the utility model is in the cutoff state, and the second cutoff module is in the on and grounded state, so that the enable pin of the power chip is grounded, thereby avoiding the power chip from outputting backfeed voltage and avoiding MCU power supply abnormality caused by the backfeed voltage.

[0050] Figure 6 A specific structural diagram of an optional backfeed voltage cutoff circuit provided by an embodiment of the utility model is shown as follows: Figure 6 As shown, the backfeed voltage cutoff circuit includes a logic module 601, a first cutoff module 602 and a second cutoff module 603. The connection structure of the logic module, the first cutoff module and the second cutoff module can refer to the above embodiment.

[0051] In this embodiment, the AND logic module is an AND gate circuit. Specifically, the AND logic module includes a first diode D1 and a second diode D2. The cathode of the first diode (marked with -) is connected to the cathode of the second diode.

[0052] The first input terminal of the AND logic module includes the anode of the first diode, the second input terminal of the AND logic module includes the anode of the second diode, and the output terminal of the AND logic module includes the cathode of the first diode and the cathode of the second diode.

[0053] The first input terminal of the logic module is connected to the main power supply by connecting to the enable pin ADPT_PG of the main power supply. The second input terminal of the logic module is connected to the enable pin of the microcontroller unit MCU by connecting to the enable pin MCU_BACKUP_BAT_EN of the MCU. For specific pin connection methods, refer to the prior art.

[0054] In this embodiment, the first cutoff module includes a first N-channel MOS transistor Q201 and a first associated diode D3, the source of the first N-channel MOS transistor (marked with S) is connected to the anode of the first associated diode, and the drain of the first N-channel MOS transistor (marked with D) is connected to the cathode of the first associated diode.

[0055] The first end of the first cutoff module includes the gate of the first N-channel MOS transistor, the second end of the first cutoff module includes the source of the first N-channel MOS transistor, and the third end of the first cutoff module includes the drain of the first N-channel MOS transistor.

[0056] In this embodiment, the first cutoff module further includes a first resistor R1, a first end of the first resistor is connected to the gate (marked with G) of the first N-channel MOS transistor, and a second end of the first resistor is connected to the source of the first N-channel MOS transistor.

[0057] In this embodiment, the second cutoff module includes a second N-channel MOS transistor Q202 and a second associated diode D4, the source of the second N-channel MOS transistor is connected to the anode of the second associated diode, and the drain of the second N-channel MOS transistor is connected to the cathode of the second associated diode.

[0058] The second end of the second cutoff module includes the gate of the second N-channel MOS transistor, the third end of the second cutoff module includes the source of the second N-channel MOS transistor, and the third end of the second cutoff module includes the drain of the second N-channel MOS transistor.

[0059] In this embodiment, the second cutoff module further includes a second resistor R2 and a capacitor C, wherein a first end of the second resistor is connected to the gate of the second N-channel MOS transistor, and a second end of the second resistor is connected to the source of the second N-channel MOS transistor. A first end of the capacitor is connected to the gate of the second N-channel MOS transistor, and a second end of the capacitor is connected to the source of the second N-channel MOS transistor.

[0060] In this embodiment, the power chip is a low-dropout linear regulator LDO chip, and the third end of the second cutoff module is connected to the enable pin of the power chip in the following manner: connected to the enable pin EN of the LDO chip. It should be noted that the other pins of the LDO chip are not connected to the Figure 2 As shown in, please refer to the prior art.

[0061] It can be seen from the above embodiments that the utility model provides a backfeed voltage cutoff circuit, which realizes the AND logic operation of the main power supply output level signal and the level signal of the MCU enable pin through the AND gate circuit. When the main power supply is used for power supply, the main power supply makes the LDO chip enable pin high level, and the LDO chip inputs the main power supply voltage through the input pin and realizes the step-down output of the ECU power supply voltage. Since the ADPT_PG output is high level, at this time, Q201 in the backfeed voltage cutoff circuit is turned on, Q202 is turned off, and the enable pin EN of the LDO chip is high level, then the LDO chip outputs the power supply voltage normally.

[0062] When the main power supply is cut off and the backup battery is used for power supply, MCU_BACKUP_BAT_EN is set to a high level and the ADPT_PG output is a low level. The backup battery power supply makes the LDO chip enable pin a high level. The LDO chip inputs the backup battery power supply voltage through the input pin and steps down the output ECU power supply voltage. Since Q201 is turned on and Q202 is turned off, the enable pin EN of the LDO chip is still high, so the LDO chip outputs the MCU power supply voltage normally.

[0063] When in storage mode, that is, when the main power supply is cut off, the backup battery has power and the enable pin of the MCU is set to high impedance, MCU_BACKUP_BAT_EN is low, ADPT_PG output is low, Q201 is cut off, and since the backup battery has power, the current output by the backup battery makes the G pole of Q202 at a high level. Based on the characteristics of the N-channel MOS tube, Q202 is turned on, and since the S pole of Q202 is grounded, the enable pin EN of the LDO chip connected to the D pole of Q202 is grounded. At this time, the enable pin EN of the LDO chip is at a low level, that is, the enable pin EN of the LDO chip controls the LDO chip to not output voltage, thereby eliminating the reverse voltage and avoiding abnormal power supply to the MCU.

[0064] Further, the first end of R1 is connected to the gate of the first N-channel MOS transistor, and the second end is connected to the source of the first N-channel MOS transistor, that is, R1 and the first N-channel MOS transistor are connected to the ground in parallel. When at least one of the ADPT_PG output is high or the MCU_BACKUP_BAT_EN output is high, the G pole of Q201 is high, thereby ensuring the effective conduction of Q201. Since the D level of Q201 is connected to the backup battery and the negative electrode of D3, the ground current after Q201 is turned on is reduced by connecting R1 in parallel, thereby achieving the purpose of reducing the power consumption of the backup battery and protecting D3.

[0065] Furthermore, the first ends of R2 and C are connected to the gate of the second N-channel MOS tube, and the second ends are connected to the source of the second N-channel MOS tube, that is, R2 and C form an RC parallel circuit, in which the capacitor plays a role in reducing the voltage, and the resistor plays a role in discharging. In the storage mode, the effective conduction of Q202 is guaranteed, and the current to the ground after Q202 is turned on is reduced, so as to achieve the purpose of current protection and improve the safety of the circuit.

[0066] It should be noted that the present invention may also include other specific structures.

[0067] For example, in another optional embodiment, the backfeed voltage cutoff circuit further includes a third resistor, which is connected in series between the output end of the logic module and the first end of the first cutoff module. When MCU_BACKUP_BAT_EN or ADPT_PG output is high, Q201 is turned on, and the third resistor is connected in series between the output end of the logic module and the first end of the first cutoff module to reduce the path current, thereby achieving the purpose of protecting various circuit components (including R1, Q201, and D3).

[0068] For another example, in another optional embodiment, the backfeed voltage cutoff circuit further includes a fourth resistor, which is connected in series between the backup battery and the third terminal of the first cutoff module. When MCU_BACKUP_BAT_EN or ADPT_PG output is high, Q201 is turned on, and the fourth resistor is connected in series between the backup battery and the third terminal of the first cutoff module to reduce the path current, thereby achieving the purpose of protecting various circuit components (including R1, Q201, and D3). When MCU_BACKUP_BAT_EN or ADPT_PG output is low, Q202 is turned on, and the fourth resistor is connected in series between the backup battery and the third terminal of the first cutoff module to reduce the path current, thereby achieving the purpose of protecting various circuit components (including C, R2, Q202, and D4).

[0069] For another example, the AND logic module may also include an AND logic operation chip, and the specific chip structure may refer to the prior art.

[0070] For another example, the specific structure of the cutoff module may include other implementations. For example, the above embodiments all take the MOS as N-channel MOS tubes as examples, and the specific structure of the MOS tube and the resistor and capacitor connected in parallel with the MOS tube are all optional structures.

[0071] Further, Figure 7 This is a specific structural diagram of another backfeed voltage cutoff circuit provided by the utility model. The backfeed voltage cutoff circuit is connected to the enable pin EN of U4 in the step-down circuit. The specific step-down circuit structure can refer to the prior art or Figure 4 The corresponding embodiments.

[0072] like Figure 7 As shown, the reverse voltage cut-off circuit structure is as follows:

[0073] AND logic module D20 includes two diodes, wherein the anode of one diode (such as Figure 7 The 1 end of D20 shown in FIG. 1 is connected to the enable pin ADPT_PG of the main power supply as the first input end of the AND logic module, and the anode of a diode (such as Figure 7 The 2nd terminal of D20 shown in the figure) is connected to the enable pin MCU_BACKUP_BAT_EN of the MCU as the second input terminal of the AND logic module, and the cathodes of the two diodes are connected (as shown in the figure). Figure 7 The terminal 3 of D20 shown in the figure is used as the output terminal of the AND logic module, and the output terminal of the AND logic module is connected to the first terminal of the first cut-off module through the series resistor R64.

[0074] The first cut-off module Z1 includes a parallel structure Q17 of an N-channel MOS tube and an associated diode, and a resistor R63. In the first cut-off module, the parallel connection mode of the N-channel MOS tube and the associated diode is that the second end (source, Figure 7 The third terminal (the drain terminal, Figure 7 The first end of R63 is connected to the first end of the N-channel MOS tube (gate, Figure 7 The first end of the N-channel MOS transistor is connected to the output end of the logic module through R64 as the first end of the first cut-off module, and the third end of the N-channel MOS transistor is connected to the backup battery BAT3V6 through the series resistor R62 as the third end of the first cut-off module, and is connected to the first end of the second cut-off module.

[0075] The second cut-off module Z2 includes a parallel structure Q18 of an N-channel MOS tube and an associated diode, a capacitor C59, and a resistor R43. In the second cut-off module, the N-channel MOS tube and the associated diode are connected in such a way that the second end of the N-channel MOS tube is connected to the positive electrode of the associated diode and the third end is connected to the negative electrode of the associated diode. The first end of the capacitor C59 and the first end of the resistor R43 are both connected to the first end of the N-channel MOS tube, and the second end of the capacitor C59, the second end of the resistor R43 and the second end of the N-channel MOS tube are all grounded. The first end of the N-channel MOS tube is connected to the third end of the first cut-off module as the first end of the second cut-off module, and the third end of the N-channel MOS tube is connected to the enable pin of the power chip U4 in the step-down circuit as the third end of the second cut-off module.

[0076] like Figure 7As shown, the input pin of the power chip U4 is connected to the upstream voltage output terminal, such as Figure 7 The MAIN5V pin shown (for example, the output end of the selection circuit, used to output the main power supply voltage, the backup battery supply voltage, and the supply voltage generated by the feedback voltage), the output pin of the power chip U4 is used to output the stepped-down supply voltage to power the ECU when the enable pin EN is at a high level, that is, MAIN3V3, and no voltage is output when the enable pin EN is at a low level.

[0077] based on Figure 7 The feedback voltage cutoff circuit shown, when the main power supply is used for power supply, ADPT_PG in the feedback voltage cutoff circuit is high level, Q17 is turned on, Q18 is turned off, and Q18 is turned off so that the U4 enable pin EN is not grounded, and the main power supply voltage MAIN5V output by the selection circuit directly provides a high level for the U4 enable pin EN. Therefore, the U4 enable pin EN outputs a high level due to the power supply of the main power supply, and controls the U4 input pin VIN to connect to MAIN5V and output the supply voltage MAIN_3V3 after stepping down to power the ECU.

[0078] When the main power supply is not powered: If the backup battery is used for power supply, MCU_BACKUP_BAT_EN in the backfeed voltage cutoff circuit is set to a high level, Q17 is turned on, and Q18 is turned off. Q18 cutoff makes the U4 enable pin EN not grounded, and the backup battery power supply MAIN5V output by the selection circuit directly provides a high level for the U4 enable pin EN. Therefore, U4 enable pin EN outputs a high level due to the backup battery power supply, and controls the U4 input pin VIN to connect to MAIN5V and output the MAIN_3V3 power supply voltage after stepping down to power the ECU.

[0079] If the storage mode is turned on, that is, the main power supply and the backup battery are cut off to power the ECU, MCU_BACKUP_BAT_EN is set to high impedance. After the main power supply is cut off, ADPT_PG is low, and the G pole of Q17 is low, so that Q17 is cut off. Since the backfeed voltage cut-off circuit is connected to the backup battery, the backup battery outputs current to turn on Q18 connected to the G pole and the backup battery. After Q18 is turned on, the S pole is grounded, generating a ground current. Since the U4 enable pin EN is connected to the D pole of Q18, Q18 is turned on and pulls down the level of the U4 enable pin EN. When the input pin of the U4 enable pin inputs the backfeed voltage, since the U4 enable pin EN is low, U4 does not output the power supply voltage generated by the backfeed voltage, thereby ensuring that the MCU's RAM is effectively powered off and the RAM data is safe and accurate.

[0080] It can be seen that the reverse voltage cutoff circuit provided by the utility model optimizes the storage mode, prevents the RAM information of the MCU from being tampered with, and relies on hardware protection with high reliability.

[0081] It should be noted that Figure 7 The specific models and values ​​of various components are shown in the figure. For details, please refer to the prior art, and this embodiment will not go into details.

[0082] Furthermore, the utility model of the present application also provides a communication module TBOX (Telematics Box, remote communication terminal), and the TBOX includes the backfeed voltage cutoff circuit provided in the above-mentioned embodiments.

[0083] Furthermore, the utility model of the present application also provides a vehicle, which includes the backfeed voltage cutoff circuit provided by the above-mentioned embodiments.

[0084] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0085] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0086] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A backfeed voltage cutoff circuit, characterized in that: include: A logic module and a cut-off module, wherein when the first end of the cut-off module is at a high level, the second end and the third end are in a conducting state, and the cut-off module comprises a first cut-off module and a second cut-off module; The first input end of the AND logic module is connected to the main power supply, the second input end of the AND logic module is connected to the enable pin of the micro control unit MCU, and the output end of the AND logic module is connected to the first end of the first cutoff module; The second end of the first cut-off module is grounded, and the third end of the first cut-off module is connected to the backup battery and the first end of the second cut-off module; The second end of the second cutoff module is grounded, and the third end of the second cutoff module is connected to an enable pin of a power chip.

2. The reverse voltage cutoff circuit according to claim 1, characterized in that: The AND logic module includes a first diode and a second diode; The first input end of the AND logic module includes the anode of the first diode, the second input end of the AND logic module includes the anode of the second diode, and the output end of the AND logic module includes the cathode of the first diode and the cathode of the second diode; The cathode of the first diode is connected to the cathode of the second diode.

3. The reverse voltage cutoff circuit according to claim 1, characterized in that: The first cut-off module includes a first MOS tube and a first associated diode; The source of the first MOS transistor is connected to the anode of the first associated diode, and the drain of the first MOS transistor is connected to the cathode of the first associated diode; The first end of the first cutoff module includes the gate of the first MOS transistor, the second end of the first cutoff module includes the source of the first MOS transistor, and the third end of the first cutoff module includes the drain of the first MOS transistor.

4. The reverse voltage cutoff circuit according to claim 3, characterized in that: The first cut-off module further includes a first resistor; A first end of the first resistor is connected to a gate of the first MOS transistor, and a second end of the first resistor is connected to a source of the first MOS transistor.

5. The reverse voltage cutoff circuit according to claim 1, characterized in that: The second cut-off module includes a second MOS tube and a second associated diode; The source of the second MOS transistor is connected to the anode of the second associated diode, and the drain of the second MOS transistor is connected to the cathode of the second associated diode; The second end of the second cutoff module includes the gate of the second MOS tube, the third end of the second cutoff module includes the source of the second MOS tube, and the third end of the second cutoff module includes the drain of the second MOS tube.

6. The reverse voltage cutoff circuit according to claim 5, characterized in that: The second cut-off module further includes a second resistor; A first end of the second resistor is connected to a gate of the second MOS transistor, and a second end of the second resistor is connected to a source of the second MOS transistor.

7. The reverse voltage cutoff circuit according to claim 6, characterized in that: The second cut-off module further includes a capacitor; The first end of the capacitor is connected to the gate of the second MOS transistor, and the second end of the capacitor is connected to the source of the second MOS transistor.

8. The reverse voltage cutoff circuit according to any one of claims 1 to 7, characterized in that: The backfeed voltage cutoff circuit also includes a third resistor and / or a fourth resistor, the third resistor is connected in series between the output end of the AND logic module and the first end of the first cutoff module; the fourth resistor is connected in series between the backup battery and the third end of the first cutoff module.

9. A communication module TBOX, characterized in that: The TBOX includes the backfeed voltage cutoff circuit according to any one of claims 1 to 8.

10. A vehicle, characterized in that: The vehicle comprises the backfeed voltage cutoff circuit as described in any one of claims 1-8.

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