Regenerative chip, regenerative ink cartridge, and image forming apparatus

By configuring a voltage monitoring unit and a gate unit in the regeneration chip, we ensure that the control signal is output only when the voltage and timing of the logic signal meet certain conditions, the impact of the use of the regeneration chip on the print quality is solved and more stable print quality is achieved.

CN222845046UActive Publication Date: 2025-05-09GUANGZHOU ZHONO ELECTRONICS TECH CO LTD
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Patent Information

Application Number
CN202421974640.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-14
Publication Date
2025-05-09
Estimated Expiration
2034-08-14

AI Technical Summary

Technical Problem

When using regeneration chips, the prior art fails to effectively consider their impact on print quality, resulting in unstable print quality.

Method used

A voltage monitoring unit and a gating unit are arranged in the regeneration chip. The voltage monitoring unit compares the voltage of the logic signal output by the image forming device to generate a gating signal, and uses this signal to control the on-off of the gate unit to ensure that an appropriate logic signal is output only when the voltage of the logic signal is greater than the reference voltage to control the inkjet operation of the ink cartridge chip.

Benefits of technology

By introducing voltage monitoring and gating mechanisms, the poor print quality caused by low logic signal voltage is solved, and through the utilization of poor timing, the stability of the logic signal used to control the inkjet operation of the ink cartridge chip is improved, thereby improving the stability of the print quality.

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Abstract

The embodiment of the utility model provides a regeneration chip, a regeneration ink box and an image forming device. The regeneration chip in some embodiments comprises a voltage monitoring unit and a gate control unit, and the voltage monitoring unit is used for comparing the voltage of a first logic signal output by the image forming device with a reference voltage to obtain a gate control signal; and the gating unit is used for being controlled to be conducted by a gating signal when the voltage of the first logic signal is greater than the reference voltage, and performing output processing on the first logic signal output by the image forming device when the gating unit is conducted to obtain a second logic signal which has a voltage difference and / or a time sequence difference with the first logic signal. Therefore, the purpose of improving the printing quality is achieved.
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Description

Technical Field

[0001] The utility model relates to the technical field of printing, in particular to a regenerated chip, a regenerated ink cartridge and an image forming device. Background Art

[0002] Image forming devices have become an indispensable part of modern office. In order to reduce the pollution of printing consumables to the environment and improve the recycling rate of printing consumables, the utilization rate of recycled chips for ink cartridges has been greatly improved.

[0003] However, the current application of the regenerated chip is to use the regenerated chip to enable the reused ink cartridge to be recognized by the image forming device again, without considering the impact of the use of the regenerated chip on the printing quality. Utility Model Content

[0004] In view of this, the purpose of the present invention is to provide a regenerated chip, a regenerated ink cartridge and an image forming device, so as to ensure the printing quality of the image forming device to a certain extent.

[0005] In order to achieve the above purpose, the technical solution adopted by the embodiment of the utility model is as follows:

[0006] A first aspect of the embodiment of the utility model provides a regeneration chip, comprising:

[0007] a voltage monitoring unit, used to compare the voltage of the first logic signal output by the image forming device with a reference voltage to obtain a gating signal; one of the input terminals of the voltage monitoring unit is used to be connected to the logic signal output terminal of the image forming device, the other input terminal is used to access the reference voltage, and the output terminal is used to output the gating signal; and

[0008] A gating unit, which is used to be controlled to be turned on by a gating signal when the voltage of the first logic signal is greater than the reference voltage, and to output and process the first logic signal output by the image forming device when turned on, to obtain a second logic signal having a voltage difference and / or a timing difference with the first logic signal, wherein the voltage of the second logic signal is less than or equal to the first logic signal; a logic signal input terminal of the gating unit is used to be connected to a logic signal output terminal of the image forming device, a gating signal input terminal is connected to an output terminal of the voltage monitoring unit, and a logic signal output terminal is used to be connected to a logic signal input terminal of the ink cartridge chip.

[0009] The embodiment of the utility model configures a voltage monitoring unit and a gating unit in the regeneration chip, uses the voltage monitoring unit to compare the voltage of the first logic signal output by the image forming device with the reference voltage, obtains a gating signal, and uses the gating signal to control the on and off of the gating unit, wherein when the voltage of the first logic signal is greater than the reference voltage, the gating unit is turned on and outputs the second logic signal to the ink cartridge chip, thereby controlling the inkjet action of the ink cartridge chip. Therefore, on the one hand, by outputting the second logic signal to control the inkjet action of the ink cartridge chip only when the voltage of the first logic signal is greater than the reference voltage, the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low can be solved; on the other hand, through the comparison process of the voltage monitoring unit, and only when the comparison result is that the voltage of the first logic signal is greater than the reference voltage, the gate control unit is turned on. The comparison time and turn-on time here will cause a timing difference between the first logic signal and the second logic signal. By using this timing difference to make the first logic signal tend to be stable and then form the second logic signal, the stability of the second logic signal used to control the inkjet action of the ink cartridge chip can be improved, thereby ensuring the stability of the printing quality. Therefore, through the above two aspects, the printing quality can be improved to a certain extent.

[0010] In an optional embodiment, the voltage monitoring unit includes a voltage comparator; the positive input terminal of the voltage comparator is used to connect to the logic signal output terminal of the image forming device, the negative input terminal is used to access the reference voltage, and the output terminal is used to output the gating signal.

[0011] Therefore, by using a voltage comparator to implement the function of the voltage monitoring unit, it is beneficial to simplify the circuit structure of the voltage monitoring unit and reduce the manufacturing cost of the voltage monitoring unit, thereby reducing the manufacturing cost of the regeneration chip.

[0012] In an optional embodiment, the voltage monitoring unit further includes a rectifier circuit; the rectifier circuit is connected in series between the non-phase input terminal of the voltage comparator and the logic signal output terminal of the image forming device.

[0013] Therefore, by adding a rectifier circuit in the voltage monitoring unit, the first logic signal is first rectified by the rectifier circuit, and then the voltage is compared by the voltage comparator, so that the first logic signal input to the voltage comparator is a stabilized and filtered signal, which is beneficial to ensure the normal operation of the voltage comparator and the accuracy of the voltage comparison result.

[0014] In an optional implementation, the voltage monitoring unit further includes a filter circuit; one end of the filter circuit is connected between the output end of the rectifier circuit and the non-phase input end of the voltage comparator, and the other end is grounded.

[0015] Therefore, the noise signal in the first logic signal can be filtered out by the filter circuit, and the voltage stability of the first logic signal input to the voltage comparator can be further ensured.

[0016] In an optional embodiment, the gating unit includes a first MOS tube; the gate of the first MOS tube is used to access the gating signal, one of the source and the drain of the first MOS tube is used to access the first logic signal, and the other is used to output the second logic signal.

[0017] Therefore, by using the first MOS tube to realize the function of the gate control unit, it is helpful to simplify the circuit structure and control logic of the gate control unit, reduce the manufacturing cost of the gate control unit, and thus reduce the manufacturing cost of the regeneration chip.

[0018] In an optional embodiment, the voltage monitoring unit further includes an inverter; the output end of the voltage comparator forms two branches, one of which outputs a first gating signal, and the other branch is connected in series with the inverter to output a second gating signal;

[0019] The gate control unit also includes a second MOS tube; the first MOS tube is an N-type MOS tube, and the second MOS tube is a P-type MOS tube; the gate of the first MOS tube is used to access the first gating signal; the gate of the second MOS tube is used to access the second gating signal, the source is connected to the drain of the first MOS tube, and the drain is connected to the source of the first MOS tube.

[0020] Therefore, by using two MOS tubes to form a transmission gate circuit, and one of the MOS tubes is an N-type MOS tube, and its on-off is controlled by the output signal of the voltage comparator, that is, the first gating signal, and the other is a P-type MOS tube, and its on-off is controlled by the signal after the output signal of the voltage comparator is output by the inverter, that is, the second gating signal. When the voltage of the first logic signal is greater than the reference voltage, both MOS tubes are turned on, and the first logic signal can be output through the two branches where the two MOS tubes are located to form a second logic signal. Compared with the method of one conduction path, the use of two conduction paths can better ensure the reliability of signal transmission. For example, when one of the conduction paths fails, the signal can continue to be transmitted through the other conduction path.

[0021] In an optional implementation, the gate control unit further includes a first diode; the first diode is connected in series with the first MOS tube, and an anode of the first diode is connected to an output end of the first MOS tube.

[0022] Therefore, by connecting a diode in series after the first MOS tube, the voltage of the first logic signal is monitored for the second time by using the gating unit on the basis of the voltage monitoring unit, so as to avoid the situation where the first logic signal suddenly changes from a voltage greater than the reference voltage to a relatively small voltage, or the first logic signal actually input to the gating unit is different from the first logic signal used by the voltage monitoring unit, and the gating unit is still turned on and outputs the second logic signal, thereby affecting the printing quality.

[0023] In an optional implementation, the gate control unit further includes a second diode; the second diode is connected in reverse parallel with the first diode.

[0024] Therefore, by connecting the second diode in parallel at both ends of the first diode, the current generated when the first logic signal is at a low level and the second logic signal is at a high level can flow back through the branch where the second diode is located, thereby accelerating the voltage return of the second logic signal to zero and avoiding adverse effects on printing quality.

[0025] A second aspect of the embodiment of the utility model provides another regeneration chip, comprising:

[0026] The gate control unit includes a first switch tube, wherein the positive electrode of the first switch tube is used to be connected to the logic signal output end of the image forming device, and the negative electrode is used to be connected to the logic signal input end of the ink cartridge chip; the first switch tube is used to step down the first logic signal when the first logic signal output by the image forming device is turned on, to obtain a second logic signal with a voltage difference with the first logic signal, and output the second logic signal to the ink cartridge chip.

[0027] The regeneration chip provided in the second aspect of the embodiment of the utility model adopts a first switch tube to monitor the voltage of the first logic signal, so that when the voltage of the first logic signal is greater than the threshold voltage of the first switch tube, the first switch tube is turned on, and due to the threshold voltage, there is a voltage difference between the output second logic signal and the first logic signal. This can solve the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low, thereby achieving the purpose of improving the printing quality to a certain extent.

[0028] In an optional implementation, the gate control unit further includes a second switch tube; the second switch tube is connected in reverse parallel with the first switch tube.

[0029] Therefore, by connecting the second switch tube in parallel at both ends of the first switch tube, the current generated when the first logic signal is at a low level and the second logic signal is at a high level can flow back through the branch where the second switch tube is located, which can speed up the voltage return of the second logic signal to zero and avoid adverse effects on printing quality.

[0030] A third aspect of the embodiment of the utility model provides a regenerated ink cartridge, comprising:

[0031] Cartridge body;

[0032] An ink cartridge chip, mounted on the ink cartridge body; and

[0033] The regeneration chip in any of the above embodiments is connected to the ink cartridge chip.

[0034] According to a fourth aspect of the embodiment of the present utility model, there is provided an image forming device, comprising:

[0035] A plurality of logic signal output terminals; and

[0036] The regenerated ink cartridge provided in the third aspect above, wherein the regeneration chip of the regenerated ink cartridge includes a plurality of gate control units corresponding to and connected to the plurality of logic signal output terminals in a one-to-one manner.

[0037] Since the regenerated ink cartridge and image forming device provided by the utility model both include the regeneration chip provided by the first aspect or the second aspect of the utility model embodiment, the regenerated ink cartridge and image forming device provided by the utility model also have the beneficial technical effects produced by the regeneration chip provided by the first aspect or the second aspect, which will not be elaborated here.

[0038] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A structural block diagram of a regeneration chip provided by an embodiment of the utility model is shown;

[0041] Figure 2 A schematic diagram showing the use status of a regeneration chip provided by an embodiment of the utility model is shown;

[0042] Figure 3 A schematic diagram of the circuit structure of a voltage monitoring unit provided by an embodiment of the utility model is shown;

[0043] Figure 4A schematic diagram of the circuit structure of another voltage monitoring unit provided by an embodiment of the utility model is shown;

[0044] Figure 5 A circuit structure diagram of another voltage monitoring unit provided by an embodiment of the utility model is shown;

[0045] Figure 6 A circuit structure diagram of another voltage monitoring unit provided by an embodiment of the utility model is shown;

[0046] Figure 7 A schematic diagram of the circuit structure of a gate control unit provided by an embodiment of the utility model is shown;

[0047] Figure 8 A schematic diagram of the circuit structure of another gate control unit provided by an embodiment of the utility model is shown;

[0048] Fig. 9 A schematic diagram of the circuit structure of another gate control unit provided by an embodiment of the utility model is shown;

[0049] Fig.10 A structural block diagram of another regeneration chip provided by an embodiment of the utility model is shown;

[0050] Fig.11 A schematic diagram of the circuit structure of another gate control unit provided by an embodiment of the utility model is shown;

[0051] Fig.12a A schematic diagram of a circuit structure of a first switch tube or a second switch tube provided in an embodiment of the utility model is shown;

[0052] Figure 12b Another circuit structure schematic diagram of the first switch tube or the second switch tube provided by the embodiment of the utility model is shown;

[0053] Fig.12c Another circuit structure schematic diagram of the first switch tube or the second switch tube provided by the embodiment of the utility model is shown;

[0054] Fig.12d A schematic diagram showing another circuit structure of the first switch tube or the second switch tube provided in an embodiment of the utility model is shown.

[0055] Icons: 100-regeneration chip in the first improved scheme, 110-voltage monitoring unit, 120-gating unit in the first improved scheme, 111-voltage comparator, 112-diode, 113-filter circuit, 114-inverter, 121-first MOS tube, 122-second MOS tube, 123-first diode, 124-second diode, VREF-reference voltage, CONT-gating signal or first gating signal, CONTN-second gating signal, Lin-first logic signal, Lout-second logic signal, 200-regeneration chip in the second improved scheme, 210-gating unit in the second improved scheme, 211-first switch tube in the gating unit 210, 212-second switch tube in the gating unit 210. DETAILED DESCRIPTION

[0056] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Generally, the components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0057] Therefore, the following detailed description of the embodiments of the utility model provided in the accompanying drawings is not intended to limit the scope of the utility model claimed for protection, but merely represents selected embodiments of the utility model. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0058] It should be noted that like reference numerals and letters denote similar items in the following drawings, and thus, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0059] In the description of the present utility model, it should be noted that if terms such as orientation are mentioned, for example, "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc., the orientation or position relationship indicated by these terms is based on the orientation or position relationship shown in the corresponding drawings, or the orientation or position relationship in which the utility model product is usually placed when in use. It is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0060] In addition, terms such as "horizontal" and "vertical" do not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" may simply mean that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0061] In the embodiments of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", "connection", etc. should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be directly connected, or connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0062] In order to solve the technical problem of poor printing quality in the related art due to failure to consider the influence of the use of the regeneration chip on the printing quality, the embodiment of the utility model is centered around the idea of ​​making a voltage difference and / or a timing difference between the first logic signal output by the image forming device and the second logic signal output by the regeneration chip to the ink cartridge chip, so as to use the voltage difference and / or the timing difference to achieve the guarantee of printing quality, and proposes two major improvement schemes for the regeneration chip, which can be selected:

[0063] The first improvement scheme: configure a voltage monitoring unit and a gating unit in the regeneration chip, use the voltage monitoring unit to compare the voltage of the first logic signal output by the image forming device with the reference voltage, obtain a gating signal, and use the gating signal to control the on and off of the gating unit, wherein when the voltage of the first logic signal is greater than the reference voltage, the gating unit is turned on and outputs the second logic signal to the ink cartridge chip, thereby controlling the inkjet action of the ink cartridge chip. Therefore, on the one hand, by outputting the second logic signal to control the inkjet action of the ink cartridge chip only when the voltage of the first logic signal is greater than the reference voltage, the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low can be solved; on the other hand, through the comparison process of the voltage monitoring unit, and only when the comparison result is that the voltage of the first logic signal is greater than the reference voltage, the gate control unit is turned on. The comparison time and turn-on time here will cause a timing difference between the first logic signal and the second logic signal. By using this timing difference to make the first logic signal tend to be stable and then form the second logic signal, the stability of the second logic signal used to control the inkjet action of the ink cartridge chip can be improved, thereby ensuring the stability of the printing quality. Therefore, through the above two aspects, the printing quality can be improved to a certain extent.

[0064] The second improvement scheme: configure a gate control unit in the regeneration chip, but do not configure a voltage monitoring unit. The gate control unit configured at this time uses a first switch tube to monitor the voltage of the first logic signal, so that when the voltage of the first logic signal is greater than the threshold voltage of the first switch tube, the first switch tube is turned on, and the output second logic signal has a voltage difference with the first logic signal due to the threshold voltage, thereby solving the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low, thereby achieving the purpose of improving the printing quality to a certain extent.

[0065] In the above, the first logic signal and the second logic signal are both signals related to inkjet action control. In addition, the circuit structure and function of the regeneration chip to realize that the ink cartridge can be recognized by the image forming device again can refer to the regeneration chip in the related art, which will not be described in detail in the embodiment of the utility model.

[0066] Below, first combine Figure 1 To illustrate the first improvement scheme mentioned above, please refer to Figure 1 , Figure 1 1 is a structural block diagram of a regeneration chip provided by an embodiment of the utility model; the regeneration chip 100 comprises:

[0067] The voltage monitoring unit 110 is used to compare the voltage of the first logic signal output by the image forming device with the reference voltage to obtain a gating signal; one of the input terminals of the voltage monitoring unit 110 is used to be connected to the logic signal output terminal of the image forming device, the other input terminal is used to access the reference voltage, and the output terminal is used to output the gating signal.

[0068] The gating unit 120 is used to be controlled to be turned on by the gating signal when the voltage of the first logic signal is greater than the reference voltage, and to output and process the first logic signal output by the image forming device when turned on, so as to obtain a second logic signal having a voltage difference and / or a timing difference with the first logic signal, wherein the voltage of the second logic signal is less than or equal to the first logic signal; the logic signal input terminal of the gating unit 120 is used to be connected to the logic signal output terminal of the image forming device, the gating signal input terminal is connected to the output terminal of the voltage monitoring unit 110, and the logic signal output terminal is used to be connected to the logic signal input terminal of the ink cartridge chip.

[0069] In the above description, the voltage monitoring unit 110 may be implemented by a voltage comparison circuit in various implementations, and the gate control unit 120 may be implemented by a transmission gate circuit in various implementations.

[0070] See also Figure 2 , Figure 2This is a schematic diagram of a use state of a regeneration chip provided by an embodiment of the utility model. Before the regeneration chip is applied to an image forming device and an ink cartridge, press Figure 2 As shown, the input end of the voltage monitoring unit 110 of the regeneration chip is connected to the logic signal output end of the image forming device, wherein the logic signal output end can be set on the body of the image forming device, for example, on the printer body included in the image forming device. When there are multiple logic signal output ends of the image forming device, the multiple logic signal output ends can be connected in parallel to form a terminal connected to the input end of the voltage monitoring unit 110. In this case, the voltage monitoring unit 110 will take the first logic signal with the largest voltage to compare with the reference voltage. Based on this, the reference voltage input end of the voltage monitoring unit 110 needs to be connected to the reference voltage, wherein the reference voltage can be 9V, but is not limited to this. It can be set according to the printing quality or actual needs. The embodiment of the utility model does not limit this. Returning to the wiring operation, continue to connect the logic signal output terminal of the gating unit 120 with the logic signal input terminal of the ink cartridge chip in the ink cartridge. It should be noted that, since the image forming device has multiple logic signal output terminals, in order to realize the full reception of multiple first logic signals, the gating unit 120 is also configured with multiple. It can be understood that the multiple gating units 120 correspond one-to-one to and are connected with the multiple logic signal output terminals of the image forming device. Correspondingly, the logic signal output terminals of the multiple gating units 120 correspond one-to-one to and are connected with the multiple logic signal input terminals of the ink cartridge chip in the ink cartridge.

[0071] After the regeneration chip is wired according to the above description, when the image forming device outputs the first logic signal, the regeneration chip can be used to perform the following processing on the first logic signal:

[0072] First, the first logic signal output by the image forming device will be received by the voltage monitoring unit 110 and the gate control unit 120. However, when the gate control unit 120 receives the first logic signal, it does not process the first logic signal, but waits for the control of the gate control signal of the voltage monitoring unit 110. After receiving the first logic signal, the voltage monitoring unit 110 will compare the first logic signal with the reference voltage through its internal circuit components. When the voltage of the first logic signal is higher than the reference voltage, the voltage comparison result is a high-level signal. If the gate control unit 120 is a transmission gate turned on by a high level, for example, an N-type MOS tube, the high-level signal can be directly output to the gate control unit 120 as a gate control signal, thereby controlling the gate control unit 120 to be turned on; if the gate control unit 120 is a transmission gate turned on by a low level, for example, a P-type MOS tube, an inverter can be connected in series in the output path of the voltage comparison result to convert the high-level signal into a low-level signal, and output it to the gate control unit 120 as a gate control signal, thereby controlling the gate control unit 120 to be turned on.

[0073] After the gate control unit 120 is turned on, the first logic signal will flow through the gate control unit 120 to form a second logic signal output by the gate control unit 120, and then the second logic signal will be input into the ink cartridge chip. After receiving the second logic signal, the ink cartridge chip will perform the corresponding ink jetting action.

[0074] Therefore, by outputting the second logic signal to control the inkjet action of the ink cartridge chip only when the voltage of the first logic signal is greater than the reference voltage, the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low can be solved; and, through the comparison process of the voltage monitoring unit 110, the gate control unit 120 is turned on only when the comparison result is that the voltage of the first logic signal is greater than the reference voltage. The comparison time and the turn-on time here will cause a timing difference between the first logic signal and the second logic signal. By using this timing difference to make the first logic signal tend to be stable and then form the second logic signal, the stability of the second logic signal used to control the inkjet action of the ink cartridge chip can be improved, thereby ensuring the stability of the printing quality. In this way, the printing quality can be improved to a certain extent.

[0075] In some embodiments, in order to reduce the manufacturing cost of the voltage monitoring unit 110 and thus reduce the manufacturing cost of the regeneration chip, please refer to Figure 3 , Figure 3 1 is a schematic diagram of a circuit structure of a voltage monitoring unit provided by an embodiment of the utility model. The embodiment of the utility model provides a voltage monitoring unit 110 with a simplified structure. The voltage monitoring unit 110 includes a voltage comparator 111. The positive input terminal of the voltage comparator 111 is used to connect to the logic signal output terminal of the image forming device, the negative input terminal is used to access the reference voltage VREF, and the output terminal is used to output the gate control signal CONT. Accordingly, the gate control unit 120 uses a transmission gate turned on by a high level.

[0076] In some embodiments, in order to be suitable for a transmission gate that is turned on by a low level, an inverter can be added to the voltage monitoring unit 110 on the basis of the previous embodiment, that is, the voltage monitoring unit 110 includes a voltage comparator 111 and an inverter; the non-phase input terminal of the voltage comparator 111 is used to be connected to the logic signal output terminal of the image forming device, the inverting input terminal is used to access the reference voltage VREF, the output terminal is connected in series with the inverter, and the output terminal of the inverter is used to output a gating signal.

[0077] In some embodiments, in order to realize that the first logic signal input to the voltage comparator 111 is a signal after voltage stabilization and filtering, so as to ensure the normal operation of the voltage comparator 111 and the accuracy of the voltage comparison result, the voltage monitoring unit 110 may also include a rectifier circuit; the rectifier circuit is connected in series between the positive phase input terminal of the voltage comparator 111 and the logic signal output terminal of the image forming device. Based on this, the first logic signal input to the voltage monitoring unit 110 will first be rectified by the rectifier circuit, and then input into the voltage comparator 111 for voltage comparison processing.

[0078] In some embodiments, the rectifier circuit may use a diode, see Figure 4 , Figure 4 This is a schematic diagram of the circuit structure of another voltage monitoring unit provided by an embodiment of the utility model. Since the image forming device has multiple logic signal output terminals, in order to realize the rectification of the first logic signal output from each logic signal output terminal, the rectification circuit also includes multiple diodes 112. The multiple diodes 112 are connected in parallel in the forward direction to form multiple rectification branches. The input terminals of the multiple rectification branches correspond to and are connected to the multiple logic signal output terminals of the image forming device one by one. The output terminals of the multiple rectification branches are connected in parallel to form a terminal connected to the positive phase input terminal of the voltage comparator 111. Based on this, the multiple first logic signals Lin input to the voltage monitoring unit 110 are rectified by their respective rectification branches, and then input to the voltage comparator 111 for voltage comparison processing. It should be noted that the signal input to the voltage comparator 111 is the signal with the largest voltage among the multiple first logic signals.

[0079] In some embodiments, in order to filter out the clutter signal in the first logic signal and further ensure the voltage stability of the first logic signal input to the voltage comparator 111, please refer to Figure 5 , Figure 5 It is a circuit structure diagram of another voltage monitoring unit provided in an embodiment of the utility model; the voltage monitoring unit 110 may also include a filter circuit 113; one end of the filter circuit 113 is connected between the output end of the rectifier circuit and the non-phase input end of the voltage comparator 111, and the other end is grounded.

[0080] In some embodiments, please refer to Figure 5 , the filtering circuit 113 can be a capacitor.

[0081] In some embodiments, in order to further reduce the manufacturing cost of the regeneration chip, the gating unit 120 includes a first MOS tube; the gate of the first MOS tube is used to access the gating signal, and one of its source and drain is used to access the first logic signal, and the other is used to output the second logic signal.

[0082] In some embodiments, to further improve the stability of the conduction path of the gate control unit 120 and thereby improve the reliability of signal transmission, please refer to Figure 6 , Figure 6 1 is a circuit diagram of another voltage monitoring unit provided by an embodiment of the present utility model. The voltage monitoring unit 110 further includes an inverter 114. The output end of the voltage comparator 111 forms two branches, one of which outputs a first gating signal CONT, and the other branch is connected in series with the inverter 114 to output a second gating signal CONTN. Also, please refer to Figure 7 , Figure 7 1 is a schematic diagram of a circuit structure of a gate control unit provided by an embodiment of the utility model, wherein the gate control unit 120 further includes a second MOS tube 122; the first MOS tube 121 is an N-type MOS tube, and the second MOS tube 122 is a P-type MOS tube; the gate of the first MOS tube 121 is used to access the first gating signal CONT; the gate of the second MOS tube 122 is used to access the second gating signal CONTN, the source is connected to the drain of the first MOS tube 121, and the drain is connected to the source of the first MOS tube 121.

[0083] Therefore, when the voltage of the first logic signal Lin is greater than the reference voltage, the first MOS transistor 121 and the second MOS transistor 122 are both turned on, and the first logic signal Lin can be output through the two branches where the two MOS transistors are located to form the second logic signal Lout. Compared with the method of one conduction path, the use of two conduction paths can better ensure the reliability of signal transmission. For example, when one of the conduction paths fails, the signal can continue to be transmitted through the other conduction path.

[0084] In some embodiments, to further ensure print quality, please refer to Figure 8 , Figure 8 1 is a schematic diagram of the circuit structure of another gate control unit provided in an embodiment of the present utility model. The gate control unit 120 also includes a first diode 123; the first diode 123 is connected in series with the first MOS tube 121, and the anode of the first diode 123 is connected to the output end of the first MOS tube 121.

[0085] Therefore, a diode is connected in series after the first MOS transistor 121. When the voltage of the first logic signal is greater than the reference voltage, although the first MOS transistor 121 is turned on, the first logic signal can flow through the gate control unit 120 to form the second logic signal only after the first diode is turned on. Therefore, on the basis of the first MOS transistor 121 being turned on, the voltage of the first logic signal must be greater than the threshold voltage of the diode, so that the first diode is turned on, and the gate control unit 120 will output the second logic signal; at this time, there will be a voltage difference between the first logic signal and the second logic signal, and the voltage difference is equal to the conduction voltage drop of the diode. Thus, on the basis of the voltage monitoring unit 110, the gate control unit 120 is used to implement a second monitoring of the voltage of the first logic signal, so as to avoid the gate control unit 120 still being turned on and outputting the second logic signal when the first logic signal suddenly changes from greater than the reference voltage to a relatively small voltage, or when the first logic signal actually input to the gate control unit 120 is different from the first logic signal used by the voltage monitoring unit 110, thereby affecting the printing quality.

[0086] In the above, the first logic signal actually input to the gating unit 120 may be different from the first logic signal used by the voltage monitoring unit 110. This is mainly because in the process of voltage comparison, the voltage monitoring unit 110 uses the first logic signal with the largest voltage among all the first logic signals, and whether the MOS tube of the gating unit 120 is turned on or not depends on the comparison result between the voltage monitoring unit 110 and the reference voltage using the first logic signal. However, since different gating units 120 have their own first logic signals input, the first logic signals are not necessarily the first logic signals with the largest voltage used by the voltage monitoring unit 110.

[0087] In some embodiments, when the first logic signal is at a low level and the second logic signal is at a high level, the voltage of the second logic signal is accelerated to return to zero to avoid adverse effects on the printing quality. Fig. 9 , Fig. 9 1 is a schematic diagram of a circuit structure of another gate control unit provided in an embodiment of the present utility model. The gate control unit 120 may further include a second diode 124 ; the second diode 124 is connected in reverse parallel with the first diode 123 .

[0088] The regeneration chip in each of the above embodiments is the first improvement of the regeneration chip mentioned above. The second improvement of the regeneration chip is described below:

[0089] See also Fig.10 , Fig.10 2 is a structural block diagram of another regeneration chip provided by an embodiment of the utility model; the regeneration chip 200 comprises:

[0090] The gate control unit 210 includes a first switch tube, wherein the positive electrode of the first switch tube is used to be connected to the logic signal output end of the image forming device, and the negative electrode is used to be connected to the logic signal input end of the ink cartridge chip; the first switch tube is used to step down the first logic signal when the first logic signal output by the image forming device is turned on, to obtain a second logic signal having a voltage difference with the first logic signal, and output the second logic signal to the ink cartridge chip.

[0091] Although the regeneration chip does not have the voltage monitoring unit 110 in the second improvement scheme, it can also monitor the voltage of the first logic signal through the first switch tube, and achieve the purpose of ensuring the printing quality to a certain extent. Because, in the working process of the regeneration chip, when the gate control unit 210 receives the first logic signal, due to the existence of the first switch tube, the first switch tube will be turned on only when the voltage of the first logic signal is greater than the threshold voltage of the first switch tube, and the output second logic signal has a voltage difference with the first logic signal due to the threshold voltage, thereby solving the problem of poor printing quality caused by still using the first logic signal to control the inkjet action of the ink cartridge chip when the voltage of the first logic signal is low, thereby achieving the purpose of improving the printing quality to a certain extent.

[0092] In some embodiments, in order to accelerate the voltage return of the second logic signal to zero when the first logic signal is at a low level and the second logic signal is at a high level to avoid adverse effects on printing quality, the gating unit 210 may also include a second switch tube; the second switch tube is reversely connected in parallel with the first switch tube.

[0093] In some embodiments, see Fig.11 , Fig.11 This is a schematic diagram of the circuit structure of another gate control unit provided in an embodiment of the utility model, wherein both the first switch tube 211 and the second switch tube 212 can be diodes.

[0094] In other embodiments, in addition to the diode, other equivalent devices of the diode may be used to implement the functions of the first switch tube and the second switch tube. For example, see Figures 12a to 12d , Figure 12a to Figure 12d Schematic diagrams of four different circuit structures of the first switch tube or the second switch tube provided in the embodiments of the utility model.

[0095] Corresponding to the regeneration chip, an embodiment of the utility model also provides a regeneration ink cartridge, which includes an ink cartridge body, an ink cartridge chip installed on the ink cartridge body, and a regeneration chip connected to the ink cartridge chip, wherein the regeneration chip is the regeneration chip in any of the above embodiments.

[0096] Corresponding to the regenerated ink cartridge, an embodiment of the utility model further provides an image forming device, which includes a body and the above-mentioned regenerated ink cartridge.

[0097] The main body includes a plurality of logic signal output terminals.

[0098] The regeneration chip of the regenerated ink cartridge includes a plurality of gate control units corresponding to and connected to the plurality of logic signal output terminals one by one.

[0099] It is worth noting that the technical features or technical solutions in any of the above embodiments of the present invention can be combined or combined with each other as long as there is no contradiction in the combination or combination.

[0100] The above description is only the preferred embodiment of the utility model, and is not intended to limit the utility model. For those skilled in the art, the utility model can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. A regeneration chip, characterized in that: include: A voltage monitoring unit, used for comparing the voltage of the first logic signal output by the image forming device with a reference voltage to obtain a gating signal; one input end of the voltage monitoring unit is used to be connected to the logic signal output end of the image forming device, another input end is used to access the reference voltage, and the output end is used to output the gating signal; and A gating unit, which is used to be controlled to be turned on by a gating signal when the voltage of the first logic signal is greater than the reference voltage, and to output and process the first logic signal output by the image forming device when turned on, to obtain a second logic signal having a voltage difference and / or a timing difference with the first logic signal, wherein the voltage of the second logic signal is less than or equal to the first logic signal; a logic signal input terminal of the gating unit is used to be connected to a logic signal output terminal of the image forming device, a gating signal input terminal is connected to an output terminal of the voltage monitoring unit, and a logic signal output terminal is used to be connected to a logic signal input terminal of the ink cartridge chip.

2. The regeneration chip according to claim 1, characterized in that: The voltage monitoring unit comprises a voltage comparator; the positive input terminal of the voltage comparator is used to be connected to the logic signal output terminal of the image forming device, the negative input terminal is used to access the reference voltage, and the output terminal is used to output the gating signal.

3. The regeneration chip according to claim 2, characterized in that: The voltage monitoring unit further includes a rectifier circuit; the rectifier circuit is connected in series between the non-phase input terminal of the voltage comparator and the logic signal output terminal of the image forming device.

4. The regeneration chip according to claim 3, characterized in that: The voltage monitoring unit further comprises a filter circuit; one end of the filter circuit is connected between the output end of the rectifier circuit and the non-phase input end of the voltage comparator, and the other end is grounded.

5. The regeneration chip according to any one of claims 2 to 4, characterized in that: The gating unit includes a first MOS tube; the gate of the first MOS tube is used to access the gating signal, one of the source and the drain of the first MOS tube is used to access the first logic signal, and the other is used to output the second logic signal.

6. The regeneration chip according to claim 5, characterized in that: The voltage monitoring unit further includes an inverter; the output end of the voltage comparator forms two branches, one of which outputs a first gating signal, and the other branch is connected in series with the inverter to output a second gating signal; The gate control unit also includes a second MOS tube; the first MOS tube is an N-type MOS tube, and the second MOS tube is a P-type MOS tube; the gate of the first MOS tube is used to access the first gating signal; the gate of the second MOS tube is used to access the second gating signal, the source is connected to the drain of the first MOS tube, and the drain is connected to the source of the first MOS tube.

7. The regeneration chip according to claim 5, characterized in that: The gate control unit further includes a first diode; the first diode is connected in series with the first MOS tube, and an anode of the first diode is connected to an output end of the first MOS tube.

8. The regeneration chip according to claim 7, characterized in that: The gate control unit further includes a second diode; the second diode is connected in reverse parallel with the first diode.

9. A regeneration chip, characterized in that: include: The gate control unit includes a first switch tube, wherein the positive electrode of the first switch tube is used to be connected to the logic signal output end of the image forming device, and the negative electrode is used to be connected to the logic signal input end of the ink cartridge chip; the first switch tube is used to step down the first logic signal when the first logic signal output by the image forming device is turned on, to obtain a second logic signal with a voltage difference with the first logic signal, and output the second logic signal to the ink cartridge chip.

10. The regeneration chip according to claim 9, characterized in that: The gate control unit further includes a second switch tube; the second switch tube is connected in reverse parallel with the first switch tube.

11. A remanufactured ink cartridge, characterized in that: include: Cartridge body; An ink cartridge chip, mounted on the ink cartridge body; and The regeneration chip according to any one of claims 1 to 10, wherein the regeneration chip is connected to the ink cartridge chip.

12. An image forming device, characterized in that: include: Multiple logic signal output terminals; and The regenerated ink cartridge of claim 11, wherein the regeneration chip of the regenerated ink cartridge comprises a plurality of gating units corresponding one-to-one to and connected with the plurality of logic signal output terminals.