Signal generation device, quantum calculation measurement and control system and quantum computer

By introducing a mixing module into the signal generation device of a quantum computer, the frequency division coefficient of the phase lock loop system is reduced, and the problem of high phase noise in the measurement and control signals of the quantum computer is solved, and the quality and accuracy of the measurement and control signals are improved.

CN222850902UActive Publication Date: 2025-05-09ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
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Patent Information

Application Number
CN202421830284.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-07-30
Publication Date
2025-05-09
Estimated Expiration
2034-07-30

AI Technical Summary

Technical Problem

There is a high phase noise in the measurement and control signals of existing quantum computers, which affects the measurement and control accuracy of quantum chips.

Method used

A signal generation device is designed, including a phase-locked loop system and a mixing module. Through the mixing module, the signal after the frequency division process in the phase-locked loop system is mixed to reduce the frequency division coefficient of the phase-locked loop system, thereby reducing the signal phase noise.

Benefits of technology

By reducing the phase noise of the signal, a low phase noise measurement and control signal is generated, which improves the measurement and control accuracy of quantum chips.

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Abstract

The utility model discloses a signal generation device, a quantum calculation measurement and control system and a quantum computer, the signal generation device comprises a phase-locked loop system and a frequency mixing module, the phase-locked loop system comprises a phase discriminator, a loop filter, a voltage control oscillator and a first frequency divider; the frequency mixing module is used for performing at least one time of frequency mixing processing based on the received second reference signal and the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal; the phase discriminator is used for generating an error signal based on the phase difference between the first reference signal and the second feedback signal; the loop filter is used for generating a control voltage signal based on the error signal; the voltage control oscillator is used for outputting a measurement and control signal for controlling quantum bits based on the control voltage signal; the first frequency divider is used for performing frequency division processing on the measurement and control signal to obtain a first feedback signal and outputting the first feedback signal to the frequency mixing module. According to the signal generating device, the frequency division coefficient of the phase-locked loop system is reduced, and the phase noise of the signal is reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of quantum computers, in particular to a signal generating device, a quantum computing measurement and control system and a quantum computer. Background Art

[0002] A quantum computer is a physical device that follows the laws of quantum mechanics to perform high-speed mathematical and logical operations, store and process quantum information. It is mainly composed of a quantum measurement and control system, a quantum chip system, a quantum computing environment support system and a quantum computer operating system. The quantum measurement and control system includes a signal generator, which is used to provide measurement and control signals for each quantum bit in the quantum chip. In order to improve the accuracy of measurement and control of the quantum chip, it is necessary to improve the quality of the measurement and control signal. For example, the signal quality can be improved by reducing the phase noise of the measurement and control signal generated by the signal generator.

[0003] It should be noted that the information disclosed in the background technology section of this application is only intended to deepen the understanding of the general background technology of this application, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Utility Model Content

[0004] The purpose of the utility model is to provide a signal generating device, a quantum computing measurement and control system and a quantum computer, which can generate a control signal with low phase noise and improve the accuracy of measurement and control of quantum chips.

[0005] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0006] The first aspect of the utility model provides a signal generating device, comprising a phase-locked loop system and a frequency mixing module, wherein the phase-locked loop system comprises a phase detector, a loop filter, a voltage-controlled oscillator and a first frequency divider;

[0007] The mixing module is used to perform at least one mixing process based on the received second reference signal and the first feedback signal output by the first frequency divider to reduce the frequency of the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal, and output it to the phase detector, wherein the first reference signal is the input signal of the phase detector, and the difference between the second reference signal and the first feedback signal is equal to the second feedback signal; the phase detector is used to generate an error signal based on the phase difference between the received first reference signal and the second feedback signal and output it to the loop filter; the loop filter is used to generate a control voltage signal based on the error signal and output it to the voltage controlled oscillator; the voltage controlled oscillator is used to output a measurement and control signal for controlling the quantum bit to the quantum chip and the first frequency divider based on the control voltage signal; the first frequency divider is used to perform frequency division processing on the measurement and control signal to obtain a first feedback signal and output it to the mixing module.

[0008] The signal generating device as described above further comprises:

[0009] A first signal processing module, configured to generate a third reference signal with a higher frequency based on the 100 MHz clock signal;

[0010] The second signal processing module is configured to generate the second reference signal with a higher frequency based on the third reference signal and output the second reference signal to the frequency mixing module.

[0011] In the signal generating device as described above, further, the first signal processing module comprises:

[0012] A first frequency multiplication component is used to perform frequency multiplication processing on a 100 MHz clock signal;

[0013] A direct digital frequency synthesizer connected to the output end of the first frequency multiplication element, and used to generate an output signal with a lower frequency based on the signal after the frequency multiplication process;

[0014] The first mixer is electrically connected to the output end of the direct digital frequency synthesizer and the output end of the first frequency multiplication element, and is used to perform mixing processing based on the output signal of the direct digital frequency synthesizer and the output signal of the first frequency multiplication element to obtain the third reference signal and output it to the second signal processing module.

[0015] In the signal generating device as described above, further, the first signal processing module also includes a first amplifying and filtering element electrically connected between the first frequency multiplying element and the direct digital frequency synthesizer, for amplifying and filtering the multiplied signal and outputting it to the direct digital frequency synthesizer.

[0016] In the signal generating device as described above, further, the second signal processing module comprises:

[0017] The second frequency multiplication element is used to perform frequency multiplication processing on the third reference signal output by the first signal processing module to obtain the second reference signal and output it to the mixing module.

[0018] In the signal generating device as described above, further, the second signal processing module comprises:

[0019] A second frequency multiplication element, used for performing frequency multiplication processing on the third reference signal output by the first signal processing module to obtain the second reference signal;

[0020] A second amplifying and filtering element is used to amplify and filter the signal after the frequency doubling process;

[0021] The second digitally controlled frequency divider is used to perform frequency division processing on the amplified and filtered signal to obtain the second reference signal and output it to the mixing module.

[0022] The signal generating device as described above further includes a third signal processing module, which is used to receive the third reference signal generated by the first signal processing module and perform frequency division processing to obtain the first reference signal with a frequency lowered.

[0023] The signal generating device as described above further comprises a control module, which is used to output a control signal to the first frequency divider and the phase detector according to a received control instruction.

[0024] The second aspect of the utility model provides a quantum computing measurement and control system, comprising the above-mentioned signal generating device, wherein the signal generating device is used to output a measurement and control signal to a quantum chip.

[0025] The third aspect of the utility model provides a quantum computer, comprising the above-mentioned quantum computing measurement and control system and a quantum chip, wherein the quantum chip performs quantum computing tasks according to the measurement and control signals provided by the quantum computing measurement and control system.

[0026] The beneficial effects of the utility model are:

[0027] The signal generating device of the present application performs mixing processing on the first feedback signal after frequency division processing in the phase-locked loop system by setting a mixing module so as to reduce the frequency to obtain a second feedback signal equal to the frequency of the first reference signal and output it to the phase detector, thereby reducing the frequency division coefficient of the phase-locked loop system, reducing the phase noise of the signal, and generating a low phase noise measurement and control signal.

[0028] The quantum computing measurement and control system and quantum computer provided by the utility model include the above-mentioned signal generating device, and therefore have the same beneficial effects, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 1 ;

[0030] Figure 2 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 2 ;

[0031] Figure 3 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 3 ;

[0032] Figure 4 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 4 ;

[0033] In the accompanying drawings: 10, phase detector; 20, voltage controlled oscillator; 30, mixing module; 40, first signal processing module; 50, second signal processing module; 60, third signal processing module; 70, loop filter; 80, first frequency divider;

[0034] 31. a second mixer; 32. a third amplifying and filtering element;

[0035] 41. a first frequency multiplication element; 42. a direct digital frequency synthesizer; 43. a first mixer; 44. a first amplifying and filtering element;

[0036] 51. A second frequency multiplication element; 52. A second amplification and filtering element; 53. A second digitally controlled frequency divider;

[0037] 61. The third CNC divider. DETAILED DESCRIPTION

[0038] In order to enable those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limitations on the present application.

[0039] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0040] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0041] Figure 1 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 1 ,like Figure 1 As shown: An embodiment of the present application discloses a signal generating device, a signal generating device, including a phase-locked loop system and a mixing module 30, wherein the phase-locked loop system includes a phase detector 10, a loop filter 70, a voltage-controlled oscillator 20 and a first frequency divider 80.

[0042] The mixing module 30 is used to perform at least one mixing process based on the received second reference signal and the first feedback signal output by the first frequency divider 80 to reduce the frequency of the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal, and output it to the phase detector 10, wherein the first reference signal is the input signal of the phase detector 10, and the difference between the second reference signal and the first feedback signal is equal to the second feedback signal.

[0043] The phase detector 10 is used to generate an error signal based on the phase difference between the received first reference signal and the second feedback signal and output it to the loop filter 70. The loop filter 70 is used to generate a control voltage signal based on the error signal and output it to the voltage controlled oscillator 20. The voltage controlled oscillator 20 is used to output a measurement and control signal for controlling the quantum bit to the quantum chip and the first frequency divider 80 based on the control voltage signal. The first frequency divider 80 is used to perform frequency division processing on the measurement and control signal to obtain a first feedback signal and output it to the mixing module 30.

[0044] The signal generating device of the present application performs mixing processing on the first feedback signal after the frequency division processing in the phase-locked loop system by setting the mixing module 30 so as to reduce the frequency to obtain the second feedback signal with the same frequency as the first reference signal and output it to the phase detector 10, thereby reducing the frequency division coefficient of the phase-locked loop system, reducing the phase noise of the signal, and generating a low phase noise measurement and control signal. Specifically, in the signal generating device of the present application, the frequency ratio of the measurement and control signal to the first reference signal is a, the frequency division coefficient of the first frequency divider in the phase-locked loop system is the frequency ratio of the measurement and control signal to the first feedback signal, recorded as N, and the frequency ratio of the first feedback signal to the second feedback signal is b; since the first reference signal and the second feedback signal can only control the voltage controlled oscillator 20 to output the measurement and control signal when the frequencies are the same, a=N*b, when a is determined, since the mixing module 30 reduces the frequency of the first feedback signal to obtain the second feedback signal during the mixing processing, b is greater than 1, so when the mixing module 30 is set, N is reduced, that is, the frequency division coefficient of the phase-locked loop system is reduced, thereby reducing the phase noise level.

[0045] The following is a detailed explanation of how the device of the present application can reduce the frequency division coefficient of the phase-locked loop system through specific examples. Exemplarily, when the first reference signal is a low-frequency signal of about 100MHz and the measurement and control signal is 12GHz, when the mixing module 30 is not set, the frequency division coefficient of the phase-locked loop system is 12GHz / 100MHz, which is about 120; and when the device of the present application is used and the mixing module 30 is set, the frequency division coefficient satisfies the following relationship: a=N*b, a is the ratio of the frequency of the measurement and control signal to that of the first reference signal, so a is approximately equal to 120, and when b is larger, N is smaller; b is the ratio of the frequency of the first feedback signal to the second feedback signal, that is, the first feedback signal / 100MHz. It can be seen that when the first feedback signal When the number is larger, b is larger and N is smaller; for example, when the first feedback signal is 12 GHz, N is 1; when the first feedback signal is 6 GHz, N is 2; when the first feedback signal is 4 GHz, N is 3, then, at this time, the mixing module 30 needs to mix the first feedback signal of 12 GHz or 6 GHz or 4 GHz with the second reference signal to obtain a second feedback signal with a frequency of about 100 MHz. Therefore, by setting the mixing module 30, the first feedback signal can be reduced to a second feedback signal with the same frequency as the first reference signal, so the division coefficient of the phase-locked loop system can be reduced.

[0046] Figure 2 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 2 ,like Figure 2As shown: In some implementations of this embodiment, the signal generating device also includes: a first signal processing module 40, used to generate a third reference signal with a higher frequency based on the 100 MHz clock signal; a second signal processing module 50, used to generate the second reference signal with a higher frequency based on the third reference signal and output it to the mixing module 30.

[0047] By setting the first signal processing module 40 and the second signal processing module 50, the 100MHz clock signal is processed twice, so that the output frequency is gradually increased to obtain a second reference signal. Compared with directly multiplying the second reference signal, the frequency adjustment accuracy can be improved. At the same time, it is easy to reduce the stray and improve the quality of the second reference signal, thereby improving the quality of the measurement and control signal finally output to improve the accuracy of measurement and control of the quantum chip.

[0048] In this embodiment, the specific structure of the first signal processing module 40 is not limited. Figure 3 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 3 ,like Figure 3 As shown: In some implementations of the present embodiment, the first signal processing module 40 includes: a first frequency multiplication element 41, used to perform frequency multiplication processing on a 100 MHz clock signal; a direct digital frequency synthesizer 42, connected to the output end of the first frequency multiplication element 41, used to generate an output signal with a lower frequency based on the signal after the frequency multiplication processing; a first mixer 43, electrically connected to the output end of the direct digital frequency synthesizer 42 and the output end of the first frequency multiplication element 41, used to perform mixing processing based on the output signal of the direct digital frequency synthesizer 42 and the output signal of the first frequency multiplication element 41 to obtain the third reference signal and output it to the second signal processing module 50.

[0049] The first signal processing module 40 of this embodiment can accurately adjust the frequency and phase of the output signal to improve the signal quality by setting the first frequency multiplication element 41, the direct digital frequency synthesizer 42 and the first mixer 43. In addition, by combining the DDS (direct digital frequency synthesizer 42) + phase-locked loop system, a frequency step of <0.1KHz can be achieved.

[0050] Figure 4 A schematic diagram of the structure of the signal generating device provided in the embodiment of the utility model Figure 4 ,like Figure 4 Shown: In Figure 3On the basis of the first signal processing module 40 in the embodiment, in some implementations of this embodiment, the first signal processing module 40 further includes a first amplifying and filtering element 44 electrically connected between the first frequency multiplication element 41 and the direct digital frequency synthesizer 42, for amplifying and filtering the signal after the frequency multiplication process and outputting it to the direct digital frequency synthesizer 42. By providing the first amplifying and filtering element 44, the signal is amplified and filtered, and while the signal strength is increased, unnecessary phase noise is reduced, so as to effectively improve the signal quality.

[0051] Specifically, the first amplifying and filtering element 44 includes a filter and an amplifier, and the specific number of the filter and the amplifier is determined according to specific needs. Exemplarily, the first amplifying and filtering element 44 includes a filter and an amplifier connected in series, the output end of the amplifier is electrically connected to the direct digital frequency synthesizer 42, and the input end of the filter is electrically connected to the first frequency multiplication element 41. The specific type of the filter in this embodiment is not limited, and it can be a low-pass filter, which is specifically determined according to the parameters of the signal to be filtered. The specific type of the amplifier in this embodiment is not limited, and it can be a low phase noise amplifier.

[0052] The specific structure of the second signal processing module 50 in this embodiment is not limited. In some implementations of this embodiment, Figure 3 As shown: the second signal processing module 50 includes: a second frequency multiplication element 51, which is used to perform frequency multiplication processing on the third reference signal output by the first signal processing module 40, to obtain the second reference signal and output it to the mixing module 30.

[0053] In some other implementations of this embodiment, Figure 4 As shown, the second signal processing module 50 includes: a second frequency multiplication element 51, which is used to perform frequency multiplication processing on the third reference signal output by the first signal processing module 40 to obtain the second reference signal; a second amplification and filtering element 52, which is used to amplify and filter the signal after the frequency multiplication processing; a second digital control divider 53, which is used to perform frequency division processing on the signal after the amplification and filtering processing to obtain the second reference signal and output it to the mixing module 30. In the second signal processing module 50 of this embodiment, by setting the second frequency multiplication element 51 and the second digital control divider 53, the frequency of the output signal can be accurately controlled. By setting the second amplification and filtering element 52, the signal is amplified and filtered, and while the signal strength is improved, unnecessary phase noise is reduced to effectively improve the signal quality.

[0054] Specifically, the second amplifying and filtering element 52 includes a filter and an amplifier, and the specific number of the filter and the amplifier is determined according to specific needs. Exemplarily, the second amplifying and filtering element 52 includes a filter and an amplifier connected in series, the output end of the amplifier is electrically connected to the second digital control frequency divider 53, and the input end of the filter is electrically connected to the second frequency multiplication element 51. The specific type of the filter in this embodiment is not limited, and it can be a low-pass filter. The specific type of the amplifier in this embodiment is not limited, and it can be a low phase noise amplifier.

[0055] In some implementations of this embodiment, Figure 2 , 3 , as shown in 4: the signal generating device also includes a third signal processing module 60, which is used to receive the third reference signal generated by the first signal processing module 40, and perform frequency division processing to obtain the first reference signal with a lowered frequency. It can be seen from this that the first reference signal of the present application is a 100MHz clock signal that is first mixed by the first signal processing module 40 to generate a third reference signal with a higher frequency, and then subjected to frequency division processing by the third signal processing module 60 to obtain the first reference signal with a lowered frequency as the input signal of the phase detector 10. This can not only improve the adjustment accuracy of the signal frequency, but also the frequency division processing can optimize the phase noise, improve the final signal quality, and thus improve the accuracy of the measurement and control of the quantum chip. Continue as Figure 3 and 4 As shown, the third signal processing module 60 includes a third digitally controlled frequency divider 61, through which the third digitally controlled frequency divider 61 can accurately divide the third reference signal to obtain the first reference signal.

[0056] Furthermore, the 100 MHz clock signal in this embodiment can be provided by a crystal oscillator source, which has the characteristics of high stability and low phase noise, thereby further reducing the phase noise of the final signal and improving the signal quality.

[0057] In some implementations of this embodiment, the signal generating device further includes a control module, which is used to output a control signal to the first frequency divider 80 and the phase detector 10 according to the received control instruction. By setting the control module, the working state, parameters and mode of the phase detector 10 and the first frequency divider 80 can be adjusted and controlled according to requirements to ensure that the phase detector 10 and the first frequency divider 80 can operate stably and meet specific requirements.

[0058] Specifically, the control module may be one or more FPGAs. Further, the control module is also used to output a control signal to the DDS or the second digital control divider 53 or the third digital control divider 61 according to the received control instruction, so as to adjust the working state, parameters and mode of the DDS or the second digital control divider 53 or the third digital control divider 61.

[0059] The specific structure of the mixing module 30 in this embodiment is not limited, and it can include one or more mixers to perform one or more mixing processes to obtain the desired signal. Figure 3 As shown: the mixing module 30 includes: a second mixer 31, which is used to perform mixing processing based on the received second reference signal and the first feedback signal output by the first divider 80 in the phase-locked loop system to reduce the frequency of the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal, and output it to the phase detector 10.

[0060] In some other implementations of this embodiment, Figure 4 As shown, the mixing module 30 includes: a third amplifying and filtering element 32, which is used to amplify and filter the first feedback signal output by the first frequency divider 80; a second mixer 31, which is used to perform mixing processing based on the received second reference signal and the amplified and filtered signal to lower the frequency of the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal, and output it to the phase detector 10. By setting the third amplifying and filtering element 32, the signal is amplified and filtered, and unnecessary phase noise is reduced while the signal strength is increased, so as to effectively improve the signal quality.

[0061] Specifically, the third amplifying and filtering element 32 includes a filter and an amplifier, and the specific number of the filter and the amplifier is determined according to specific needs. Exemplarily, the third amplifying and filtering element 32 includes a filter and an amplifier connected in series, the input end of the amplifier is electrically connected to the first frequency divider 80, and the output end of the filter is electrically connected to the second mixer 31. The specific type of the filter in this embodiment is not limited, and it can be a low-pass filter. The specific type of the amplifier in this embodiment is not limited, and it can be a low phase noise amplifier.

[0062] In this embodiment, the specific types of the first frequency multiplying element 41 and the second frequency multiplying element 51 are not limited, and they may be comb spectrum generators or frequency multipliers.

[0063] Combine the following Figure 4 The specific process of the signal generator of the present application generating a measurement and control signal of about 12 GHz based on a 100 MHz clock signal is given as follows:

[0064] The 100MHz clock signal is frequency multiplied to about 1GHz by the first frequency multiplying element 41, and then is processed by the first amplifying and filtering element 44 and DDS to output a signal of several tens of MHz, for example, a 58.9MHz signal; the 100MHz clock signal is also frequency multiplied to about 1.7GHz by the first frequency multiplying element 41, and then is input into the second mixer 31 with the 58.9MHz signal to obtain a third reference signal of about 1.6GHz through mixing processing; the third reference signal of about 1.6GHz can be divided into two paths by a power divider, one path is output to the third digital control divider 61, and is divided into a signal with a frequency of about 102MHz as the first reference signal, and the other path is output to the second frequency multiplying element 51, and is successively processed by the second frequency multiplying element 51. The frequency element 51, the second amplifying and filtering element 52, and the second digital control divider 53 are used to obtain a second reference signal of about 6.1 GHz. The second reference signal of about 6.1 GHz and the 6 GHz signal obtained by the frequency division processing of the first divider 80 in the phase-locked loop system (the frequency division coefficient of the phase-locked loop system is 2 at this time) are mixed by the first mixer 43 to output a second feedback signal of about 102 MHz to the phase detector 10; the phase detector 10 generates an error signal based on the phase difference between the first reference signal of about 102 MHz and the second feedback signal of about 102 MHz, and the error signal is output to the loop filter to generate a control voltage signal. The voltage controlled oscillator outputs a 12 GHz measurement and control signal for controlling the quantum bit based on the control voltage signal.

[0065] Of course, the signal generator of this embodiment can also generate a measurement and control signal of about 13.5 GHz based on a 100 MHz clock signal, and through simulation experiments, the phase noise is about -110 dBC / Hz; if a phase-locked loop system is directly used to generate a measurement and control signal of about 13.5 GHz based on a 100 MHz clock signal, the phase noise is about -93 dBC / Hz through simulation experiments. It can be seen that the signal generator of this embodiment reduces the phase noise compared to the phase-locked loop system.

[0066] Based on the same application concept, the embodiment of the present application also proposes a quantum computing measurement and control system, including the above-mentioned signal generating device, and the signal generating device is used to output the measurement and control signal to the quantum chip. The quantum computing measurement and control system of the present application includes the above-mentioned signal generating device, and therefore has the same beneficial effects as the above-mentioned signal generating device, which will not be repeated here.

[0067] Based on the same application concept, the embodiment of the present application also proposes a quantum computer, a quantum computing measurement and control system, and a quantum chip, wherein the quantum chip performs quantum computing tasks according to the measurement and control signal provided by the quantum computing measurement and control system. The quantum computer of the present application includes the above-mentioned quantum computing measurement and control system, and therefore has the same beneficial effects as the above-mentioned quantum computing measurement and control system, which will not be repeated here.

[0068] In the description of this specification, the description with reference to the terms "some embodiments" or "examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0069] The above are only preferred embodiments of the present invention and do not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, may make any equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which shall be deemed as the content of the technical solution of the present invention and still fall within the protection scope of the present invention.

Claims

1. A signal generating device, characterized in that: It includes a phase-locked loop system and a frequency mixing module, wherein the phase-locked loop system includes a phase detector, a loop filter, a voltage-controlled oscillator and a first frequency divider; The mixing module is used to perform at least one mixing process based on the received second reference signal and the first feedback signal to reduce the frequency of the first feedback signal to obtain a second feedback signal with the same frequency as the first reference signal, and output it to the phase detector; the first reference signal is the input signal of the phase detector, and the difference between the second reference signal and the first feedback signal is equal to the second feedback signal; The phase detector is used to generate an error signal based on the phase difference between the received first reference signal and the second feedback signal and output the error signal to the loop filter; The loop filter is used to generate a control voltage signal based on the error signal and output it to the voltage controlled oscillator; the voltage controlled oscillator is used to output a measurement and control signal for controlling the quantum bit to the quantum chip and the first frequency divider based on the control voltage signal; the first frequency divider is used to perform frequency division processing on the measurement and control signal to obtain the first feedback signal and output it to the mixing module.

2. The signal generating device according to claim 1, characterized in that: Also includes: A first signal processing module, configured to generate a third reference signal with a higher frequency based on the 100 MHz clock signal; The second signal processing module is configured to generate the second reference signal with a higher frequency based on the third reference signal and output the second reference signal to the frequency mixing module.

3. The signal generating device according to claim 2, characterized in that: The first signal processing module comprises: A first frequency multiplication component is used to perform frequency multiplication processing on a 100 MHz clock signal; A direct digital frequency synthesizer connected to the output end of the first frequency multiplication element, and used to generate an output signal with a lower frequency based on the signal after the frequency multiplication process; The first mixer is electrically connected to the output end of the direct digital frequency synthesizer and the output end of the first frequency multiplication element, and is used to perform mixing processing based on the output signal of the direct digital frequency synthesizer and the output signal of the first frequency multiplication element to obtain the third reference signal and output it to the second signal processing module.

4. The signal generating device according to claim 3, characterized in that: The first signal processing module also includes a first amplifying and filtering element electrically connected between the first frequency multiplying element and the direct digital frequency synthesizer, for amplifying and filtering the multiplied signal and outputting it to the direct digital frequency synthesizer.

5. The signal generating device according to claim 2, characterized in that: The second signal processing module comprises: The second frequency multiplication element is used to perform frequency multiplication processing on the third reference signal output by the first signal processing module to obtain the second reference signal and output it to the mixing module.

6. The signal generating device according to claim 2, characterized in that: The second signal processing module comprises: A second frequency multiplication element, used for performing frequency multiplication processing on the third reference signal output by the first signal processing module to obtain the second reference signal; A second amplifying and filtering element is used to amplify and filter the signal after the frequency doubling process; The second digitally controlled frequency divider is used to perform frequency division processing on the amplified and filtered signal to obtain the second reference signal and output it to the mixing module.

7. The signal generating device according to claim 3, characterized in that: It also includes a third signal processing module, which is used to receive the third reference signal generated by the first signal processing module and perform frequency division processing to obtain the first reference signal with a frequency reduced.

8. The signal generating device according to claim 1, characterized in that: It also includes a control module, which is used to output a control signal to the first frequency divider and the phase detector according to the received control instruction.

9. A quantum computing measurement and control system, characterized in that: It comprises a signal generating device as described in any one of claims 1 to 8, wherein the signal generating device is used to output a measurement and control signal to a quantum chip.

10. A quantum computer, characterized in that: It includes the quantum computing measurement and control system and quantum chip as described in claim 9, and the quantum chip performs quantum computing tasks according to the measurement and control signals provided by the quantum computing measurement and control system.