Relay protection device system mainboard based on double processors

Abstract

The utility model relates to a relay protection device system mainboard based on double processors, which relates to the field of relay protection systems, and comprises a power management module for supplying power to the whole system mainboard through a power bus; the processor module comprises a first processor and a second processor, and the first processor is used for executing a system management task; the second processor is used for executing data operation with high real-time performance and a protection logic discrimination task; the analog quantity sampling module is used for collecting, converting and correcting analog quantity signals and transmitting the analog quantity signals to the second processor, and the analog quantity sampling module is in communication connection with the second processor; and the communication module comprises a CAN communication interface and is used for performing data exchange with an external intelligent IO plug-in, and the intelligent IO plug-in is in communication connection with the processor module through a CAN communication network and transmits input and output state data in real time. The double-processor architecture is adopted, so that the overall performance of the relay protection device is improved.

Description

Technical Field

[0001] The present application relates to the field of relay protection systems, and in particular to a dual-processor based relay protection device system mainboard. Background Art

[0002] In the power system, microcomputer-based relay protection devices are important equipment to ensure the safe and stable operation of transmission lines. According to different voltage levels, power system transmission systems can be roughly divided into ultra-high voltage, high voltage, medium and low voltage, etc. In environments above high voltage, due to the more complex equipment operating environment, higher performance requirements are placed on relay protection devices. Therefore, the relay protection devices used are mostly expensive, and the hardware cost of the system motherboard is often not the main consideration during design. However, in medium and low voltage transmission lines, due to cost considerations, the design of microcomputer protection must take into account both performance and cost.

[0003] At present, the relay protection system widely used in medium and low voltage power systems usually adopts a single-chip processor as the main control unit and is equipped with simple peripherals. Although this design method meets the basic protection needs to a certain extent, it also has obvious shortcomings. The single-chip processor is responsible for relay protection processing with strong real-time requirements, such as protection calculation and protection logic judgment, and also takes into account management work such as communication, human-machine management, and system maintenance. Since these tasks are processed in parallel on the processor, they may interfere with each other, thus affecting the overall performance of the relay protection device. Summary of the invention

[0004] In view of the shortcomings of the relay protection system of medium and low voltage power transmission lines in the prior art, this application aims to provide a solution for a relay protection system motherboard based on dual processors. The real-time protection operation and communication, management and other tasks are respectively handled by different processors, thereby improving the overall performance of the relay protection device.

[0005] The present application provides a dual-processor-based relay protection device system motherboard that adopts the following technical solution:

[0006] A dual-processor-based relay protection device system motherboard, including:

[0007] The power management module supplies power to the entire system motherboard through the power bus;

[0008] The processor module includes a first processor and a second processor, wherein the first processor is used to execute system management tasks; and the second processor is used to execute data calculations and protection logic determination tasks with strong real-time performance;

[0009] The analog quantity sampling module is used to collect, convert, correct and transmit the analog quantity signal to the second processor, and the analog quantity sampling module is communicatively connected with the second processor;

[0010] The communication module includes a CAN communication interface for exchanging data with an external intelligent IO plug-in. The intelligent IO plug-in is connected to the processor module through the CAN communication network to transmit input and output status data in real time.

[0011] Optionally, the processor module further includes a data communication interface, and the data communication interface is used to implement data exchange between the first processor and the second processor.

[0012] Optionally, the first processor is a 32-bit fixed-point processor based on an ARM core.

[0013] Optionally, the second processor is a 32-bit floating-point processor based on a DSP core.

[0014] Optionally, the analog quantity sampling module includes a sampling reference power supply, an FPGA controller and an ADC controller;

[0015] The sampling reference power supply is used as a reference voltage or current source for analog signal sampling;

[0016] The FPGA controller is used to control channel switching, sampling frequency setting and data preprocessing of analog quantity sampling;

[0017] The ADC controller is used to convert analog signals into digital signals, and perform subsequent processing and analysis of the digital signals.

[0018] Optionally, a data storage module is further included, wherein the data storage module is connected to the first processor via a signal line, and the data storage module is used to read and store management data and operation data of the system mainboard.

[0019] Optionally, the data storage module includes a static memory SRAM, a power-off retention flash memory NorFlash and a NandFlash, which are communicatively connected to the first processor via a signal line.

[0020] Optionally, the first processor is connected to an input / output module via a signal line, and the input / output module includes a serial port and a network port for connecting to an external device.

[0021] In summary, the present application includes at least one of the following beneficial technical effects:

[0022] 1. Optimize task allocation and processor utilization: With a dual-processor architecture, system management tasks and real-time protection computing tasks are assigned to different processors to achieve optimized task allocation. This not only avoids performance bottlenecks and interference problems that may occur when a single processor executes multiple tasks, but also improves processor utilization, making the system more efficient and stable.

[0023] 2. Improve the real-time performance of the system: By handing over the protection operation tasks with strong real-time performance to the 32-bit floating-point processor with a dedicated DSP core, it can ensure fast and accurate fault identification and protection operation of the power system transmission lines in complex environments. This design significantly improves the real-time performance of the system, enabling the relay protection device to respond more quickly to changes in the power system and ensure the stable operation of the power grid.

[0024] 3. Enhance system scalability and maintainability: The modular design in this solution makes each part of the system motherboard relatively independent, which is convenient for subsequent expansion and upgrading. At the same time, the use of standardized communication interfaces and data storage modules greatly improves the maintainability of the system. When the system needs to be upgraded or maintained, it is only necessary to replace or upgrade the corresponding modules without making large-scale changes to the entire system. This not only reduces maintenance costs, but also improves the reliability and stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] Figure 1 It is a schematic diagram of the main board of the relay protection system in the prior art;

[0026] Figure 2 It is a schematic diagram of a mainboard of a dual-processor relay protection system in this application;

[0027] Figure 3 It is a schematic diagram of the overall structure of the relay protection device in this application.

[0028] Explanation of the accompanying drawings: 1. Power management module; 2. Processor module; 21. First processor; 22. Second processor; 3. Analog sampling module; 4. Communication module; 5. Data storage module; 6. Input and output module. DETAILED DESCRIPTION

[0029] The following is combined with Figure 1-3 This application is described in further detail.

[0030] The embodiment of the present application discloses a dual-processor-based relay protection device system motherboard. Figure 2 The dual-processor-based relay protection device system mainboard includes a power management module 1, a processor module 2, an analog sampling module 3, a communication module 4, a data storage module 5 and an input-output module 6.

[0031] The power management module 1 supplies power to the entire system motherboard through the power bus to ensure that each module operates at a stable operating voltage. The module can monitor and adjust the power supply voltage to meet the power requirements under different workloads.

[0032] The processor module 2 includes a first processor 21, a second processor 22 and a data communication interface. The first processor 21 is a 32-bit fixed-point processor based on the ARM core, responsible for executing system management tasks such as communication, human-machine management, system maintenance, etc. The second processor 22 is a 32-bit floating-point processor based on the DSP core, specifically used for executing real-time data operations and protection logic judgment tasks.

[0033] The first processor 21 and the second processor 22 exchange data via a data communication interface, ensuring that the protection operation results with strong real-time performance can be transmitted to the first processor 21 in time for processing.

[0034] The analog quantity sampling module 3 is responsible for collecting, converting and correcting the analog quantity signal, and transmitting the digital signal to the second processor 22. The module includes a sampling reference power supply, an FPGA controller and an ADC controller.

[0035] The sampling reference power supply provides a stable reference voltage or current source to ensure the accuracy of analog signal sampling. The FPGA controller is used to control the channel switching, sampling frequency setting and data preprocessing of analog quantity sampling to improve sampling efficiency. The ADC controller converts the analog signal into a digital signal for subsequent processing and analysis by the second processor 22.

[0036] The communication module 4 includes a CAN communication interface for exchanging data with an external intelligent IO plug-in. The intelligent IO plug-in is connected to the processor module 2 via the CAN communication network to transmit input and output status data in real time. This module realizes data interaction and sharing between the relay protection device and other devices.

[0037] The data storage module 5 is connected to the first processor 21 through a signal line, and is used to read and store the management data and operation data of the system mainboard. The module includes a static memory SRAM, a power-off retention flash memory NorFlash and NandFlash. SRAM is used to temporarily store data, and NorFlash and NandFlash are used to store data and programs for a long time.

[0038] The first processor 21 module 2 is connected to the input / output module 6 through a signal line, and the input / output module 6 includes a serial port and a network port. These interfaces are used to connect to external devices to implement data input and output functions.

[0039] The implementation principle of the dual-processor relay protection device system motherboard of the embodiment of the present application is as follows: when the system motherboard is started, the power management module 1 first supplies power to the entire system. The first processor 21 and the second processor 22 perform initialization operations respectively and establish a connection with the data communication interface. The analog sampling module 3 starts to work, collects, converts and corrects the analog signal, and transmits the digital signal to the second processor 22. After receiving the digital signal, the second processor 22 performs real-time data calculation and protection logic judgment, and sends the result to the first processor 21 through the data communication interface. The first processor 21 performs corresponding system management tasks such as communication, human-machine management, system maintenance, etc. according to the received results. The communication module 4 exchanges data with the external intelligent IO plug-in to realize the real-time transmission of the input and output status data. The data storage module 5 reads and stores the management data and operation data of the system motherboard to ensure the reliability and integrity of the data. Through the above implementation, the dual-processor relay protection device system motherboard of the present application realizes the separation of real-time protection calculation and communication, management and other tasks, and improves the overall performance of the relay protection device.

[0040] The above are all preferred embodiments of the present application, and the protection scope of the present application is not limited thereto. Therefore, any equivalent changes made according to the structure, shape, and principle of the present application should be included in the protection scope of the present application.

Claims

1. A dual-processor-based relay protection device system motherboard, characterized in that: include: A power management module (1) supplies power to the entire system mainboard via a power bus; The processor module (2) comprises a first processor (21) and a second processor (22), wherein the first processor (21) is used to execute system management tasks; and the second processor (22) is used to execute data calculation and protection logic judgment tasks with strong real-time performance; An analog quantity sampling module (3) is used to collect, convert, correct and transmit analog quantity signals to a second processor (22); the analog quantity sampling module (3) is communicatively connected to the second processor (22); The communication module (4) comprises a CAN communication interface, which is used to exchange data with an external intelligent IO plug-in. The intelligent IO plug-in is connected to the processor module (2) through the CAN communication network to transmit input and output status data in real time.

2. The dual-processor-based relay protection device system motherboard according to claim 1, characterized in that: The processor module (2) also includes a data communication interface, which is used to implement data exchange between the first processor (21) and the second processor (22).

3. The dual-processor-based relay protection device system motherboard according to claim 2, characterized in that: The first processor (21) is a 32-bit fixed-point processor based on an ARM core.

4. The dual-processor-based relay protection device system motherboard according to claim 2, characterized in that: The second processor (22) is a 32-bit floating-point processor based on a DSP core.

5. The dual-processor-based relay protection device system motherboard according to claim 1, characterized in that: The analog quantity sampling module (3) comprises a sampling reference power supply, an FPGA controller and an ADC controller; The sampling reference power supply is used as a reference voltage or current source for analog signal sampling; The FPGA controller is used to control channel switching, sampling frequency setting and data preprocessing of analog quantity sampling; The ADC controller is used to convert analog signals into digital signals, and perform subsequent processing and analysis of the digital signals.

6. The dual-processor-based relay protection device system motherboard according to claim 1, characterized in that: It also comprises a data storage module (5), the data storage module (5) being connected to the first processor (21) via a signal line, and the data storage module (5) being used to read and store management data and operation data of the system mainboard.

7. The dual-processor-based relay protection device system motherboard according to claim 6, characterized in that: The data storage module (5) comprises a static memory SRAM, a power-off retention flash memory NorFlash and a NandFlash, which are connected to the first processor (21) via a signal line.

8. The dual-processor-based relay protection device system motherboard according to claim 1, characterized in that: The first processor (21) is connected to an input-output module (6) via a signal line, and the input-output module (6) comprises a serial port and a network port for connecting to an external device.

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