Battery management system based on FPGA and battery pack

Abstract

The utility model relates to a battery management system based on an FPGA (Field Programmable Gate Array) and a battery pack. The battery management system comprises an FPGA main control unit and an acquisition unit, the acquisition unit is used for acquiring battery state parameters of the battery pack; the FPGA main control unit comprises an SPI communication module, a comparison module and an alarm output module; the SPI communication module is connected with the acquisition unit and used for receiving the battery state parameters, the comparison module is connected with the SPI communication module and used for comparing the battery state parameters with a preset parameter range, and the alarm output module is connected with the comparison module and used for outputting alarm information. And the alarm module is used for outputting alarm information when the battery state parameters are not within the preset parameter range. Through the mode, the data transmission efficiency can be improved.

Description

Technical Field

[0001] This application relates to the technical field of batteries, and particularly to a battery management system and a battery pack based on FPGA. Background Art

[0002] A battery management system (BMS) is a system used to monitor and manage the state of a battery. By collecting and calculating parameters such as the voltage, current, and temperature of the battery, it then controls the charging and discharging process of the battery to improve battery performance and extend battery life. Since an FPGA (Field Programmable Gate Array) has advantages such as programmability, fast operation speed, and strong processing ability, the processor of the battery management system is usually implemented using an FPGA.

[0003] Currently, the FPGA processor of the battery management system generally uses a UART (Universal Asynchronous Receiver / Transmitter) communication interface to connect to the acquisition module to receive data such as the battery voltage and temperature collected by the acquisition module. The UART communication protocol is for asynchronous transmission, and its communication rate is low, resulting in low data transmission efficiency. Especially when the number of batteries is large, the more data needs to be transmitted, and it is difficult to meet the requirements using the UART communication protocol to transmit data, resulting in low working efficiency of the battery management system. Summary of the Utility Model

[0004] Based on this, it is necessary to provide a battery management system based on FPGA for the above technical problems, which can improve data transmission efficiency.

[0005] In a first aspect, this application provides a battery management system based on FPGA, including an FPGA main control unit and an acquisition unit;

[0006] The acquisition unit is used to acquire the battery state parameters of the battery pack; the FPGA main control unit includes an SPI communication module, a comparison module, and an alarm output module; the SPI communication module is connected to the acquisition unit for receiving the battery state parameters; the comparison module is connected to the SPI communication module for comparing the battery state parameters with a preset parameter range, and the alarm output module is connected to the comparison module for outputting an alarm message when the battery state parameters are not within the preset parameter range.

[0007] Further, the SPI communication module includes a main SPI communication module and a standby SPI communication module, and both the main SPI communication module and the standby SPI communication module are respectively connected to the acquisition unit and the comparison module.

[0008] Further, the FPGA master control unit further includes an IIC communication module and a storage module. The IIC communication module is connected to a first external device, and the storage module is connected to the IIC communication module and the comparison module, and stores the preset parameter range.

[0009] Further, the IIC communication module includes a main IIC communication module and a standby IIC communication module. Both the main IIC communication module and the standby IIC communication module are respectively connected to the first external device and the storage module.

[0010] Further, the FPGA unit further includes a UART communication module, and the UART communication module is connected to a second external device.

[0011] Further, the battery management system further includes a daisy chain communication chip, and the SPI communication module is connected to the acquisition unit through the daisy chain communication chip.

[0012] Further, the battery management system further includes a balancing module. The balancing module is respectively connected to the acquisition unit and the battery pack, and is used for performing balancing compensation on the battery pack.

[0013] Further, the number of the battery packs is multiple;

[0014] The acquisition unit includes a plurality of acquisition modules connected in sequence, and an isolation chip is connected between adjacent acquisition modules;

[0015] Each acquisition module is correspondingly connected to one battery pack, and the SPI communication module is connected to one of the acquisition modules.

[0016] Further, each battery pack includes a plurality of single cells, the plurality of single cells are connected in series, and each acquisition module includes a plurality of operational amplifier circuits correspondingly connected to the plurality of single cells one by one;

[0017] The operational amplifier circuit includes an operational amplifier, a coupling capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, and an output capacitor; the coupling capacitor is connected between the positive electrode and the negative electrode of the corresponding single cell, the positive input terminal of the operational amplifier is connected to the positive electrode of the corresponding single cell through the first resistor, the negative input terminal of the operational amplifier is connected to the negative electrode of the corresponding single cell through the third resistor, one end of the second resistor is connected to the positive input terminal of the operational amplifier, the other end of the second resistor is grounded, the fourth resistor is connected between the negative input terminal and the output terminal of the operational amplifier, one end of the fifth resistor is connected to the output terminal of the operational amplifier, the other end is the voltage output terminal of the operational amplifier circuit, and one end of the output capacitor is connected to the voltage output terminal of the operational amplifier circuit, and the other end is grounded.

[0018] Further, the acquisition unit and the FPGA main control unit are integrated into one body or are separate components from each other.

[0019] In a second aspect, the present application also provides a battery pack, including a battery pack and a battery management system connected to the battery pack, and the battery management system is the battery management system described above.

[0020] The above introduces a battery management system based on FPGA, including an FPGA main control unit and an acquisition unit; the acquisition unit is used to acquire battery state parameters of the battery pack; the FPGA main control unit includes an SPI (Serial Peripheral Interface) communication module, a comparison module, and an alarm output module; the SPI communication module is connected to the acquisition unit and is used to receive the battery state parameters, the comparison module is used to compare the battery state parameters with a preset parameter range, and the alarm output module is used to output an alarm message when the battery state parameters are not within the preset parameter range. In the present application, by setting an SPI communication module in the FPGA main control unit to receive battery state parameters, that is, data is transmitted between the FPGA main control unit and the acquisition unit through the SPI communication protocol, the data transmission efficiency can be improved to upload the data acquired by the acquisition unit to the FPGA main control unit in a timely manner. Description of the Drawings

[0021] Figure 1 is a schematic structural diagram of the battery management system provided by the present application;

[0022] Figure 2 is another schematic structural diagram of the battery management system provided by the present application

[0023] Figure 3 is still another schematic structural diagram of the battery management system provided by the present application;

[0024] Figure 4 is a circuit schematic diagram for the acquisition unit of the present application to implement voltage acquisition.

[0025] The reference numeral descriptions in the embodiments of the present application are as follows:

[0026] Battery management system: 100; FPGA main control unit: 10; SPI communication module: 11; Main SPI communication module: 111; Spare SPI communication module: 112; Main IIC communication module: 141; Spare IIC communication module: 142; Comparison module: 12; Alarm output module: 13; IIC communication module: 14; Storage module: 15; UART communication module: 16; Acquisition unit: 20; Acquisition module: 201; Battery pack: 30; Daisy chain communication chip: 40; Isolation chip: 50, 202; Equalization module: 60. Specific Embodiments

[0027] In order to make the objectives, technical solutions and advantages of the present application more clear and understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0028] Refer to Figure 1 , a battery management system 100 based on FPGA provided by an embodiment of the present application includes an FPGA main control unit 10 and a collection unit 20.

[0029] The collection unit 20 is used to collect battery state parameters of the battery pack 30; the FPGA main control unit 10 includes an SPI communication module 11, a comparison module 12, and an alarm output module 13; the SPI communication module 11 is connected to the collection unit 20 and is used to receive the battery state parameters collected by the collection unit 20. The comparison module 12 is connected to the SPI communication module 11 and is used to compare the battery state parameters with a preset parameter range. The alarm output module 13 is connected to the comparison module 12 and is used to output an alarm message when the battery state parameters are not within the preset parameter range.

[0030] In the battery management system 100 of the embodiment of the present application, by setting the SPI communication module 11 in the FPGA main control unit 10 to receive the battery state parameters, that is, data is transmitted between the FPGA main control unit 10 and the collection unit 20 through the SPI communication protocol. Compared with the existing UART communication protocol, the data transmission efficiency can be greatly improved. Thus, the data collected by the collection unit 20 can be uploaded to the FPGA main control unit 10 in time. If abnormal data appears, an alarm can be given in time through the alarm output module 13, improving safety. In addition, the battery management system 100 of the present application is implemented using FPGA, which can better adapt to complex and harsh operating environments such as high temperature, low temperature, and humidity, and is conducive to expanding the applicable scope and application field of the battery management system 100.

[0031] Among them, the battery state parameters may include, for example, battery voltage and temperature.

[0032] Further, as Figure 2 shown, the FPGA main control unit 10 further includes an IIC communication module 14 and a storage module 15. The IIC communication module 14 is connected to a first external device, and the first external device may be, for example, a host computer. The storage module 15 is connected to the IIC communication module 14 and the comparison module 12, and stores the preset parameter range. The IIC communication module 14 is used to implement IIC communication, and a program can be downloaded to the FPGA main control unit 10 through this module.

[0033] Among them, the FPGA unit 10 further includes a UART communication module 16, and the UART communication module 16 is connected to a second external device, and the second external device may be a terminal device such as a mobile phone or a tablet. The collected battery status parameters can be sent to the external device through the UART communication module 16 for easy viewing.

[0034] Continue to refer to Figure 2 , the battery management system 100 further includes a daisy chain communication chip 40, and the SPI communication module 11 is connected to the acquisition unit 20 through the daisy chain communication chip 40. Among them, an isolation chip 50 is provided between the acquisition unit 20 and the daisy chain communication chip 40. Compared with the CAN communication method, connecting in a daisy chain is beneficial to reducing costs and facilitating operation. Among them, the daisy chain communication chip 40 is a unidirectional daisy chain chip.

[0035] Furthermore, refer to Figure 3 , in the battery management system 100 of the embodiment of the present application, the SPI communication module 11 includes a main SPI communication module 111 and a standby SPI communication module 112, and both the main SPI communication module 111 and the standby SPI communication module 112 are respectively connected to the acquisition unit 20 and the comparison module 12. Among them, data transmission is preferentially performed between the main SPI communication module 111 and the acquisition unit 20. When the main SPI communication module 111 fails, the standby SPI communication module 112 is enabled to perform data transmission with the acquisition unit 20, thereby providing the reliability of the system.

[0036] In addition, the IIC communication module 14 includes a main IIC communication module 141 and a standby IIC communication module 142, and both the main IIC communication module 141 and the standby IIC communication module 142 are respectively connected to the first external device and the storage module 15. When the main IIC communication module fails, the standby IIC communication module is enabled to perform IIC communication work.

[0037] In the embodiments of the present application, the acquisition unit 20 acquires the voltages and temperatures of each single battery in the battery pack 30, that is, the battery state parameters include parameters such as the voltages and temperatures of each single battery in all battery packs 30. There can be multiple battery packs 30. The acquisition unit 20 includes multiple acquisition modules 201. Each acquisition module 201 is connected to one battery pack 30 and is used to acquire the parameters of each single battery in the corresponding battery pack 30. The multiple acquisition modules 201 are connected in sequence, and an isolation chip 202 is connected between adjacent acquisition modules 201. The function of the isolation chip 202 can avoid signal interference between the acquisition modules 201. The SPI communication module 11 is connected to one of the acquisition modules 201. The comparison module 12 is specifically used to compare the voltages of each single battery with a preset voltage range, and compare the temperature values of each single battery with a preset temperature range. If the voltage of a single battery is not within the preset voltage range, an alarm message is sent through the alarm output module 13, and if the temperature of a single battery is not within the preset temperature range, an alarm message is sent through the alarm output module 13. Of course, the comparison module 12 can also only compare whether the temperature of each single battery exceeds a preset temperature value. If the temperature of a single battery exceeds the preset temperature value, an alarm message is sent through the alarm output module 13.

[0038] In the embodiments of the present application, the FPGA main control unit 10 can be implemented by using an EF2L45LG144B chip, and the acquisition module 201 can be implemented by using a TI79616 chip.

[0039] In some embodiments, each of the battery packs 30 includes multiple single batteries, and the multiple single batteries are connected in series. Each of the acquisition modules 201 includes multiple operational amplifier circuits connected in one-to-one correspondence with the multiple single batteries. For example, the battery pack 30 includes 4 single batteries, namely the first single battery, the second single battery, the third single battery, and the fourth single battery connected in series in sequence. As Figure 4 shown, the connector P1 is a connector for connecting the battery. The negative electrode of the first single battery is connected to GND, the positive electrode of the first single battery is connected to the BAT1 pin of the connector P1, the negative electrode of the second single battery is connected to the BAT1 pin of the connector P1, the positive electrode of the second single battery is connected to the BAT2 pin of the connector P1, the negative electrode of the third single battery is connected to the BAT2 pin of the connector P1, and the positive electrode of the third single battery is connected to the BAT3 pin of the connector P1, and so on. Each of the acquisition modules 201 includes 4 operational amplifier circuits, namely operational amplifier circuits 2011 to 2014. The 4 operational amplifier circuits 2011 to 2014 are respectively used to acquire the voltages of the 4 first single batteries to the fourth single batteries in the battery pack.

[0040] The operational amplifier circuit 2011 includes an operational amplifier U11, a coupling capacitor C11, a first resistor R11, a second resistor R12, a third resistor R13, a fourth resistor R14, a fifth resistor R15, and an output capacitor C12. The operational amplifier circuit 2012 includes an operational amplifier U21, a coupling capacitor C21, a first resistor R21, a second resistor R22, a third resistor R23, a fourth resistor R24, a fifth resistor R25, and an output capacitor C22. The operational amplifier circuit 2013 includes an operational amplifier U31, a coupling capacitor C31, a first resistor R31, a second resistor R32, a third resistor R33, a fourth resistor R34, a fifth resistor R35, and an output capacitor C32. The operational amplifier circuit 2014 includes an operational amplifier U41, a coupling capacitor C41, a first resistor R41, a second resistor R42, a third resistor R43, a fourth resistor R44, a fifth resistor R45, and an output capacitor C42.

[0041] Taking the operational amplifier circuit 2011 as an example to describe the connection relationship of each device in the operational amplifier circuit. Specifically, the coupling capacitor C11 is connected between the positive and negative electrodes of the first single-cell battery. The positive input terminal of the operational amplifier U1 is connected to the positive electrode of the first single-cell battery, that is, the BAT1 pin of the connector P1, through the first resistor R11. The negative input terminal of the operational amplifier U1 is connected to the negative electrode of the first single-cell battery, that is, grounded, through the third resistor R13. One end of the second resistor R12 is connected to the positive input terminal of the operational amplifier U1, and the other end of the second resistor R12 is grounded to GND. The fourth resistor R14 is connected between the negative input terminal and the output terminal of the operational amplifier U1. One end of the fifth resistor R5 is connected to the output terminal of the operational amplifier U1, and the other end is the voltage output terminal Vout1 of the operational amplifier circuit 2011. One end of the output capacitor C12 is connected to the voltage output terminal Vout1 of the operational amplifier circuit 2011, and the other end is grounded to GND.

[0042] Among them, the resistance value of the fourth resistor R14 is half of the resistance value of the third resistor R13. The resistance value of the second resistor R12 is half of the resistance value of the first resistor R11. The fifth resistor R15 is used to adjust the output impedance and forms an integral circuit with the output capacitor C12, which can eliminate the high pulse signal output by the operational amplifier U11. Optionally, the resistance values of the first resistor R11 and the third resistor R13 can both be 200 kΩ, the resistance values of the second resistor R12 and the fourth resistor R14 can both be 100 kΩ, the resistance value of the fifth resistor R15 can be 75 Ω, the capacitance value of the coupling capacitor C11 is 0.1 uF, and the capacitance value of the output capacitor C12 is 10 nF. In other embodiments, the values of each component can be set according to actual needs, and no limitation is imposed on this.

[0043] Assume that the voltage of the BAT1 pin (i.e., the voltage of the first single cell) is VBAT1. After the voltage VBAT1 is divided by the first resistor R11 and the second resistor R12, the voltage input to the positive input terminal of the operational amplifier U11 is VBAT1 multiplied by 1 / 3. The gain G of the operational amplifier U11: G = (1 + R14 / R13) = 3 / 2; therefore, the voltage Vo1 output from the voltage output terminal Vout1 = VBAT1 * 1 / 3 * 3 / 2 = VBAT1 / 2, and thus half of the voltage value of the first single cell can be collected.

[0044] Similarly, through the operational amplifier circuits 2012 to 2014, half of the voltage values of the second single cell, the third single cell, and the fourth single cell can be collected respectively.

[0045] After half of the voltage values of each single cell are collected, multiplying half of the voltage values of each single cell by 2 can obtain the voltage of each single cell.

[0046] In the embodiment of the present application, the acquisition unit 20 can be integrated with the FPGA main control unit 10. For example, the acquisition unit 20 can be integrated in the FPGA main control unit 10. In this case, the FPGA main control unit 10 is directly connected to the battery pack, so as to collect the battery state parameters of the battery pack. Of course, the acquisition unit 20 can also be a split structure with the FPGA main control unit 10, that is, they are separate components from each other, and the two can be connected through a daisy chain communication method.

[0047] Among them, the acquisition period of the acquisition unit 20 can be controlled by the FPGA main control unit 10. In some embodiments, the battery state parameters include the core parameters and non-core parameters of the single cell. The core parameters are, for example, the voltage and temperature of the single cell, and the non-core parameters are, for example, the remaining power of the single cell. The acquisition unit 20 (i.e., each acquisition module 201) is configured to cyclically acquire the core parameters of the single cell using the first period, and cyclically acquire the non-core parameters of the single cell using the second period, and the first period is less than the second period. For the core parameters, a smaller period is used for acquisition, so that the FPGA main control unit 10 can timely obtain the voltage status and temperature status of each single cell to determine the highest voltage, the lowest voltage, the highest temperature, and the lowest temperature. According to the highest voltage and the lowest voltage, the charging and discharging of the battery can be controlled to prevent overcharging and over-discharging. And according to the highest temperature and the lowest temperature, the thermal diffusion situation between the batteries can be learned. For the non-core parameters, a longer period is used for acquisition, which can reduce the chip power consumption.

[0048] In some other embodiments, the core parameters can directly be the highest voltage and the lowest voltage among the voltage values of all the single cells, and the highest temperature and the lowest temperature among the temperature values of all the single cells. Specifically, the acquisition unit 20 can be directly configured to acquire the highest voltage, the lowest voltage, the highest temperature, and the lowest temperature in the first period, and transmit the highest voltage, the lowest voltage, the highest temperature, and the lowest temperature to the FPGA main control unit 10, so that the FPGA main control unit 10 can timely obtain the information of the highest voltage, the lowest voltage, the highest temperature, and the lowest temperature.

[0049] Continuing to refer to Figure 3 , the battery management system 100 of the present application further includes a balancing module 60. The balancing module 60 is respectively connected to the acquisition module 201 and the battery pack 30, and is used to perform balancing compensation on the battery pack 30 under the control of the acquisition module 201. Among them, there are multiple balancing modules 60, which are connected to the multiple battery packs 30 in one-to-one correspondence. More specifically, the balancing module 60 can be implemented by a voltage dividing resistor and a switching tube. Each single cell is connected to a voltage dividing resistor and a switching tube. By controlling the conduction of the switching tube, the single cell discharges. Among them, the comparison module 12 compares the voltages of the single cells in the same battery pack 30, and sends a control signal to the acquisition module 201 according to the voltage difference between the single cells, so that the acquisition module 201 controls the single cell with a higher voltage to discharge through the corresponding voltage dividing resistor according to the control signal, so that the voltages of the single cells in the battery pack 30 can be kept consistent, and the battery life can be extended. Among them, the switching tubes corresponding to the single cells in the same battery pack 30 can be alternately turned on in an odd-even control manner to perform the balancing operation.

[0050] An embodiment of the present application further provides a battery pack, including a battery pack and a battery management system connected to the battery pack, and the battery management system is the battery management system 100 described in the above embodiment.

[0051] The above introduced a battery management system based on FPGA, including an FPGA main control unit and a collection unit; the collection unit is used to collect the battery state parameters of the battery pack; the FPGA main control unit includes an SPI (Serial Peripheral Interface) communication module, a comparison module, and an alarm output module; the SPI communication module is connected to the collection unit and is used to receive the battery state parameters, the comparison module is used to compare the battery state parameters with a preset parameter range, and the alarm output module is used to output an alarm message when the battery state parameters are not within the preset parameter range. In this solution, by setting an SPI communication module in the FPGA main control unit to receive the battery state parameters, that is, data is transmitted between the FPGA main control unit and the collection unit through the SPI communication protocol. Compared with the existing UART communication protocol, the data transmission efficiency can be greatly improved, so that the data collected by the collection unit can be uploaded to the FPGA main control unit in time.

[0052] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0053] The above embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation to the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A battery management system based on FPGA, characterized in that: Including FPGA main control unit and acquisition unit; The acquisition unit is used to acquire battery status parameters of the battery pack; the FPGA main control unit includes an SPI communication module, a comparison module and an alarm output module; the SPI communication module is connected to the acquisition unit and is used to receive the battery status parameters; the comparison module is connected to the SPI communication module and is used to compare the battery status parameters with a preset parameter range; the alarm output module is connected to the comparison module and is used to output alarm information when the battery status parameters are not within the preset parameter range.

2. The battery management system according to claim 1, characterized in that: The SPI communication module includes a main SPI communication module and a standby SPI communication module, and the main SPI communication module and the standby SPI communication module are respectively connected to the acquisition unit and the comparison module.

3. The battery management system according to claim 1, characterized in that: The FPGA main control unit also includes an IIC communication module and a storage module. The IIC communication module is connected to the first external device. The storage module is connected to the IIC communication module and the comparison module, and stores the preset parameter range.

4. The battery management system according to claim 3, characterized in that: The IIC communication module includes a main IIC communication module and a standby IIC communication module, and the main IIC communication module and the standby IIC communication module are respectively connected to the first external device and the storage module.

5. The battery management system according to claim 1, characterized in that: The FPGA main control unit also includes a UART communication module, and the UART communication module is connected to the second external device.

6. The battery management system according to claim 1, characterized in that: The battery management system further includes a daisy chain communication chip, and the SPI communication module is connected to the acquisition unit via the daisy chain communication chip.

7. The battery management system according to claim 1, characterized in that: The battery management system further comprises a balancing module, which is connected to the acquisition unit and the battery pack respectively and is used for performing balancing compensation on the battery pack.

8. The battery management system according to any one of claims 1 to 7, characterized in that: The number of the battery packs is multiple; The acquisition unit comprises a plurality of acquisition modules connected in sequence, and an isolation chip is connected between adjacent acquisition modules; Each of the acquisition modules is connected to a corresponding battery pack, and the SPI communication module is connected to one of the acquisition modules.

9. The battery management system according to claim 8, characterized in that: Each of the battery packs includes a plurality of single cells, the plurality of single cells are connected in series, and each of the acquisition modules includes a plurality of operational amplifier circuits connected one-to-one with the plurality of single cells; The operational amplifier circuit includes an operational amplifier, a coupling capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and an output capacitor; the coupling capacitor is connected between the positive electrode and the negative electrode of the corresponding single battery, the positive input terminal of the operational amplifier is connected to the positive electrode of the corresponding single battery through the first resistor, the negative input terminal of the operational amplifier is connected to the negative electrode of the corresponding single battery through the third resistor, one end of the second resistor is connected to the positive input terminal of the operational amplifier, the other end of the second resistor is grounded, the fourth resistor is connected between the negative input terminal and the output terminal of the operational amplifier, one end of the fifth resistor is connected to the output terminal of the operational amplifier, and the other end is the voltage output terminal of the operational amplifier circuit, one end of the output capacitor is connected to the voltage output terminal of the operational amplifier circuit, and the other end is grounded.

10. The battery management system according to any one of claims 1 to 7, characterized in that: The acquisition unit and the FPGA main control unit are integrated into one, or they are separate components.

11. A battery pack, characterized in that: It comprises a battery pack and a battery management system connected to the battery pack, wherein the battery management system is the battery management system according to any one of claims 1 to 10.

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