Temperature control head for multi-core chip test and base of temperature control head
By dividing multiple temperature control areas on the temperature control head base of the chip test equipment and designing sub-thermal blocks of different shapes, the problem of multi-core chip temperature distribution is solved, and the precise control and uniform distribution of the temperature in each area of the chip is achieved.
Patent Information
- Application Number
- CN202422006075.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-19
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2034-08-19
AI Technical Summary
Existing chip testing equipment cannot effectively deal with the multi-center distribution problem of multi-core chips, making it difficult to accurately control the temperature of each part of the chip.
A temperature control head base for multi-core chip testing is designed. By dividing multiple corresponding temperature control areas on the base body, and setting a thermal block below the base body, including a plurality of sub-thermal blocks corresponding to the temperature control area, there are different heat transfer channel shapes between the sub-thermal blocks to independently control the temperature of each temperature control area.
Accurate control of the temperature of each area of the chip is achieved. Through independent heaters, temperature sensors and PID calculation methods, the temperature of each temperature control area can be dynamically adjusted to ensure that the overall temperature distribution of the chip is more uniform.
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Figure CN222926987U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of semiconductor testing equipment, and particularly relates to a testing equipment for temperature control in the back-end testing of semiconductors (such as chips), such as but not limited to ATE, SLT, probe stations and other equipment. Background Technique
[0002] In the semiconductor-related industry, temperature control and heat dissipation are technologies that are often used. For example, in the package testing of semiconductor chips, temperature control heads are used in ATE automatic testing equipment and SLT system-level testing, which require precise control of temperature and rapid response ability to temperature. In a computer's CPU or a laser machine, it is required to quickly remove the heat generated by the equipment.
[0003] In the back-end package testing of semiconductors, such as ATE automatic testing equipment, SLT (system level test) system-level testing or Burn In testing, the design of the cold plate or heat sink plate on the temperature control head refers to the design used to transfer heat from the device under test (DUT) chip to the heat sink plate or heat exchanger. The purpose of this module is to dissipate heat to prevent overheating, or ATC (Active Thermal Control) is used to maintain a stable test temperature environment.
[0004] Currently, with the use of novel packaging technologies such as SOC, SIP, and Chiplet advanced packaging, the chip size is getting larger, the power is getting higher, and the structure and function are getting more complex. A chip may integrate multiple small chips (modules, DIEs) with different functions, performances, and processes. Their thicknesses and heat generation powers will vary. The emergence of these novel chips has put forward higher requirements for traditional back-end chip testing.
[0005] Traditional temperature control heads, such as Figures 1-3 shown, have two basic functions: 1. Provide uniform pressure on the chip under test; 2. Adjust and stabilize the temperature of the chip under test by heating and cooling.
[0006] As Figure 3 shown, the traditional temperature control head includes a lid. This lid generally includes at least one water inlet and at least one water outlet for the inlet and outlet of the coolant. The lid may also include some diversion channels for coolant diversion to make the distribution of the coolant more uniform and the hydraulic difference smaller.
[0007] After the coolant is diverted by the lid, it flows through the heat dissipation structure inside the radiator, such as but not limited to fin structure (fin-shaped structure thin sheet), and can effectively absorb the heat on the radiator.
[0008] AsFigure 3 The temperature control head shown contains two inner and outer sealing rings (inner sealing ring and outer sealing ring) to seal the gap between the lid and the radiator and prevent coolant leakage. The sealing ring here can be replaced by other methods, such as welding (friction welding, soldering, silver soldering), etc. to prevent coolant leakage.
[0009] The base is a replaceable module between the temperature control head and the device under test (DUT). Its size mainly depends on the size of the DUT.
[0010] For DUTs with different sizes, functions and structures, in order to save costs, generally, the lid, the inner and outer sealing rings, and the radiator are fixed and not replaced. If the DUT is replaced and the chip size is also different, then the user only needs to design and replace a new base accordingly.
[0011] TIM (thermal interface material) is a thermal interface filling material between the radiator and the base. Since both the radiator and the base are machined solid materials (commonly metals), no matter how their surfaces are processed, there will be a certain roughness, which will greatly reduce the interface thermal conductivity and lead to a reduction in the cooling performance. Therefore, TIM will be applied to this interface. After being squeezed, it will fill the tiny gaps at the interface, which can increase the thermal conductivity of this interface. Sometimes, a layer of TIM ( Figure 3 not shown) is also installed between the base and the DUT.
[0012] The radiator is mainly used for heat absorption. If the temperature of the DUT rises, then the radiator can absorb the excess heat and quickly reduce the temperature of the DUT to a range (such as + / - 1 degree) around the target temperature.
[0013] However, if the temperature of the DUT is too low, then the temperature control head needs to actively release heat (such as but not limited to by means of electric heating) to raise the temperature of the DUT to the target temperature range. Therefore, the temperature control head can also have a built-in heating function as needed.
[0014] The heater of the temperature control head may be installed in the radiator or the base, or both may contain heaters. Common types of heaters include but are not limited to cartridge heaters, ceramic heaters, printed film heaters, etc.
[0015] Another type of heating / cooling component is the TEC (Thermo-Electric Cooler, or called Peltier heater (Peltier thermoelectric cooling module, thermopile heater)), which has both heating and heat absorption functions. It heats or cools by changing the direction of the current.
[0016] Figures 1 to 3 The structure of the traditional temperature control head shown is mainly applicable to small-sized chips, such as those with a size of 40x40mm or smaller. Because small chips made by traditional processes mainly contain a silicon-based DIE (die, bare chip) with a main function, and its heat generation is uniform (in the planar structure), so, using a single base is sufficient.
[0017] However, for chips with novel advanced packaging processes, such as SOC / SIP or chiplet, various small chips (modules, DIEs) with different functions, different structures, and different heat generation powers are integrated inside. Therefore, during their operation, the heat generation power of each individual small module (small chip) is inconsistent, and in terms of the time line, they do not generate heat synergistically, but randomly. This results in uneven heat generation at different positions on the surface of the overall chip, and the heat generation power is also unpredictable. Therefore, the traditional single-base solution does not work. Summary of the Invention
[0018] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to solve the problem that the multi-core chip's temperature multi-center distribution cannot be dealt with in existing chip tests.
[0019] The solution of this application provides a temperature control head base for multi-core chip testing, including:
[0020] A base body and a heat conduction block; the upper end surface and the lower end surface of the base body are divided into a plurality of corresponding temperature control areas, the heat conduction block is arranged on the lower end surface of the base body, and includes a plurality of sub-heat conduction blocks respectively corresponding to the temperature control areas, and different heat transfer channel shapes are provided between the plurality of sub-heat conduction blocks.
[0021] Specifically, holes or through holes can be provided in the middle of the sub-heat conduction block as needed.
[0022] Specifically, one end of the sub-heat conduction block is connected, and the other end is separated at least to the middle.
[0023] Specifically, the heat conduction block is composed of a plurality of sub-heat conduction blocks with different shapes.
[0024] It also provides a temperature control head for multi-core chip testing, including the temperature control head base described in any one of the above technical solutions.
[0025] Furthermore, it further includes one or more radiators, and the plurality of radiators are respectively arranged in different temperature control areas on the upper end surface of the base body.
[0026] Furthermore, the radiator and the temperature control head base are integrally formed.
[0027] The improvements of the present application bring the following advantages: The thermal control contact surface between the base body and the chip to be tested is partitioned and cut, and independently controlled. The contact surface is effectively divided into multiple temperature control regions at the physical and mechanical levels to minimize heat transfer and interference between adjacent regions. This enables each temperature control region to be equipped with an independent heater and temperature sensor, and each temperature control region has its own independent PID calculation method: PID calculation is performed through the temperature sensor belonging to its own region, and then the heating power of the heater is controlled to control the temperature. In some cases, each region also has its own independent cooling module (radiator and cooling PID control module). Thus, precise control of the temperatures of each region of the chip is achieved. Description of the Drawings
[0028] Figure 1 is a three-dimensional structural schematic diagram of an existing temperature control head;
[0029] Figure 2 is a cross-sectional structural schematic diagram of an existing temperature control head;
[0030] Figure 3 is an exploded view of an existing temperature control head;
[0031] Figure 4 is a three-dimensional structural schematic diagram of a temperature control head for multi-core chip testing according to an embodiment of the present application;
[0032] Figure 5 is another three-dimensional structural schematic diagram of a temperature control head for multi-core chip testing according to an embodiment of the present application;
[0033] Figure 6 is an exploded view of a temperature control head for multi-core chip testing according to an embodiment of the present application;
[0034] Figure 7 is an exploded view of a temperature control head for multi-core chip testing according to another embodiment of the present application;
[0035] Figure 8 is an exploded view of a temperature control head for multi-core chip testing according to another embodiment of the present application;
[0036] Figure 9 is an exploded view of a temperature control head for multi-core chip testing according to another embodiment of the present application;
[0037] Wherein, 1. cover, 2. inner sealing ring, 3. outer sealing ring, 4. radiator, 5. TIM layer, 6. base, 7. temperature control head base, 71. base body, 711. upper end face, 712. lower end face, 72. heat conducting block, 721. sub-heat conducting block. Detailed Embodiments
[0038] The following describes the implementation manners of the present utility model through specific examples. Those skilled in the art can easily understand other advantages and effects of the present utility model from the content disclosed in this specification. The present utility model can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present utility model.
[0039] In the chip packaging and testing process, the existing temperature control heads cannot handle the problems caused by the multi-center temperature distribution of multi-core chips. The existing temperature control heads can only monitor one temperature measurement point. The larger the chip size and the more heat-generating cores, the more difficult it is to precisely control the temperature of each part of the chip. Therefore, the following embodiments are proposed in this application to solve the above problems.
[0040] Please refer to Figures 4-9 , an embodiment of this application, a temperature control head for multi-core chip testing, mainly includes a temperature control head base 7 and a radiator 4. The temperature control head base 7 includes a base main body 71 and a heat conduction block 72 provided below the base main body 71.
[0041] The base main body 71 is generally in a relatively flat cuboid shape or other shapes, including an upper end surface 711 and a lower end surface 712 arranged oppositely. Its upper end surface 711 and lower end surface 712 are respectively divided into a plurality of corresponding temperature control regions, which means that the temperature control regions on the upper end surface 711 and the lower end surface 712 are in one-to-one correspondence and are arranged oppositely. For example, as Figures 4-7 shown, it is divided into three temperature control regions: left, middle, and right. Each temperature control region on the lower end surface 712 of the base main body 71 corresponds to a sub-heat conduction block 721. Of course, dividing into 3 temperature control regions in this example is only used to illustrate this embodiment. The actual division situation needs to be strictly calculated according to the distribution of the small DIE modules of the DUT chip to be tested and its heat generation power and designed accordingly. For example, it can be divided into 2, 4, 5, 6... temperature control regions.
[0042] The heat conduction block 72 is generally in a cuboid shape or other shapes as a whole, including a plurality of sub-heat conduction blocks 721. The heat conduction block 72 is installed at the lower end surface 712 of the base main body 71, and the plurality of sub-heat conduction blocks 721 are respectively arranged in one-to-one correspondence with the temperature control regions.
[0043] The temperature control head base 7 corresponds to the main heating DIE area of the chip under test (DUT), and the chip under test contains multiple modules and DIEs. The heating of each module and DIE is generally independent of each other. At a certain moment, one of them may be heating, while the other is not heating or has a very low heating power. However, after a period of time, the situation changes, with one not heating and the other having a significantly increased heating power. In this application, by dividing the temperature control area and using the sub-thermal conduction blocks 721 corresponding to the temperature control area to respectively control the temperature of a main heating module and DIE, each sub-thermal conduction block 721 and the temperature control area can more specifically adjust the temperature (heat dissipation or heating) of the corresponding main heating module and DIE, thereby achieving the effect of more precisely regulating the temperature of each part of the chip.
[0044] As an embodiment, the sub-thermal conduction block 721 is made of a material with low thermal conductivity or high thermal conductivity, or a material with low thermal conductivity or high thermal conductivity is provided between the sub-thermal conduction block 721 and the base body 71.
[0045] As a specific example, when the DIE corresponding to the sub-thermal conduction block 721 is a low-power module on the chip under test, such as a memory chip, since the power is relatively lower than that of other modules on the chip under test, a high cooling power may not be required. The sub-thermal conduction block 721 corresponding to it can be made of a material with low thermal conductivity, or a material with low thermal conductivity can be provided between the sub-thermal conduction block 721 and the base body 71, which can prevent the temperature of the temperature control area here from being too low.
[0046] As a specific example, when the DIE corresponding to the sub-thermal conduction block 721 is a high-power module on the chip under test, such as a computing module DIE, since the heating power of the computing module DIE is relatively high, the sub-thermal conduction block 721 corresponding to it can be made of a material with high thermal conductivity, or a material with high thermal conductivity can be provided between the sub-thermal conduction block 721 and the base body 71, which can prevent the temperature of the temperature control area here from being too high.
[0047] As an improvement, the sub-thermal conduction block 721 is made of a material with a thermal expansion coefficient similar to or the same as that of the base body 71, which can effectively enable the temperature control head base 7 to apply pressure to the chip under test more evenly when the temperature changes.
[0048] As an improvement, since the chip under test encapsulated with novel and advanced technology contains multiple modules, the thickness of different module areas may vary at different temperatures. Therefore, the sub-thermal conduction block 721 is connected to the base body 71 through an elastic material to adapt to the thickness changes between different DIEs of the chip under test. The thickness and mechanical properties of the elastic material need to be calculated to ensure the uniformity of the overall pressure on the contact surface between the base body 71 and the chip under test and that the temperature of the contact surface meets the design requirements. The elastic material includes but is not limited to rubber pads, silicone pads, springs, etc.
[0049] As an embodiment, the temperature control area division needs to be calculated and divided according to the module positions and powers on the real DUT and the difficulty of processing (cutting and assembling) techniques, and the actual sizes of each module and DIE on the DUT need to be considered for dividing the temperature control areas. At the same time, the shape design of the heat transfer channels can also be selected according to the actual heat generation of each module and DIE of the DUT, so that there are heat transfer channels with different shapes between multiple sub-thermal conduction blocks 721. For example, a standard cuboid shape, a cuboid shape with a through hole in the middle, or a cuboid-like shape with a trapezoidal cross-section, etc.
[0050] As a specific example, the middle of the sub-thermal conduction block 721 corresponding to the DUT module with lower heat generation is hollowed out to form a cavity or a through hole, as Figure 7 shown; or the side is narrowed and shrunk, as Figure 8 shown; to control the shape of its (vertical direction) heat conduction path to adapt to different DUT heat generation modules.
[0051] As a specific example, among them Figure 4 , 5 , the thermal conduction block 72 in 7 is designed to be composed of three sub-thermal conduction blocks 721, and the cutting number "three" is only for illustration.
[0052] As a specific example, one end of the thermal conduction block 72 is cut into multiple sub-thermal conduction blocks 721, while the other end remains connected and not separated, or is cut into more (the cutting number such as 2, 3, 4,... specifically depends on the chip structure and processing difficulty) complex-shaped independent block structures and then assembled together.
[0053] As a specific example, as Figure 8 shown, a complete thermal conduction block 72 is formed by piecing together multiple (the cutting number such as 2, 3, 4,... specifically depends on the chip structure and processing difficulty) sub-thermal conduction blocks 721 with different shapes.
[0054] As an embodiment, the radiator 4 is arranged on the upper end surface 711 of the base body 71.
[0055] As one of the specific examples, only one radiator 4 is arranged.
[0056] As one of the specific examples, if space and processing techniques permit, it is preferred to arrange multiple radiators 4, and the multiple radiators 4 are respectively arranged in different temperature control areas on the upper end surface 711 of the base body 71, and try to make each temperature control area be able to independently control the temperature reduction. Preferably, the radiator 4 is a TEC (Thermoelectric cooler semi-conductor refrigerator).
[0057] As an improvement, a TIM layer 5 is also provided between the radiator 4 and the base body 71.
[0058] As an improvement, in order to increase the heat dissipation efficiency, if cost is not considered, a more effective TIM layer 5 (such as liquid TIM, or liquid metal TIM, or phase change material TIM) can be replaced. Or in an extreme case, the TIM layer 5 is designed to be removed, and the radiator 4 and the temperature control head base 7 are integrally formed, with no gap and no TIM layer 5 in between. This can greatly increase the heat dissipation efficiency and effectively reduce the temperature of the high-power DUT.
[0059] As one specific example, it further includes a cover 1 provided on the radiator 4, an inner sealing ring 2 and an outer sealing ring 3 provided on the inner and outer sides of the cover 1.
[0060] As an embodiment, it further includes one or more heaters, and the multiple heaters are respectively provided in different temperature control areas on the upper end surface 711 of the base body 71. Through the reasonable distributed layout of the multiple electric heaters, the temperature of each temperature control area can be dynamically and real-time adjusted, making the overall temperature distribution of the chip more uniform.
[0061] As an embodiment, it further includes multiple temperature sensors, and the multiple temperature sensors are respectively provided in different temperature control areas. Through the distributed monitoring of the multiple temperature sensors, the planar temperature distribution of the chip can be observed more effectively, and the temperature change and dynamic distribution of the chip at each moment can be understood in more detail.
[0062] The above is only the preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. A temperature control head base for multi-core chip testing, characterized in that: It includes a base body and a heat-conducting block; the upper end surface and the lower end surface of the base body are divided into a plurality of corresponding temperature control areas; the heat-conducting block is arranged on the lower end surface of the base body, and includes a plurality of sub-heat-conducting blocks respectively arranged corresponding to the temperature control areas, and the plurality of sub-heat-conducting blocks have different heat transfer channel shapes.
2. The temperature control head base according to claim 1, characterized in that: A cavity or a through hole is provided in the middle of the sub-heat conducting block.
3. The temperature control head base according to claim 1, characterized in that: The sub-heat-conducting blocks are connected at one end and separated at the other end at least to the middle.
4. The temperature control head base according to claim 1, characterized in that: The heat conducting block is composed of a plurality of heat conducting sub-blocks of different shapes.
5. A temperature control head for multi-core chip testing, characterized in that: It comprises the temperature control head base as described in any one of claims 1 to 4.
6. The temperature control head according to claim 5, characterized in that: It also includes one or more radiators, and the multiple radiators are respectively arranged on the upper end surface of the base body in correspondence with different temperature control areas.
7. The temperature control head according to claim 6, characterized in that: The radiator and the temperature control head base are integrally formed.