Wireless U-segment transmitting circuit
By introducing signal amplification circuit and filtering circuit into the wireless U-segment transmission circuit, the problems of poor anti-interference ability and serious noise in the prior art are solved, and more stable and accurate signal transmission is achieved.
Patent Information
- Application Number
- CN202421554539.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-02
- Publication Date
- 2025-05-30
- Estimated Expiration
- 2034-07-02
AI Technical Summary
The signal anti-interference ability of the existing wireless U-segment signal transmitting circuit is poor, and there is a lot of noise in the signal, which seriously affects the demodulation processing at the receiver.
A wireless U-segment transmitting circuit is designed, including a U-segment signal generation circuit, a signal amplification circuit and a filtering circuit connected in sequence. The U-segment signal is power amplified through the signal amplification circuit and filtered through the filtering circuit to reduce noise and improve the accuracy of the signal frequency.
Through the processing of signal amplification circuit and filtering circuit, the stability of the circuit is improved, the noise in the signal is reduced, the accuracy and accuracy of the signal frequency is improved, and the difficulty of demodulation processing of the signal at the receiving end is reduced.
Smart Images
Figure CN222928387U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of radio frequency circuits. Specifically, this application relates to a wireless U-band transmission circuit. Background Art
[0002] Wireless U-band (Ultra-High Frequency, UHF) refers to the radio frequency band with a frequency range between 3000 MHz and 3 GHz. This frequency band plays a crucial role in modern communication systems, and its application fields include but are not limited to mobile communication, satellite communication, wireless local area network, radar, television broadcasting, Internet of Things (IoT), wireless microphone, and drone communication, etc.
[0003] In the prior art, a U-band signal generation circuit that generates U-band signals is connected to an antenna to form a signal transmission circuit. The signal transmitted by this signal transmission circuit has poor anti-interference ability, and there is a large amount of noise in the signal, seriously affecting the demodulation processing at the receiving end. Utility Model Content
[0004] Embodiments of this application provide a wireless U-band transmission circuit, which can solve the problems that the signal transmitted by the existing signal transmission circuit has poor anti-interference ability, there is a large amount of noise in the signal, and it seriously affects the demodulation processing at the receiving end. To achieve this purpose, the embodiments of this application provide the following several solutions.
[0005] According to one aspect of the embodiments of this application, a wireless U-band transmission circuit is provided, including a U-band signal generation circuit, a signal amplification circuit, and a filtering circuit connected in sequence. The output end of the filtering circuit is connected to an antenna;
[0006] The U-band signal generation circuit is configured to trigger the generation of a U-band signal after receiving a U-band signal generation instruction, and transmit the U-band signal to the signal amplification circuit;
[0007] The signal amplification circuit is configured to amplify the power of the U-band signal and transmit the amplified U-band signal to the filtering circuit for filtering processing.
[0008] In a possible implementation manner, the U-band signal generation circuit includes a first crystal oscillator circuit and a modulation chip. The signal output end of the modulation chip is connected to the signal amplification circuit, and the model of the modulation chip includes LMX2571;
[0009] The first crystal oscillator circuit includes a second crystal oscillator, a ninth resistor, and a twenty-fifth capacitor. The first end of the ninth resistor is connected to a power supply, the second end is connected to the enable / standby pin of the second crystal oscillator, and the output pin of the second crystal oscillator is connected to the clock signal input / output end of the modulation chip.
[0010] In a possible implementation, the signal amplification circuit includes a radio frequency amplifier, a fourth inductor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor, and a twentieth capacitor. The signal input terminal of the radio frequency amplifier is connected to the U-band signal generation circuit. The signal output terminal of the radio frequency amplifier is connected to the signal input terminal of the filtering circuit and the first end of the fourth inductor. The second end of the fourth inductor is connected to the first ends of the eighteenth capacitor, the nineteenth capacitor, the twentieth capacitor, and a second power supply. The second ends of the eighteenth capacitor, the nineteenth capacitor, and the twentieth capacitor are grounded.
[0011] In a possible implementation, the signal amplification circuit further includes a second inductor, a fifth inductor, a sixteenth capacitor, and a fifteenth capacitor. The first end of the second inductor is connected to the first end of the sixteenth capacitor and the output terminal of the signal generation circuit. The second end of the second inductor is grounded and connected to the second end of the fifth inductor. The first end of the fifth inductor is connected to the second end of the sixteenth capacitor and the first end of the fifteenth capacitor. The second end of the fifteenth capacitor is connected to the signal output terminal of the radio frequency amplifier.
[0012] In a possible implementation, the filtering circuit includes a twenty-first capacitor, a sixth inductor, an eighteenth capacitor, a seventh inductor, and a band-pass filter. The first end of the twenty-first capacitor is connected to the output terminal of the signal amplification circuit. The second end of the twenty-first capacitor is connected to the first ends of the sixth inductor and the eighteenth capacitor. The second end of the sixth inductor is grounded and connected to the second end of the seventh inductor and the ground terminal of the band-pass filter. The first end of the seventh inductor is connected to the second end of the eighteenth capacitor and the signal input terminal of the band-pass filter.
[0013] In a possible implementation, the filtering circuit further includes a ninth inductor, an eighth inductor, and a thirty-second capacitor. The second end of the ninth inductor is grounded and connected to the second end of the eighth inductor. The first end of the ninth inductor is connected to the signal output terminal of the band-pass filter and the first end of the thirty-second capacitor. The first end of the eighth inductor is connected to the second end of the thirty-second capacitor and the antenna.
[0014] In a possible implementation, it further includes a control module provided with a reset circuit and a control chip. The instruction output terminal of the control chip is connected to the modulation chip;
[0015] The reset circuit includes a twenty-fourth resistor and a thirty-first capacitor. The first end of the twenty-fourth resistor is connected to a second power supply. The second end of the twenty-fourth resistor is connected to the first end of the thirty-first capacitor and the control chip. The second end of the thirty-first capacitor is grounded.
[0016] In a possible implementation, the control module includes a startup mode setting circuit, and the startup mode setting circuit includes a twenty-third resistor, a twenty-second resistor, and a first interface. The first end of the twenty-third resistor is connected to the second end of the first interface and the control chip, the second end of the twenty-third resistor is connected to the second power supply, the first end of the twenty-second resistor is connected to the second end of the first interface, and the second end of the twenty-second resistor is grounded.
[0017] In a possible implementation, the control module includes a second crystal oscillator circuit, and the second crystal oscillator circuit includes a first crystal oscillator, a twenty-ninth capacitor, and a thirtieth capacitor. The first end of the twenty-ninth capacitor is grounded, the second end is connected to the first pin of the first crystal oscillator and the first clock signal terminal of the control chip. The third pin of the first crystal oscillator is connected to the second clock signal terminal of the control chip and the second end of the thirtieth capacitor. The first end of the thirtieth capacitor is grounded, and the second and fourth pins of the first crystal oscillator are grounded.
[0018] In a possible implementation, the control module further includes a serial port download circuit and a memory expansion circuit, and the control chip is respectively connected to the serial port download circuit and the memory expansion circuit.
[0019] The beneficial effects brought by the technical solution provided by the embodiments of the present application are:
[0020] The wireless U-band transmission circuit provided by the present application includes a U-band signal generation circuit, a signal amplification circuit, and a filtering circuit connected in sequence. The output end of the filtering circuit is connected to the antenna; the U-band signal generation circuit is used to trigger the generation of a U-band signal after receiving a U-band signal generation instruction and transmit the U-band signal to the signal amplification circuit; the signal amplification circuit is used to perform power amplification on the U-band signal and transmit the amplified U-band signal to the filtering circuit for filtering processing. In the embodiments of the present application, the generated U-band signal is respectively subjected to power amplification processing and filtering processing through the signal amplification circuit and the filtering circuit. The embodiments of the present application can improve the stability of the circuit and achieve the attenuation of harmonics in the signal, greatly reduce the noise in the signal, improve the accuracy and precision of the signal frequency, and effectively reduce the difficulty of the receiving end in demodulating the signal. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for description in the embodiments of the present application.
[0022] Figure 1 It is a structural diagram of the wireless U-band transmission circuit provided by the embodiments of the present application;
[0023] Figure 2 Circuit diagram of the modulation chip and the first crystal oscillator circuit provided by the embodiment of the present application;
[0024] Figure 3 Circuit diagram of the signal amplification circuit and the filter circuit provided by the embodiment of the present application;
[0025] Figure 4 Circuit diagram of the control chip and the power supply filter circuit provided by the embodiment of the present application;
[0026] Figure 5 Circuit diagram of the reset circuit provided by the embodiment of the present application;
[0027] Figure 6 Circuit diagram of the startup mode setting circuit provided by the embodiment of the present application;
[0028] Figure 7 Circuit diagram of the second crystal oscillator circuit provided by the embodiment of the present application;
[0029] Figure 8 Circuit diagram of the serial port download circuit provided by the embodiment of the present application;
[0030] Figure 9 Circuit diagram of the memory expansion circuit provided by the embodiment of the present application.
[0031] Label description: U1, modulation chip; X2, second crystal oscillator; R9, ninth resistor; C25, twenty-fifth capacitor; R1, first resistor; C13, thirteenth capacitor; C12, twelfth capacitor; U2, RF amplifier; L4, fourth inductor; C17, seventeenth capacitor; C18, eighteenth capacitor; C19, nineteenth capacitor; C20, twentieth capacitor; L2, second inductor; L5, fifth inductor; C16, sixteenth capacitor; C15, fifteenth capacitor; C21, twenty-first capacitor; L6, sixth inductor; C18, eighteenth capacitor; L7, seventh inductor; U3, band-pass filter; L9, ninth inductor; L8, eighth inductor; C32, thirty-second capacitor; U7, control chip; R24, twenty-fourth resistor; C31, thirty-first capacitor; L3, bead; R23, twenty-third resistor; R22, twenty-second resistor; H1, first interface; X1, first crystal oscillator; C29, twenty-ninth capacitor; C30, thirtieth capacitor; CN1, serial port; U8, flash memory chip. Detailed implementation manners
[0032] The embodiments of the present application will be described below with reference to the accompanying drawings in the present application. It should be understood that the embodiments described below in conjunction with the accompanying drawings are exemplary descriptions for explaining the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions of the embodiments of the present application.
[0033] Those skilled in the art can understand that, unless specifically stated otherwise, the singular forms "a", "an", "the", and "said" used herein may also include the plural forms. It should be further understood that the terms "comprising" and "including" used in the embodiments of the present application mean that the corresponding features can be implemented as the presented features, information, data, steps, operations, elements, and / or components, but do not exclude the implementation of other features, information, data, steps, operations, elements, components, and / or their combinations supported by the technical field of the present invention. It should be understood that when we say an element is "connected" or "coupled" to another element, the one element can be directly connected or coupled to the other element, or it can mean that the one element and the other element establish a connection relationship through an intermediate element. In addition, the "connection" or "coupling" used herein can include wireless connection or wireless coupling. The term "and / or" used herein indicates at least one of the items defined by the term, for example, "A and / or B" indicates the implementation as "A", or the implementation as "A", or the implementation as "A and B".
[0034] To make the objectives, technical solutions, and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.
[0035] The technical solutions of the embodiments of the present application and the technical effects produced by the technical solutions of the present application will be described below through the description of several exemplary embodiments. It should be noted that the following embodiments can be referred to, learned from, or combined with each other. For the same terms, similar features, and similar implementation steps in different embodiments, they will not be described repeatedly.
[0036] The wireless U-band transmitting circuit provided by the present application aims to solve at least one technical problem existing in the prior art.
[0037] In the embodiments of the present application, a wireless U-band transmitting circuit is provided, as Figures 1-9 shown. The wireless U-band transmitting circuit includes a U-band signal generation circuit, a signal amplification circuit, and a filtering circuit connected in sequence. The output end of the filtering circuit is connected to the antenna. The U-band signal generation circuit is used to trigger the generation of a U-band signal after receiving a U-band signal generation instruction and transmit the U-band signal to the signal amplification circuit. The signal amplification circuit is used to amplify the power of the U-band signal and transmit the amplified U-band signal to the filtering circuit for filtering processing. Among them, through the power amplification effect of the signal amplification circuit, the power of the transmitted U-band signal is increased, so that it is less likely to be interfered, and the stability of the wireless U-band transmitting circuit is better.
[0038] Optionally, the wireless U-band transmitting circuit may further include a control module. The control module is connected to the U-band signal generation circuit, generates a U-band signal generation instruction based on the data and instructions to be transmitted, and sends the instruction to the U-band signal generation circuit.
[0039] Optionally, the U-band signal generation circuit includes a first crystal oscillator circuit and a modulation chip U1. The signal output terminal of the modulation chip U1 is connected to the signal amplification circuit. The model of the modulation chip U1 includes LMX2571. The first crystal oscillator circuit includes a second crystal oscillator X2, a ninth resistor R9, and a twenty-fifth capacitor C25. The first end of the ninth resistor R9 is connected to the power supply, the second end is connected to the enable / standby pin of the second crystal oscillator X2, and the output pin of the second crystal oscillator X2 is connected to the clock signal input / output terminal of the modulation chip U1.
[0040] In one embodiment, the model of the modulation chip U1 is LMX2571. This chip has a new FastLock technology, which shortens the locking time and makes the frequency change response time shorter. And the integer boundary glitch removal technology of the chip can significantly reduce the phase noise amplitude and improve the stability of the circuit. Among them, the signal generation circuit further includes a first resistor R9, a thirteenth capacitor C13, and a twelfth capacitor C12. The first end of the first resistor R9 is connected to the first end of the thirteenth capacitor C13, the first end of the twelfth capacitor C12, and the twenty-fifth pin of the modulation chip U1. The second ends of the thirteenth capacitor C13 and the twelfth capacitor C12 are grounded.
[0041] Optionally, the first crystal oscillator circuit serves as an external input crystal oscillator of the modulation chip U1. Through the clock signal of this first crystal oscillator circuit, frequency doubling operation is realized inside the modulation chip U1. Among them, the voltage terminal of the second crystal oscillator X2 is connected to the power supply, and the ground terminal is grounded.
[0042] Optionally, the transmission frequency of the transmission coil and the reception frequency of the reception coil may include multiple frequencies, and the specific values of the transmission frequency and the reception frequency are adjusted according to actual detection requirements.
[0043] Optionally, the signal amplification circuit includes a radio frequency amplifier U2, a fourth inductor L4, a seventeenth capacitor C17, a nineteenth capacitor C19, and a twentieth capacitor C20. The signal input terminal of the radio frequency amplifier U2 is connected to the U-band signal generation circuit. The signal output terminal of the radio frequency amplifier U2 is connected to the signal input terminal of the filtering circuit and the first end of the fourth inductor L4. The second end of the fourth inductor L4 is connected to the first ends of the seventeenth capacitor C17, the nineteenth capacitor C19, the twentieth capacitor C20, and a first power supply. The second ends of the seventeenth capacitor C17, the nineteenth capacitor C19, and the twentieth capacitor C20 are grounded.
[0044] In one embodiment, the model of the radio frequency amplifier U2 may be ADL5535ARKZ-R7, and the inductance value of the fourth inductor L4 is 470 nh. The first power supply is a DC source with a voltage of 5V.
[0045] Optionally, the signal amplification circuit further includes a second inductor L2, a fifth inductor L5, a sixteenth capacitor C16, and a fifteenth capacitor C15. The signals output by the modulation chip U1 are processed using the second inductor L2, the fifth inductor L5, the sixteenth capacitor C16, and the fifteenth capacitor C15. The first end of the second inductor L2 is connected to the first end of the sixteenth capacitor C16 and the output end of the signal generation circuit. The second end of the second inductor L2 is grounded and connected to the second end of the fifth inductor L5. The first end of the fifth inductor L5 is connected to the second end of the sixteenth capacitor C16 and the first end of the fifteenth capacitor C15. The second end of the fifteenth capacitor C15 is connected to the signal output end of the RF amplifier U2.
[0046] Optionally, the filtering circuit is used to filter out second and third harmonics. The circuit includes a twenty-first capacitor C21, a sixth inductor L6, an eighteenth capacitor C18, a seventh inductor L7, and a band-pass filter U3. The first end of the twenty-first capacitor C21 is connected to the output end of the signal amplification circuit. The second end of the twenty-first capacitor C21 is connected to the first end of the sixth inductor L6, the first end of the sixth inductor L6, and the first end of the eighteenth capacitor C18. The second end of the sixth inductor L6 is grounded and connected to the second end of the seventh inductor L7 and the ground terminal of the band-pass filter U3. The first end of the seventh inductor L7 is connected to the second end of the eighteenth capacitor C18 and the signal input terminal of the band-pass filter U3.
[0047] Optionally, the filtering circuit further includes a ninth inductor L9, an eighth inductor L8, and a thirty-second capacitor C32. The second end of the ninth inductor L9 is grounded and connected to the second end of the eighth inductor L8. The first end of the ninth inductor L9 is connected to the signal output end of the band-pass filter U3 and the first end of the thirty-second capacitor C32. The first end of the eighth inductor L8 is connected to the second end of the thirty-second capacitor C32 and the antenna.
[0048] Optionally, the control module includes a reset circuit and a control chip U7. Among them, the instruction output end of the control chip U7 is connected to the modulation chip U1; the reset circuit includes a twenty-fourth resistor R24 and a thirty-first capacitor C31. The first end of the twenty-fourth resistor R24 is connected to the second power supply. The second end of the twenty-fourth resistor R24 is connected to the first end of the thirty-first capacitor C31 and the control chip U7. The second end of the thirty-first capacitor C31 is grounded. The program initialization of the control chip U7 after each power-on is realized through the reset circuit.
[0049] In one embodiment, the control module can be a single-chip microcomputer, and the control chip U7 is a single-chip microcomputer chip, and the model of the single-chip microcomputer chip can be ESP32-D0WD. The second power supply is a 3.3V DC power supply. And the second power supply is also used to supply power to the single-chip microcomputer chip. During data communication, the single-chip microcomputer chip generates a U-segment signal generation instruction according to the data, instructions, and relevant register information configured for the modulation chip U1 that needs to be transmitted, and sends the instruction to the modulation chip U1. The modulation chip U1 performs data configuration based on the instruction, and generates a U-segment signal with a frequency corresponding to the instruction after the data configuration is completed.
[0050] Optionally, the control module further includes a power supply filtering circuit, and the power supply filtering circuit includes a bead L3. The first end of the bead L3 is connected to the second power supply, and the second end is connected to the reset circuit and the voltage terminal of the single-chip microcomputer chip. And during the debugging process, the current passing through the power supply filtering circuit can also be measured through the bead L3.
[0051] Optionally, the control module includes a startup mode setting circuit. The startup mode setting circuit includes a twenty-third resistor R23, a twenty-second resistor R22, and a first interface H1. The first end of the twenty-third resistor R23 is connected to the second end of the first interface H1 and the control chip U7. The second end of the twenty-third resistor R23 is connected to the second power supply. The first end of the twenty-second resistor R22 is connected to the second end of the first interface H1, and the second end of the twenty-second resistor R22 is grounded. The working mode of the single-chip microcomputer chip is adjusted through this startup mode setting circuit.
[0052] Optionally, the control module includes a second crystal oscillator circuit. The second crystal oscillator circuit includes a first crystal oscillator X1, a twenty-ninth capacitor C29, and a thirtieth capacitor C30. The first end of the twenty-ninth capacitor C29 is grounded, and the second end is connected to the first pin of the first crystal oscillator X1 and the first clock signal terminal of the control chip U7. The third pin of the first crystal oscillator X1 is connected to the second clock signal terminal of the control chip U7 and the second end of the thirtieth capacitor C30. The first end of the thirtieth capacitor C30 is grounded, and the second and fourth pins of the first crystal oscillator X1 are grounded. The second crystal oscillator circuit provides the clock frequency required for the operation of the single-chip microcomputer chip.
[0053] Optionally, the control module further includes a serial port CN1 download circuit and a memory expansion circuit, and the control chip U7 is respectively connected to the serial port CN1 download circuit and the memory expansion circuit.
[0054] In one embodiment, the serial port CN1 download circuit includes a serial port CN1, and the serial port CN1 is connected to the single-chip microcomputer chip. The single-chip microcomputer chip downloads firmware coding through the serial port CN1. The memory expansion circuit includes a flash memory chip U8 connected to the single-chip microcomputer chip. The model of the flash memory chip U8 can be GD25Q32CTIG, and the flash memory chip U8 can be used to store the firmware related to the operation of the single-chip microcomputer chip.
[0055] The wireless U-band transmission circuit of the embodiment of the present application includes a U-band signal generation circuit, a signal amplification circuit, and a filtering circuit connected in sequence. The output end of the filtering circuit is connected to an antenna. The U-band signal generation circuit is used to trigger the generation of a U-band signal after receiving a U-band signal generation instruction and transmit the U-band signal to the signal amplification circuit. The signal amplification circuit is used to amplify the power of the U-band signal and transmit the amplified U-band signal to the filtering circuit for filtering processing. In the embodiment of the present application, the generated U-band signal is subjected to power amplification processing and filtering processing through the signal amplification circuit and the filtering circuit respectively. The embodiment of the present application can improve the stability of the circuit and achieve the attenuation of harmonics in the signal, greatly reduce the noise in the signal, improve the accuracy and precision of the signal frequency, and effectively reduce the difficulty of demodulating the U-band signal at the receiving end.
[0056] The terms "first", "second", "third", "fourth", "1", "2", etc. (if any) in the description, claims, and above-mentioned drawings of the present application are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of the present application described herein can be implemented in an order other than the illustrated or textually described order.
[0057] It should be understood that although the flowchart of the embodiment of the present application indicates each operation step by an arrow, the execution order of these steps is not limited to the order indicated by the arrow. Unless there is a clear description in this article, in some implementation scenarios of the embodiment of the present application, the implementation steps in each flowchart can be executed in other orders according to requirements. In addition, some or all of the steps in each flowchart may include multiple sub-steps or multiple stages based on the actual implementation scenario. Some or all of these sub-steps or stages can be executed at the same time, and each sub-step or stage among these sub-steps or stages can also be executed at different times respectively. In the scenario where the execution times are different, the execution order of these sub-steps or stages can be flexibly configured according to requirements, and the embodiment of the present application does not limit this.
[0058] The above are only optional implementation manners of some implementation scenarios of the present application. It should be noted that for those of ordinary skill in the art, without departing from the technical concept of the solution of the present application, adopting other similar implementation means based on the technical idea of the present application also belongs to the protection scope of the embodiments of the present application.
Claims
1. A wireless U-band transmitting circuit, characterized in that: It includes a U-segment signal generating circuit, a signal amplifying circuit, and a filtering circuit connected in sequence, wherein the output end of the filtering circuit is connected to the antenna; The U-segment signal generating circuit is used to trigger the generation of a U-segment signal after receiving a U-segment signal generating instruction, and transmit the U-segment signal to the signal amplifying circuit; The signal amplifying circuit is used to amplify the power of the U-segment signal and transmit the amplified U-segment signal to the filtering circuit for filtering processing.
2. The wireless U-band transmitting circuit according to claim 1, characterized in that: The U-segment signal generating circuit includes a first crystal oscillator circuit and a modulation chip, the signal output end of the modulation chip is connected to the signal amplification circuit, and the model of the modulation chip includes LMX2571; The first crystal oscillator circuit includes a second crystal oscillator, a ninth resistor and a twenty-fifth capacitor. The first end of the ninth resistor is connected to the power supply, and the second end is connected to the enable / standby pin of the second crystal oscillator. The output pin of the second crystal oscillator is connected to the clock signal input and output end of the modulation chip.
3. The wireless U-segment transmitting circuit according to claim 1, characterized in that: The signal amplification circuit includes a radio frequency amplifier, a fourth inductor, a seventeenth capacitor, an eighteenth capacitor, a nineteenth capacitor and a twentieth capacitor. The signal input end of the radio frequency amplifier is connected to the U-segment signal generating circuit, the signal output end of the radio frequency amplifier is connected to the signal input end of the filter circuit and the first end of the fourth inductor, the second end of the fourth inductor is connected to the eighteenth capacitor, the nineteenth capacitor, the first end of the twentieth capacitor and a second power supply, and the second ends of the eighteenth capacitor, the nineteenth capacitor and the twentieth capacitor are grounded.
4. The wireless U-segment transmitting circuit according to claim 3, characterized in that: The signal amplification circuit also includes a second inductor, a fifth inductor, a sixteenth capacitor and a fifteenth capacitor. The first end of the second inductor is connected to the first end of the sixteenth capacitor and the output end of the signal generating circuit. The second end of the second inductor is grounded and connected to the second end of the fifth inductor. The first end of the fifth inductor is connected to the second end of the sixteenth capacitor and the first end of the fifteenth capacitor. The second end of the fifteenth capacitor is connected to the signal output end of the radio frequency amplifier.
5. The wireless U-band transmitting circuit according to claim 1, characterized in that: The filtering circuit includes a twenty-first capacitor, a sixth inductor, an eighteenth capacitor, a seventh inductor and a band-pass filter, the first end of the twenty-first capacitor is connected to the output end of the signal amplification circuit, the second end of the twenty-first capacitor is connected to the first end of the sixth inductor, the first end of the sixth inductor and the first end of the eighteenth capacitor, the second end of the sixth inductor is grounded and connected to the second end of the seventh inductor and the ground end of the band-pass filter, and the first end of the seventh inductor is connected to the second end of the eighteenth capacitor and the signal input end of the band-pass filter.
6. The wireless U-band transmitting circuit according to claim 5, characterized in that: The filtering circuit also includes a ninth inductor, an eighth inductor and a thirty-second capacitor, the second end of the ninth inductor is grounded and connected to the second end of the eighth inductor, the first end of the ninth inductor is connected to the signal output end of the band-pass filter and the first end of the thirty-second capacitor, and the first end of the eighth inductor is connected to the second end of the thirty-second capacitor and the antenna.
7. The wireless U-band transmitting circuit according to claim 2, characterized in that: It also includes a control module provided with a reset circuit and a control chip, wherein the command output terminal of the control chip is connected to the modulation chip; The reset circuit includes a twenty-fourth resistor and a thirty-first capacitor, the first end of the twenty-fourth resistor is connected to the second power supply, the second end of the twenty-fourth resistor is connected to the first end of the thirty-first capacitor and the control chip, and the second end of the thirty-first capacitor is grounded.
8. The wireless U-band transmitting circuit according to claim 7, characterized in that: The control module includes a startup mode setting circuit, which includes a twenty-third resistor, a twenty-second resistor and a first interface, the first end of the twenty-third resistor is connected to the second end of the first interface and the control chip, the second end of the twenty-third resistor is connected to the second power supply, the first end of the twenty-second resistor is connected to the second end of the first interface, and the second end of the twenty-second resistor is grounded.
9. The wireless U-band transmitting circuit according to claim 7, characterized in that: The control module includes a second crystal oscillator circuit, which includes a first crystal oscillator, a twenty-ninth capacitor, and a thirtieth capacitor. The first end of the twenty-ninth capacitor is grounded, and the second end is connected to the first pin of the first crystal oscillator and the first clock signal end of the control chip. The third pin of the first crystal oscillator is connected to the second clock signal end of the control chip and the second end of the thirtieth capacitor. The first end of the thirtieth capacitor is grounded, and the second pin and the fourth pin of the first crystal oscillator are grounded.
10. The wireless U-band transmitting circuit according to claim 7, characterized in that: The control module also includes a serial port download circuit and a memory expansion circuit, and the control chip is connected to the serial port download circuit and the memory expansion circuit respectively.