Packaging structure

Abstract

The utility model discloses a packaging structure. The packaging structure comprises a glass substrate and a plurality of first devices located on one side of the glass substrate. The glass substrate comprises a plurality of double-sided board units which are arranged in a stacked mode. The double-sided board unit comprises a first conductive pattern layer, a glass layer and a second conductive pattern layer which are stacked in sequence; the glass layer comprises at least two glass through holes distributed at intervals and conductive columns filled in the glass through holes; the conductive columns are electrically connected with the first conductive pattern layer and the second conductive pattern layer in the double-sided board unit where the conductive columns are located; in the glass substrate, the vertical projections of the first conductive pattern layers in any two double-sided board units on the glass layer are not completely overlapped; the first devices are electrically connected through the double-sided board units in the glass substrate. According to the utility model, the problems of serious warping and internal stress concentration of a large-size packaging structure can be improved, the structure of the packaging structure can be simplified, and the manufacturing efficiency of the packaging structure can be improved.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and particularly relates to a packaging structure. Background Art

[0002] After the preparation process of the semiconductor structure is completed, a packaging process is usually performed on the prepared semiconductor structure to protect the semiconductor structure and achieve an electrical connection process with other semiconductor structures, so as to obtain a packaging structure.

[0003] However, in the existing packaging structures, there are still problems such as complex packaging structures and low packaging efficiency that need to be improved urgently. Summary of the Utility Model

[0004] The utility model provides a packaging structure, which can improve the serious warping and internal stress concentration problems of large-size packaging structures, simplify the structure of the packaging structure, and improve the manufacturing efficiency of the packaging structure.

[0005] The utility model provides a packaging structure, which includes: a glass substrate and a plurality of first devices located on one side of the glass substrate;

[0006] The glass substrate includes a plurality of double-sided board units stacked on top of each other;

[0007] The double-sided board unit includes a first conductive pattern layer, a glass layer, and a second conductive pattern layer stacked in sequence; the glass layer includes at least two spaced-apart glass through-holes and conductive columns filled in each of the glass through-holes; the conductive columns are electrically connected to the first conductive pattern layer and the second conductive pattern layer in the double-sided board unit where the conductive columns are located;

[0008] In the glass substrate, the vertical projections of the first conductive pattern layers in any two of the double-sided board units on the glass layer do not completely overlap, and the vertical projections of the second conductive pattern layers in any two of the double-sided board units on the glass layer do not completely overlap;

[0009] Each of the first devices is electrically connected through each of the double-sided board units in the glass substrate.

[0010] Optionally, the packaging structure provided in this embodiment further includes at least one thin film capacitor;

[0011] The thin film capacitor is embedded in the glass layer in the double-sided board unit.

[0012] Optionally, the packaging structure provided in this embodiment further includes n thin film capacitors; where n is a positive integer;

[0013] Each of the thin film capacitors is respectively embedded in the glass layer in different double-sided board units;

[0014] The number of the double-sided panel units on the side of the i-th thin-film capacitor away from the first device is the same as the number of the double-sided panel units on the side of the (n - i + 1)-th thin-film capacitor close to the first device, where i is less than or equal to n and i is a positive integer.

[0015] Optionally, the glass substrate further includes a conductive layer;

[0016] The corresponding glass vias in any two adjacent double-sided panel units communicate along the thickness direction of the glass substrate, and the conductive posts in the corresponding glass vias are electrically connected through the conductive layer.

[0017] Optionally, the material of the conductive layer includes at least one of tin, silver, and copper.

[0018] Optionally, the packaging structure provided in this embodiment further includes at least one second device; the glass substrate includes a groove;

[0019] The second device is located in the groove;

[0020] The second device is electrically connected to at least one of the first devices.

[0021] Optionally, the packaging structure provided in this embodiment further includes a first solder mask layer and a second solder mask layer;

[0022] The first solder mask layer is located on the first surface of the glass substrate, the second solder mask layer is located on the second surface of the glass substrate, the first surface and the second surface are oppositely arranged, and the first surface is the surface for carrying the multiple first devices.

[0023] Optionally, the glass substrate includes multiple insulating support layers;

[0024] One insulating support layer is provided between two adjacent double-sided panel units. The vertical projection of the insulating support layer on the glass layer covers the vertical projection of the first conductive pattern layer adjacent to the insulating support layer on the glass layer and covers the vertical projection of the second conductive pattern layer adjacent to the insulating support layer on the glass layer; the insulating support layer includes insulating vias equal in number to the glass vias, and the insulating vias expose the conductive posts.

[0025] Optionally, the thickness range of the first solder mask layer is 15μm to 21μm;

[0026] The thickness range of the second solder mask layer is 15μm to 21μm;

[0027] The thickness range of the insulating support layer is 5μm to 10μm;

[0028] The thickness range of the first conductive pattern layer is 2 μm to 10 μm;

[0029] The thickness range of the second conductive pattern layer is 2 μm to 10 μm.

[0030] Optionally, the glass substrate includes the double-sided panel units arranged in a set number of layers;

[0031] The set number of layers is less than or equal to 50.

[0032] This embodiment provides a packaging structure. The packaging structure includes a glass substrate and a plurality of first devices located on one side of the glass substrate. The glass substrate includes a plurality of double-sided panel units arranged in layers. The double-sided panel unit includes a first conductive pattern layer, a glass layer, and a second conductive pattern layer arranged in layers. The material of the glass layer in the glass substrate is glass, which can improve the problems of severe warping and internal stress concentration of the large-size packaging structure. The glass substrate in the packaging structure includes a plurality of double-sided panel units. During the process of manufacturing the glass substrate, a plurality of double-sided panel units can be manufactured simultaneously, and then the plurality of double-sided panel units are stacked and pressed to form the glass substrate, without waiting for one double-sided panel unit to be manufactured and then manufacturing another double-sided panel unit, thereby improving the manufacturing efficiency of the glass substrate and further improving the manufacturing efficiency of the packaging structure. The plurality of first devices are electrically connected through the first conductive pattern layer and the second conductive pattern layer in the glass substrate, without setting a complex redistribution layer in the packaging structure, simplifying the structure of the packaging structure. In summary, the packaging structure provided by this embodiment can improve the problems of severe warping and internal stress concentration of the large-size packaging structure, can also simplify the structure of the packaging structure, and can also improve the manufacturing efficiency of the packaging structure.

[0033] It should be understood that the content described in this part is not intended to identify the key or important features of the embodiments of the present invention, nor is it used to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. Description of the Drawings

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0035] Figure 1 is a schematic structural diagram of a packaging structure provided according to an embodiment of the present invention;

[0036] Figure 2It is a schematic structural view of a glass substrate provided according to an embodiment of the present invention;

[0037] Figure 3 It is a schematic structural view of another encapsulation structure provided according to an embodiment of the present invention;

[0038] Figure 4 It is a schematic structural view of another encapsulation structure provided according to an embodiment of the present invention;

[0039] Figure 5 It is a schematic structural view of another encapsulation structure provided according to an embodiment of the present invention;

[0040] Figure 6 It is a schematic structural view of another encapsulation structure provided according to an embodiment of the present invention. Detailed implementation manners

[0041] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0042] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence. It should be understood that such used data can be interchanged under appropriate circumstances so that the embodiments of the present invention described here can be implemented in an order different from those illustrated or described here. In addition, the terms "comprising" and "having" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0043] Figure 1 It is a schematic structural view of an encapsulation structure provided according to an embodiment of the present invention. Refer to Figure 1 , the encapsulation structure provided in this embodiment includes: a glass substrate 100 and a plurality of first devices 200 located on one side of the glass substrate 100. Figure 2 It is a schematic structural view of a glass substrate provided according to an embodiment of the present invention. Refer to Figure 2, the glass substrate 100 includes a plurality of double-sided panel units 110 stacked on top of each other. The double-sided panel unit 110 includes a first conductive pattern layer 111, a glass layer 112, and a second conductive pattern layer 113 stacked in sequence; the glass layer 112 includes at least two spaced-apart glass vias 114 and conductive posts 115 filled in each glass via 114; the conductive posts 115 are electrically connected to the first conductive pattern layer 111 and the second conductive pattern layer 113 in the double-sided panel unit 110 where the conductive posts 115 are located. In the glass substrate 100, the vertical projections of the first conductive pattern layers 111 in any two double-sided panel units 110 on the glass layer 112 do not completely overlap, and the vertical projections of the second conductive pattern layers 113 in any two double-sided panel units 110 on the glass layer 112 do not completely overlap; each first device 200 is electrically connected through each double-sided panel unit 110 in the glass substrate 100.

[0044] Specifically, continue to refer to Figure 1 , the packaging structure further includes conductive bumps 310 and fillers 320, and the first device 200 is electrically connected to the first conductive pattern layer 111 on the surface of the glass substrate 100 through the conductive bumps 310. The fillers 320 are filled in the gaps between adjacent first devices 200 and the gaps between the first devices 200 and the glass substrate 100. The first device 200 can be an ASIC (Application Specific Integrated Circuit) bare chip or an HBM (High Bandwidth Memory) bare chip.

[0045] The incomplete overlap of the vertical projections of the first conductive pattern layers 111 in any two double-sided panel units 110 on the glass layer 112 means that the conductive patterns in the first conductive pattern layers 111 in any two double-sided panel units 110 are not completely the same. The incomplete overlap of the vertical projections of the second conductive pattern layers 113 in any two double-sided panel units 110 on the glass layer 112 means that the conductive patterns in the second conductive pattern layers 113 in any two double-sided panel units 110 are not completely the same.

[0046] The double-sided panel unit 110 is provided with a first conductive pattern layer 111 and a second conductive pattern layer 113, which enables part of the first devices 200 to be electrically connected through the conductive patterns in the first conductive pattern layer 111, and also enables another part of the first devices 200 to be electrically connected through the conductive patterns in the second conductive pattern layer 113, so that an electrical connection between multiple first devices 200 can be achieved by one double-sided panel unit 110. Among them, the conductive patterns of the first conductive pattern layer 111 in the same double-sided panel unit 110 may not be completely the same as the conductive patterns of the second conductive pattern layer 113. The material of the first conductive pattern layer 111 may be copper, the material of the second conductive pattern layer 113 may be copper, and the material of the conductive posts 115 may be copper.

[0047] The multiple first devices 200 are electrically connected through the first conductive pattern layer 111 and the second conductive pattern layer 113 in the double-sided panel unit 110. Exemplarily, Figure 3 is a schematic structural diagram of another packaging structure provided according to an embodiment of the present invention. Refer to Figure 3 , the multiple first devices in the packaging structure include a first sub-device 201, a second sub-device 202, a third sub-device 203, and a fourth sub-device 204. Among them, the first sub-device 201 and the second sub-device 202, the third sub-device 203 and the fourth sub-device 204 can be electrically connected through the first conductive pattern layer 111 in one of the double-sided panel units 110, and the first sub-device 201 and the third sub-device 203 can be electrically connected through the first conductive pattern layer 111 in another double-sided panel unit 110. Figure 3 The blue thin lines in

[0048] This embodiment provides a packaging structure, which includes a glass substrate and a plurality of first devices located on one side of the glass substrate. The glass substrate includes a plurality of double-sided panel units stacked on top of each other. The double-sided panel unit includes a first conductive pattern layer, a glass layer, and a second conductive pattern layer stacked on top of each other. The material of the glass layer in the glass substrate is glass, which can improve the problems of severe warping and internal stress concentration in large-size packaging structures. The glass substrate in the packaging structure includes a plurality of double-sided panel units. During the process of manufacturing the glass substrate, a plurality of double-sided panel units can be manufactured simultaneously, and then the plurality of double-sided panel units are stacked and pressed to form the glass substrate, without waiting to manufacture another double-sided panel unit after one double-sided panel unit is manufactured, thereby improving the manufacturing efficiency of the glass substrate and further improving the manufacturing efficiency of the packaging structure. The plurality of first devices are electrically connected through the first conductive pattern layer and the second conductive pattern layer in the glass substrate, and there is no need to set a complex redistribution layer in the packaging structure, simplifying the structure of the packaging structure. In summary, the packaging structure provided by this embodiment can improve the problems of severe warping and internal stress concentration in large-size packaging structures, simplify the structure of the packaging structure, and also improve the manufacturing efficiency of the packaging structure.

[0049] Optionally, Figure 4 is a schematic structural diagram of another packaging structure provided according to an embodiment of the present invention. Refer to Figure 4 , the packaging structure provided by this embodiment further includes at least one thin-film capacitor 300; the thin-film capacitor 300 is embedded in the glass layer in the double-sided panel unit.

[0050] Among them, the first device 200 is electrically connected to the thin-film capacitor 300. The thin-film capacitor 300 includes a first metal layer, an intermediate dielectric layer, and a second metal layer stacked on top of each other. The capacitance value of the thin-film capacitor can be adjusted by adjusting the thickness of the intermediate dielectric layer and replacing the material of the different intermediate dielectric layers. Setting the thin-film capacitor 300 in the packaging structure can suppress the power noise in the packaging structure to improve the electrical performance of the packaging structure. Embedding the thin-film capacitor in the glass layer can enable more first devices 200 to be arranged on the surface of the glass substrate 100, and can also further improve the effect of suppressing the power noise in the packaging structure.

[0051] Optionally, the encapsulation structure provided in this embodiment further includes n thin film capacitors, where n is a positive integer. Each thin film capacitor is respectively embedded in the glass layer of a different double-sided panel unit. The number of double-sided panel units on the side of the i-th thin film capacitor away from the first device is the same as the number of double-sided panel units on the side of the (n - i + 1)-th thin film capacitor close to the first device, where i is less than or equal to n and i is a positive integer. Such a setting can ensure that the pressure borne by the i-th thin film capacitor is basically the same as the pressure borne by the (n - i + 1)-th thin film capacitor, and avoid the problem that the glass substrate warps or is easily broken due to a large difference in the pressure borne by the i-th thin film capacitor and the (n - i + 1)-th thin film capacitor. Among them, n can be 2, 3, 4, 5, 6, etc. When n is greater than 1, the i-th thin film capacitor is adjacent to the (i + 1)-th thin film capacitor.

[0052] Optionally, continuing to refer to Figure 2 , the glass substrate 100 further includes a conductive layer 140. The corresponding glass through-holes 114 in any two adjacent double-sided panel units 110 are connected along the thickness direction of the glass substrate 100, and the conductive posts 115 in the corresponding glass through-holes 114 are electrically connected through the conductive layer 140.

[0053] Specifically, the number of glass through-holes 114 in each double-sided panel unit 110 is the same and they correspond one by one. The material of the conductive posts 115 can be the same as the material of the conductive layer 140. Setting the corresponding glass through-holes 114 in two adjacent double-sided panel units 110 to be connected along the thickness direction of the glass substrate 100 can realize the disordered stacking of the double-sided panel units 110 in the glass substrate 100, and when the conductive pattern in the first conductive pattern layer 111 and / or the conductive pattern in the second conductive pattern layer 113 in one of the double-sided panel units 110 changes, it will not affect the stacking and installation of other double-sided panel units.

[0054] Optionally, the material of the conductive layer includes at least one of tin, silver, and copper.

[0055] Specifically, the conductive layer can be an alloy composed of tin, silver, and copper.

[0056] Optionally, Figure 5 is a schematic structural diagram of another encapsulation structure provided according to an embodiment of the present invention. Referring to Figure 5 , the encapsulation structure provided in this embodiment further includes at least one second device 400. The glass substrate 100 includes a groove. The second device 400 is located in the groove. The second device 400 is electrically connected to at least one first device 200.

[0057] Specifically, the second device 400 may be an IPD bare chip (Intelligent Power Device) or a silicon chip. By disposing the second device 400 in the groove of the glass substrate 100, more first devices 200 can be arranged on the surface of the glass substrate 100.

[0058] Optionally, Figure 6 is a schematic structural diagram of another packaging structure provided according to an embodiment of the present invention. Refer to Figure 6 , the packaging structure provided in this embodiment further includes a first solder mask layer 210 and a second solder mask layer 220; the first solder mask layer 210 is located on the first surface of the glass substrate 100, the second solder mask layer 220 is located on the second surface of the glass substrate 100, and the first surface and the second surface are oppositely arranged; the first surface is the surface for carrying a plurality of first devices.

[0059] Specifically, the first solder mask layer 210 exposes the first conductive pattern layer on the first surface of the glass substrate 100, so that the first device can be electrically connected to the first conductive pattern layer on the first surface of the glass substrate 100. The second solder mask layer 220 exposes the second conductive pattern layer on the second surface of the glass substrate 100, so that the second conductive pattern layer on the second surface of the glass substrate 100 can be electrically connected to other circuits.

[0060] Optionally, continue to refer to Figure 2 and Figure 6 , the glass substrate 100 further includes a plurality of insulating support layers 130; one insulating support layer 130 is arranged between two adjacent double-sided board units 110, and the vertical projection of the insulating support layer 130 on the glass layer covers the vertical projection of the first conductive pattern layer adjacent to the insulating support layer 130 on the glass layer, and covers the vertical projection of the second conductive pattern layer adjacent to the insulating support layer 130 on the glass layer; the insulating support layer 130 includes insulating through holes equal in number to the glass through holes, and the insulating through holes expose the conductive posts 115.

[0061] Specifically, the material of the insulating support layer 130 may be resin. The insulating support layer 130 plays a supporting role between two adjacent double-sided board units 110, avoiding the problem that the glass substrate 100 is easily broken due to the gap between two adjacent double-sided board units 110. Setting the vertical projection of the insulating support layer 130 on the glass layer to cover the vertical projection of the first conductive pattern layer adjacent to the insulating support layer 130 on the glass layer and cover the vertical projection of the second conductive pattern layer adjacent to the insulating support layer 130 on the glass layer can prevent the first conductive pattern layer and the second conductive pattern layer on both sides of the insulating support layer from being short-circuited.

[0062] Optionally, the thickness range of the first solder mask layer is 15 μm to 21 μm; the thickness range of the second solder mask layer is 15 μm to 21 μm; the thickness range of the insulating support layer is 5 μm to 10 μm; the thickness range of the first conductive pattern layer is 2 μm to 10 μm; the thickness range of the second conductive pattern layer is 2 μm to 10 μm. Such settings can reduce the overall thickness of the glass substrate.

[0063] Optionally, the glass substrate includes double-sided board units arranged in a stacked manner with a set number of layers; the set number of layers is less than or equal to 50.

[0064] Specifically, the number of double-sided board units in the glass substrate provided in this embodiment can be as high as 50 layers, which can enable more first devices to be arranged in the packaging structure, and enable each first device to be electrically connected through the double-sided board units.

[0065] It should be understood that various forms of the processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this utility model can be executed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of this utility model can be achieved. There is no limitation herein.

[0066] The above specific implementation manners do not constitute a limitation to the protection scope of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model shall be included within the protection scope of this utility model.

Claims

1. A packaging structure, characterized in that: include: A glass substrate and a plurality of first devices located on one side of the glass substrate; The glass substrate includes a plurality of double-panel units stacked in layers; The double-sided board unit comprises a first conductive pattern layer, a glass layer and a second conductive pattern layer stacked in sequence; the glass layer comprises at least two glass through holes distributed at intervals and conductive pillars filled in each of the glass through holes; the conductive pillars are electrically connected to the first conductive pattern layer and the second conductive pattern layer in the double-sided board unit where the conductive pillars are located; In the glass substrate, vertical projections of the first conductive pattern layers in any two of the double-panel units on the glass layer do not completely overlap, and vertical projections of the second conductive pattern layers in any two of the double-panel units on the glass layer do not completely overlap; The first devices are electrically connected through the double-panel units in the glass substrate.

2. The packaging structure according to claim 1, characterized in that: Also comprising at least one film capacitor; The film capacitor is embedded in the glass layer of the double-panel unit.

3. The packaging structure according to claim 1, characterized in that: Also includes n film capacitors; wherein n is a positive integer; Each of the thin film capacitors is respectively embedded in a glass layer in a different double-panel unit; The number of the double-panel units on the side of the i-th thin film capacitor away from the first device is the same as the number of the double-panel units on the side of the n-i+1-th thin film capacitor close to the first device, where i is less than or equal to n and is a positive integer.

4. The packaging structure according to claim 1, characterized in that: The glass substrate further includes a conductive layer; The corresponding through-glass holes in any two adjacent double-panel units are connected along the thickness direction of the glass substrate, and the corresponding conductive pillars in the through-glass holes are electrically connected through a conductive layer.

5. The packaging structure according to claim 4, characterized in that: The material of the conductive layer includes at least one of tin, silver and copper.

6. The packaging structure according to claim 1, characterized in that: Also comprising at least one second device; the glass substrate comprises a groove; The second device is located in the groove; The second device is electrically connected to at least one of the first devices.

7. The packaging structure according to claim 1, characterized in that: Also includes a first solder resist layer and a second solder resist layer; The first solder resist layer is located on the first surface of the glass substrate, the second solder resist layer is located on the second surface of the glass substrate, the first surface and the second surface are arranged opposite to each other, and the first surface is a surface for carrying the plurality of first devices.

8. The packaging structure according to claim 7, characterized in that: The glass substrate comprises a plurality of insulating support layers; An insulating support layer is arranged between two adjacent double-panel units, and a vertical projection of the insulating support layer on the glass layer covers a vertical projection of the first conductive pattern layer adjacent to the insulating support layer on the glass layer, and covers a vertical projection of the second conductive pattern layer adjacent to the insulating support layer on the glass layer; the insulating support layer includes insulating through holes equal in number to the glass through holes, and the conductive posts are exposed by the insulating through holes.

9. The packaging structure according to claim 8, characterized in that: The thickness of the first solder resist layer ranges from 15 μm to 21 μm; The thickness of the second solder resist layer ranges from 15 μm to 21 μm; The thickness of the insulating support layer ranges from 5 μm to 10 μm; The thickness of the first conductive pattern layer ranges from 2 μm to 10 μm; The thickness of the second conductive pattern layer is in the range of 2 μm to 10 μm.

10. The packaging structure according to any one of claims 1 to 9, characterized in that: The glass substrate includes the double-panel unit having a set number of layers stacked; The set number of layers is less than or equal to 50.

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