Detector loop detection circuit and detector loop detection equipment

Abstract

The utility model provides a detector loop detection circuit and detector loop detection equipment. The detector loop detection circuit comprises a first voltage source, a second voltage source, at least one detector loop and a controller. The detector loop comprises at least one detector, a terminal resistor, a backward diode, a first detection branch and a second detection branch. The terminal resistor is coupled to the backward diode, and the terminal resistor and the backward diode are connected in parallel to the detector; the first detection branch is coupled to a first voltage source and one end of the detector; the second detection branch is coupled to the second voltage source and the other end of the detector; the controller is coupled to the first detection branch and the second detection branch to detect the working state of the detector loop. The detector loop detection circuit can detect the working state of the detector loop based on the first detection branch and / or the second detection branch, supports non-linear detector loop detection and non-linear fire-fighting detector loop detection, and is wide in application range, simple to operate and convenient to use.

Description

Technical Field

[0001] The present disclosure generally relates to the field of fire protection technology, and more particularly to a detector loop detection circuit and a detector loop detection device. Background Art

[0002] In the field of fire protection, detecting the working state of a detector circuit is crucial to fire safety. How to detect the working state of a detector circuit, how to adapt the detection of more detector circuits, etc., are technical problems to be solved by the present disclosure.

[0003] The contents of the background technology section are merely the technologies known to the inventors and do not necessarily represent the prior art in the field. Utility Model Content

[0004] In view of one or more problems existing in the prior art, the present disclosure provides a detector loop detection circuit, comprising:

[0005] a first voltage source;

[0006] a second voltage source;

[0007] At least one detector circuit, the detector circuit comprising:

[0008] at least one detector;

[0009] A terminal resistor coupled to a reverse diode, wherein the terminal resistor and the reverse diode are connected in parallel to the detector;

[0010] A first detection branch, coupled to the first voltage source and one end of the detector; and

[0011] A second detection branch, coupled to the second voltage source and the other end of the detector; and

[0012] A controller is coupled to the first detection branch and the second detection branch to detect the working state of the detector loop.

[0013] Optionally, the first detection branch includes a first input terminal and a second input terminal, the second detection branch includes a third input terminal, and the controller controls the detection mode of the detector circuit by controlling the high and low level states of the first input terminal, the second input terminal and the third input terminal.

[0014] Optionally, the detection mode includes a forward detection mode, and the controller enables the forward detection mode by controlling the first input terminal to be set to a high level and the second input terminal and the third input terminal to be set to a low level.

[0015] Optionally, the detection mode includes a reverse detection mode, and the controller enables the reverse detection mode by controlling the first input terminal to be set to a low level and the second input terminal and the third input terminal to be set to a high level.

[0016] Optionally, the first detection branch includes a first output end, the second detection branch includes a second output end, the controller collects the output voltage of the first output end and / or the second output end, and determines the working state of the detector circuit based on the output voltage of the first output end and / or the second output end.

[0017] Optionally, the working state of the detector circuit includes one of an open circuit state, a normal state, a warning state, an alarm state and a short circuit state.

[0018] Optionally, in the forward detection mode, the controller collects the output voltages of the first output terminal and the second output terminal, determines the loop current based on the output voltage of the second output terminal, determines the loop load resistance based on the loop current and the output voltage of the first output terminal, and determines the working state of the detector loop based on the loop load resistance.

[0019] Optionally, the controller is configured to: when it is determined that the loop load resistance is less than a first resistance threshold, determine that the working state is a short circuit state; when it is determined that the loop load resistance is greater than a second resistance threshold, determine that the working state is an open circuit state; when it is determined that the loop load resistance is between the first resistance threshold and the third resistance threshold, determine that the working state is an alarm state; when it is determined that the loop load resistance is between the third resistance threshold and the fourth resistance threshold, determine that the working state is a warning state; when it is determined that the loop load resistance is between the fourth resistance threshold and the second resistance threshold, determine that the working state is a normal state; the first resistance threshold < the third resistance threshold < the fourth resistance threshold < the second resistance threshold.

[0020] Optionally, in the reverse detection mode, the controller collects the output voltage of the first output terminal, and determines the working state of the detector circuit based on the output voltage of the first output terminal.

[0021] Optionally, the controller is configured to: when it is determined that the output voltage of the first output end is less than a first voltage threshold, determine that the working state of the detector circuit is an open circuit state; when it is determined that the output voltage of the first output end is greater than a second voltage threshold, determine that the working state of the detector circuit is a short circuit state, and the first voltage threshold is less than the second voltage threshold.

[0022] Optionally, the first detection branch includes a current limiting circuit, one end of the current limiting circuit is coupled to the first voltage source, and the other end of the current limiting circuit is coupled to the first input terminal.

[0023] Optionally, the current limiting circuit includes a first transistor, a first resistor, a first diode, a second resistor, a first switch, a third resistor, a second transistor and a fourth resistor, wherein one end of the first resistor is coupled to the first voltage source, and the other end is coupled to the first switch, the emitter of the first transistor is coupled to one end of the first resistor, the base is coupled to the other end of the first resistor, and the collector is coupled to the first switch; the first diode and the second resistor are connected in parallel between the first resistor and the first switch; one end of the third resistor is coupled to the first switch, and the other end is coupled to the collector of the second transistor; one end of the fourth resistor is coupled to the base of the second transistor, and the other end is coupled to the first input end; the first detection branch also includes a fifth resistor, the fifth resistor is coupled between the base and the emitter of the second transistor, and the first switch includes a metal oxide semiconductor field effect transistor.

[0024] Optionally, the first detection branch includes a sixth resistor and a seventh resistor connected in series, and an eighth resistor and a second switch connected in series, wherein the first output terminal is coupled between the sixth resistor and the seventh resistor, the second input terminal is coupled to the second switch, and the second switch includes a metal oxide semiconductor field effect transistor.

[0025] Optionally, the second detection branch includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third transistor, a third switch, a fourth switch and a second diode, wherein one end of the ninth resistor is coupled to the third input terminal, and the other end is coupled to the base of the third transistor, the tenth resistor is coupled between the ninth resistor and the emitter of the third transistor, the collector of the third transistor is coupled to the second voltage source through the twelfth resistor, one end of the third switch is coupled to the second voltage source, and one end is coupled to the collector of the third transistor, one end of the fourth switch is coupled to the collector of the third transistor, and one end is coupled to the second output terminal, the second diode is coupled between the third switch and the fourth switch, one end of the eleventh resistor is coupled between the second output terminal and the fourth switch, and the third switch and the fourth switch include metal oxide semiconductor field effect transistors.

[0026] Optionally, the first detection branch includes a fifth switch, the second detection branch includes a sixth switch, the fifth switch is coupled to the first output end, and the sixth switch is coupled to the second output end, and the controller enables the detection function of the detector loop detection circuit by controlling the conduction or disconnection of the fifth switch and / or the sixth switch, and the fifth switch and the sixth switch include metal oxide semiconductor field effect transistors.

[0027] Optionally, the detector includes a fire detector, and the detector includes a non-addressable detector.

[0028] Optionally, the detector loop detection circuit includes multiple detector loops, and the controller switches the detection functions of different detector loops by controlling the on or off of the fifth switch and / or the sixth switch.

[0029] The present disclosure also provides a detector loop detection device, comprising the detector loop detection circuit as described above, wherein the detector comprises a fire detector, and the detector comprises a non-addressable detector.

[0030] The detector loop detection circuit disclosed in the present invention can detect the working state of the detector loop based on the first detection branch and / or the second detection branch. The working state specifically includes an open circuit state, a normal state, a warning state, an alarm state and a short circuit state, meeting the detection requirements of various working states; supports forward detection mode, supports reverse detection mode, and the detection result is more accurate; supports detection of a single detector loop, supports detection of multiple detector loops, supports multi-loop time-sharing detection, and meets the load requirements of multiple detectors; supports non-edited detector loop detection, supports non-edited fire detector loop detection, with a wide range of applications, simple operation, and easy use; multiple detectors are connected in parallel to the terminal resistor, with high integration and can reduce costs.

[0031] The detector loop detection circuit disclosed in the present invention can determine whether the working state of the detector loop is normal by detecting the working state of the detector loop, thereby putting it in a safe and controllable state to avoid adverse consequences caused by abnormalities in the detector loop. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0033] Figure 1 A schematic block diagram of a detector loop detection circuit according to some embodiments of the present disclosure is shown.

[0034] Figure 2 A circuit diagram of a detector loop detection circuit according to some embodiments of the present disclosure is shown.

[0035] Figure 3 A schematic diagram of determining the working status of a detector circuit according to some embodiments of the present disclosure is shown.

[0036] Figure 4 A schematic diagram of determining the working status of a detector circuit according to some other embodiments of the present disclosure is shown.

[0037] Figure 5 A partial circuit diagram of a detector loop detection circuit according to some other embodiments of the present disclosure is shown.

[0038] Figure 6 A partial circuit diagram of a detector loop detection circuit according to some further embodiments of the present disclosure is shown.

[0039] Figure 7 A schematic diagram of a detector loop detection device according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0040] In the following, only some exemplary embodiments are briefly described. As those skilled in the art will appreciate, the described embodiments may be modified in various ways without departing from the spirit or scope of the present disclosure. Therefore, the drawings and descriptions are considered to be exemplary and non-restrictive in nature.

[0041] In the description of the present disclosure, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.

[0042] In the description of the present disclosure, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", and "coupled" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, an electrical connection, or can communicate with each other; it can be a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0043] In the present disclosure, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0044] Many different embodiments or examples are provided below to implement different structures of the present disclosure. In order to simplify the present disclosure, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present disclosure. In addition, the present disclosure may repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present disclosure provides various specific examples of processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0045] The preferred embodiments of the present disclosure are described below in conjunction with the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present disclosure, and are not used to limit the present disclosure.

[0046] Figure 1 A schematic block diagram of a detector loop detection circuit according to some embodiments of the present disclosure is shown. Figure 2 FIG. 1 shows a circuit diagram of a detector loop detection circuit according to some embodiments of the present disclosure (for convenience, Figure 2 The controller is omitted). Figure 1 and Figure 2 Give a description.

[0047] The detector loop detection circuit 100 includes at least one detector loop H, a first voltage source V1, a second voltage source V2 and a controller C. The detector loop H includes at least one detector 10, a terminal resistor E, a reverse diode BD, a first detection branch B1 and a second detection branch B2. The terminal resistor E is coupled to the reverse diode BD, and the terminal resistor E and the reverse diode BD are connected in parallel to the detector 10. The first detection branch B1 is coupled to the first voltage source V1 and one end of the detector 10 (for example, the positive electrode of the detector 10). The second detection branch B2 is coupled to the second voltage source V2 and the other end of the detector 10 (for example, the negative electrode of the detector 10). The controller C is coupled to the first detection branch B1 and the second detection branch B2 to detect the working state of the detector loop H.

[0048] In the present disclosure, the working state of the detector circuit includes one of an open circuit state, a normal state, an alarm state, a warning state and a short circuit state. It can be understood that the open circuit state, the alarm state, the warning state and the short circuit state are all abnormal states.

[0049] The first detection branch B1 includes a first input terminal in1 and a second input terminal in2, and the second detection branch B2 includes a third input terminal in3. The controller C is coupled to the first input terminal in1, the second input terminal in2 and the third input terminal in3, so that the detection mode of the detector circuit H can be controlled by controlling the high and low level states of the first input terminal in1, the second input terminal in2 and the third input terminal in3, and the switching of different detection modes can be realized. The first input terminal in1, the second input terminal in2 and the third input terminal in3 can be IO ports.

[0050] The detection mode includes a forward detection mode. The controller C can enable the forward detection mode of the detector circuit H by controlling the first input terminal in1 to be set to a high level and the second input terminal in2 and the third input terminal in3 to be set to a low level. In other words, when the levels of the first input terminal in1, the second input terminal in2, and the third input terminal in3 are 1, 0, and 0 respectively, the detection mode of the detector circuit H is a forward detection mode. In the forward detection mode, the first voltage source V1 provides a power supply voltage to the detector 10, for example, 24V.

[0051] The detection mode also includes a reverse detection mode. The controller C can enable the reverse detection mode of the detector loop H by controlling the first input terminal in1 to be set to a low level and the second input terminal in2 and the third input terminal in3 to be set to a high level. In other words, when the levels of the first input terminal in1, the second input terminal in2, and the third input terminal in3 are 0, 1, and 1 respectively, the detection mode of the detector loop H is a reverse detection mode. In the reverse detection mode, the second voltage source V2 provides a supply voltage to the terminal resistor E, for example, 5V, etc. It can be understood that in the reverse detection mode, the second voltage source V2 can also provide a supply voltage to the detector 10.

[0052] It should be noted that the above voltage values ​​24V and 5V provided by the first voltage source V1 and the second voltage source V2 are only exemplary and do not constitute a limitation to the present disclosure. The voltage values ​​provided by the first voltage source V1 and the second voltage source V2 do not necessarily have a magnitude relationship. The two can be equal or unequal, and can be set according to requirements in practical applications. In addition, the present disclosure does not limit the specific resistance value of the terminal resistor E, which can be set according to requirements.

[0053] In some embodiments, the second input terminal in2 and the third input terminal in3 may be combined into one.

[0054] The first detection branch B1 includes a first output terminal out1, and the second detection branch B2 includes a second output terminal out2. The controller C can collect the output voltage of the first output terminal out1 and / or the second output terminal out2, and determine the working state of the detector loop H based on the output voltage of the first output terminal out1 and / or the second output terminal out2. The first output terminal out1 and the second output terminal out2 can be A / D ports. How to determine the working state of the detector loop H will be described later, and the detector loop detection circuit 100 will be further introduced below.

[0055] The first detection branch B1 includes a current limiting circuit, one end of which is coupled to the first voltage source V1, and the other end is coupled to the first input terminal in1. The current limiting circuit includes a first transistor Q1, a first resistor R1, a first diode D1, a second resistor R2, a first switch K1, a third resistor R3, a second transistor Q2 and a fourth resistor R4. One end of the first resistor R1 is coupled to the first voltage source V1, and the other end is coupled to the first switch K1. The emitter e of the first transistor Q1 is coupled to one end of the first resistor R1, the base b is coupled to the other end of the first resistor R1, and the collector c is coupled to the first switch K1. The first diode D1 and the second resistor R2 are connected in parallel between the first resistor R1 and the first switch K1. The anode of the first diode D1 is coupled to the collector c of the first transistor Q1. One end of the third resistor R3 is coupled to the first switch K1, and the other end is coupled to the collector c of the second transistor Q2. One end of the fourth resistor R4 is coupled to the base b of the second transistor Q2, and the other end is coupled to the first input terminal in1. The first detection branch B1 also includes a fifth resistor R5, which is coupled between the base b and the emitter e of the second transistor Q2. At the moment of power-on, the first input port in1 is in an unstable state, and pulling down the fifth resistor R5 can remove the unstable state, so that the entire detection circuit operates stably.

[0056] The first transistor Q1 and the second transistor Q2 include (Bipolar Junction Transistor, BJT), for example, NPN transistor or PNP transistor. Figure 2 An example is shown in which the first transistor Q1 is a PNP transistor and the second transistor Q2 is an NPN transistor.

[0057] The first switch K1 includes a metal-oxide-semiconductor field-effect transistor (MOSFET), for example, a P-channel metal-oxide-semiconductor field-effect transistor (PMOS) or an N-channel metal-oxide-semiconductor field-effect transistor (NMOS). Figure 2 An example in which the first switch K1 is a PMOS is shown. A gate g of the first switch K1 is coupled to a collector c of the first transistor Q1.

[0058] The first detection branch B1 further includes a sixth resistor R6 and a seventh resistor R7 connected in series, and an eighth resistor R8 and a second switch K2 connected in series. The first output terminal out1 is coupled between the sixth resistor R6 and the seventh resistor R7, and the second input terminal in2 is coupled to the second switch K2. The second switch K2 includes a metal oxide semiconductor field effect transistor (MOSFET). For example, PMOS or NMOS. Figure 2 An example of the second switch K2 using NMOS is shown. The gate g of the second switch K2 is coupled to the second input terminal in2. Considering the power consumption problem, the series resistance of the sixth resistor R6 and the seventh resistor R7 is much larger than the terminal resistor E, so the second switch K2 is turned on, and the eighth resistor R8 is connected to the circuit in parallel with the sixth resistor R6 and the seventh resistor R7, which can match the impedance of the terminal resistor E. The second diode D2 can play an anti-reverse role. In the forward detection mode, the voltage (for example, 24V) provided by the first voltage source V1 will not flow into the third switch K3, and will not flow into the second voltage source V2.

[0059] The second detection branch B2 includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third switch K3, a fourth switch K4 and a second diode D2. The third transistor Q3 includes (BJT), for example, an NPN transistor or a PNP transistor. Figure 2 An example of the third transistor Q3 using an NPN transistor is shown. One end of the ninth resistor R9 is coupled to the third input terminal in3, and the other end is coupled to the base b of the third transistor Q3. The tenth resistor R10 is coupled between the ninth resistor R9 and the emitter e of the third transistor Q3. At the moment of power-on, the third input port in3 is in an unstable state, and pulling down the tenth resistor R10 can remove the unstable state, so that the entire detection circuit operates stably. The collector c of the third transistor Q3 is coupled to the second voltage source V2 through the twelfth resistor R12. One end of the third switch K3 is coupled to the second voltage source V2, and one end is coupled to the collector c of the third transistor Q3. One end of the fourth switch K4 is coupled to the collector c of the third transistor Q3, and one end is coupled to the second output terminal out2. The second diode D2 is coupled between the third switch K3 and the fourth switch K4. The positive electrode of the second diode D2 is coupled to the third switch K3, and the negative electrode is coupled to the fourth switch K4. One end of the eleventh resistor R11 is coupled between the second output terminal out2 and the fourth switch K4, and the other end is grounded. The third switch K3 and the fourth switch K4 include metal oxide semiconductor field effect transistors (MOSFETs), such as PMOS or NMOS. Figure 2 An example is shown in which the third switch K3 is a PMOS and the fourth switch K4 is an NMOS. The gate g of the third switch K3 and the gate g of the fourth switch K4 are coupled to the collector c of the third transistor Q3.

[0060] The anode of the reverse diode BD is coupled to the cathode of the detector 10 , and the cathode is coupled to the terminal resistor E. In some embodiments, the detector 10 , the terminal resistor E and the reverse diode BD can be disassembled and used as accessories, which is more flexible and convenient.

[0061] The first detection branch B1 includes a fifth switch K5, and the second detection branch B2 includes a sixth switch K6. The fifth switch K5 is coupled to the first output terminal out1, and the sixth switch K6 is coupled to the second output terminal out2. The controller C can enable the detection function of the detector loop detection circuit 100 by controlling the conduction or disconnection of the fifth switch K5 and / or the sixth switch K6. Figure 2 As shown, for example, the controller C can turn on the detection function of the detector loop detection circuit 100 by controlling the fifth switch K5 and the sixth switch K6 to be turned on. For another example, the controller C can turn off the detection function of the detector loop detection circuit 100 by controlling the fifth switch K5 and the sixth switch K6 to be turned off. The fifth switch K5 and the sixth switch K6 include metal oxide semiconductor field effect transistors (MOSFETs). For example, PMOS or NMOS.

[0062] The specific method of determining the working status of the detector loop H is introduced below. Figure 3 A schematic diagram of determining the working status of a detector circuit according to some embodiments of the present disclosure is shown. Figure 4 A schematic diagram of determining the working state of a detector circuit according to other embodiments of the present disclosure is shown. Figure 1 to Figure 4 Give a description.

[0063] In the forward detection mode, the first transistor Q1 and the second transistor Q2 are turned on, the first switch K1, the second switch K2 and the fourth switch K4 are turned on, the third transistor Q3 is turned off, and the third switch K3 is turned off. The controller C can collect the output voltage of the first output terminal out1 and the second output terminal out2, determine the loop current based on the output voltage of the second output terminal out2, determine the loop load resistance based on the loop current and the output voltage of the first output terminal out1, and determine the working state of the detector loop H based on the loop load resistance.

[0064] When it is determined that the loop load resistance is less than the first resistance threshold Thr1, the controller C determines that the working state of the detector loop H is a short circuit state. When it is determined that the loop load resistance is greater than the second resistance threshold Thr2, the controller C determines that the working state of the detector loop H is an open circuit state. When it is determined that the loop load resistance is between the first resistance threshold Thr1 and the third resistance threshold Thr3, the controller C determines that the working state of the detector loop H is an alarm state. When it is determined that the loop load resistance is between the third resistance threshold Thr3 and the fourth resistance threshold Thr4, the controller C determines that the working state of the detector loop H is a warning state. When it is determined that the loop load resistance is between the fourth resistance threshold Thr4 and the second resistance threshold Thr2, the controller C determines that the working state of the detector loop H is a normal state. The first resistance threshold Thr1<the third resistance threshold Thr3<the fourth resistance threshold Thr4<the second resistance threshold Thr2. It should be noted that the present disclosure does not limit the specific values ​​of each resistance threshold, and can be set according to actual needs.

[0065] In the reverse detection mode, the third transistor Q3 is turned on, the voltage drop on the twelfth resistor R12 is greater than the driving voltage Vgs of the third switch K3, the third switch K3 is turned on, and the voltage of the second voltage source V2 (for example, 5V) flows into the negative line of the loop for reverse detection. At the same time, the third transistor Q3 is turned on so that the fourth switch K4 is in a cut-off state, so that the voltage of the second voltage source V2 can only be output from the negative line of the detector, ensuring the uniqueness of the detection path. The controller C can collect the output voltage of the first output terminal out1, and determine the working state of the detector loop H based on the output voltage of the first output terminal out1. When it is determined that the output voltage of the first output terminal out1 is less than the first voltage threshold Thv1, the controller C determines that the working state of the detector loop H is an open circuit state. When it is determined that the output voltage of the first output terminal out1 is greater than the second voltage threshold Thv2, the controller C determines that the working state of the detector loop H is a short circuit state, and the first voltage threshold Thv1 is less than the second voltage threshold Thv2. When it is determined that the output voltage of the first output terminal out1 is between the first voltage threshold Thv1 and the second voltage threshold Thv2, the controller C determines that the working state of the detector loop H is normal.

[0066] Although not shown in the figure, optionally, the detector loop detection circuit may also include a display device, a speaker, a buzzer, etc., which can be used to display the detection results.

[0067] The detector loop detection circuit disclosed in the present invention supports detecting the working status of a single detector loop. A single detector loop can carry one detector (see Figure 2 ), or multiple detectors (see Figure 5 ).

[0068] Figure 5 FIG. 2 shows a partial circuit diagram of a detector loop detection circuit according to some other embodiments of the present disclosure. Figure 1 and Figure 5 As shown, a single detector loop H may include multiple detectors 10-1, 10-2, 10-3, ..., 10-n, where n is a positive integer. Multiple detectors 10-1 to 10-n are connected in parallel, and are connected in parallel with the terminal resistor E and the reverse diode BD. The controller C enables the detection function of the working state of the detector loop H by controlling the conduction or disconnection of the fifth switch K5 and / or the sixth switch K6, thereby meeting the load requirements of multiple detectors in a single loop.

[0069] The detector loop detection circuit of the present disclosure also supports detecting the working status of multiple detector loops. The detector loop detection circuit includes multiple detector loops. Each detector loop includes one or more detectors. The present disclosure does not limit the number of detectors in the detector loop, and the number of detectors in different detector loops can be the same or different.

[0070] Figure 6 FIG. 2 shows a partial circuit diagram of a detector loop detection circuit according to some other embodiments of the present disclosure. Figure 1 and Figure 6 As shown, the detector loop detection circuit includes a plurality of detector loops H1, H2, ..., Hm, where m is a positive integer. The plurality of detector loops H1-Hm can be coupled to a controller C.

[0071] The detector loop H1 includes a plurality of detectors 10-1, 10-2, 10-3, ..., 10-a, where a is a positive integer. The plurality of detectors 10-1 to 10-a are connected in parallel, and are connected in parallel with the terminal resistor E and the reverse diode BD. The detector loop H1 also includes a fifth switch K5-1 and a sixth switch K6-1. The controller C can enable the detection function of the working state of the detector loop H1 by controlling the conduction or disconnection of the fifth switch K5-1 and the sixth switch K6-1.

[0072] Similarly, the detector loop H2 includes multiple detectors 10-1, 10-2, 10-3, ..., 10-b, where b is a positive integer. Multiple detectors 10-1 to 10-b are connected in parallel and in parallel with the terminal resistor E and the reverse diode BD. The detector loop H2 also includes a fifth switch K5-2 and a sixth switch K6-2. The controller C can enable the detection function of the working state of the detector loop H2 by controlling the conduction or disconnection of the fifth switch K5-2 and the sixth switch K6-2.

[0073] Similarly, the detector loop Hm includes multiple detectors 10-1, 10-2, 10-3, ..., 10-c, where c is a positive integer. Multiple detectors 10-1 to 10-c are connected in parallel and in parallel with the terminal resistor E and the reverse diode BD. The detector loop Hm also includes a fifth switch K5-m and a sixth switch K6-m. The controller C can enable the detection function of the working state of the detector loop Hm by controlling the conduction or disconnection of the fifth switch K5-m and the sixth switch K6-m.

[0074] That is to say, each detector circuit includes a fifth switch and a sixth switch. The controller can switch the detection functions of different detector circuits by controlling the conduction or disconnection of the fifth switch and / or the sixth switch of different detector circuits, and can support time-sharing detection of multiple detector circuits. On this basis, the controller C can determine the working state of the detected detector circuit by collecting the output voltage of the first output terminal out1 and / or the second output terminal out2, based on the output voltage of the first output terminal out1 and / or the second output terminal out2. Figure 1-Figure 4 The same or similar embodiments described herein will not be described in detail herein.

[0075] In some embodiments, in the plurality of detector loops, the first output terminal out1 and the second output terminal out2 of each detector loop may be respectively coupled to the controller.

[0076] In other embodiments, among the plurality of detector loops, the first output terminals out1 of the plurality of detector loops may be integrated into a total first output terminal, and the second output terminals out2 of the plurality of detector loops may be integrated into a total second output terminal. A controller may be coupled to the total first output terminal and the total second output terminal, which may save space and hardware cost.

[0077] In some embodiments, the detector loop detection circuit may further include an operational amplifier circuit (not shown in the figure), a filter circuit (not shown in the figure), and other circuits. The operational amplifier circuit, the filter circuit, and other circuits may be arranged between the first output terminal, the second output terminal, and the controller, or may also be arranged between the total first output terminal, the total second output terminal, and the controller. The operational amplifier circuit may amplify the output signal of the detector loop detection circuit, and the filter circuit may filter the output signal of the detector loop detection circuit, thereby improving the accuracy of the detection result of the detector loop.

[0078] The detectors in the present disclosure should be understood in a broad sense, and the detectors may include fire detectors and / or fire equipment. Fire detectors and / or fire equipment may be, for example, smoke detectors, CO detectors, temperature detectors, combustible gas detectors, sound and light detectors, fire detectors, input and output modules, multi-composite detectors, manual alarm buttons, etc.

[0079] The detector includes a non-addressable detector and / or a non-addressable device. The detector includes a non-addressable fire detector and / or a non-addressable fire device. The non-addressable detector and / or the non-addressable device are independently operated detectors and / or devices. That is, the non-addressable detector and / or the non-addressable fire device can work independently, is not connected to the master controller, is not controlled by the master controller, and does not execute the control command of the master controller.

[0080] The controller may include a central processing unit (CPU), a micro control unit (MCU), and may also include other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components and other similar devices.

[0081] The detector loop detection circuit disclosed in the present invention can detect the working state of the detector loop based on the first detection branch and / or the second detection branch. The working state specifically includes an open circuit state, a normal state, a warning state, an alarm state and a short circuit state, meeting the detection requirements of various working states; supports forward detection mode, supports reverse detection mode, and the detection result is more accurate; supports detection of a single detector loop, supports detection of multiple detector loops, supports multi-loop time-sharing detection, and meets the load requirements of multiple detectors; supports non-edited detector loop detection, supports non-edited fire detector loop detection, with a wide range of applications, simple operation, and easy use; multiple detectors are connected in parallel to the terminal resistor, with high integration and can reduce costs.

[0082] The detector loop detection circuit disclosed in the present invention can determine whether the working state of the detector loop is normal by detecting the working state of the detector loop, thereby putting it in a safe and controllable state to avoid adverse consequences caused by abnormalities in the detector loop.

[0083] The present disclosure also provides a detector circuit detection device, Figure 7 Schematic diagram of a detector loop detection device according to some embodiments of the present disclosure is shown. Figure 7 As shown, the detector loop detection device 200 includes the detector loop detection circuit 100 as described above, the detector includes a fire detector, and the detector includes a non-addressable detector. Although not shown in the figure, the detector detection device 200 may include components such as a housing.

[0084] The detector loop detection device disclosed in the present invention can detect the working state of the detector loop through the above-mentioned detector loop detection circuit. The working state specifically includes open circuit state, normal state, warning state, alarm state and short circuit state, which meets the detection requirements of various working states; supports forward detection mode, supports reverse detection mode, and the detection result is more accurate; supports detection of a single detector loop, supports detection of multiple detector loops, supports multi-loop time-sharing detection, and meets the load requirements of multiple detectors; supports non-edited detector loop detection, supports non-edited fire detector loop detection, with a wide range of applications, simple operation, and easy use; multiple detectors are connected in parallel to the terminal resistor, with high integration and can reduce costs.

[0085] It should be noted that the division of each branch in the detector loop detection circuit, the number of each device and the connection method are only used for exemplary description and do not constitute a limitation to the present disclosure.

[0086] Finally, it should be noted that the above is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Although the present disclosure is described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A detector loop detection circuit, characterized in that: include: a first voltage source; a second voltage source; At least one detector circuit, the detector circuit comprising: at least one detector; A terminal resistor coupled to a reverse diode, wherein the terminal resistor and the reverse diode are connected in parallel to the detector; A first detection branch coupled to the first voltage source and one end of the detector; and A second detection branch coupled to the second voltage source and the other end of the detector; and A controller is coupled to the first detection branch and the second detection branch to detect the working state of the detector loop.

2. The detector loop detection circuit according to claim 1, characterized in that: The first detection branch includes a first input terminal and a second input terminal, the second detection branch includes a third input terminal, and the controller controls the high and low level states of the first input terminal, the second input terminal and the third input terminal to control the detection mode of the detector circuit.

3. The detector loop detection circuit according to claim 2, characterized in that: The detection mode includes a forward detection mode, and the controller enables the forward detection mode by controlling the first input terminal to be set to a high level and the second input terminal and the third input terminal to be set to a low level.

4. The detector loop detection circuit according to claim 2, characterized in that: The detection mode includes a reverse detection mode, and the controller enables the reverse detection mode by controlling the first input terminal to be set to a low level and the second input terminal and the third input terminal to be set to a high level.

5. The detector loop detection circuit according to claim 3 or 4, characterized in that: The first detection branch includes a first output end, and the second detection branch includes a second output end. The controller collects the output voltage of the first output end and / or the second output end, and determines the working state of the detector circuit based on the output voltage of the first output end and / or the second output end.

6. The detector loop detection circuit according to claim 5, characterized in that: The working state of the detector circuit includes one of an open circuit state, a normal state, a warning state, an alarm state and a short circuit state.

7. The detector loop detection circuit according to claim 6, characterized in that: In the reverse detection mode, the controller collects the output voltage of the first output terminal, and determines the working state of the detector circuit based on the output voltage of the first output terminal.

8. The detector loop detection circuit according to claim 5, characterized in that: The first detection branch includes a current limiting circuit, one end of the current limiting circuit is coupled to the first voltage source, and the other end of the current limiting circuit is coupled to the first input terminal.

9. The detector loop detection circuit according to claim 8, characterized in that: The current limiting circuit includes a first transistor, a first resistor, a first diode, a second resistor, a first switch, a third resistor, a second transistor and a fourth resistor, wherein one end of the first resistor is coupled to the first voltage source, and the other end is coupled to the first switch, the emitter of the first transistor is coupled to one end of the first resistor, the base is coupled to the other end of the first resistor, and the collector is coupled to the first switch; The first diode and the second resistor are connected in parallel between the first resistor and the first switch; One end of the third resistor is coupled to the first switch, and the other end is coupled to the collector of the second transistor; one end of the fourth resistor is coupled to the base of the second transistor, and the other end is coupled to the first input terminal; The first detection branch further includes a fifth resistor, the fifth resistor is coupled between the base and the emitter of the second transistor, and the first switch includes a metal oxide semiconductor field effect transistor.

10. The detector loop detection circuit according to claim 8 or 9, characterized in that: The first detection branch includes a sixth resistor and a seventh resistor connected in series, and an eighth resistor and a second switch connected in series, wherein the first output end is coupled between the sixth resistor and the seventh resistor, the second input end is coupled to the second switch, and the second switch includes a metal oxide semiconductor field effect transistor.

11. The detector loop detection circuit according to claim 5, characterized in that: The second detection branch includes a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third transistor, a third switch, a fourth switch and a second diode, wherein one end of the ninth resistor is coupled to the third input terminal, and the other end is coupled to the base of the third transistor, the tenth resistor is coupled between the ninth resistor and the emitter of the third transistor, the collector of the third transistor is coupled to the second voltage source through the twelfth resistor, one end of the third switch is coupled to the second voltage source, and one end is coupled to the collector of the third transistor, one end of the fourth switch is coupled to the collector of the third transistor, and one end is coupled to the second output terminal, the second diode is coupled between the third switch and the fourth switch, one end of the eleventh resistor is coupled between the second output terminal and the fourth switch, and the third switch and the fourth switch include metal oxide semiconductor field effect transistors.

12. The detector loop detection circuit according to claim 5, characterized in that: The first detection branch includes a fifth switch, and the second detection branch includes a sixth switch. The fifth switch is coupled to the first output terminal, and the sixth switch is coupled to the second output terminal. The controller enables the detection function of the detector loop detection circuit by controlling the conduction or disconnection of the fifth switch and / or the sixth switch. The fifth switch and the sixth switch include metal oxide semiconductor field effect transistors.

13. The detector loop detection circuit according to claim 12, characterized in that: The detector comprises a fire detector, and the detector comprises a non-addressable detector.

14. The detector loop detection circuit according to claim 12, characterized in that: The detector loop detection circuit includes a plurality of the detector loops, and the controller switches the detection functions of different detector loops by controlling the on or off of the fifth switch and / or the sixth switch.

15. A detector circuit detection device, characterized in that: The method comprises a detector loop detection circuit as claimed in any one of claims 1 to 14, wherein the detector comprises a fire detector, and the detector comprises a non-addressable detector.

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