Testing device

By using flexible circuit boards and elastic pins in the test device, the bending points in electrical signal transmission are reduced, and the serious problem of signal attenuation in the prior art is solved, and the accuracy of the test results is improved.

CN222952453UActive Publication Date: 2025-06-06ADVANCED SEMICON ENG INC
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Patent Information

Application Number
CN202421628926.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-07-10
Publication Date
2025-06-06
Estimated Expiration
2034-07-10

AI Technical Summary

Technical Problem

The test device in the prior art severe signal attenuation due to multiple turning points during the transmission of electrical signals, which affects the accuracy of the test.

Method used

Instead of the hard circuit board, it is electrically connected to the chip to be tested through pins, and is electrically connected to the detector through flexible circuit boards, reducing the bending point of the conductor circuit and reducing the attenuation of the electrical signal.

Benefits of technology

It effectively reduces the attenuation of the electrical signal during transmission in the test device, avoids signal distortion, and improves the accuracy of the test results.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a testing device, which comprises a first plugboard, and a chip to be tested is arranged on the first plugboard; the pins are electrically connected with the chip to be tested; a first through hole is formed in the first carrier plate, and the first carrier plate is arranged below the first insertion plate; and the flexible circuit board passes through the first through hole, and the flexible circuit board is electrically connected with the chip to be tested through the pins. The testing device has the advantages that attenuation of the electric signals of the testing device in the transmission process is reduced, distortion caused by transmission of the electric signals in the testing device is avoided, and therefore the accuracy of the testing result is improved.
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Description

Technical Field

[0001] The present application relates to the field of chip testing, and in particular, to a testing device. Background Art

[0002] Semiconductor products need to be tested using specialized test equipment. Figure 1 FIG. 2 shows a schematic diagram of a prior art testing device. Figure 1 As shown, the first circuit board 902 includes a first conductor line 905, a chip under test 903 (DUT, Device Under Test) is placed on the first plug board 901, a side of the chip under test 903 with pins faces the first plug board 901, the first plug board 901 is arranged above the first circuit board 902, and a detector 908 is arranged below the first circuit board 902. The pins of the chip under test 903 are electrically connected to the first conductor line 905 on the first circuit board 902 through the first pins 904, the first pins 904 pass through the first plug board 901, one end of the first conductor line 905 is electrically connected to the pins 904, and the other end of the first conductor line 905 is electrically connected to the detector 908 through the electrical connector 906, and a pressing plate 907 is arranged above the chip under test 903 and the first plug board 901, and the pressing plate 907 applies downward pressure to the chip under test 903 and the first plug board 901 so that the pins of the chip under test 903 are in contact with the first pins 904.

[0003] Figure 2 A schematic diagram of another prior art testing device is shown. Figure 2 As shown, the first circuit board 902 includes a first conductor line 905, the second circuit board 910 includes a second conductor line 912, the chip to be tested 903 is placed on the first plug board 901, the second plug board 909 is arranged above the chip to be tested 903 and the first plug board 901, the second circuit board 910 is arranged above the second plug board 909, the side of the chip to be tested 903 with pins faces the second plug board 909, the first plug board 901 is arranged above the first circuit board 902, the detector 908 is arranged below the first circuit board 902, and the pins of the chip to be tested 903 are connected to the first pin 904 through the first pin 904. The second conductor line 912 is electrically connected, the first pin 904 passes through the second plug board 909, the second pin 911 passes through the first plug board 901 and the second plug board 909 and electrically connects the first circuit 905 and the second circuit 912, the first conductor line 905 is electrically connected to the detector 908 through the electrical connector 906, and the pressing plate 907 is arranged above the second circuit board 910. The pressing plate 907 applies downward pressure to the second circuit board 910 so that the pin of the chip 903 to be tested contacts the first pin 904 and the first conductor line 905 and the second conductor line 912 contact the second pin 911 respectively.

[0004] like Figure 1 and Figure 2 As shown, in the test device of the prior art, the first conductor line 905 includes a conductive column 905a and a circuit line 905b. Figure 2 The first conductor line 905 and the second conductor line 912 also need to be electrically connected through the second pin 911. The electrical signal needs to pass through turning points many times during transmission (horizontal circuit line to vertical electric column; horizontal circuit line to vertical pin, etc.). The electrical signal will attenuate at these turning points. As the number of turning points increases, the attenuation of the electrical signal will become more and more serious, and may even cause serious distortion of the signal between the chip to be tested and the detector, affecting the accuracy of the test.

[0005] In summary, there is a need in the art to provide a testing device that can overcome the deficiencies of the prior art. Utility Model Content

[0006] The present application provides a testing device, which can solve the problems of the prior art. The purpose of the present application is achieved through the following technical solutions.

[0007] One embodiment of the present application provides a testing device, which includes: a first plug board, on which a chip to be tested is arranged; pins, which are electrically connected to the chip to be tested; a first carrier board, on which a first through hole is provided, and the first carrier board is arranged below the first plug board; a flexible circuit board, which passes through the first through hole, and the flexible circuit board is electrically connected to the chip to be tested through the pins.

[0008] In some optional embodiments, in the testing device provided according to one of the above embodiments of the present application, the pins are elastic.

[0009] In some optional embodiments, according to the test device provided in one embodiment of the present application, the test device further includes a pressing plate, which is disposed above the chip to be tested and presses the chip to be tested onto the first plug-in board.

[0010] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes a detector, and the detector is electrically connected to the chip to be tested through a flexible printed circuit board.

[0011] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes an electrical connector, and the detector is electrically connected to the flexible printed circuit board through the electrical connector.

[0012] In some optional embodiments, in the test device provided according to one of the above embodiments of the present application, the connection between the flexible circuit board and the pins is located between the first plug board and the first carrier board.

[0013] In some optional embodiments, a test device is provided according to one of the above embodiments of the present application, wherein a second through hole is provided on the first plug board, a side of the chip to be tested on which a pin is provided faces the first plug board, the second through hole is located below the chip to be tested, and the pin is arranged in the second through hole.

[0014] In some optional embodiments, a test device is provided according to one of the above embodiments of the present application, wherein the test device also includes a second plug board, a third through hole is provided on the first plug board, a fourth through hole and a fifth through hole are provided on the second plug board, the second plug board is arranged above the first plug board and the chip to be tested, the pin is arranged in the fifth through hole, the pin is electrically connected to the chip to be tested, and the flexible circuit board also passes through the third through hole and the fourth through hole.

[0015] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the side of the chip to be tested on which the pins are provided faces the second plug-in board, and the fifth through hole is located above the chip to be tested.

[0016] In some optional embodiments, according to the testing device provided by one of the above embodiments of the present application, the first through hole, the third through hole and the fourth through hole are connected to form a channel, and the flexible circuit board passes through the channel.

[0017] In some optional embodiments, according to the test device provided in one embodiment of the present application, the test device further includes a second carrier board, and the second carrier board is disposed above the second plugboard.

[0018] In some optional embodiments, in the test device provided according to one of the above embodiments of the present application, the connection between the flexible circuit board and the pins is located between the second plug board and the second carrier board.

[0019] The advantage of the test device according to the embodiment of the present application is that the attenuation of the electrical signal of the test device during the transmission process is reduced, and the distortion of the electrical signal in the test device caused by transmission is avoided, thereby improving the accuracy of the test result. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Other features, objectives and advantages of the present application will become more apparent through the detailed description of non-limiting embodiments of the present application with reference to the following drawings.

[0021] Figure 1 A schematic diagram of a prior art testing device is shown;

[0022] Figure 2 A schematic diagram showing another prior art testing device;

[0023] Figure 3 A schematic diagram showing signal transmission in a testing device according to an embodiment of the present application is shown;

[0024] Figure 4 A schematic diagram of signal transmission in a testing device according to another embodiment of the present application is shown.

[0025] Numbers and component names: 1-first plugboard, 2-chip to be tested, 3-first carrier board, 4-flexible circuit board, 5-pin, 6-pressing plate, 7-electrical connector, 8-detector, 9-second plugboard, 10-second carrier board, 11-second through hole, 21-pin, 31-first through hole, 32-third through hole, 91-fourth through hole, 92-fifth through hole, A-channel, 901-first plugboard, 902-first circuit board, 903-chip to be tested, 904-first pin, 905-first conductor line, 906-electrical connector, 907-pressing plate, 908-detector, 909-second plugboard, 910-second circuit board, 911-second pin, 912-second conductor line. DETAILED DESCRIPTION

[0026] The specific implementation methods of the present application are described below in conjunction with the accompanying drawings and examples. Through the contents recorded in this specification, those skilled in the art can clearly and completely understand the technical solutions, technical problems solved, and technical effects produced by the present application. It is understood that the specific embodiments described herein are only used to explain the present application, rather than to limit the present application. In addition, for ease of description, only the parts related to the present application are shown in the accompanying drawings.

[0027] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest manner, so that “on” not only means “directly on something,” but also means “on something” including the presence of intermediate components or layers therebetween.

[0028] Additionally, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," "upper," etc. may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

[0029] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of the specification are only used to match the contents recorded in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of the present application, so they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed in the present application. At the same time, the terms such as "on", "first", "second" and "one" quoted in this specification are only for the convenience of narration, and are not used to limit the scope of the implementation of the present application. The change or adjustment of their relative relationship should also be regarded as the scope of the implementation of the present application without substantially changing the technical content.

[0030] The term "layer" as used herein refers to a material portion including an area with a certain thickness. The layer can extend over the entire lower or upper structure, or can have a degree less than the range of the lower or upper structure. In addition, the layer can be a region of a homogeneous or inhomogeneous continuous structure, and its thickness is less than the thickness of the continuous structure. For example, the layer can be located between the top surface and the bottom surface of the continuous structure or between any pair of horizontal planes therebetween. The layer can extend horizontally, vertically and / or along a tapered surface. A substrate can be a layer, one or more layers can be included therein, and / or one or more layers can be present thereon, above and / or below. A layer can include multiple layers. For example, a semiconductor layer can include one or more doped or undoped semiconductor layers, and can have the same or different materials.

[0031] The term "substrate" used in this article is a key carrier in the packaging and testing process, and can also protect the circuit, fix the line and dissipate the waste heat. The substrate can be round or square, and the materials include organic matter: polyamide fiber (Polyamide, PA), polyimide (Polyimide, PI), epoxy resin (Epoxy), poly-p-phenylene benzobisoxazole (Poly-p-phenylene benzobisoxazole, PBO) fiber, FR-4 epoxy glass cloth laminate, PP (PrePreg, prepreg material or semi-cured resin, semi-cured sheet), ABF (Ajinomoto Build-up Film), and / or, inorganic matter: silicon (Si), glass, ceramic, silicon oxide, silicon nitride, tantalum oxide, etc.

[0032] In addition, the embodiments and features in the embodiments of the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0033] Figure 3FIG. 1 is a schematic diagram showing signal transmission in a test device according to an embodiment of the present application. Figure 3 As shown, the test device includes: a first socket 1, on which a chip to be tested 2 is arranged; a pin 5, which is electrically connected to the chip to be tested 2; a first carrier board 3, on which a first through hole 31 is provided, and the first carrier board 3 is arranged below the first socket 1; a flexible circuit board 4, which passes through the first through hole 31, and the flexible circuit board 4 is electrically connected to the chip to be tested 2 through the pin 5.

[0034] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, no circuit or wire for transmitting electrical signals is provided on the first carrier board 3 .

[0035] In some optional embodiments, according to the test device provided by one embodiment of the present application, the flexible printed circuit 4 (FPC) is a flexible printed circuit board made of polyimide and / or polyester film as a substrate. It has the characteristics of high wiring density, light weight, thin thickness, and good bendability. By using the flexible printed circuit board 4 instead of the hard printed circuit board, the bending points of the conductor line can be reduced, thereby reducing the attenuation of the electrical signal during the transmission process.

[0036] In some optional embodiments, in the testing device provided according to one embodiment of the present application, the pin 5 is elastic, for example, the pin 5 is a spring pin.

[0037] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes a pressing plate 6 , which is disposed above the chip to be tested 2 and presses the chip to be tested 2 onto the first plugboard 1 .

[0038] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes a detector 8 , and the detector 8 is electrically connected to the chip to be tested 2 through the flexible circuit board 4 .

[0039] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes an electrical connector 7 , and the detector 8 is electrically connected to the flexible circuit board 4 via the electrical connector 7 .

[0040] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the connection between the flexible circuit board 4 and the pins 5 is located between the first plug board 1 and the first carrier board 3 .

[0041] In some optional embodiments, a test device is provided according to one of the above embodiments of the present application, wherein a second through hole 11 is provided on the first plug board 1, a side of a pin 21 provided on the chip to be tested 2 faces the first plug board 1, the second through hole 11 is located below the chip to be tested 2, and the pin 5 is arranged in the second through hole 11.

[0042] Figure 4 FIG. 2 shows a schematic diagram of signal transmission in a test device according to another embodiment of the present application. Figure 4 As shown, the test device also includes a second plug board 9, a third through hole 32 is provided on the first plug board 1, a fourth through hole 91 and a fifth through hole 92 are provided on the second plug board 9, the second plug board 9 is arranged above the first plug board 1 and the chip to be tested 2, the pin 5 is arranged in the fifth through hole 92, the pin 5 is electrically connected to the chip to be tested 2, and the flexible circuit board 4 also passes through the third through hole 32 and the fourth through hole 91.

[0043] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the side of the chip under test 2 provided with the pins 21 faces the second plug-in board 9 , and the fifth through hole 92 is located above the chip under test 2 .

[0044] In some optional embodiments, according to the testing device provided by one embodiment of the present application, the first through hole 31 , the third through hole 32 and the fourth through hole 91 are connected to form a channel A, and the flexible circuit board 4 passes through the channel A.

[0045] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the test device further includes a second carrier board 10 , and the second carrier board 10 is disposed above the second plugboard 9 .

[0046] In some optional embodiments, in the test device provided according to one of the above embodiments of the present application, no circuit or wire for transmitting electrical signals is disposed on the second carrier board 10 .

[0047] In some optional embodiments, according to the test device provided by one of the above embodiments of the present application, the connection between the flexible circuit board 4 and the pins 5 is located between the second plug board 9 and the second carrier board 10 .

[0048] The advantage of the test device according to the embodiment of the present application is that the attenuation of the electrical signal of the test device during the transmission process is reduced, and the distortion of the electrical signal in the test device caused by transmission is avoided, thereby improving the accuracy of the test result.

[0049] Although the present application has been described and illustrated with reference to the specific embodiments of the present application, these descriptions and illustrations are not intended to limit the present application. It will be clearly understood by those skilled in the art that various changes may be made, and equivalent elements may be substituted within the embodiments without departing from the scope of protection of the present application as defined by the claims. Due to variables in the manufacturing process, etc., there may be differences between the technical reproduction in the present application and the actual device. There may be other embodiments of the present application that are not specifically described. The description and illustrations should be regarded as illustrative, not restrictive, and modifications may be made according to the purpose and spirit of the present application, all of which are within the scope of protection of the claims. Although the methods disclosed herein have been described with reference to specific operations performed in a specific order, it should be understood that these operations may be recombined, subdivided or arranged to form equivalent methods without departing from the teachings of the present application. Therefore, unless specifically indicated herein, the order and grouping of operations do not limit the present application.

Claims

1. A testing device, characterized in that: include: A first plug-in board, on which the chip to be tested is arranged; A pin, wherein the pin is electrically connected to the chip to be tested; A first carrier board, wherein a first through hole is provided on the first carrier board, and the first carrier board is arranged below the first plug board; A flexible circuit board passes through the first through hole, and the flexible circuit board is electrically connected to the chip to be tested through the pins.

2. The testing device according to claim 1, characterized in that: The testing device further comprises a pressing plate, which is arranged above the chip to be tested and presses the chip to be tested onto the first plug-in board.

3. The testing device according to claim 1, characterized in that: The testing device further comprises a detector, and the detector is electrically connected to the chip to be tested through the flexible circuit board.

4. The testing device according to claim 1, characterized in that: The connection point between the flexible circuit board and the pins is located between the first plug board and the first carrier board.

5. The testing device according to claim 1, characterized in that: The first plug board is provided with a second through hole, the side of the chip to be tested on which the pins are provided faces the first plug board, the second through hole is located below the chip to be tested, and the pins are arranged in the second through hole.

6. The testing device according to claim 1, characterized in that: The testing device also includes a second plugboard, a third through hole is provided on the first plugboard, a fourth through hole and a fifth through hole are provided on the second plugboard, the second plugboard is arranged above the first plugboard and the chip to be tested, the pin is arranged in the fifth through hole, the pin is electrically connected to the chip to be tested, and the flexible circuit board also passes through the third through hole and the fourth through hole.

7. The testing device according to claim 6, characterized in that: The side of the chip to be tested on which the pins are arranged faces the second plug board, and the fifth through hole is located above the chip to be tested.

8. The testing device according to claim 6, characterized in that: The first through hole, the third through hole and the fourth through hole are connected to form a channel, and the flexible circuit board passes through the channel.

9. The testing device according to claim 6, characterized in that: The testing device further includes a second carrier board, and the second carrier board is arranged above the second plugboard.

10. The testing device according to claim 9, characterized in that: The connection between the flexible circuit board and the pins is located between the second plug board and the second carrier board.