GaN charger with HDMI interface

Abstract

The utility model relates to a GaN charger with an HDMI interface. The GaN charger comprises a power supply unit; the output of the power supply unit is connected with the input of the voltage reduction unit; the output of the voltage reduction unit is connected with the input of the Type-c interface unit; an HDMI interface unit, wherein the HDMI interface unit is connected with the output of the voltage reduction unit; and the USB interface unit is connected with the output of the voltage reduction unit. The GaN charger with the HDMI interface is small in size, convenient to carry and rich in interface type, meets the multi-purpose charging requirement, has a video output function, and can be directly connected with display equipment for video transmission.

Description

Technical Field

[0001] The present disclosure belongs to the field of chargers, and in particular relates to a GaN charger with an HDMI interface. Background Art

[0002] Currently, the main types of charger interfaces on the market include Type-C interfaces and USB interfaces. With the diversification of electronic device functions, users' demands for chargers are not limited to charging functions, but also hope to integrate more functions, such as video output functions. However, existing chargers are generally large in size and have a single type of interface, which cannot meet the growing needs of users. Utility Model Content

[0003] The utility model provides a GaN charger with an HDMI interface, aiming to solve at least one of the technical problems existing in the prior art.

[0004] The technical solution of the utility model is a GaN charger with an HDMI interface, comprising:

[0005] Power supply unit;

[0006] A step-down unit, wherein the output of the power supply unit is connected to the input of the step-down unit;

[0007] A Type-c interface unit, wherein the output of the step-down unit is connected to the input of the Type-c interface unit;

[0008] An HDMI interface unit, the HDMI interface unit being connected to an output of the step-down unit;

[0009] A USB interface unit is connected to the output of the step-down unit.

[0010] Further, the power supply unit includes a first fuse, a first thermistor, a first filter capacitor, a first power resistor, a second power resistor, a third power resistor, a fourth power resistor, a second filter capacitor, a first current transformer, a first rectifier bridge, a first electrolytic capacitor, a second electrolytic capacitor, a first inductor, a third electrolytic capacitor, a fourth electrolytic capacitor, a fourth diode, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a third diode, an inductor, a sixth resistor, a seventh resistor, a fifth resistor, a second diode, a sixth electrolytic capacitor, a first capacitor, a second capacitor, a first optocoupler, a first power switch chip, an eighth resistor, a ninth resistor, a first zero resistor and a first second capacitor,

[0011] The first end of the first fuse is connected to the live wire terminal L, the first end of the first thermistor is connected to the neutral wire terminal N, the second end of the first fuse, the first end of the first filter capacitor, the first end of the first power resistor, the first end of the third power resistor and the first end of the second filter capacitor are respectively connected to the second input end of the primary coil of the first current transformer, the second end of the first thermistor, the second end of the first filter capacitor, the second end of the second power resistor, the second end of the fourth power resistor and the second end of the second filter capacitor are respectively connected to the second end of the secondary coil of the first current transformer, the second end of the first power resistor is connected to the first end of the second power resistor, and the second end of the third power resistor is connected to the first end of the fourth power resistor;

[0012] The first end of the primary coil and the first end of the secondary coil of the first current transformer are respectively connected to the first rectifier bridge, the positive output end of the first rectifier bridge, the positive end of the first electrolytic capacitor and the positive end of the second electrolytic capacitor are respectively connected to the first end of the first inductor, and the negative output end of the first rectifier bridge, the negative end of the first electrolytic capacitor, the negative end of the second electrolytic capacitor, the negative end of the third electrolytic capacitor and the negative end of the fourth electrolytic capacitor EC4 are respectively grounded;

[0013] The positive terminal of the third electrolytic capacitor, the positive terminal of the fourth electrolytic capacitor, the positive terminal of the fourth diode, the positive terminal of the first resistor, the positive terminal of the second resistor, the positive terminal of the first capacitor and the second terminal on the second side of the inductor are respectively connected to the second end of the first inductor, the first end of the third resistor, the first end of the fourth resistor, the negative terminal of the fourth diode, the second end of the second resistor and the second end of the first resistor are respectively connected to the second end of the first capacitor, the second end of the third resistor and the second end of the fourth resistor are respectively connected to the negative terminal of the third diode, and the positive terminal of the third diode is connected to the first terminal on the second side of the inductor.

[0014] Further, the fifth end of the first side of the inductor and the first end of the sixth resistor are respectively connected to the first end of the fifth resistor, the second end of the fifth resistor, the second diode and the first capacitor are connected in sequence and then grounded, the first end of the seventh resistor and the second end of the sixth resistor are respectively connected to the first end VS of the first power switch chip, the first end of the second capacitor and the collector of the receiving end of the first optocoupler are respectively connected to the second end FB of the first power switch chip, the negative end of the second diode, the first end of the first capacitor and the positive end of the sixth electrolytic capacitor are respectively connected to the third end VCC of the first power switch chip, the second end of the seventh resistor, the second end of the second capacitor, the emitter of the receiving end of the first optocoupler and the fourth end GND of the first power switch chip are grounded, the PAD end of the first power switch chip is respectively grounded through the eighth resistor, the ninth resistor and the first zero resistor, and the fifth end SW5 and the sixth end SW6 of the first power switch chip are respectively grounded through the first and second capacitors.

[0015] Further, the power supply unit also includes a second third resistor, a first sixth capacitor, a fifth electrolytic capacitor, a first fourth resistor, a first seventh resistor, a second field effect tube, a first second resistor, a second output rectifier filter chip, a fourth capacitor, a first third resistor, a first fifth resistor, a first sixth resistor, a third capacitor, and a first eighth resistor.

[0016] The seventh end of the third side of the inductor, the positive end of the fifth electrolytic capacitor, the first end of the first four resistors and the first end of the first seven resistors are connected in sequence and serve as the output end V21 of the power supply unit, the eighth end of the third side of the inductor, the second three resistors, the first six capacitors and the negative end of the fifth electrolytic capacitor are connected in sequence and then grounded, the source of the second field effect tube is connected to the eighth end of the third side of the inductor, the drain of the second field effect tube is grounded, and the gate of the second field effect tube is connected to the fifth end VG of the second output rectifier filter chip,

[0017] The fourth terminal VCC of the second output rectifying and filtering chip is grounded through the fourth capacitor, the third terminal SET of the second output rectifying and filtering chip is grounded through the first three resistors, the second terminal of the second output rectifying and filtering chip is grounded, and the first terminal HV of the second output rectifying and filtering chip is connected to the output terminal V21 of the power supply unit.

[0018] The first end of the transmitting end of the first optical coupler and the first end of the first five resistors are respectively connected to the second end of the first four resistors, and the second end of the transmitting end of the first optical coupler and the second end of the first five resistors are respectively grounded through the seventh diode.

[0019] Furthermore, the voltage reduction unit includes a first voltage reduction module and a second voltage reduction module, and inputs of the first voltage reduction module and the second voltage reduction module are respectively connected to outputs of the power supply unit.

[0020] Further, the first step-down module includes a first second capacitor, a first fourth capacitor, a ninth capacitor, a fifth capacitor, a second sixth resistor, a third step-down chip, a second fourth resistor, a first seventh capacitor, a second inductor, a seventh electrolytic capacitor, a seventh capacitor, a first ninth resistor, and a second zero resistor.

[0021] The first ends of the first two capacitors, the first four capacitors and the ninth capacitor are respectively connected to the VIN end of the third buck chip, the second ends of the first two capacitors, the first four capacitors, the ninth capacitor and the GND end of the third buck chip are respectively grounded, the BST end of the third buck chip is grounded through the fifth capacitor, the second six resistors, the second four resistors and the first seven capacitors in sequence, the second ends of the second six resistors and the SW end of the third buck chip are respectively connected to the first end of the second inductor, the second end of the second inductor, the positive terminal of the seventh electrolytic capacitor, the first end of the seventh capacitor and the first end of the first nine resistors are sequentially connected and output the voltage V01, the second end of the seventh electrolytic capacitor is grounded, the second end of the first nine resistors and the first end of the second zero resistor are respectively connected to the FB end of the third buck chip;

[0022] The second step-down module includes a first zero capacitor, a first third capacitor, a first fifth capacitor, a sixth capacitor, a twenty-seventh resistor, a fourth step-down chip, a twenty-fifth resistor, a first eighth capacitor, a third inductor, an eighth electrolytic capacitor, an eighth capacitor, a twenty-first resistor, and a second second resistor.

[0023] The first ends of the first zero capacitor, the first third capacitor and the first fifth capacitor are respectively connected to the VIN end of the fourth buck chip, the second ends of the first zero capacitor, the first third capacitor, the first fifth capacitor and the GND end of the fourth buck chip are respectively grounded, the BST end of the fourth buck chip is grounded through the sixth capacitor, the second seventh resistor, the second fifth resistor and the first eighth capacitor in sequence, the second end of the second seventh resistor and the SW end of the fourth buck chip are respectively connected to the first end of the third inductor, the second end of the third inductor, the positive terminal of the eighth electrolytic capacitor, the first end of the eighth capacitor and the first end of the second first resistor are connected in sequence and output the voltage V02, the second end of the eighth electrolytic capacitor is grounded, and the second end of the second first resistor and the first end of the second second resistor are respectively connected to the FB end of the fourth buck chip.

[0024] Further, the Type-c interface unit includes a first Type-c interface module and a second Type-c interface module, the input of the first Type-c interface module is connected to the output of the first step-down module, and the input of the second Type-c interface module is connected to the output of the second step-down module;

[0025] The first Type-c interface module includes a third field effect transistor, a second zero capacitor, a second first capacitor C21, a third zero resistor, a second second capacitor, a third first resistor, a third second resistor, a third third resistor, a fifth charging protocol chip, a second third capacitor, a second fourth capacitor, a third fourth resistor, a third fifth resistor, a third sixth resistor, a third seventh resistor, a second fifth capacitor, a second sixth capacitor and a first TYPE-C interface,

[0026] The VCC terminal of the fifth charging protocol chip is grounded through the second first capacitor, the CMPA terminal of the fifth charging protocol chip is grounded through the third zero resistor, the CMPI terminal of the fifth charging protocol chip is connected to the FB1 terminal through the third first resistor and the second second capacitor in sequence, the FB terminal of the fifth charging protocol chip is connected to the FB1 terminal through the third second resistor, the CSN terminal of the fifth charging protocol chip is grounded, the CSP terminal of the fifth charging protocol chip is grounded through the third third resistor, the DPA terminal and the DMA terminal of the fifth charging protocol chip are connected to the SCL signal terminal, the CC2 terminal of the fifth charging protocol chip is grounded through the second fourth capacitor, the CC1 terminal of the fifth charging protocol chip is grounded through the second fifth capacitor, the COUT1G of the fifth charging protocol chip is connected to the gate of the third field effect transistor, the source of the third field effect transistor is connected to the VO1 terminal, and the drain of the third field effect transistor is connected to the VBUS terminal;

[0027] The CC2 end of the first TYPE-C interface is connected to the CC2 end of the fifth charging protocol chip through the third-fourth resistor, the DP1 end and DP2 end of the first TYPE-C interface are respectively connected to the DPC end of the fifth charging protocol chip through the third-fifth resistor, the DN1 end and DN2 end of the first TYPE-C interface are respectively connected to the DMC end of the fifth charging protocol chip through the third-sixth resistor, and the CC1 end of the first TYPE-C interface is connected to the CC1 end of the fifth charging protocol chip through the third-seventh resistor.

[0028] Further, the second Type-c interface module includes a fourth field effect tube, a third zero capacitor, a third one capacitor, a fourth zero resistor, a third two capacitors, a fourth one resistor, a fourth two resistors, a fourth three resistors, a sixth charging protocol chip, a third three capacitor, a third four capacitor, a fourth four resistor, a fourth five resistor, a fourth six resistor, a fourth seven resistor, a third five capacitor, a third six capacitor and a second TYPE-C interface,

[0029] The VCC terminal of the sixth charging protocol chip is grounded through the third-first capacitor, the CMPA terminal of the sixth charging protocol chip is grounded through the fourth zero resistor, the CMPI terminal of the sixth charging protocol chip is connected to the FB2 terminal through the fourth-first resistor and the third-second capacitor in sequence, the FB terminal of the sixth charging protocol chip is connected to the FB2 terminal through the fourth-second resistor, the CSN terminal of the sixth charging protocol chip is grounded, the CSP terminal of the sixth charging protocol chip is grounded through the fourth-third resistor, the DPA terminal and the DMA terminal of the sixth charging protocol chip are connected to the SCL signal terminal, the CC2 terminal of the sixth charging protocol chip is grounded through the third-fourth capacitor, the CC1 terminal of the sixth charging protocol chip is grounded through the third-fifth capacitor, the COUT1G of the sixth charging protocol chip is connected to the gate of the fourth field effect transistor, the source of the fourth field effect transistor is connected to the VO2 terminal, and the drain of the third field effect transistor is connected to the VBUS terminal;

[0030] The CC2 end of the second TYPE-C interface is connected to the CC2 end of the sixth charging protocol chip through the fourth fourth resistor, the DP1 end and DP2 end of the second TYPE-C interface are respectively connected to the DPC end of the sixth charging protocol chip through the fourth fifth resistor, the DN1 end and DN2 end of the second TYPE-C interface are respectively connected to the DMC end of the sixth charging protocol chip through the fourth sixth resistor, and the CC1 end of the second TYPE-C interface is connected to the CC1 end of the sixth charging protocol chip through the fourth seventh resistor.

[0031] Further, the HDMI interface unit includes a seventh protocol chip and an HDMI communication interface connected in sequence, and the HDMINTX_DP2 port, HDMINTX_DM2 port, HDMINTX_DP1 port, HDMINTX_DM1 port, HDMINTX_DP0 port, and HDMINTX_DM0 port of the seventh protocol chip are respectively connected to the first end, the third end, the fourth end, the sixth end, the seventh end, and the ninth end of the HDMI communication interface, and the HDMITX_SCL port, HDMITX_SDA port, and HDMITX_HPD port of the seventh protocol chip are respectively connected to the fifteenth port, the sixteenth port, and the nineteenth port of the HDMI communication interface.

[0032] Further, the USB interface unit includes an eighth chip and a USB communication interface connected in sequence, and the EN terminal of the eighth chip is connected to the DPPX_HPD port of the seventh protocol chip through a fifth third resistor.

[0033] The beneficial effects of the utility model are as follows:

[0034] In the present application, the GaN charger with an HDMI interface is small in size, easy to carry, has a variety of interface types, meets multi-purpose charging needs, has a video output function, and can be directly connected to a display device for video transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is a circuit block diagram of a GaN charger with an HDMI interface of the utility model.

[0036] Figure 2 It is a block diagram of a laser driver unit of a GaN charger with an HDMI interface of the utility model.

[0037] Figure 3 It is a block diagram of a photodiode detection unit of a GaN charger with an HDMI interface of the utility model.

[0038] Figure 4 The utility model is a circuit diagram of a photodiode detection unit of a GaN charger with an HDMI interface.

[0039] Figure 5 The utility model is a block diagram of a nanoampere current measurement unit of a GaN charger with an HDMI interface.

[0040] Figure 6 The utility model is a circuit diagram of a nanoampere-level current measurement unit of a GaN charger with an HDMI interface.

[0041] Figure 7 It is a block diagram of the seventh protocol chip U7 and the HDMI communication interface CON_HDMI of the GaN charger with HDMI interface of the utility model.

[0042] Figure 8 The utility model is a circuit diagram of a USB interface unit of a GaN charger with an HDMI interface.

[0043] In the above figure, 100 is a power supply unit; 200 is a step-down unit; 300 is a Type-c interface unit; 400 is an HDMI interface unit; and 500 is a USB interface unit. DETAILED DESCRIPTION

[0044] The following will be combined with the embodiments and drawings to clearly and completely describe the concept, specific structure and technical effects of the utility model, so as to fully understand the purpose, scheme and effect of the utility model. It should be noted that the embodiments and features in the embodiments of this application can be combined with each other without conflict.

[0045] It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it can be directly fixed or connected to the other feature, or it can be indirectly fixed or connected to the other feature. In addition, the descriptions of up, down, left, right, top, bottom, etc. used in the present invention are only relative to the relative positional relationship of the various components of the present invention in the accompanying drawings.

[0046] In addition, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art. The terms used in this specification are only for describing specific embodiments, not for limiting the present invention. The term "and / or" used herein includes any combination of one or more related listed items.

[0047] It should be understood that, although the terms first, second, third, etc. may be used to describe various elements in the present disclosure, these elements should not be limited to these terms. These terms are only used to distinguish elements of the same type from each other. For example, without departing from the scope of the present disclosure, the first element may also be referred to as the second element, and similarly, the second element may also be referred to as the first element.

[0048] Reference Figures 1 to 8 In this application, a GaN charger with an HDMI interface is proposed, comprising:

[0049] A power supply unit 100;

[0050] A step-down unit 200, wherein the output of the power supply unit 100 is connected to the input of the step-down unit 200;

[0051] A Type-c interface unit 300, wherein the output of the voltage reduction unit 200 is connected to the input of the Type-c interface unit 300;

[0052] An HDMI interface unit 400, wherein the HDMI interface unit 400 is connected to the output of the voltage reduction unit 200;

[0053] The USB interface unit 500 is connected to the output of the voltage reduction unit 200 .

[0054] The beneficial effects of the utility model are as follows:

[0055] In the present application, the GaN charger with an HDMI interface is small in size, easy to carry, has a variety of interface types, meets multi-purpose charging needs, has a video output function, and can be directly connected to a display device for video transmission.

[0056] Applications of Gallium Nitride (GaN) Technology:

[0057] Principle: GaN is a wide bandgap semiconductor material with the characteristics of high electron mobility and high breakdown voltage, which enables it to work efficiently at high frequencies.

[0058] Improvement and Innovation: Using GaN power chips to replace traditional silicon-based chips greatly improves charging efficiency and power density, and reduces the size and weight of the charger.

[0059] Technological progress and effects: GaN technology enables the charger to provide higher power output in a small size, improving portability and user experience.

[0060] Multifunctional interface design:

[0061] Principle: Integrate multiple interface types (Type-C, PD, USB, HDMI), and achieve multi-function integration through multi-channel power management and data transmission control.

[0062] Improvement and Innovation: Designed and implemented a multi-functional interface system that is compatible with multiple fast charging protocols and video transmission standards, supporting simultaneous connection and operation of multiple devices.

[0063] Technological progress and effects: Users can use a single charger to charge multiple devices at the same time and output video through the HDMI interface, which greatly improves the compatibility and ease of use of the devices.

[0064] Intelligent power management and load balancing:

[0065] Principle: The power management chip monitors the current and voltage status of each interface in real time and makes dynamic adjustments to ensure stable output of each interface.

[0066] Improvement and Innovation: Adopting multi-channel power management module and combining with load balancing algorithm, it can intelligently distribute current when multiple devices are charging at the same time to avoid overloading of a single channel.

[0067] Technological progress and effects: Significantly improved charging efficiency and safety, prevented equipment from overheating and overloading, and improved the reliability of the charger.

[0068] Efficient Heat Dissipation Design:

[0069] Principle: Use high thermal conductivity materials and air convection principle to achieve rapid conduction and dissipation of heat inside the charger.

[0070] Improvement and innovation: Built-in high-efficiency heat sink and reasonable heat dissipation holes designed on the shell to form an effective air convection channel.

[0071] Technological progress and effects: Ensure that the charger maintains an appropriate temperature when outputting high power, extend the life of the equipment, and improve user safety.

[0072] Security protection mechanism:

[0073] Principle: Through current, voltage and temperature monitoring, the working status of the charger is detected in real time and the protection mechanism is automatically triggered.

[0074] Improvement and Innovation: Multiple protection circuits are built in, including over-current protection, over-temperature protection, and short-circuit protection, ensuring a quick response when abnormal situations occur.

[0075] Technological progress and effects: Provide comprehensive safety protection, prevent equipment damage and user risks, and improve the overall safety performance of the charger.

[0076] The utility model adopts GaN technology to significantly reduce the size of the charger, improve charging efficiency, and add an HDMI video interface to expand the function of the charger, so that it can not only charge a variety of devices, but also realize video transmission to meet the diverse needs of users. The intelligent power management module ensures the safe and stable output of each interface through load balancing technology, greatly improving the reliability of the charger and user experience.

[0077] Further, refer to Figure 2 The power supply unit 100 includes a first fuse F1, a first thermistor NTC1, a first filter capacitor CX1, a first power resistor RX1, a second power resistor RX2, a third power resistor RX3, a fourth power resistor RX4, a second filter capacitor CX2, a first current transformer LF1, a first rectifier bridge DB1, a first electrolytic capacitor EC1, a second electrolytic capacitor EC2, a first inductor L1, a third electrolytic capacitor EC3, a fourth electrolytic capacitor EC4, a fourth diode D4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a third diode D3, an inductor INDUCTOR, a sixth resistor R6, a seventh resistor R7, a fifth resistor R5, a second diode D2, a sixth electrolytic capacitor EC6, a first capacitor C11, a second capacitor C2, a first optocoupler U1, a first power switch chip Q1, an eighth resistor R8, a ninth resistor R9, a first zero resistor R10 and a first second capacitor C12,

[0078] The first end of the first fuse F1 is connected to the live terminal L, the first end of the first thermistor NTC1 is connected to the neutral terminal N, the second end of the first fuse F1, the first end of the first filter capacitor CX1, the first end of the first power resistor RX1, the first end of the third power resistor RX3 and the first end of the second filter capacitor CX2 are respectively connected to the second input end of the primary coil of the first current transformer LF1, the second end of the first thermistor NTC1, the second end of the first filter capacitor CX1, the second end of the second power resistor RX2, the second end of the fourth power resistor RX4 and the second end of the second filter capacitor CX2 are respectively connected to the second end of the secondary coil of the first current transformer LF1, the second end of the first power resistor RX1 is connected to the first end of the second power resistor RX2, and the second end of the third power resistor RX3 is connected to the first end of the fourth power resistor RX4;

[0079] The first end of the primary coil and the first end of the secondary coil of the first current transformer LF1 are respectively connected to the first rectifier bridge DB1, the positive output end of the first rectifier bridge DB1, the positive end of the first electrolytic capacitor EC1 and the positive end of the second electrolytic capacitor EC2 are respectively connected to the first end of the first inductor L1, and the negative output end of the first rectifier bridge DB1, the negative end of the first electrolytic capacitor EC1, the negative end of the second electrolytic capacitor EC2, the negative end of the third electrolytic capacitor EC3 and the negative end of the fourth electrolytic capacitor EC4 are respectively grounded;

[0080] The positive terminal of the third electrolytic capacitor EC3, the positive terminal of the fourth electrolytic capacitor EC4, the positive terminal of the fourth diode D4, the positive terminal of the first resistor R1, the positive terminal of the second resistor R2, the positive terminal of the first capacitor C1 and the second terminal on the second side of the inductor INDUCTOR are respectively connected to the second end of the first inductor L1, the first end of the third resistor R3, the first end of the fourth resistor R4, the negative terminal of the fourth diode D4, the second end of the second resistor R2 and the second end of the first resistor R1 are respectively connected to the second end of the first capacitor C1, the second end of the third resistor R3 and the second end of the fourth resistor R4 are respectively connected to the negative terminal of the third diode D3, and the positive terminal of the third diode D3 is connected to the first terminal on the second side of the inductor INDUCTOR.

[0081] Further, refer to Figure 2, the fifth end of the first side of the inductor INDUCTOR and the first end of the sixth resistor R6 are respectively connected to the first end of the fifth resistor R5, the second end of the fifth resistor R5, the second diode D2 and the first capacitor C11 are connected in sequence and then grounded, the first end of the seventh resistor R7 and the second end of the sixth resistor R6 are respectively connected to the first end VS of the first power switch chip Q1, the first end of the second capacitor C2 and the collector of the receiving end U1B of the first optical coupler U1 are respectively connected to the second end FB of the first power switch chip Q1, and the cathode of the second diode D2 The first end, the first end of the first capacitor C11 and the positive end of the sixth electrolytic capacitor EC6 are respectively connected to the third end VCC of the first power switch chip Q1, the second end of the seventh resistor R7, the second end of the second capacitor C2, the emitter of the receiving end U1B of the first optical coupler U1 and the fourth end GND of the first power switch chip Q1 are grounded, the PAD end of the first power switch chip Q1 is respectively grounded through the eighth resistor R8, the ninth resistor R9 and the first zero resistor R10, and the fifth end SW5 and the sixth end SW6 of the first power switch chip Q1 are respectively grounded through the first second capacitor C12.

[0082] Further, refer to Figure 2 The power supply unit 100 further includes a second third resistor R23, a first sixth capacitor C16, a fifth electrolytic capacitor EC5, a first fourth resistor R14, a first seventh resistor R17, a second field effect transistor Q2, a first second resistor R12, a second output rectifier filter chip U2, a fourth capacitor C4, a first third resistor R13, a first fifth resistor R15, a first sixth resistor R16, a third capacitor C3, and a first eighth resistor R18.

[0083] The seventh end of the third side of the inductor INDUCTOR, the positive end of the fifth electrolytic capacitor EC5, the first end of the first four resistors R14 and the first end of the first seven resistors R17 are connected in sequence and serve as the output end V21 of the power supply unit 100, the eighth end of the third side of the inductor INDUCTOR, the second three resistors R23, the first six capacitors C16 and the negative end of the fifth electrolytic capacitor EC5 are connected in sequence and then grounded, the source S of the second field effect transistor Q2 is connected to the eighth end of the third side of the inductor INDUCTOR, the drain D of the second field effect transistor Q2 is grounded, and the gate G of the second field effect transistor Q2 is connected to the fifth end VG of the second output rectifier filter chip U2,

[0084] The fourth terminal VCC of the second output rectifying and filtering chip U2 is grounded through the fourth capacitor C4, the third terminal SET of the second output rectifying and filtering chip U2 is grounded through the first three resistors R13, the second terminal of the second output rectifying and filtering chip U2 is grounded, and the first terminal HV of the second output rectifying and filtering chip U2 is connected to the output terminal V21 of the power supply unit 100.

[0085] The first end of the transmitting end U1A of the first optical coupler U1 and the first end of the first fifth resistor R15 are respectively connected to the second end of the first fourth resistor R14, and the second end of the transmitting end U1A of the first optical coupler U1 and the second end of the first fifth resistor R15 are respectively grounded through the seventh diode U7TL431.

[0086] Further, refer to Figure 3 and Figure 4 The step-down unit 200 includes a first step-down module and a second step-down module, and the inputs of the first step-down module and the second step-down module are respectively connected to the output of the power supply unit 100.

[0087] Further, refer to Figure 3 The first step-down module includes a first second capacitor C12, a first fourth capacitor C14, a ninth capacitor C9, a fifth capacitor C5, a second sixth resistor R26, a third step-down chip U3, a second fourth resistor R24, a first seventh capacitor C17, a second inductor L2, a seventh electrolytic capacitor EC7, a seventh capacitor C7, a first ninth resistor R19 and a second zero resistor R20,

[0088] The first ends of the first two capacitors C12, the first four capacitors C14 and the ninth capacitor C9 are respectively connected to the VIN end of the third buck chip U3, the second ends of the first two capacitors C12, the first four capacitors C14, the ninth capacitor C9 and the GND end of the third buck chip U3 are respectively grounded, the BST end of the third buck chip U3 is grounded in sequence through the fifth capacitor C5, the second six resistors R26, the second four resistors R24 and the first seven capacitors C17, the second end of the second six resistors R26 and the SW end of the third buck chip U3 are respectively connected to the first end of the second inductor L2, the second end of the second inductor L2, the positive terminal of the seventh electrolytic capacitor EC7, the first end of the seventh capacitor C7 and the first end of the first nine resistors R19 are sequentially connected and output the voltage V01, the second end of the seventh electrolytic capacitor EC7 is grounded, the second end of the first nine resistors R19 and the first end of the second zero resistor R20 are respectively connected to the FB end of the third buck chip U3;

[0089] Reference Figure 4The second step-down module includes a first zero capacitor C10, a first third capacitor C13, a first fifth capacitor C15, a sixth capacitor C6, a second seventh resistor R27, a fourth step-down chip U4, a second fifth resistor R25, a first eighth capacitor C18, a third inductor L3, an eighth electrolytic capacitor EC8, an eighth capacitor C8, a second first resistor R21 and a second second resistor R22,

[0090] The first ends of the first zero capacitor C10, the first third capacitor C13 and the first fifth capacitor C15 are respectively connected to the VIN end of the fourth buck chip U4, the second ends of the first zero capacitor C10, the first third capacitor C13, the first fifth capacitor C15 and the GND end of the fourth buck chip U4 are respectively grounded, the BST end of the fourth buck chip U4 is grounded through the sixth capacitor C6, the second seventh resistor R27, the second fifth resistor R25 and the first eighth capacitor C18 in sequence, the second end of the second seventh resistor R27 and the SW end of the fourth buck chip U4 are respectively connected to the first end of the third inductor L3, the second end of the third inductor L3, the positive terminal of the eighth electrolytic capacitor EC8, the first end of the eighth capacitor C8 and the first end of the second first resistor R21 are connected in sequence and output the voltage V02, the second end of the eighth electrolytic capacitor EC8 is grounded, the second end of the second first resistor R21 and the first end of the second second resistor R22 are respectively connected to the FB end of the fourth buck chip U4.

[0091] Further, refer to Figure 5 and Figure 6 , the Type-c interface unit 300 includes a first Type-c interface module and a second Type-c interface module, the input of the first Type-c interface module is connected to the output of the first step-down module, and the input of the second Type-c interface module is connected to the output of the second step-down module;

[0092] Reference Figure 5 , the first Type-c interface module includes a third field effect transistor Q3, a second zero capacitor C20, a second first capacitor C21, a third zero resistor R30, a second second capacitor C22, a third first resistor R31, a third second resistor R32, a third third resistor R33, a fifth charging protocol chip U5, a second third capacitor C23, a second fourth capacitor C24, a third fourth resistor R34, a third fifth resistor R35, a third sixth resistor R36, a third seventh resistor R37, a second fifth capacitor C25, a second sixth capacitor C26 and a first TYPE-C interface TYPE-C1,

[0093] The VCC terminal of the fifth charging protocol chip U5 is grounded through the second first capacitor C21, the CMPA terminal of the fifth charging protocol chip U5 is grounded through the third zero resistor R30, the CMPI terminal of the fifth charging protocol chip U5 is connected to the FB1 terminal through the third first resistor R31 and the second second capacitor C22 in sequence, the FB terminal of the fifth charging protocol chip U5 is connected to the FB1 terminal through the third second resistor R32, the CSN terminal of the fifth charging protocol chip U5 is grounded, the CSP terminal of the fifth charging protocol chip U5 is grounded through the third third resistor R33, the DPA terminal and the DMA terminal of the fifth charging protocol chip U5 are connected to the SCL signal terminal, the CC2 terminal of the fifth charging protocol chip U5 is grounded through the second fourth capacitor C24, the CC1 terminal of the fifth charging protocol chip U5 is grounded through the second fifth capacitor C25, the COUT1G of the fifth charging protocol chip U5 is connected to the gate G of the third field effect transistor Q3, the source S of the third field effect transistor Q3 is connected to the VO1 terminal, and the drain D of the third field effect transistor Q3 is connected to the VBUS terminal;

[0094] The CC2 end of the first TYPE-C interface TYPE-C1 is connected to the CC2 end of the fifth charging protocol chip U5 through the third-fourth resistor R34, the DP1 end and DP2 end of the first TYPE-C interface TYPE-C1 are respectively connected to the DPC end of the fifth charging protocol chip U5 through the third-fifth resistor R35, the DN1 end and DN2 end of the first TYPE-C interface TYPE-C1 are respectively connected to the DMC end of the fifth charging protocol chip U5 through the third-sixth resistor R36, and the CC1 end of the first TYPE-C interface TYPE-C1 is connected to the CC1 end of the fifth charging protocol chip U5 through the third-seventh resistor R37.

[0095] Further, refer to Figure 6 , the second Type-c interface module includes a fourth field effect transistor Q4, a third zero capacitor C30, a third first capacitor C31, a fourth zero resistor R40, a third second capacitor C32, a fourth first resistor R41, a fourth second resistor R42, a fourth third resistor R43, a sixth charging protocol chip U6, a third third capacitor C33, a third fourth capacitor C34, a fourth fourth resistor R44, a fourth fifth resistor R45, a fourth sixth resistor R46, a fourth seventh resistor R47, a third fifth capacitor C35, a third sixth capacitor C36 and a second TYPE-C interface TYPE-C2,

[0096] The VCC terminal of the sixth charging protocol chip U6 is grounded through the third first capacitor C31, the CMPA terminal of the sixth charging protocol chip U6 is grounded through the fourth zero resistor R40, the CMPI terminal of the sixth charging protocol chip U6 is connected to the FB2 terminal through the fourth first resistor R41 and the third second capacitor C32 in sequence, the FB terminal of the sixth charging protocol chip U6 is connected to the FB2 terminal through the fourth second resistor R42, the CSN terminal of the sixth charging protocol chip U6 is grounded, and the CSP terminal of the sixth charging protocol chip U6 is connected to the ground through the fourth first resistor R41 and the third second capacitor C32 in sequence. The fourth three resistor R43 is grounded, the DPA terminal and the DMA terminal of the sixth charging protocol chip U6 are connected to the SCL signal terminal, the CC2 terminal of the sixth charging protocol chip U6 is grounded through the third four capacitor C34, the CC1 terminal of the sixth charging protocol chip U6 is grounded through the third five capacitor C35, the COUT1G of the sixth charging protocol chip U6 is connected to the gate G of the fourth field effect transistor Q4, the source S of the fourth field effect transistor Q4 is connected to the VO2 terminal, and the drain D of the third field effect transistor Q3 is connected to the VBUS terminal;

[0097] The CC2 end of the second TYPE-C interface TYPE-C2 is connected to the CC2 end of the sixth charging protocol chip U6 through the fourth fourth resistor R44, the DP1 end and DP2 end of the second TYPE-C interface TYPE-C2 are respectively connected to the DPC end of the sixth charging protocol chip U6 through the fourth fifth resistor R45, the DN1 end and DN2 end of the second TYPE-C interface TYPE-C2 are respectively connected to the DMC end of the sixth charging protocol chip U6 through the fourth sixth resistor R46, and the CC1 end of the second TYPE-C interface TYPE-C2 is connected to the CC1 end of the sixth charging protocol chip U6 through the fourth seventh resistor R47.

[0098] Further, refer to Figure 7 The HDMI interface unit 400 includes a seventh protocol chip U7 and an HDMI communication interface CON_HDMI connected in sequence, and the HDMINTX_DP2 port, HDMINTX_DM2 port, HDMINTX_DP1 port, HDMINTX_DM1 port, HDMINTX_DP0 port, and HDMINTX_DM0 port of the seventh protocol chip U7 are respectively connected to the first end, the third end, the fourth end, the sixth end, the seventh end, and the ninth end of the HDMI communication interface CON_HDMI, and the HDMITX_SCL port, HDMITX_SDA port, and HDMITX_HPD port of the seventh protocol chip U7 are respectively connected to the fifteenth port, the sixteenth port, and the nineteenth port of the HDMI communication interface CON_HDMI.

[0099] Further, refer to Figure 8The USB interface unit 500 includes an eighth chip U8 and a USB communication interface CON_USB connected in sequence, and the EN terminal of the eighth chip U8 is connected to the DPPX_HPD port of the seventh protocol chip U7 through a fifth third resistor R53.

[0100] In a specific embodiment, the shell of the GaN charger with HDMI interface is made of high-strength fireproof material, which has good heat dissipation and durability. The motherboard integrates GaN power chip and is equipped with Type-C interface, PD interface, USB interface, HDMI interface, etc. The power management module is responsible for current and voltage conversion and regulation to ensure stable output of each interface. The heat dissipation system includes built-in heat sink and external heat dissipation holes to ensure that the charger maintains a suitable temperature when working efficiently.

[0101] The main technical features include:

[0102] a) GaN power chip: improve charging efficiency, reduce energy consumption and reduce size.

[0103] b) Multi-function interface: Type-C full-function interface supports data transmission and video output, PD interface supports high-power fast charging, USB interface supports multi-device charging, and HDMI interface supports high-definition audio and video output.

[0104] c) Intelligent power management: The built-in chip monitors current and voltage in real time and automatically adjusts output to ensure safety and efficiency.

[0105] Connection relationship between each part:

[0106] a) The Type-C interface connects to the multi-function control chip on the motherboard and is responsible for data and video transmission.

[0107] b) The PD interface is connected to the mainboard power management module and supports high-power fast charging.

[0108] c) The USB port is connected to the mainboard through the power management module and supports regular charging.

[0109] d) The HDMI interface is connected to the mainboard through the video processing chip to achieve high-definition audio and video output.

[0110] Operation process:

[0111] a) Plug the charger into a power socket and the charger starts working.

[0112] b) Connecting to Type-C interface devices can realize charging and data transmission.

[0113] c) Connect to PD interface device for fast charging.

[0114] d) Connect to a USB interface device for normal charging.

[0115] e) Video output can be achieved by connecting a display device via the HDMI interface.

[0116] The above is only a preferred embodiment of the utility model. The utility model is not limited to the above implementation. As long as the technical effect of the utility model is achieved by the same means, any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the scope of protection of the present disclosure. All should belong to the protection scope of the utility model. Within the protection scope of the utility model, its technical solution and / or implementation method can have various modifications and changes.

Claims

1. A GaN charger with an HDMI interface, characterized in that: include: Power Supply Unit (100); A step-down unit (200), the output of the power supply unit (100) being connected to the input of the step-down unit (200); A Type-c interface unit (300), wherein the output of the voltage reduction unit (200) is connected to the input of the Type-c interface unit (300); An HDMI interface unit (400), the HDMI interface unit (400) being connected to the output of the voltage reduction unit (200); A USB interface unit (500), the USB interface unit (500) being connected to an output of the voltage reduction unit (200); The HDMI interface unit (400) comprises a seventh protocol chip (U7) and an HDMI communication interface (CON_HDMI) connected in sequence, wherein the HDMINTX_DP2 port, HDMINTX_DM2 port, HDMINTX_DP1 port, HDMINTX_DM1 port, HDMINTX_DP0 port and HDMINTX_DM0 port of the seventh protocol chip (U7) are respectively connected to the first end, the third end, the fourth end, the sixth end, the seventh end and the ninth end of the HDMI communication interface (CON_HDMI), and the HDMITX_SCL port, HDMITX_SDA port and HDMITX_HPD port of the seventh protocol chip (U7) are respectively connected to the fifteenth port, the sixteenth port and the nineteenth port of the HDMI communication interface (CON_HDMI).

2. The GaN charger with HDMI interface according to claim 1, characterized in that: The power supply unit (100) comprises a first fuse (F1), a first thermistor (NTC1), a first filter capacitor (CX1), a first power resistor (RX1), a second power resistor (RX2), a third power resistor (RX3), a fourth power resistor (RX4), a second filter capacitor (CX2), a first current transformer (LF1), a first rectifier bridge (DB1), a first electrolytic capacitor (EC1), a second electrolytic capacitor (EC2), a first inductor (L1), a third electrolytic capacitor (EC3), a fourth electrolytic capacitor (EC4), a fourth diode (D4), A first resistor (R1), a second resistor (R2), a third resistor (R3), a fourth resistor (R4), a first capacitor (C1), a third diode (D3), an inductor (INDUCTOR), a sixth resistor (R6), a seventh resistor (R7), a fifth resistor (R5), a second diode (D2), a sixth electrolytic capacitor (EC6), a first capacitor (C11), a second capacitor (C2), a first optocoupler (U1), a first power switch chip (Q1), an eighth resistor (R8), a ninth resistor (R9), a first zero resistor (R10) and a first second capacitor (C12), The first end of the first fuse (F1) is connected to the live terminal L, the first end of the first thermistor (NTC1) is connected to the neutral terminal N, the second end of the first fuse (F1), the first end of the first filter capacitor (CX1), the first end of the first power resistor (RX1), the first end of the third power resistor (RX3) and the first end of the second filter capacitor (CX2) are respectively connected to the second input end of the primary coil of the first current transformer (LF1), the second end of the first thermistor (NTC1), the second end of the first filter capacitor (CX1), the second end of the second power resistor (RX2), the second end of the fourth power resistor (RX4) and the second end of the second filter capacitor (CX2) are respectively connected to the second end of the secondary coil of the first current transformer (LF1), the second end of the first power resistor (RX1) is connected to the first end of the second power resistor (RX2), and the second end of the third power resistor (RX3) is connected to the first end of the fourth power resistor (RX4); The first end of the primary coil and the first end of the secondary coil of the first current transformer (LF1) are respectively connected to the first rectifier bridge (DB1), the positive output end of the first rectifier bridge (DB1), the positive end of the first electrolytic capacitor (EC1) and the positive end of the second electrolytic capacitor (EC2) are respectively connected to the first end of the first inductor (L1), and the negative output end of the first rectifier bridge (DB1), the negative end of the first electrolytic capacitor (EC1), the negative end of the second electrolytic capacitor (EC2), the negative end of the third electrolytic capacitor (EC3) and the negative end of the fourth electrolytic capacitor (EC4) are respectively grounded; The positive terminal of the third electrolytic capacitor (EC3), the positive terminal of the fourth electrolytic capacitor (EC4), the positive terminal of the fourth diode (D4), the positive terminal of the first resistor (R1), the positive terminal of the second resistor (R2), the positive terminal of the first capacitor (C1) and the second terminal of the second side of the inductor (INDUCTOR) are respectively connected to the second end of the first inductor (L1), the first end of the third resistor (R3), the first end of the fourth resistor (R4), the negative terminal of the fourth diode (D4), the second end of the second resistor (R2) and the second end of the first resistor (R1) are respectively connected to the second end of the first capacitor (C1), the second end of the third resistor (R3) and the second end of the fourth resistor (R4) are respectively connected to the negative terminal of the third diode (D3), and the positive terminal of the third diode (D3) is connected to the first terminal of the second side of the inductor (INDUCTOR).

3. The GaN charger with HDMI interface according to claim 2, characterized in that: The fifth end of the first side of the inductor (INDUCTOR) and the first end of the sixth resistor (R6) are respectively connected to the first end of the fifth resistor (R5); the second end of the fifth resistor (R5), the second diode (D2) and the first capacitor (C11) are connected in sequence and then grounded; the first end of the seventh resistor (R7) and the second end of the sixth resistor (R6) are respectively connected to the first end VS of the first power switch chip (Q1); the first end of the second capacitor (C2) and the collector of the receiving end (U1B) of the first optical coupler (U1) are respectively connected to the second end FB of the first power switch chip (Q1); the negative terminal of the second diode (D2) , the first end of the first capacitor (C11) and the positive end of the sixth electrolytic capacitor (EC6) are respectively connected to the third end VCC of the first power switch chip (Q1), the second end of the seventh resistor (R7), the second end of the second capacitor (C2), the emitter of the receiving end (U1B) of the first optical coupler (U1) and the fourth end GND of the first power switch chip (Q1) are grounded, the PAD end of the first power switch chip (Q1) is grounded through the eighth resistor (R8), the ninth resistor (R9) and the first zero resistor (R10), and the fifth end SW5 and the sixth end SW6 of the first power switch chip (Q1) are grounded through the first second capacitor (C12).

4. The GaN charger with HDMI interface according to claim 2, characterized in that: The power supply unit (100) further comprises a second third resistor (R23), a first sixth capacitor (C16), a fifth electrolytic capacitor (EC5), a first fourth resistor (R14), a first seventh resistor (R17), a second field effect transistor (Q2), a first second resistor (R12), a second output rectifier filter chip (U2), a fourth capacitor (C4), a first third resistor (R13), a first fifth resistor (R15), a first sixth resistor (R16), a third capacitor (C3), and a first eighth resistor (R18). The seventh end of the third side of the inductor (INDUCTOR), the positive end of the fifth electrolytic capacitor (EC5), the first end of the first four resistors (R14) and the first end of the first seven resistors (R17) are connected in sequence and serve as the output end V21 of the power supply unit (100); the eighth end of the third side of the inductor (INDUCTOR), the second three resistors (R23), the first six capacitors (C16) and the negative end of the fifth electrolytic capacitor (EC5) are connected in sequence and then grounded; the source (S) of the second field effect transistor (Q2) is connected to the eighth end of the third side of the inductor (INDUCTOR); the drain (D) of the second field effect transistor (Q2) is grounded; the gate (G) of the second field effect transistor (Q2) is connected to the fifth end VG of the second output rectifier filter chip (U2); The fourth terminal VCC of the second output rectifying and filtering chip (U2) is grounded via a fourth capacitor (C4), the third terminal SET of the second output rectifying and filtering chip (U2) is grounded via a first third resistor (R13), the second terminal of the second output rectifying and filtering chip (U2) is grounded, and the first terminal HV of the second output rectifying and filtering chip (U2) is connected to the output terminal V21 of the power supply unit (100). The first end of the transmitting end (U1A) of the first optical coupler (U1) and the first end of the first five resistors (R15) are respectively connected to the second end of the first four resistors (R14), and the second end of the transmitting end (U1A) of the first optical coupler (U1) and the second end of the first five resistors (R15) are respectively grounded through a seventh diode.

5. The GaN charger with HDMI interface according to claim 1, characterized in that: The voltage reduction unit (200) comprises a first voltage reduction module and a second voltage reduction module, and inputs of the first voltage reduction module and the second voltage reduction module are respectively connected to outputs of the power supply unit (100).

6. The GaN charger with HDMI interface according to claim 5, characterized in that: The first step-down module includes a first second capacitor (C12), a first fourth capacitor (C14), a ninth capacitor (C9), a fifth capacitor (C5), a second sixth resistor (R26), a third step-down chip (U3), a second fourth resistor (R24), a first seventh capacitor (C17), a second inductor (L2), a seventh electrolytic capacitor (EC7), a seventh capacitor (C7), a first ninth resistor (R19) and a second zero resistor (R20). The first ends of the first second capacitor (C12), the first fourth capacitor (C14) and the ninth capacitor (C9) are respectively connected to the VIN end of the third buck chip (U3); the second ends of the first second capacitor (C12), the first fourth capacitor (C14), the ninth capacitor (C9) and the GND end of the third buck chip (U3) are respectively grounded; the BST end of the third buck chip (U3) is grounded in sequence through the fifth capacitor (C5), the second sixth resistor (R26), the second fourth resistor (R24) and the first seventh capacitor (C17); the second sixth resistor (R26) is grounded; and the second sixth resistor (R26) is grounded. The second end of the (R26) and the SW end of the third buck chip (U3) are respectively connected to the first end of the second inductor (L2), the second end of the second inductor (L2), the positive terminal of the seventh electrolytic capacitor (EC7), the first end of the seventh capacitor (C7) and the first end of the first nine resistors (R19) are sequentially connected and output a voltage V01, the second end of the seventh electrolytic capacitor (EC7) is grounded, the second end of the first nine resistors (R19) and the first end of the second zero resistor (R20) are respectively connected to the FB end of the third buck chip (U3); The second step-down module includes a first zero capacitor (C10), a first third capacitor (C13), a first fifth capacitor (C15), a sixth capacitor (C6), a second seventh resistor (R27), a fourth step-down chip (U4), a second fifth resistor (R25), a first eighth capacitor (C18), a third inductor (L3), an eighth electrolytic capacitor (EC8), an eighth capacitor (C8), a second first resistor (R21) and a second second resistor (R22). The first ends of the first zero capacitor (C10), the first third capacitor (C13) and the first fifth capacitor (C15) are respectively connected to the VIN end of the fourth buck chip (U4); the second ends of the first zero capacitor (C10), the first third capacitor (C13) and the first fifth capacitor (C15) and the GND end of the fourth buck chip (U4) are respectively grounded; the BST end of the fourth buck chip (U4) is grounded in sequence through the sixth capacitor (C6), the second seventh resistor (R27), the second fifth resistor (R25) and the first eighth capacitor (C18); the second seventh The second end of the resistor (R27) and the SW end of the fourth buck chip (U4) are respectively connected to the first end of the third inductor (L3), the second end of the third inductor (L3), the positive terminal of the eighth electrolytic capacitor (EC8), the first end of the eighth capacitor (C8) and the first end of the second-first resistor (R21) are sequentially connected and output a voltage V02, the second end of the eighth electrolytic capacitor (EC8) is grounded, and the second end of the second-first resistor (R21) and the first end of the second-second resistor (R22) are respectively connected to the FB end of the fourth buck chip (U4).

7. The GaN charger with HDMI interface according to claim 1, characterized in that: The Type-c interface unit (300) comprises a first Type-c interface module and a second Type-c interface module, the input of the first Type-c interface module is connected to the output of the first step-down module, and the input of the second Type-c interface module is connected to the output of the second step-down module; The first Type-C interface module includes a third field effect transistor (Q3), a second zero capacitor (C20), a second first capacitor (C21), a third zero resistor (R30), a second second capacitor (C22), a third first resistor (R31), a third second resistor (R32), a third third resistor (R33), a fifth charging protocol chip (U5), a second third capacitor (C23), a second fourth capacitor (C24), a third fourth resistor (R34), a third fifth resistor (R35), a third sixth resistor (R36), a third seventh resistor (R37), a second fifth capacitor (C25), a second sixth capacitor (C26) and a first TYPE-C interface (TYPE-C1), The VCC terminal of the fifth charging protocol chip (U5) is grounded through the second first capacitor (C21), the CMPA terminal of the fifth charging protocol chip (U5) is grounded through the third zero resistor (R30), the CMPI terminal of the fifth charging protocol chip (U5) is connected to the FB1 terminal through the third first resistor (R31) and the second second capacitor (C22) in sequence, the FB terminal of the fifth charging protocol chip (U5) is connected to the FB1 terminal through the third second resistor (R32), the CSN terminal of the fifth charging protocol chip (U5) is grounded, and the CSP terminal of the fifth charging protocol chip (U5) is connected to the ground through the third third resistor (R31). The resistor (R33) is grounded, the DPA terminal and the DMA terminal of the fifth charging protocol chip (U5) are connected to the SCL signal terminal, the CC2 terminal of the fifth charging protocol chip (U5) is grounded through the second fourth capacitor (C24), the CC1 terminal of the fifth charging protocol chip (U5) is grounded through the second fifth capacitor (C25), the COUT1G of the fifth charging protocol chip (U5) is connected to the gate (G) of the third field effect transistor (Q3), the source (S) of the third field effect transistor (Q3) is connected to the VO1 terminal, and the drain (D) of the third field effect transistor (Q3) is connected to the VBUS terminal; The CC2 end of the first TYPE-C interface (TYPE-C1) is connected to the CC2 end of the fifth charging protocol chip (U5) through a third-fourth resistor (R34), the DP1 end and the DP2 end of the first TYPE-C interface (TYPE-C1) are connected to the DPC end of the fifth charging protocol chip (U5) through a third-five resistor (R35), the DN1 end and the DN2 end of the first TYPE-C interface (TYPE-C1) are connected to the DMC end of the fifth charging protocol chip (U5) through a third-sixth resistor (R36), and the CC1 end of the first TYPE-C interface (TYPE-C1) is connected to the CC1 end of the fifth charging protocol chip (U5) through a third-seventh resistor (R37).

8. The GaN charger with HDMI interface according to claim 7, characterized in that: The second Type-C interface module includes a fourth field effect transistor (Q4), a third zero capacitor (C30), a third first capacitor (C31), a fourth zero resistor (R40), a third second capacitor (C32), a fourth first resistor (R41), a fourth second resistor (R42), a fourth third resistor (R43), a sixth charging protocol chip (U6), a third third capacitor (C33), a third fourth capacitor (C34), a fourth fourth resistor (R44), a fourth fifth resistor (R45), a fourth sixth resistor (R46), a fourth seventh resistor (R47), a third fifth capacitor (C35), a third sixth capacitor (C36) and a second TYPE-C interface (TYPE-C2), The VCC terminal of the sixth charging protocol chip (U6) is grounded through the third first capacitor (C31), the CMPA terminal of the sixth charging protocol chip (U6) is grounded through the fourth zero resistor (R40), the CMPI terminal of the sixth charging protocol chip (U6) is connected to the FB2 terminal through the fourth first resistor (R41) and the third second capacitor (C32) in sequence, the FB terminal of the sixth charging protocol chip (U6) is connected to the FB2 terminal through the fourth second resistor (R42), the CSN terminal of the sixth charging protocol chip (U6) is grounded, and the CSP terminal of the sixth charging protocol chip (U6) is connected to the ground through the fourth first resistor (R41). The fourth three resistor (R43) is grounded, the DPA terminal and the DMA terminal of the sixth charging protocol chip (U6) are connected to the SCL signal terminal, the CC2 terminal of the sixth charging protocol chip (U6) is grounded through the third four capacitor (C34), the CC1 terminal of the sixth charging protocol chip (U6) is grounded through the third five capacitor (C35), the COUT1G of the sixth charging protocol chip (U6) is connected to the gate (G) of the fourth field effect transistor (Q4), the source (S) of the fourth field effect transistor (Q4) is connected to the VO2 terminal, and the drain (D) of the third field effect transistor is connected to the VBUS terminal; The CC2 end of the second TYPE-C interface (TYPE-C2) is connected to the CC2 end of the sixth charging protocol chip (U6) through a fourth fourth resistor (R44), the DP1 end and the DP2 end of the second TYPE-C interface (TYPE-C2) are connected to the DPC end of the sixth charging protocol chip (U6) through a fourth fifth resistor (R45), the DN1 end and the DN2 end of the second TYPE-C interface (TYPE-C2) are connected to the DMC end of the sixth charging protocol chip (U6) through a fourth sixth resistor (R46), and the CC1 end of the second TYPE-C interface (TYPE-C2) is connected to the CC1 end of the sixth charging protocol chip (U6) through a fourth seventh resistor (R47).

9. The GaN charger with HDMI interface according to claim 1, characterized in that: The USB interface unit (500) comprises an eighth chip (U8) and a USB communication interface (CON_USB) connected in sequence, and an EN terminal of the eighth chip (U8) is connected to a DPPX_HPD port of a seventh protocol chip (U7) via a fifth third resistor (R53).

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