Back contact solar cell, cell assembly and photovoltaic system

Abstract

The utility model is suitable for the technical field of solar cells, and provides a back contact solar cell, a cell assembly and a photovoltaic system, in the back contact solar cell, a boss is arranged between a first groove and a second groove, a first doping layer is only stacked and covered on a partial region of the bottom surface of the first groove, and a second doping layer is stacked and covered on a partial region of the bottom surface of the second groove. A first spacer region is arranged between at least a partial region of the first doping layer and the boss, and the first spacer region is not provided with the first doping layer. Thus, in the back contact solar cell, the first doping layer and the second doping layer can be isolated through the bosses at the same time, at least part of the first doping layer is isolated from the bosses through the first spacer regions, the isolation effect between the first doping layer and the second doping layer can be improved, and the performance of the back contact solar cell is improved.

Description

Technical Field

[0001] This application relates to the technical field of solar cells, and particularly to a back-contact solar cell, a battery module, and a photovoltaic system. Background Art

[0002] A back-contact solar cell is a high-efficiency cell with electrodes all arranged on the back of the cell. Specifically, in a back-contact solar cell, both the P-type electrode and the N-type electrode are arranged on the back, so that the front surface is not blocked by metal grid lines, improving the efficiency of the cell.

[0003] In the related art, the P-type doped silicon layer and the second doped layer in the back-contact solar cell are directly deposited on the back of the silicon substrate, and trenches are formed between the two to achieve isolation between the first doped layer and the second doped layer. However, the isolation effect of this method is poor, resulting in poor performance of the back-contact solar cell. Summary of the Utility Model

[0004] This application provides a back-contact solar cell, a battery module, and a photovoltaic system.

[0005] This application is implemented as follows. The back-contact solar cell according to the embodiments of this application includes:

[0006] A silicon substrate having opposite front and back surfaces, and a plurality of first grooves and a plurality of second grooves are alternately and spacedly arranged on the back surface, so that the silicon substrate forms a convex platform between adjacent first grooves and second grooves;

[0007] A first doped layer only stacked and covering a partial area of the bottom surface of the first groove;

[0008] A first dielectric layer stacked between the first doped layer and the silicon substrate, with a first spacer region between at least a partial area of the first doped layer and the convex platform, and the first doped layer is not provided in the first spacer region;

[0009] A second dielectric layer stacked at the second groove; and

[0010] A second doped layer provided at the second groove and at least stacked on the second dielectric layer.

[0011] In some embodiments, all positions of the first doped layer are isolated from the convex platform through the first spacer region; and / or

[0012] The first dielectric layer covers the first spacer region.

[0013] In some embodiments, the first spacer is a first recessed groove formed in the first groove and recessed into the silicon substrate, so as to form a first protrusion in the first groove. The first recessed groove separates the first protrusion from the boss, and the first dielectric layer and the first doping layer are not provided at the first recessed groove.

[0014] In some embodiments, in the arrangement direction of the first groove and the second groove, the width of the first recessed groove is 10 μm - 200 μm; and / or, the distance between the bottom surface of the first recessed groove and the bottom surface of the first groove is 50 nm - 10 μm.

[0015] In some embodiments, the second doping layer has a first extended portion extending to the edge of the boss, and there is a first insulating layer between at least a part of the first extended portion and the boss.

[0016] In some embodiments, the first doping layer is a doping layer doped with a first doping element, and the second doping layer is a doping layer doped with a second doping element. In the boss, the doping concentration of the second doping element in the region close to the second groove is greater than the doping concentration of the second doping element in the region close to the first groove.

[0017] In some embodiments, in the arrangement direction of the first groove and the second groove, the length of the first extended portion is 10 μm - 60 μm.

[0018] In some embodiments, the boss is a stepped structure. Among them, the boss has a first step surface and a second step surface. The second step surface is closer to the front surface than the first step surface. The first extended portion covers the first step surface, and the first insulating layer is located between the first step surface and the first extended portion.

[0019] In some embodiments, only a part of the first doping layer has the first spacer between it and the boss, and the other regions of the first doping layer and the boss are a first non-spacer region. At the first non-spacer region, the first doping layer has a second extended portion extending onto the boss, and the second extended portion is conductively connected to the first extended portion.

[0020] In some embodiments, the first extended portion has a suspended segment suspended on the boss, and there is no first insulating layer between the suspended segment and the boss. The second extended portion is conductively connected to the suspended segment.

[0021] In some embodiments, a third dielectric layer is formed on the surface of the suspended segment facing the boss, and the second extension portion covers the third dielectric layer and is electrically connected to the suspended segment through the third dielectric layer.

[0022] In some embodiments, the second extension portion surrounds the suspended segment and extends to the surface of the first extension portion facing away from the silicon substrate. A second insulating layer is provided between the second extension portion located on the surface of the first extension portion facing away from the silicon substrate and the first extension portion.

[0023] In some embodiments, the second extension portion extends along the boss to the surface of the first extension portion facing away from the silicon substrate, and a fourth dielectric layer is provided between the second extension portion and the side surface of the first extension portion as well as between the second extension portion and the surface of the first extension portion facing away from the silicon substrate. The second extension portion is electrically connected to the first extension portion through the fourth dielectric layer.

[0024] In some embodiments, a first spacer is provided between all positions of the first doped layer and the boss. A first diffusion layer is formed on at least part of the surfaces of the boss and the first spacer. The first doped layer is electrically connected to the second doped layer through the first diffusion layer.

[0025] In some embodiments, the first groove and the second groove are alternately arranged in sequence along a first direction and both extend along a second direction. The second direction intersects the first direction. The first diffusion layer extends along the second direction. In the second direction, the first diffusion layer has a plurality of first diffusion regions with different doping concentrations.

[0026] In some embodiments, the second doped layer is only stacked on part of the bottom surface of the second groove. A second dielectric layer is provided between the second doped layer and the silicon substrate. A second spacer is provided between at least part of the second doped layer and the boss, and the second doped layer is not provided in the second spacer.

[0027] In some embodiments, all positions of the second doped layer are isolated from the boss through the second spacer; and / or

[0028] The second dielectric layer covers the second spacer.

[0029] In some embodiments, the second spacer is a second recessed groove formed in the second groove and recessed into the silicon substrate, so that a second protrusion is formed in the second groove. The second recessed groove separates the second protrusion from the boss, and the second dielectric layer and the second doped layer are not provided in the second recessed groove.

[0030] In some embodiments, in the arrangement direction of the first groove and the second groove, the width of the second recessed groove is 10 μm - 200 μm; and / or, the distance between the bottom surface of the second recessed groove and the bottom surface of the second groove is 50 nm - 10 μm.

[0031] In some embodiments, there is the first spacer region between a partial region of the first doped layer and the boss, and a first non-spacer region between other regions of the first doped layer and the boss;

[0032] There is the second spacer region between a partial region of the second doped layer and the boss, and a second non-spacer region between other regions of the second doped layer and the boss;

[0033] At the first non-spacer region, the first doped layer has a third extending portion extending onto the boss, and the third extending portion is electrically connected to the second doped layer at the second non-spacer region.

[0034] In some embodiments, at the second non-spacer region, the second doped layer has a fourth extending portion extending onto the boss, and the fourth extending portion is electrically connected to the third extending portion;

[0035] Wherein, the third extending portion surrounds the side surface of the fourth extending portion and extends onto the surface of the fourth extending portion facing away from the silicon substrate, a fifth dielectric layer is provided between the side surface of the fourth extending portion and the third extending portion, and a third insulating layer is provided between the surface of the fourth extending portion facing away from the silicon substrate and the third extending portion.

[0036] In some embodiments, in the back-contact solar cell, the second doped layer is only located in the second groove, and the third extending portion extends onto the surface of the second doped layer facing away from the silicon substrate at the second non-spacer region to be electrically connected to the second doped layer.

[0037] In some embodiments, a sixth dielectric layer is provided between the third extending portion and the surface of the second doped layer facing away from the silicon substrate, and the third extending portion is electrically connected to the second doped layer through the sixth dielectric layer.

[0038] In some embodiments, there is the first spacer region between all regions of the first doped layer and the boss, and there is the second spacer region between all regions of the second doped layer and the boss;

[0039] A second diffusion layer is formed at least in part on the surfaces of the boss, the first spacer, and the second spacer, and the first doped layer and the second doped layer are electrically connected through the second diffusion layer.

[0040] In some embodiments, the first groove and the second groove are arranged alternately in sequence along a first direction and extend along a second direction, the second direction intersects the first direction, the second diffusion layer extends along the second direction, and in the second direction, the second diffusion layer has a plurality of second diffusion regions with different doping concentrations.

[0041] In some embodiments, the surface of the boss is a non-textured structure; and / or

[0042] The surfaces of the first groove and the second groove are both non-textured structures.

[0043] In some embodiments, the depth of the first groove is 100 nm - 10 μm; and / or

[0044] The depth of the second groove is 100 nm - 10 μm.

[0045] The present application further provides a battery assembly, including a plurality of the back-contact solar cells described in any one of the above.

[0046] The present application further provides a photovoltaic system, and the photovoltaic system includes the battery assembly described above.

[0047] In the back-contact solar cell, the battery assembly, and the photovoltaic system according to the embodiments of the present application, there is a boss between the first groove and the second groove, the first doped layer is only stacked and covered on a partial area of the bottom surface of the first groove, and there is a first spacer between at least a partial area of the first doped layer and the boss, and the first spacer does not have the first doped layer. Thus, in the back-contact solar cell, while the first doped layer and the second doped layer can be isolated by the boss at the same time, at least a partial area of the first doped layer is also isolated from the boss by the first spacer, which can improve the isolation effect between the first doped layer and the second doped layer and improve the performance of the back-contact solar cell.

[0048] Additional aspects and advantages of the present application will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present application. Description of the Drawings

[0049] Figure 1 is a schematic diagram of a module of the photovoltaic system provided by the embodiment of the present application;

[0050] Figure 2 is a schematic plan view of the back-contact solar cell provided by the embodiment of the present application;

[0051] Figure 3 is Figure 2 a schematic cross-sectional structure diagram of the back-contact solar cell along line III-III in

[0052] Figure 4 is another schematic cross-sectional structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0053] Figure 5 is yet another schematic cross-sectional structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0054] Figure 6 is another schematic plan structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0055] Figure 7 is Figure 6 a schematic cross-sectional structure diagram of the back-contact solar cell along line VII-VII in

[0056] Figure 8 is yet another schematic cross-sectional structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0057] Figure 9 is yet another schematic plan structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0058] Figure 10 is Figure 9 a schematic cross-sectional structure diagram of the back-contact solar cell along line X-X in

[0059] Figure 11 is yet another schematic plan structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0060] Figure 12 is Figure 11 a schematic cross-sectional structure diagram of the back-contact solar cell along line XII-XII in

[0061] Figure 13 is yet another schematic cross-sectional structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0062] Figure 14 is yet another schematic plan structure diagram of the back-contact solar cell provided by an embodiment of the present application;

[0063] Figure 15 is Figure 14 a schematic cross-sectional structure diagram of the back-contact solar cell along line XV-XV in

[0064] Figure 16It is another schematic cross-sectional structure diagram of the back-contact solar cell provided by the embodiment of the present application;

[0065] Figure 17 It is another schematic plan structure diagram of the back-contact solar cell provided by the embodiment of the present application;

[0066] Figure 18 It is Figure 17 The schematic cross-sectional structure diagram of the back-contact solar cell along line XVIII-XVIII in Detailed implementation manners

[0067] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to the drawings and embodiments. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions throughout. It should be noted that the embodiments described below with reference to the drawings are exemplary and are only used to explain the present application and should not be construed as a limitation of the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0068] In the description of the present application, it should be understood that the orientation or positional relationship indicated by terms such as "upper", "lower", "left", "right", "top", "bottom", "side", "lateral", "longitudinal", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present application.

[0069] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "several" means two or more, unless otherwise specifically defined.

[0070] In the present application, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but being in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "below", "under" and "beneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature.

[0071] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0072] Please refer to Figure 1 , the photovoltaic system 1000 in the embodiment of the present application may include the battery assembly 200 in the embodiment of the present application. The battery assembly 200 in the embodiment of the present application may include several back-contact solar cells 100 in the embodiment of the present application. Several back-contact solar cells 100 may be connected in series by welding tapes to form several battery strings, and each battery string may form the battery assembly 200 in a series, parallel, or series-parallel manner.

[0073] Please combine Figure 2 and Figure 3 , the back-contact solar cell 100 in the embodiment of the present application may include a silicon substrate 10, a first dielectric layer 20, a first doping layer 30, a second dielectric layer 50, and a second doping layer 60.

[0074] As Figure 3 shown, the silicon substrate 10 has opposite front surface 11 and back surface 12. A plurality of first grooves 121 and a plurality of second grooves 122 are formed on the back surface 12. The plurality of first grooves 121 and the plurality of second grooves 122 are alternately arranged at intervals in sequence, so that the silicon substrate 10 forms a boss 123 between adjacent first grooves 121 and second grooves 122, that is, the boss 123 is between the first groove 121 and the second groove 122.

[0075] Specifically, as Figure 2 and Figure 3 shown, the plurality of first grooves 121 and the plurality of second grooves 122 may be alternately arranged at intervals in sequence along a first direction and both extend along a second direction. The second direction intersects the first direction and also extends along the second direction. For example, as Figure 2As shown, in some embodiments, the first direction may be the lateral direction of the back contact solar cell 100, and the second direction may be the longitudinal direction of the back contact solar cell 100, and the two are perpendicular to each other. Of course, it can be understood that in some embodiments, the first direction and the second direction may also be other directions. For example, the two directions may be the directions of two diagonals of the back contact solar cell 100 respectively, and specific limitations are not made here.

[0076] Please refer to Figure 3 , in the embodiment of the present application, the first doping layer 30 is only stacked and covered on a partial area of the bottom surface of the first groove 121. The first dielectric layer 20 is stacked between the first doping layer 30 and the silicon substrate 10. There is a first spacer 101 between at least a partial area of the first doping layer 30 and the boss 123, and the first doping layer 30 is not provided at the first spacer 101.

[0077] The second dielectric layer 50 is stacked at the second groove 122, and the second doping layer 60 is provided at the second groove 122 and is at least stacked on the second dielectric layer 50.

[0078] In the back contact solar cell 100, the battery assembly 200, and the photovoltaic system 1000 in the embodiment of the present application, there is a boss 123 between the first groove 121 and the second groove 122. The first doping layer 30 is only stacked and covered on a partial area of the bottom surface of the first groove 121. There is a first spacer 101 between at least a partial area of the first doping layer 30 and the boss 123, and the first doping layer 30 is not provided at the first spacer 101. Thus, in the back contact solar cell 100, while the first doping layer 30 and the second doping layer 60 can be isolated by the boss 123 at the same time, at least a partial area of the first doping layer 30 is also isolated from the boss 123 through the first spacer 101, which can improve the isolation effect between the first doping layer 30 and the second doping layer 60 and improve the performance of the back contact solar cell 100.

[0079] Specifically, in the embodiment of the present application, the silicon substrate 10 may be a P-type silicon substrate or an N-type silicon substrate, and specific limitations are not made here. One of the first doping layer 30 and the second doping layer 60 is a P-type doping layer, and the other may be an N-type doping layer. Exemplarily, in some embodiments, the first doping layer 30 may be a P-type doped polysilicon layer, a P-type doped microcrystalline silicon layer, etc., and the second doping layer 60 may be an N-type doped polysilicon layer, an N-type doped microcrystalline silicon layer, etc., and specific limitations are not made here.

[0080] The first dielectric layer 20 and the second dielectric layer 50 can both be tunneling oxide layers. For example, both can be tunneling silicon oxide film layers. In addition, it can also be understood that in the back-contact solar cell 100, a passivation film layer (not shown in the figure) can also be integrally covered on the back surface 12. The passivation film layer covers the entire back surface 12, that is, the passivation film layer covers the entire back surface area of the back-contact solar cell 100. A first metal electrode (not shown in the figure) is provided at the position corresponding to the first doped layer 30 (i.e., at the first groove 121), and the first metal electrode penetrates the passivation film layer and contacts the first doped layer 30. A second metal electrode (not shown in the figure) is provided at the position corresponding to the second doped layer 60 (i.e., at the first groove 121), and the second metal electrode penetrates the passivation film layer and contacts the second doped layer 60.

[0081] In some embodiments, in the arrangement direction of the first groove 121 and the second groove 122, the width of a single boss 123 is 10 μm - 700 μm.

[0082] Thus, setting the width of the boss 123 within this reasonable range can ensure the isolation effect between the first doped layer 30 and the second doped layer 60 while ensuring the efficiency of the back-contact solar cell 100.

[0083] Specifically, in such an embodiment, the width of the boss 123 can be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 100 μm, 150 μm, 200 μm, 250 μm, 300 μm, 350 μm, 400 μm, 450 μm, 500 μm, 550 μm, 600 μm, 650 μm, 700 μm or any value between 10 μm - 700 μm.

[0084] In some embodiments, the surface of the boss 123 (the surface of the region of the silicon substrate 10 located between the first groove 121 and the second groove 122) is a non-textured structure, that is, the lower surface of the boss 123 shown in the figure is a polished surface.

[0085] Thus, the surface reflectivity at the boss 123 is relatively high, which can enhance the reflection of light incident from the front surface 11 and passing through the silicon substrate 10, so as to reflect more light back into the silicon substrate 10, thereby improving the efficiency of the back-contact solar cell 100. At the same time, setting the surface of the boss 123 as a non-textured structure can also improve the passivation effect during the subsequent covering of the passivation film layer.

[0086] In some embodiments, the surfaces of the first groove 121 and the second groove 122 (all the surfaces in the first groove 121 and the second groove 122) can also both be non-textured structures, that is, all the surfaces of the first groove 121 and the second groove 122 are polished surfaces.

[0087] In this way, the reflection of light incident from the front surface 11 and passing through the silicon substrate 10 can be further enhanced, and more light can be reflected back into the silicon substrate 10, thereby improving the efficiency of the back-contact solar cell 100.

[0088] Meanwhile, during the preparation process, after forming the first groove 121 and the second groove 122, by polishing the first groove 121 and the second groove 122, the damage caused during the formation of the first groove 121 and the second groove 122 (such as laser damage caused by laser grooving) can be removed.

[0089] In some embodiments, the surface roughness of the second groove 122 is greater than that of the first groove 121.

[0090] In this way, by optimizing the matching design of different roughnesses for different grooves, the bifaciality of the back-contact solar cell 100 can be improved.

[0091] In some embodiments, the depth of the first groove 121 (i.e., the depth of the first groove 121 indented into the silicon substrate 10) can be 100 nm - 10 μm.

[0092] In this way, by setting the depth of the first groove 121 within this reasonable range, it is possible to avoid a decrease in the strength of the silicon substrate 10 due to the excessive depth of the first groove 121, and it is also possible to avoid a too small height of the boss 123 due to the too shallow depth of the first groove 121, which may affect the isolation effect.

[0093] Specifically, in such an embodiment, the depth of the first groove 121 can be, for example, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm - 10 μm.

[0094] In some embodiments, in some embodiments, the depth of the second groove 122 (i.e., the depth of the second groove 122 indented into the silicon substrate 10) can be 100 nm - 10 μm.

[0095] In this way, by setting the depth of the second groove 122 within this reasonable range, it is possible to avoid a decrease in the strength of the silicon substrate 10 due to the excessive depth of the second groove 122, and it is also possible to avoid a too small height of the boss 123 due to the too shallow depth of the second groove 122, which may affect the isolation effect.

[0096] Specifically, in such an embodiment, the depth of the second groove 122 can be, for example, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm, or any value between 100 nm and 10 μm.

[0097] It should be noted that in this application, the depth of the groove refers to the distance between any position on the bottom surface of the groove and the back surface 12.

[0098] Please refer to Figure 2 , in some embodiments, all positions of the first doping layer 30 are isolated from the boss 123 by the first spacer 101, that is to say, all positions of the first doping layer 30 are not in contact with the boss 123.

[0099] In this way, the isolation effect between the first doping layer 30 and the second doping layer 60 can be further improved.

[0100] In some embodiments, the first dielectric layer 20 can cover the first spacer 101. In this way, the passivation effect can be improved, thereby improving the efficiency.

[0101] Please refer to Figure 4 , in some embodiments, the first spacer 101 can be a first recessed groove 1211 formed in the first groove 121 and recessed into the silicon substrate 10, so as to form a first protrusion 1212 in the first groove 121. The first recessed groove 1212 separates the first protrusion 1212 and the boss 123, and there is no first dielectric layer 20 and first doping layer 30 at the first recessed groove 1212.

[0102] In this way, by further forming the first recessed groove 1212 in the first groove 121, the first doping layer 30 and the boss 123 can be isolated through the first recessed groove 1212, and the isolation effect between the first doping layer 30 and the second doping layer 60 can be further improved.

[0103] Specifically, in such an embodiment, the first recessed groove 1212 can be recessed into the silicon substrate 10 along the side wall surface of the boss 123 (i.e., the side wall surface of the first groove 121) (recessed into the silicon substrate 10 along the thickness direction). That is to say, there are only two structural configurations, namely the first protrusion 1212 and the first recessed groove 1211, in the bottom region of the first groove 121.

[0104] Of course, it can be understood that as Figure 2As shown, in some embodiments, the first spacer 101 may not be the first recessed groove 1212, but merely the bottom surface of the first groove 121. In such a case, this partial area may not have the first dielectric layer 20 and the first doped layer 30 at all, or this partial area may only have the first dielectric layer 20.

[0105] In some embodiments, in the arrangement direction of the first groove 121 and the second groove 122, the width of the first recessed groove 1211 is 10 μm - 200 μm.

[0106] Thus, by controlling the width of the first recessed groove 1211, while ensuring the isolation effect, the width of the first recessed groove 1211 can be prevented from being too wide, thereby effectively avoiding the situation that the proportion of the first doped layer 30 in the first groove 121 is too small and affecting the efficiency.

[0107] Specifically, in such an embodiment, the width of the first recessed groove 1211 may be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm or any value between 10 μm - 200 μm. Specifically, it is not limited herein.

[0108] In some embodiments, the distance between the bottom surface of the first recessed groove 1211 and the bottom surface of the first groove 121 (i.e., the recessed depth of the first recessed groove 1211 relative to the bottom surface of the entire first groove 121) is 50 nm - 10 μm.

[0109] Thus, by setting the overall recessed depth of the first recessed groove 1211 within this reasonable range, the situation that the depth of the first recessed groove 1211 is too deep and causes the strength of the silicon substrate 10 to decrease can be avoided.

[0110] Specifically, in such an embodiment, the distance between the bottom surface of the first recessed groove 1211 and the back surface 12 may be, for example, 50 nm, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm or any value between 100 nm - 10 μm.

[0111] Please refer to Figure 3 and Figure 4, in some embodiments, the second dielectric layer 50 is stacked in the second groove 122. Specifically, the second dielectric layer 50 can cover the bottom and side surfaces of the second groove 122, and the second doping layer 60 is disposed at the second groove 122 and stacked on the second dielectric layer 50.

[0112] The second doping layer 60 has a first extension portion 61 extending to the edge of the boss 123, and there is a first insulating layer 70 between at least a part of the first extension portion 61 and the boss 123. That is, in addition to the part disposed in the second groove 122, the second doping layer 60 also extends along the side surface of the second groove 122 to the edge position of the boss 123, thereby forming the first extension portion 61. At least a part of the first extension portion 61 is insulated from the silicon substrate 10 through the first insulating layer 70.

[0113] In this way, through the arrangement of the first extension portion 61 and the first insulating layer 70, the passivation effect on the edge of the second groove 122 (i.e., the edge of the boss 123 close to the second groove 122) can be improved, thereby enhancing the performance of the back-contact solar cell 100. In addition, there is a first insulating layer 70 at the edge position on one side of the boss 123, which can improve the reflectivity of light from the front surface 11 region, thereby improving the utilization rate of light and further enhancing the performance of the back-contact solar cell 100.

[0114] Specifically, the first insulating layer 70 can be a film layer such as a silicon oxide layer or a silicon nitride layer with insulating functions, and specific limitations are not made here, as long as it can achieve insulation between the first extension portion 61 and the silicon substrate 10.

[0115] In some embodiments, the first doping layer 30 is a doping layer doped with a first doping element, and the second doping layer 60 is a doping layer doped with a second doping element. In the boss 123, the doping concentration of the second doping element in the region close to the second groove 122 is greater than the doping concentration of the second doping element in the region close to the first groove 121.

[0116] In this way, by designing different doping concentrations of the second doping element in different regions of the boss 123, the passivation effect on the surface of the boss 123 can be better, surface recombination and edge recombination can be reduced, and the efficiency can be improved.

[0117] Specifically, in some embodiments, the first doping layer 30 can be a phosphorus-doped layer, and the second doping layer 60 can be a boron-doped layer. That is, the first doping element can be a phosphorus element, and the second doping element can be a boron element. In the boss 123, the boron doping concentration in the region close to the second groove 122 is greater than the boron doping concentration in the region close to the first groove 121.

[0118] In some embodiments, in the arrangement direction (i.e., the first direction) of the first groove 121 and the second groove 122, the length of the first extension portion 61 is 5 μm - 60 μm.

[0119] Thus, by setting the length of the first extension portion 61 within the above reasonable range, while improving the passivation effect on the surface of the boss 123 to reduce surface recombination and edge recombination, it is possible to avoid a significant decrease in the bifaciality rate due to an overly long length of the first extension portion 61.

[0120] Specifically, in such an embodiment, the length of the first extension portion 61 can be, for example, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm or any value between 10 μm - 10 μm. The length of the second first extension portion 61 can also be, for example, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm or any value between 5 μm - 60 μm.

[0121] Please refer to Figure 5 , in some embodiments, the boss 123 is a stepped structure, wherein the boss 123 has a first step surface 1231 and a second step surface 1232. The second step surface 1232 is closer to the front surface 11 relative to the first step surface 1231. The first extension portion 61 covers the first step surface 1231, and the first insulating layer 70 is located between the first step surface 1231 and the first extension portion 61.

[0122] Please refer to Figure 6 and Figure 7 , in some embodiments, the first doped layer 30 has a first spacer region 101 only in a partial area between the first doped layer 30 and the boss 123, and the other areas of the first doped layer 30 and the boss 123 are a first non - spacer region 102 (that is to say, the first doped layer 30 is only isolated from the boss 123 in a partial area, and in the first non - spacer region, it is in direct contact with the boss 123 or indirectly in contact with the boss 123 through the first dielectric layer 20). In the first non - spacer region 102, the first doped layer 30 has a second extension portion 31 extending onto the boss 123, and the second extension portion 31 is electrically connected to the first extension portion 61.

[0123] Thus, by electrically connecting the first extension portion 61 and the second extension portion 31 in the first non - spacer region 102, it is possible to form a composite contact between the first extension portion 61 and the second extension portion 31 in the first non - spacer region 102, which can reduce the reverse breakdown voltage and the hot - spot risk of the back - contact solar cell 100, and further improve the anti - hot - spot performance of the back - contact solar cell 100.

[0124] Specifically, in such an embodiment, there is also a second dielectric layer 50 between the second extension portion 31 of the first doped layer 30 and the silicon substrate 10, that is, the second dielectric layer 50 also has an extension portion extending onto the boss 123 at the first non-spacing region 102.

[0125] Further, please refer to Figure 7 , in some embodiments, the first extension portion 61 has a suspended segment 611 suspended on the boss 123, and there is no first insulating layer 70 between the suspended segment 611 and the boss 123, and the second extension portion 31 is electrically connected to the suspended segment 611.

[0126] In this way, the second extension portion 31 is only electrically connected to the suspended segment 611, which can effectively prevent the area of the compound contact between the second extension portion 31 and the first extension portion 61 from being too large and resulting in too large a decrease in efficiency.

[0127] Further, as Figure 7 shown, in such an embodiment, a third dielectric layer 110 may be formed on the surface of the suspended segment 611 facing the boss 123, and the second extension portion 31 may cover the third dielectric layer 110 and be electrically connected to the suspended segment 611 through the third dielectric layer 110.

[0128] In this way, the second extension portion 31 is electrically connected to the suspended segment 611 through the third dielectric layer 110. It can realize the compound contact between the second extension portion 31 and the suspended segment 611, and at the same time, improve the passivation effect on the suspended segment 611 through the third dielectric layer 110, thereby effectively balancing the relationship between the anti-thermal spot performance and the efficiency.

[0129] Specifically, in such an embodiment, the third dielectric layer 110 may also be a tunneling silicon oxide layer, which can be integrally formed with the second dielectric layer 50.

[0130] Further, please continue to refer to Figure 7 , in some embodiments, the second extension portion 31 surrounds the suspended segment 611 and extends to the surface of the first extension portion 61 facing away from the silicon substrate 10, and a second insulating layer 120 is provided between the second extension portion 31 on the surface of the first extension portion 61 facing away from the silicon substrate 10 and the first extension portion 61.

[0131] In this way, by providing the second insulating layer 120 between the second extension portion 32 on the surface of the first extension portion 61 facing away from the silicon substrate 10 and the first extension portion 61, it is possible to prevent the contact area between the first extension portion 61 and the second extension portion 31 from being too large and affecting the efficiency.

[0132] Specifically, the second insulating layer 120 may be a phosphosilicate glass layer, a borosilicate glass layer, a borophosphosilicate glass layer, a silicon oxide film layer with insulating function, etc., and specific types are not limited herein.

[0133] Please refer to Figure 8 , in some embodiments, the second extension portion 61 may also not have a suspended segment 611. In such a case, the second extension portion 31 extends along the boss 123 to the surface of the first extension portion 61 facing away from the silicon substrate 10, and a fourth dielectric layer 130 is provided between the second extension portion 31 and the side surface of the first extension portion 61 as well as between the second extension portion 31 and the surface of the first extension portion 61 facing away from the silicon substrate 10. The second extension portion 31 is electrically connected to the first extension portion 61 through the fourth dielectric layer 130.

[0134] In this way, by extending the second extension portion 31 of the first non-spacing region 102 to the surface of the first extension portion 61 facing away from the silicon substrate 10 and directly electrically connecting to the first extension portion 61 through the fourth dielectric layer 130 provided on the surface of the first extension portion 61 facing away from the silicon substrate 10, the electrical connection between the first extension portion 61 and the second extension portion 31 can also be achieved, thus realizing the function of resisting the risk of hot spots.

[0135] Specifically, in such an embodiment, the fourth dielectric layer 130 may be a tunneling oxide layer. For example, a tunneling silicon oxide film layer, which can be prepared together with the second dielectric layer 50.

[0136] Please refer to Figure 9 and Figure 10 , in some embodiments, there is a first spacing region 101 between all positions of the first doped layer 30 and the boss 123. A first diffusion layer 80 is formed at least in part on the surface of the boss 123 and the first spacing region 101 (i.e., all surfaces of the boss 123 and the first spacing region 101). The first doped layer 30 is electrically connected to the second doped layer 60 through the first diffusion layer 80.

[0137] In this way, the first diffusion layer 80 can enable the first doped layer 30 and the second doped layer 60 to form an electrical connection at least in part on the boss 123 and the first spacing region 101, thereby reducing the risk of hot spots in the back-contact solar cell 100 and improving the anti-hot-spot performance.

[0138] Specifically, in such an embodiment, the first diffusion layer 80 can be formed by diffusion on the silicon substrate 10. The doping type of the first diffusion layer 80 may be the same as that of the first doped layer 30 or the second doped layer 60. It may be a phosphorus diffusion layer or a boron diffusion layer, and specific types are not limited herein. The presence of the first diffusion layer 80 can enable the first doped layer 30 and the second doped layer 60 to be electrically connected through the first diffusion layer 80, thereby improving the anti-hot-spot performance.

[0139] In such an embodiment, the first diffusion layer 80 may be in contact with the first dielectric layer 20 and the second dielectric layer 50 to achieve a conductive connection between the first doped layer 30 and the second doped layer 60. Alternatively, the first diffusion layer 80 may not diffuse under the first insulating layer 70. Since the width of the first insulating layer 70 is extremely short, a conductive path may be formed between the first diffusion layer 80 and the second doped layer 60.

[0140] Further, please refer to Figure 9 , in such an embodiment, the first groove 121 and the second groove 122 are alternately arranged in sequence along the first direction and extend along the second direction. The second direction intersects the first direction. The first diffusion layer 80 extends along the second direction. In the second direction, the first diffusion layer 80 has a plurality of first diffusion regions 81 with different doping concentrations.

[0141] Thus, by controlling the doping concentration of the first diffusion layer 80 in different first diffusion regions 81, the reverse breakdown voltage at the first diffusion region 81 with a higher doping concentration is lower, which can improve the ability of the back-contact solar cell 100 to resist thermal spot risks. At the first diffusion region 81 with a lower doping concentration, a large reduction in the reverse breakdown voltage will not be caused, so that the first diffusion region 81 corresponding to the low doping concentration will not cause a large leakage current, and only the first diffusion region 81 with a higher doping concentration is used to achieve the function of improving the resistance to thermal spot risks. That is to say, in this way, while improving the resistance to thermal spot risks, it is possible to avoid a large leakage current in the back-contact solar cell 100, which may cause a significant reduction in efficiency.

[0142] Specifically, in such an embodiment, the first extension portion 31 and the second extension portion 61 can achieve a conductive connection between the two through the first diffusion region 81 with a higher doping concentration to improve the anti-thermal spot performance, while the first diffusion region 81 with a lower doping concentration will not cause a large leakage current and avoid a significant decrease in efficiency.

[0143] Please refer to Figure 11 and Figure 12 , in some embodiments, the second doped layer 60 may also be stacked only on a partial area of the bottom surface of the second groove 122. A second dielectric layer 50 is provided between the second doped layer 60 and the silicon substrate 10. At least a partial area of the second doped layer 60 has a second spacer region 103 with the boss 123, and the second doped layer 60 is not provided in the second spacer region 103.

[0144] Thus, in the back contact solar cell 100, while the first doping layer 30 and the second doping layer 60 can be isolated by the boss 123 simultaneously, at least a partial region of the first doping layer 30 is also isolated from the boss 123 by the first spacer 101, and at least a partial region of the second doping layer 60 is also isolated from the boss 123 by the second spacer 103, which can further improve the isolation effect between the first doping layer 30 and the second doping layer 60 and enhance the performance of the back contact solar cell 100.

[0145] Please refer to Figure 12 , in some embodiments, all positions of the second doping layer 60 are isolated from the boss 123 by the second spacer 103, that is to say, all positions of the second doping layer 60 are not in contact with the boss 123.

[0146] Thus, the isolation effect between the first doping layer 30 and the second doping layer 60 can be further improved.

[0147] In some embodiments, the second dielectric layer 50 may cover the second spacer 103. Thus, the passivation effect can be improved, thereby improving the efficiency.

[0148] Please refer to Figure 13 , in some embodiments, the second spacer 103 may be a second recessed groove 1221 formed in the second groove 122 and recessed into the silicon substrate 10, so as to form a second protrusion 1222 in the second groove 122. The second recessed groove 1212 separates the second protrusion 1222 and the boss 123, and the second dielectric layer 50 and the second doping layer 60 are not provided at the second recessed groove 1212.

[0149] Thus, by further forming the second recessed groove 1212 in the second groove 122, the second doping layer 60 and the boss 123 can be isolated by the second recessed groove 1212, which can further improve the isolation effect between the second doping layer 60 and the second doping layer 60.

[0150] Specifically, in such an embodiment, the second recessed groove 1212 may be recessed into the silicon substrate 10 along the side wall surface of the boss 123 (i.e., the side wall surface of the second groove 122) (recessed into the silicon substrate 10 along the thickness direction). That is to say, there are only two structural configurations, namely the second protrusion 1222 and the second recessed groove 1221, in the bottom region of the second groove 122.

[0151] Of course, it can be understood that, as Figure 12 shown, in some embodiments, the second spacer 103 may not be the second recessed groove 1212, but only the bottom surface of the second groove 122. In such a case, the second dielectric layer 50 and the second doping layer 60 may not be provided in this part of the region, or only the second dielectric layer 50 may be provided in this part of the region.

[0152] In some embodiments, in the arrangement direction of the first groove 121 and the second groove 122, the width of the second recessed groove 1221 is 10 μm - 200 μm.

[0153] Thus, by controlling the width of the second recessed groove 1221, while ensuring the isolation effect, the width of the second recessed groove 1221 can be prevented from being too wide, thereby effectively avoiding the situation where the proportion of the first doping layer 30 in the first groove 121 is too small and affecting the efficiency.

[0154] Specifically, in such an embodiment, the width of the second recessed groove 1221 can be, for example, 10 μm, 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, 80 μm, 90 μm, 100 μm, 110 μm, 120 μm, 130 μm, 140 μm, 150 μm, 160 μm, 170 μm, 180 μm, 190 μm, 200 μm or any value between 10 μm - 200 μm, and specifically there is no limitation here.

[0155] In some embodiments, the distance between the bottom surface of the second recessed groove 1221 and the bottom surface of the first groove 121 (i.e., the recessed depth of the second recessed groove 1221 relative to the bottom surface of the entire first groove 121) is 50 nm - 10 μm.

[0156] Thus, by setting the overall recessed depth of the second recessed groove 1221 within this reasonable range, it is possible to prevent the depth of the second recessed groove 1221 from being too deep and causing a decrease in the strength of the silicon substrate 10.

[0157] Specifically, in such an embodiment, the distance between the bottom surface of the second recessed groove 1221 and the back surface 12 can be, for example, 50 nm, 100 nm, 150 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, 10 μm or any value between 100 nm - 10 μm.

[0158] Please refer to Figure 14 and Figure 15 , in some embodiments, there is a first spacer region 101 between a partial region of the first doping layer 30 and the boss 123, and a first non - spacer region 102 between other regions of the first doping layer 30 and the boss 123;

[0159] There is a second spacer region 103 between a partial region of the second doping layer 60 and the boss 123, and a second non - spacer region 104 between other regions of the second doping layer 60 and the boss 123;

[0160] At the first non-spacing region 102, the first doping layer 30 has a third extending portion 32 extending onto the boss 123, and the third extending portion 32 is electrically connected to the second doping layer 60 at the second non-spacing region 104.

[0161] Thus, by electrically connecting the third extending portion 32 and the second doping layer 60 at the second non-spacing region 104, a composite contact can be formed between the third extending portion 32 and the second doping layer 60 at the second non-spacing region 104, which can reduce the reverse breakdown voltage and the risk of hot spots of the back contact solar cell 100, and thus improve the anti-hot spot performance of the back contact solar cell 100.

[0162] Specifically, in such an embodiment, the first non-spacing region 102 and the second non-spacing region 104 can correspond to each other in the first direction, and the two can preferably be directly aligned, or there can be at least an overlapping portion between the two in the first direction.

[0163] Please refer to Figure 15 , in some embodiments, at the second non-spacing region 104, the second doping layer 60 has a fourth extending portion 62 extending onto the boss, and the fourth extending portion 62 is electrically connected to the third extending portion 32;

[0164] Wherein, the third extending portion 32 surrounds the side surface of the fourth extending portion 62 and extends onto the surface of the fourth extending portion 62 facing away from the silicon substrate 10. A fifth dielectric layer 140 is provided between the side surface of the fourth extending portion 62 and the third extending portion 32, and a third insulating layer 150 is provided between the surface of the fourth extending portion 62 facing away from the silicon substrate 10 and the third extending portion 32.

[0165] Thus, the third extending portion 32 is only electrically connected to the side surface of the fourth extending portion 62, which can effectively prevent the area of the composite contact between the third extending portion 32 and the fourth extending portion 62 from being too large and resulting in an excessive reduction in efficiency.

[0166] Specifically, in such an embodiment, the fifth dielectric layer 140 can be a tunneling oxide layer. For example, a tunneling silicon oxide film layer, and the third insulating layer 150 can be a silicon oxide film layer or a phosphosilicate glass layer or a borosilicate glass layer or a borophosphosilicate glass layer having an insulating function, and specific details are not limited herein.

[0167] Please refer to Figure 16 , in some embodiments, in the back contact solar cell 100, the second doping layer 60 is only located within the second groove 122 (that is, the second doping layer 60 does not have the fourth extending portion 62), and the third extending portion 32 extends onto the surface of the second doping layer 60 facing away from the silicon substrate 10 at the second non-spacing region 104 to be electrically connected to the second doping layer 60.

[0168] In this way, directly extending the third extension portion 32 onto the second doping layer 60 to make electrical connection with the second doping layer 60 can also achieve the composite contact between the two, thereby realizing the function of resisting the hot spot risk.

[0169] Further, in some embodiments, a sixth dielectric layer 160 is provided between the surface of the third extension portion 32 facing away from the silicon substrate 10 and the second doping layer 60, and the third extension portion 32 is electrically connected to the second doping layer 60 through the sixth dielectric layer 160.

[0170] In this way, the setting of the sixth dielectric layer 160 can achieve the electrical connection between the third extension portion 32 and the second doping layer 60 while improving the passivation effect.

[0171] Specifically, the sixth dielectric layer 160 can also be a tunneling oxide layer. For example, it can be a tunneling silicon oxide film layer. In a possible embodiment, the sixth dielectric layer 160 can be prepared together with the first dielectric layer 20.

[0172] Please refer to Figure 17 and Figure 18 In some embodiments, there is a first spacer 101 between all regions of the first doping layer 30 and the boss 123, and there is a second spacer 103 between all regions of the second doping layer 60 and the boss 123. That is, the first doping layer 30 does not have the third extension portion 32, and the second doping layer 60 does not have the fourth extension portion 62.

[0173] In such a case, a second diffusion layer 90 is formed at least in part of the surfaces of the boss 123, the first spacer 101, and the second spacer 103, and the first doping layer 30 and the second doping layer 60 are electrically connected through the second diffusion layer 90.

[0174] In this way, the second diffusion layer 90 can make the first doping layer 30 and the second doping layer 60 form an electrical connection, thereby reducing the hot spot risk of the back-contact solar cell and improving the hot spot resistance performance.

[0175] Specifically, in such an embodiment, the second diffusion layer 90 can be formed by diffusion on the silicon substrate 10. The doping type of the second diffusion layer 90 can be the same as that of the first doping layer 30 or the second doping layer 60. It can be a phosphorus diffusion layer or a boron diffusion layer. There is no specific limitation here. The presence of the second diffusion layer 90 can enable the first doping layer 30 and the second doping layer 60 to be conducted through the second diffusion layer 90, thereby improving the hot spot resistance performance.

[0176] In such an embodiment, the first diffusion layer 80 may be in contact with the first dielectric layer 20 and the second dielectric layer 50 to achieve an electrical connection between the first doped layer 30 and the second doped layer 60, or the first diffusion layer 80 may be directly electrically connected to the first doped layer 30 and the second doped layer 60. Specifically, no limitation is imposed herein.

[0177] Please refer to Figure 17 , in some embodiments, the first groove 121 and the second groove 122 are alternately arranged in sequence along the first direction and extend along the second direction, the second direction intersects with the first direction, the second diffusion layer 90 extends along the second direction, and in the second direction, the second diffusion layer 90 has a plurality of second diffusion regions 91 with different doping concentrations.

[0178] Thus, by controlling the doping concentration of the second diffusion layer 90 in different second diffusion regions 91, the reverse breakdown voltage at the second diffusion region 91 with a higher doping concentration is lower, which can improve the ability of the back-contact solar cell 100 to resist hot spot risks; the second diffusion region 91 with a lower doping concentration will not cause a significant reduction in the reverse breakdown voltage, so that the second diffusion region 91 corresponding to the low doping concentration will not cause a large leakage current, and only the second diffusion region 91 with a higher doping concentration is used to achieve the function of improving the resistance to hot spot risks. That is to say, in this way, the resistance to hot spot risks can be improved while avoiding a large leakage current in the back-contact solar cell 100, which may lead to a significant reduction in efficiency.

[0179] Specifically, in such an embodiment, the first doped layer 30 and the second doped layer 60 can be electrically connected to each other through the second diffusion region 91 with a higher doping concentration to improve the anti-hot spot performance, while the second diffusion region 91 with a lower doping concentration will not cause a large leakage current, avoiding a significant decrease in efficiency.

[0180] In the description of this specification, the descriptions with reference to the terms "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0181] In addition, the above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, and improvements made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A back contact solar cell, characterized in that: include: A silicon substrate, wherein the silicon substrate has a front side and a back side opposite to each other, and a plurality of first grooves and a plurality of second grooves are formed on the back side and are alternately arranged in sequence, so that a boss is formed on the silicon substrate between adjacent first grooves and second grooves; stacking a first doping layer covering only a partial area of ​​the bottom surface of the first groove; A first dielectric layer stacked between the first doped layer and the silicon substrate, wherein a first spacing region is provided between at least a portion of the first doped layer and the boss, and the first doped layer is not provided at the first spacing region; A second dielectric layer stacked at the second groove; and A second doping layer is disposed at the second groove and at least stacked on the second dielectric layer.

2. The back contact solar cell according to claim 1, characterized in that: All positions of the first doped layer are isolated from the boss by the first spacing region; and / or The first dielectric layer covers the first spacer region.

3. The back contact solar cell according to claim 1, characterized in that: The first spacing region is a first sunken groove formed in the first groove and recessed into the silicon substrate, thereby forming a first convex portion in the first groove. The first sunken groove separates the first convex portion and the boss, and the first dielectric layer and the first doping layer are not present at the first sunken groove.

4. The back contact solar cell according to claim 3, characterized in that: In the arrangement direction of the first groove and the second groove, the width of the first sunken groove is 10 μm-200 μm; and / or the distance between the bottom surface of the first sunken groove and the bottom surface of the first groove is 50 nm-10 μm.

5. The back contact solar cell according to claim 1, characterized in that: The second doping layer has a first extending portion extending to an edge of the boss, and a first insulating layer is provided between at least a portion of the first extending portion and the boss.

6. The back contact solar cell according to claim 5, characterized in that: The first doping layer is a doping layer formed by doping with a first doping element, and the second doping layer is a doping layer formed by doping with a second doping element. In the boss, the doping concentration of the second doping element in the area close to the second groove is greater than the doping concentration of the second doping element in the area close to the first groove.

7. The back contact solar cell according to claim 5, characterized in that: In the arrangement direction of the first groove and the second groove, the length of the first extension portion is 10 μm-60 μm.

8. The back contact solar cell according to claim 5, characterized in that: The boss is a step structure, wherein the boss has a first step surface and a second step surface, the second step surface is closer to the front side than the first step surface, the first extension portion covers the first step surface, and the first insulating layer is located between the first step surface and the first extension portion.

9. The back contact solar cell according to claim 5, characterized in that: Only a partial area of ​​the first doped layer has the first spacing area between it and the boss, and the other areas of the first doped layer and the boss are the first non-spacing area. In the first non-spacing area, the first doped layer has a second extension portion extending onto the boss, and the second extension portion is conductively connected to the first extension portion.

10. The back contact solar cell according to claim 9, characterized in that: The first extension portion has a suspended section suspended on the boss, the first insulating layer is not provided between the suspended section and the boss, and the second extension portion is conductively connected to the suspended section.

11. The back contact solar cell according to claim 10, characterized in that: A third dielectric layer is formed on the surface of the suspended section facing the boss, and the second extending portion covers the third dielectric layer and is conductively connected to the suspended section through the third dielectric layer.

12. The back contact solar cell according to claim 11, characterized in that: The second extension portion surrounds the suspended section and extends to a surface of the first extension portion facing away from the silicon substrate. A second insulating layer is disposed between the second extension portion and the first extension portion on the surface of the first extension portion facing away from the silicon substrate.

13. The back contact solar cell according to claim 9, characterized in that: The second extension portion extends along the boss to the surface of the first extension portion facing away from the silicon substrate, and a fourth dielectric layer is provided between the second extension portion and the side surface of the first extension portion and the surface of the first extension portion facing away from the silicon substrate, and the second extension portion is conductively connected to the first extension portion through the fourth dielectric layer.

14. The back contact solar cell according to claim 5, characterized in that: The first spacing area is provided between all positions of the first doping layer and the boss, a first diffusion layer is formed on at least part of the surface of the boss and the first spacing area, and the first doping layer and the second doping layer are conductively connected via the first diffusion layer.

15. The back contact solar cell according to claim 14, characterized in that: The first grooves and the second grooves are alternately arranged in sequence along a first direction and extend along a second direction, the second direction intersects the first direction, the first diffusion layer extends along the second direction, and in the second direction, the first diffusion layer has a plurality of first diffusion regions with different doping concentrations.

16. The back contact solar cell according to claim 1, characterized in that: The second doped layer is only stacked on a partial area of ​​the bottom surface of the second groove, a second dielectric layer is provided between the second doped layer and the silicon substrate, a second spacing area is provided between at least a partial area of ​​the second doped layer and the boss, and the second doped layer is not provided at the second spacing area.

17. The back contact solar cell according to claim 16, characterized in that: All positions of the second doped layer are isolated from the boss by the second spacing region; and / or The second dielectric layer covers the second spacer region.

18. The back contact solar cell according to claim 16, characterized in that: The second spacing region is a second sunken groove formed in the second groove and recessed into the silicon substrate, so that a second convex portion is formed in the second groove. The second sunken groove separates the second convex portion from the boss, and the second dielectric layer and the second doping layer are not present at the second sunken groove.

19. The back contact solar cell according to claim 18, characterized in that: In the arrangement direction of the first groove and the second groove, the width of the second sunken groove is 10 μm-200 μm; and / or the distance between the bottom surface of the second sunken groove and the bottom surface of the second groove is 50 nm-10 μm.

20. The back contact solar cell according to claim 16, characterized in that: The first spacing region is provided between a partial region of the first doping layer and the boss, and the first non-spacing region is provided between the other regions of the first doping layer and the boss; The second spacing region is provided between a partial region of the second doping layer and the boss, and the second non-spacing region is provided between the other regions of the second doping layer and the boss; At the first non-spacer region, the first doped layer has a third extending portion extending onto the protrusion, and the third extending portion is conductively connected to the second doped layer at the second non-spacer region.

21. The back contact solar cell according to claim 20, characterized in that: At the second non-spacer region, the second doped layer has a fourth extending portion extending onto the boss, and the fourth extending portion is conductively connected to the third extending portion; The third extension portion surrounds the side of the fourth extension portion and extends to the surface of the fourth extension portion facing away from the silicon substrate, a fifth dielectric layer is provided between the side of the fourth extension portion and the third extension portion, and a third insulating layer is provided between the surface of the fourth extension portion facing away from the silicon substrate and the third extension portion.

22. The back contact solar cell according to claim 20, characterized in that: In the back-contact solar cell, the second doped layer is located only in the second groove, and the third extension portion extends at the second non-spaced region to a surface of the second doped layer facing away from the silicon substrate to be conductively connected to the second doped layer.

23. The back contact solar cell according to claim 22, characterized in that A sixth dielectric layer is provided between the third extension portion and a surface of the second doped layer facing away from the silicon substrate, and the third extension portion is conductively connected to the second doped layer through the sixth dielectric layer.

24. The back contact solar cell according to claim 16, characterized in that: The first spacing region is provided between all regions of the first doping layer and the boss, and the second spacing region is provided between all regions of the second doping layer and the boss; A second diffusion layer is formed on at least a portion of the surfaces of the boss, the first spacer, and the second spacer, and the first doping layer and the second doping layer are conductively connected via the second diffusion layer.

25. The back contact solar cell according to claim 24, characterized in that The first grooves and the second grooves are alternately arranged in sequence along a first direction and extend along a second direction, the second direction intersects the first direction, the second diffusion layer extends along the second direction, and in the second direction, the second diffusion layer has a plurality of second diffusion regions with different doping concentrations.

26. The back contact solar cell according to any one of claims 1 to 25, characterized in that: The surface of the boss is a non-suede structure; and / or The surfaces of the first groove and the second groove are both non-suede structures.

27. The back contact solar cell according to any one of claims 1 to 25, characterized in that: The depth of the first groove is 100 nm-10 μm; and / or The second groove has a depth of 100 nm-10 μm.

28. The back contact solar cell according to any one of claims 1 to 25, characterized in that: The surface roughness of the second groove is greater than the surface roughness of the first groove.

29. A battery assembly, characterized in that: A back-contact solar cell comprising the steps of any one of claims 1 to 28.

30. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 29.

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