Display panel and display device

Abstract

The utility model provides a display panel and a display device, and the display panel comprises a substrate which is provided with a first display area and a second display area; each sub-pixel comprises a pixel circuit, a light-emitting functional layer and a first electrode; the first electrode comprises a continuous electrode and a plurality of independent electrodes, and the adjacent independent electrodes are arranged at intervals; the connecting layer comprises a connecting body with the light transmittance larger than that of the first electrode, and the independent electrodes are electrically connected with the continuous electrodes and / or the negative power source signal line through the connecting body. According to the display panel and the display device provided by the invention, the independent electrode is electrically connected with the continuous electrode and / or the negative power supply signal line through the connecting main body with relatively high light transmittance, so that the continuous electrode and / or the negative power supply signal line can transmit a corresponding voltage signal to the independent electrode through the connecting main body; in addition, the overall light transmittance of the first display area of the display panel can be large, and the light transmittance requirements of under-screen camera shooting and under-screen face recognition can be met.

Description

Technical Field

[0001] The present application relates to the field of display technologies, and in particular, to a display panel and a display device. Background Art

[0002] With the continuous development of display technologies, people hope that the display area of a display terminal can cover the entire display panel, that is, full-screen display. Under-screen camera technology and under-screen face recognition technology provide technical support for realizing full-screen display.

[0003] However, in related technologies, under-screen camera and under-screen face recognition technologies are not yet fully mature, and it is difficult to achieve normal image display in the camera area and face recognition area of the display panel. Only display forms such as punch-hole screens and notch screens can be adopted. Summary of the Utility Model

[0004] In view of this, the purpose of the present application is to provide a display panel and a display device.

[0005] Based on the above purpose, in the first aspect of the present application, a display panel is provided, including: a substrate substrate, including a first display area and a second display area, the second display area is located on at least one side of the first display area, and the light transmittance of the first display area is greater than that of the second display area; a plurality of sub-pixels, located in the first display area and the second display area; the sub-pixels include a pixel circuit and a light-emitting element which are sequentially stacked on one side of the substrate substrate along a direction away from the substrate substrate, the light-emitting element includes a first electrode, a second electrode, and a light-emitting functional layer located between the first electrode and the second electrode, and the first electrode is located on a side of the light-emitting functional layer away from the substrate substrate; the first electrode in the first display area is a plurality of independent electrodes, the first electrode in the second display area is a continuous electrode connected to each other, a positive projection of the continuous electrode on the substrate substrate covers a positive projection of the second display area on the substrate substrate, and at least one of the plurality of independent electrodes in the first display area corresponds to at least one of the plurality of sub-pixels in the first display area; adjacent independent electrodes are spaced apart; a connection layer, at least located in the first display area and on a side of the pixel circuit away from the substrate substrate, the connection layer includes a connection main body, and the light transmittance of the connection main body is greater than that of the first electrode; the plurality of independent electrodes are electrically connected to the continuous electrode through the connection main body, and / or the plurality of independent electrodes are configured to be electrically connected to a negative power signal line.

[0006] Based on the same inventive concept, in the second aspect of the present application, a display device is further provided, including a sensor, and the display panel as described in the first aspect; a positive projection of the sensor on the display panel and a positive projection of the first display area on the display panel at least partially overlap.

[0007] As can be seen from the above, in the display panel and the display device provided by the present application, in the first display area, adjacent independent electrodes are arranged at intervals, so that there is no longer a first electrode layer material with a relatively low light transmittance between adjacent independent electrodes. Multiple independent electrodes are electrically connected to the continuous electrode through a connection body with a light transmittance greater than that of the first electrode, and / or multiple independent electrodes are electrically connected to the negative power supply signal line through the connection body. On the one hand, it can realize the transmission of corresponding voltage signals from the continuous electrode to each independent electrode through the connection body, and / or the transmission of corresponding voltage signals from the negative power supply signal line to each independent electrode through the connection body, so as to ensure that the sub-pixels in the first display area can be normally displayed; on the other hand, since the light transmittance of the connection body is relatively large, the overall light transmittance of the first display area of the display panel can be made greater than the overall light transmittance of the second display area, which helps the first display area of the display panel to meet the light transmittance requirements for under-screen camera and under-screen face recognition. Description of the Drawings

[0008] In order to more clearly illustrate the technical solutions in the present application or related technologies, the following will briefly introduce the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings in the following descriptions are only the embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0009] Figure 1a Schematic diagram of the display panel according to the embodiment of the present application;

[0010] Figure 1b Schematic diagram of the principle of under-screen camera technology;

[0011] Figure 2 Schematic diagram of the principle of under-screen face recognition technology;

[0012] Figure 3 For Figure 1a Schematic diagram of the cross-section taken along J-J in

[0013] Figure 4 Equivalent circuit diagram of the pixel circuit of the display panel according to the embodiment of the present application;

[0014] Figure 5 Schematic diagram of the relationship between the cathode light transmittance and the wavelength;

[0015] Figure 6a Schematic diagram of a display panel of the display panel according to the embodiment of the present application;

[0016] Figure 6b Schematic diagram of another display panel of the display surface according to the embodiment of the present application;

[0017] Figure 7a is Figure 6a the schematic cross-sectional view of the B-B section in

[0018] Figure 7b is Figure 6b the schematic cross-sectional view of the B-B section in

[0019] Figure 8 is Figure 6a the schematic view of the first structure of part A in

[0020] Figure 9 is Figure 8 the schematic cross-sectional view of the C-C section in

[0021] Figure 10 is Figure 6a the schematic view of the second structure of part A in

[0022] Figure 11 is Figure 10 the schematic cross-sectional view of the D-D section in

[0023] Figure 12 is Figure 6a the schematic view of the third structure of part A in

[0024] Figure 13 is Figure 12 the schematic cross-sectional view of the E-E section in

[0025] Figure 14 is Figure 6a the schematic view of the fourth structure of part A in

[0026] Figure 15 is Figure 14 the schematic cross-sectional view of the F-F section in

[0027] Figure 16 is Figure 6a the schematic view of the fifth structure of part A in

[0028] Figure 17 is Figure 16 the schematic cross-sectional view of the G-G section in

[0029] Figure 18 is Figure 6a the schematic view of the sixth structure of part A in

[0030] Figure 19 is Figure 18 the schematic cross-sectional view of the H-H section in

[0031] Figure 20 the schematic view of the connection main body and the connection protection layer in the display panel of the embodiment of the present application;

[0032] Figure 21 Flow chart of the display panel preparation method according to the embodiment of the present application;

[0033] Figure 22 For preparing Figure 6a Schematic diagram of the connection body of the first structure of part A in

[0034] Figure 23 For preparing Figure 6a Schematic diagram of the first electrode layer of the first structure of part A in

[0035] Figure 24 For preparing Figure 6a Schematic diagram of the connection body of the second structure of part A in

[0036] Figure 25 For preparing Figure 6a Schematic diagram of the first electrode layer of the second structure of part A in

[0037] Figure 26 For preparing Figure 6a Schematic diagram of the partial removal of the first electrode layer of the second structure of part A in

[0038] Figure 27 For preparing Figure 6a Schematic diagram of the connection body of the third structure of part A in

[0039] Figure 28 For preparing Figure 6a Schematic diagram of the first electrode layer of the third structure of part A in

[0040] Figure 29 For preparing Figure 6a Schematic diagram of the connection body of the fourth structure of part A in

[0041] Figure 30 For preparing Figure 6a Schematic diagram of the first electrode layer of the fourth structure of part A in

[0042] Figure 31 For preparing Figure 6a Schematic diagram of the partial removal of the first electrode layer of the fourth structure of part A in Detailed implementation manners

[0043] In order to make the purpose, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to specific embodiments and the accompanying drawings.

[0044] It should be noted that: Unless otherwise specifically stated, the relative arrangements, numerical expressions and numerical values of the components described in these embodiments do not limit the scope of the present application.

[0045] Meanwhile, it should be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationship.

[0046] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way a limitation on the present application, its application, or its use.

[0047] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should have the ordinary meaning understood by those of ordinary skill in the art to which the present application pertains. The terms "first", "second", and similar terms used in the embodiments of the present application do not denote any order, quantity, or importance, but are merely used to distinguish different components. The terms "comprising", "including", or similar terms mean that the elements or items appearing before the term cover the elements or items listed after the term and their equivalents, without excluding other elements or items. The terms "connected" or "coupled" or similar terms are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The terms "upper", "lower", "left", "right", etc. are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0048] As Figure 1a shown, the display panel 10 includes a display area 18 (or AA area), and a peripheral area 19 located on at least one side of the display area 18. Exemplarily, the peripheral area 19 may surround the display area 18, and a driving chip 191 (i.e., driving IC) may be disposed in the peripheral area 19. The display area 18 includes a first display area 181, and a second display area 182 located on at least one side of the first display area 181.

[0049] As Figure 1b shown, Figure 1b shows a partial cross-sectional schematic view of the display area 18 of the display panel 10 employing an under-screen camera technology. The camera 20 is disposed below the display panel 10, and the first display area 181 of the display panel 10 may serve as a light incident area 12 corresponding to the camera 20, and external light is collected by the camera 20 after passing through the light incident area 12 of the display panel 10.

[0050] As Figure 2 shown, Figure 2The figure shows a partial cross-sectional schematic view of the display area 18 of the display panel 10 adopting the under-screen face recognition technology. The sensor is disposed below the display panel 10. The first display area 181 of the display panel 10 can serve as the light incident area 12 and the light exit area 11 corresponding to the sensor (for example, the display panel 10 may include one or two first display areas 181. When the display panel 10 has one first display area 181, a part of the first display area 181 serves as the light incident area 12 and another part serves as the light exit area 11; when the display panel 10 has two first display areas 181, the two first display areas 181 respectively serve as the light incident area 12 and the light exit area 11). Two sensors are respectively corresponding to the light incident area 12 and the light exit area 11, and the sensor can be an infrared sensor 30. Taking two infrared sensors 30 as an example for illustration, one of the infrared sensors 30 is an infrared emitter corresponding to the light exit area 11, and the other infrared sensor 30 is an infrared receiver corresponding to the light incident area 12. The infrared light emitted by the infrared emitter passes through the light exit area 11 of the display panel 10 to irradiate the human face to form an infrared light spot, and the infrared receiver collects the light spot through the light incident area 12 of the display panel 10 to achieve face recognition.

[0051] The applicant's research finds that in combination with Figure 1a , a plurality of sub-pixels 14 are provided in both the first display area 181 and the second display area 182 of the display panel 10, and the sub-pixels 14 located in the first display area 181 will have an adverse effect on the light transmittance (or light transmission rate) of this area, and further will affect the photographing effect of the under-screen camera technology or the recognition effect of the under-screen face recognition technology.

[0052] Specifically, as Figure 3 , Figure 3 The figure shows a partial cross-sectional schematic view corresponding to a sub-pixel 14 in the display panel 10.

[0053] The display panel 10 includes a substrate 13. Exemplarily, the material of the substrate 13 can be a rigid substrate (such as glass), or a flexible substrate (such as polyimide PI).

[0054] The sub-pixels 14 are disposed on one side of the substrate 13. Exemplarily, a plurality of sub-pixels 14 are arranged in an array on one side of the substrate 13.

[0055] As Figure 3 , in the direction perpendicular to the substrate 13 (such as the Z direction in Figure 3 , that is, the thickness direction of the display panel 10), a driving circuit layer 141, a light-emitting structure layer 143, and a packaging structure layer 144 are sequentially disposed on one side of the substrate 13. The driving circuit layer 141 can include a plurality of different types of pixel circuits, and each pixel circuit can include a plurality of transistors and at least one capacitor 16.

[0056] In some embodiments, Figure 3 taking an example that each pixel circuit includes a thin-film transistor 15 and a capacitor 16 is schematically shown. In some examples, the driving circuit layer 141 may include a semiconductor layer, a first gate metal layer, a second gate metal layer, a first source-drain metal layer, and a second source-drain metal layer disposed on the substrate 13. A first gate insulating layer 1411 may be disposed between the semiconductor layer and the first gate metal layer, a second gate insulating layer 1412 may be disposed between the first gate metal layer and the second gate metal layer, an interlayer insulating layer 1413 may be disposed between the second gate metal layer and the first source-drain metal layer, a passivation layer 1414 and a first planarization layer 1415 may be disposed between the first source-drain metal layer and the second source-drain metal layer, and a second planarization layer 1421 may be disposed on a side of the second source-drain metal layer away from the substrate 13. Among them, the first gate insulating layer 1411, the second insulating layer 1412, the interlayer insulating layer 1413, and the passivation layer 1414 may be inorganic insulating layers, and the first planarization layer 1415 and the second planarization layer 1421 may be organic insulating layers. However, this embodiment is not limited thereto.

[0057] Exemplarily, a buffer layer may further be disposed on a side of the semiconductor layer close to the substrate 13. The buffer layer may prevent harmful substances in the substrate 13 from invading the interior of the display panel 10, and may also increase the adhesion of the film layers in the display panel 10 to the substrate 13.

[0058] Exemplarily, a bottom shielding metal layer (BSM, Bottom Shielding Metal) may be disposed on a side of the buffer layer close to the substrate 13. The bottom shielding metal layer may be configured to at least partially cover the active layer 151 of the thin-film transistor 15 of the pixel circuit to avoid the influence of external light on the performance of the thin-film transistor 15.

[0059] Exemplarily, the passivation layer may be omitted between the first source-drain metal layer and the second source-drain metal layer, and only the first planarization layer 1415 may be disposed between the first source-drain metal layer and the second source-drain metal layer.

[0060] Exemplarily, as Figure 3As shown, the semiconductor layer may at least include: the active layer 151 of the thin-film transistor 15. The active layer 151 may include: a first region 1511, a second region 1512, and a channel region 1513 located between the first region 1511 and the second region 1512. The first gate metal layer may at least include: the gate 152 of the thin-film transistor 15, and the first electrode plate 161 of the capacitor 16. The orthographic projection of the gate 152 of the thin-film transistor 15 on the substrate 13 may cover the orthographic projection of the channel region 1513 of the active layer 151 on the substrate 13. The second gate metal layer may at least include: the second electrode plate 162 of the capacitor 16. The orthographic projections of the second electrode plate 162 and the first electrode plate 161 of the capacitor 16 on the substrate 13 may at least partially overlap. For example, the two may coincide. The first source-drain metal layer may at least include: the source electrode 153 and the drain electrode 154 of the thin-film transistor 15. The interlayer insulating layer 1413 may be provided with a plurality of vias in the display area (for example, including a first pixel via and a second pixel via). The interlayer insulating layer 1413, the second gate insulating layer 1412, and the first gate insulating layer 1411 within the first pixel via may be removed, exposing at least a part of the surface of the first region 1511 of the active layer 151; the interlayer insulating layer 1413, the second gate insulating layer 1412, and the first gate insulating layer 1411 within the second pixel via may be removed, exposing at least a part of the surface of the second region 1512 of the active layer 151. The source electrode 153 of the thin-film transistor 15 may be electrically connected to the first region 1511 of the active layer 151 through the first pixel via, and the drain electrode 154 may be electrically connected to the second region 1512 of the active layer 151 through the second pixel via. The second source-drain metal layer may at least include: a first transfer electrode 171. The first transfer electrode 171 may be electrically connected to the drain electrode 154 of the thin-film transistor 15 of the pixel circuit through a third pixel via formed in the passivation layer 1414 and the first planarization layer 1415.

[0061] In this example, the electrical connection between the pixel circuit and the light-emitting element may be achieved through the second source-drain metal layer. However, this embodiment is not limited thereto.

[0062] Exemplarily, as Figure 3As shown, the light-emitting structure layer 143 of the display area may include: a pixel definition layer 1434 and a plurality of light-emitting elements. For example, each light-emitting element may include: a stacked second electrode 1431, a light-emitting functional layer 1432, and a first electrode 1433. The second electrode 1431 of the light-emitting element may be an anode. For example, the second electrode 1431 may be disposed on the second flat layer 1421 and electrically connected to the first transfer electrode 171 through a fourth pixel via formed in the second flat layer 1421. The pixel definition layer 1434 is disposed on the second electrode 1431 and the second flat layer 1421. The pixel definition layer 1434 may be provided with a plurality of pixel openings 14342, and at least a part of the surface of a corresponding second electrode 1431 may be exposed through one pixel opening 14342. At least a part of the light-emitting functional layer 1432 may be disposed in one pixel opening 14342 and electrically connected to the corresponding second electrode 1431. The first electrode 1433 may be disposed on the light-emitting functional layer 1432 and electrically connected to the light-emitting functional layer 1432. The light-emitting functional layer 1432 may emit light of a corresponding color under the drive of the second electrode 1431 and the first electrode 1433. An isolation pillar layer may also be disposed on the side of the pixel definition layer 1434 away from the substrate 13, and the isolation pillar layer may include a plurality of isolation pillars (PS).

[0063] Exemplarily, the light-emitting functional layer 1432 of the light-emitting element may include a light-emitting layer (EML, Emitting Layer), and one or more of a hole injection layer (HIL, Hole Injection Layer), a hole transport layer (HTL, Hole Transport Layer), a hole block layer (HBL, Hole Block Layer), an electron block layer (EBL, Electron Block Layer), an electron injection layer (EIL, Electron Injection Layer), and an electron transport layer (ETL, Electron Transport Layer). Under the voltage drive of the second electrode 1431 and the first electrode 1433, light may be emitted according to the required gray level by using the light-emitting characteristics of the organic material.

[0064] Exemplarily, the light-emitting layers of light-emitting elements of different colors can be different. For example, a red light-emitting element includes a red light-emitting layer, a green light-emitting element includes a green light-emitting layer, and a blue light-emitting element includes a blue light-emitting layer. To reduce the process difficulty and improve the yield, the hole injection layer and the hole transport layer on one side of the light-emitting layer can adopt a common layer, and the electron injection layer and the electron transport layer on the other side of the light-emitting layer can adopt a common layer. In some examples, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer can be fabricated by a single process (a single evaporation process or a single inkjet printing process), and isolation can be achieved through the surface step difference of the formed film layer or through surface treatment and other means. For example, any one or more of the hole injection layer, the hole transport layer, the electron injection layer, and the electron transport layer corresponding to adjacent sub-pixels can be isolated. In some examples, the light-emitting functional layer can be prepared by evaporation using a fine metal mask (FMM) or an open mask, or by an inkjet process.

[0065] Exemplarily, as Figure 3 shown, a packaging structure layer 144 is further provided on the side of the light-emitting structure layer 143 away from the substrate 13. The packaging structure layer 144 can include a stacked first packaging layer 1441, a second packaging layer 1442, and a third packaging layer 1443. Among them, the first packaging layer 1441 and the third packaging layer 1443 can adopt inorganic materials, the second packaging layer 1442 can adopt organic materials, and the second packaging layer 1442 can be disposed between the first packaging layer 1441 and the third packaging layer 1443 to ensure that external water vapor cannot enter the light-emitting element. However, this embodiment is not limited thereto. For example, the packaging structure layer 144 can adopt a five-layer stacked structure of inorganic / organic / inorganic / organic / inorganic.

[0066] Exemplarily, a polarizing layer can also be provided on the side of the packaging structure layer 144 away from the substrate 13.

[0067] For the pixel circuit, an equivalent circuit diagram shown in Figure 4 is used for exemplary illustration. Figure 4 The shown pixel circuit is a 7T1C structure, but this embodiment is not limited thereto.

[0068] In some embodiments, as Figure 4As shown, the pixel circuit of this example may include six switching transistors (T1, T2, T4 to T7), a driving transistor T3, and a storage capacitor Cst. The six switching transistors are respectively a data writing transistor T4, a threshold compensation transistor T2, a first light emission control transistor T5, a second light emission control transistor T6, a first reset transistor T1, and a second reset transistor T7. The light-emitting element EL may include an anode, a cathode, and a light-emitting functional layer disposed between the anode and the cathode.

[0069] Exemplarily, the driving transistor and the six switching transistors may be P-type transistors, or may be N-type transistors. Using transistors of the same type in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the yield of the product. In some possible implementation manners, the driving transistor and the six switching transistors may include P-type transistors and N-type transistors.

[0070] Exemplarily, the driving transistor and the six switching transistors may employ low-temperature polysilicon thin-film transistors, or may employ oxide thin-film transistors, or may employ low-temperature polysilicon thin-film transistors and oxide thin-film transistors. The active layer of the low-temperature polysilicon thin-film transistor uses low-temperature polysilicon (LTPS, Low Temperature Poly-Silicon), and the active layer of the oxide thin-film transistor uses an oxide semiconductor (Oxide). The low-temperature polysilicon thin-film transistor has advantages such as high mobility and fast charging, and the oxide thin-film transistor has advantages such as low leakage current. Integrating the low-temperature polysilicon thin-film transistor and the oxide thin-film transistor on a display panel to form a low-temperature polycrystalline oxide (LTPO, Low Temperature Polycrystalline Oxide) display panel can utilize the advantages of both, can achieve low-frequency driving, can reduce power consumption, and can improve the display quality.

[0071] In some embodiments, as Figure 4 shown, the display panel may include a scan line GL, a data line DL, a first power supply line PL1, a second power supply line PL2, a light emission control line EML, a first initial signal line INIT1, a second initial signal line INIT2, a first reset control line RST1, and a second reset control line RST2.

[0072] Exemplarily, the first power line PL1 may be configured to provide a constant first voltage signal VDD to the pixel circuit, the second power line PL2 may be configured to provide a constant second voltage signal VSS to the pixel circuit, and the first voltage signal VDD is greater than the second voltage signal VSS. The scan line GL may be configured to provide a scan signal SCAN to the pixel circuit, the data line DL may be configured to provide a data signal DATA to the pixel circuit, the emission control line EML may be configured to provide an emission control signal EM to the pixel circuit, the first reset control line RST1 may be configured to provide a first reset control signal RESET1 to the pixel circuit, and the second reset control line RST2 may be configured to provide a second reset control signal RESET2 to the pixel circuit.

[0073] Exemplarily, in the pixel circuit of the n-th row, the first reset control line RST1 may be electrically connected to the scan line GL of the pixel circuit of the (n - 1)-th row to input the scan signal SCAN(n - 1), that is, the first reset control signal RESET1(n) is the same as the scan signal SCAN(n - 1). The second reset control line RST2 may be electrically connected to the scan line GL of the pixel circuit of the n-th row to input the scan signal SCAN(n), that is, the second reset control signal RESET2(n) is the same as the scan signal SCAN(n).

[0074] Exemplarily, the second reset control line RST2 connected to the pixel circuit of the n-th row and the first reset control line RST1 connected to the pixel circuit of the (n + 1)-th row may be an integral structure. Wherein, n is an integer greater than 0. Thus, the signal lines of the display substrate can be reduced, and a narrow bezel design of the display substrate can be achieved. However, this embodiment is not limited thereto.

[0075] In some embodiments, the first initial signal line INIT1 may be configured to provide a first initial signal to the pixel circuit, and the second initial signal line INIT2 may be configured to provide a second initial signal to the pixel circuit. For example, the first initial signal may be different from the second initial signal. The first initial signal and the second initial signal may be constant voltage signals, and their magnitudes may be, for example, between the first voltage signal VDD and the second voltage signal VSS, but are not limited thereto. Exemplarily, the first initial signal and the second initial signal may be the same, and only the first initial signal line may be provided to provide the first initial signal.

[0076] In some embodiments, such as Figure 4As shown, the driving transistor T3 is electrically connected to the light-emitting element EL, and outputs a driving current to drive the light-emitting element EL to emit light under the control of signals such as a scan signal SCAN, a data signal DATA, a first voltage signal VDD, and a second voltage signal VSS. The gate of the data writing transistor T4 is electrically connected to the scan line GL, the first pole of the data writing transistor T4 is electrically connected to the data line DL, and the second pole of the data writing transistor T4 is electrically connected to the first pole of the driving transistor T3. The gate of the threshold compensation transistor T2 is electrically connected to the scan line GL, the first pole of the threshold compensation transistor T2 is electrically connected to the gate of the driving transistor T3, and the second pole of the threshold compensation transistor T2 is electrically connected to the second pole of the driving transistor T3. The gate of the first light-emitting control transistor T5 is electrically connected to the light-emitting control line EML, the first pole of the first light-emitting control transistor T5 is electrically connected to the first power supply line PL1, and the second pole of the first light-emitting control transistor T5 is electrically connected to the first pole of the driving transistor T3. The gate of the second light-emitting control transistor T6 is electrically connected to the light-emitting control line EML, the first pole of the second light-emitting control transistor T6 is electrically connected to the second pole of the driving transistor T3, and the second pole of the second light-emitting control transistor T6 is electrically connected to the anode of the light-emitting element EL. The first reset transistor T1 is electrically connected to the gate of the driving transistor T3 and is configured to reset the gate of the driving transistor T3. The second reset transistor T7 is electrically connected to the anode of the light-emitting element EL and is configured to reset the anode of the light-emitting element EL. The gate of the first reset transistor T1 is electrically connected to the first reset control line RST1, the first pole of the first reset transistor T1 is electrically connected to the first initial signal line INIT1, and the second pole of the first reset transistor T1 is electrically connected to the gate of the driving transistor T3. The gate of the second reset transistor T7 is electrically connected to the second reset control line RST2, the first pole of the second reset transistor T7 is electrically connected to the second initial signal line INIT2, and the second pole of the second reset transistor T7 is electrically connected to the anode of the light-emitting element EL. The first capacitor plate of the storage capacitor Cst is electrically connected to the gate of the driving transistor T3, and the second capacitor plate of the storage capacitor Cst is electrically connected to the first power supply line PL1.

[0077] In this example, as Figure 4 shown, the first node N1 is the connection point of the storage capacitor Cst, the first reset transistor T1, the driving transistor T3, and the threshold compensation transistor T2. The second node N2 is the connection point of the first light-emitting control transistor T5, the data writing transistor T4, and the driving transistor T3. The third node N3 is the connection point of the driving transistor T3, the threshold compensation transistor T2, and the second light-emitting control transistor T6. The fourth node N4 is the connection point of the second light-emitting control transistor T6, the second reset transistor T7, and the light-emitting element EL.

[0078] As can be seen from the foregoing embodiments, the driving circuit layer 141 is provided with metal electrodes (such as the first electrode, the second electrode, and the first transfer electrode) and metal traces (such as the scan line GL, the data line DL, the first power line PL1, and the second power line PL2). Since the light transmittance of the metal electrodes and the metal traces is relatively low, the light transmittance of the driving circuit layer 141 is usually <10%. For the second electrode 1431, for example, the second electrode 1431 can be an anode. When the material of the second electrode 1431 is a reflective metal, the second electrode 1431 is opaque. For the first electrode 1433, for example, the first electrode 1433 can be a cathode, and its material is usually magnesium silver alloy (MgAg), with a relatively poor light transmittance of about 50% (visible light), and the intensity of its light transmittance decreases as the wavelength increases, as Figure 5 . For the polarizing layer, its light transmittance is about 40%.

[0079] The applicant has found that for the problem of the low light transmittance of other structural layers in the sub-pixel except the first electrode 1433, the light transmittance of the first display area 181 of the display panel 10 can be increased by reducing the arrangement density of the sub-pixels in the first display area 181 of the display panel 10. However, since a constant and identical voltage signal needs to be provided to each sub-pixel 14 through the first electrode 1433, in order to simplify the structure of the display panel 10, multiple first electrodes 1433 are usually designed as a continuous structure where the whole layer is connected to each other, that is, the first electrode 1433 is not only disposed at the position corresponding to the sub-pixel 14, but also extends to the gap position between adjacent sub-pixels 14. Therefore, the continuously arranged first electrode 1433 in the whole layer is one of the main reasons for the low light transmittance of the first display area 181 of the display panel 10 in the foregoing embodiments.

[0080] In view of this, as Figure 6a , Figure 6b , Figure 7a , Figure 7b , Figure 8 and Figure 9As shown, an embodiment of the present application provides a display panel 10, including: a substrate substrate 13, including a first display area 181 and a second display area 182, the second display area 182 is located on at least one side of the first display area 181, and the light transmittance of the first display area 181 is greater than that of the second display area 182; a plurality of sub-pixels 14, located in the first display area 181 and the second display area 182; the sub-pixels 14 include a pixel circuit and a light-emitting element which are sequentially stacked on one side of the substrate substrate 13 along the direction away from the substrate substrate 13, the light-emitting element includes a first electrode 1433, a second electrode 1431, and a light-emitting functional layer 1432 located between the first electrode 1433 and the second electrode 1431, and the first electrode 1433 is located on the side of the light-emitting functional layer 1432 away from the substrate substrate 13; the first electrode 1433 in the first display area 181 is a plurality of independent electrodes 14331, the first electrode 1433 in the second display area 182 is a continuous electrode 14332 connected to each other, the orthographic projection of the continuous electrode 14332 on the substrate substrate 13 covers the orthographic projection of the second display area 182 on the substrate substrate 13, and at least one of the plurality of independent electrodes 14331 in the first display area 181 corresponds to at least one of the plurality of sub-pixels 14 in the first display area 181; adjacent independent electrodes 14331 are spaced apart; a connection layer 183, at least located in the first display area 181 and on the side of the pixel circuit away from the substrate substrate 13, the connection layer 183 includes a connection body 1831, and the light transmittance of the connection body 1831 is greater than that of the first electrode 1433; the plurality of independent electrodes 14331 are electrically connected to the continuous electrode 14332 through the connection body 1831, and / or the plurality of independent electrodes 14331 are configured to be electrically connected to a negative power signal line.

[0081] Exemplarily, one independent electrode 14331 may correspond to one sub-pixel 14, that is, this independent electrode 14331 may only serve as the first electrode 1433 of the corresponding one sub-pixel 14.

[0082] Exemplarily, one independent electrode 14331 may also correspond to at least two sub-pixels 14, that is, this independent electrode 14331 may simultaneously serve as the first electrode 1433 of the corresponding at least two sub-pixels 14.

[0083] It should be noted that, exemplarily, as Figure 6a shown, Figure 6a shows a schematic structural diagram of the display panel 10 adopting the under-screen camera technology, and the display panel 10 may be provided with a first display area 181. Exemplarily, as Figure 7a shown, along the thickness direction of the display panel 10 (such as Figure 7aIn the Z direction), the camera 20 is disposed on a side of the display panel 10 away from the display surface of the display panel (or the light-emitting surface of the display panel), and the orthographic projection of the camera 20 on the display panel 10 can be at least partially located within the first display area 181.

[0084] As Figure 6b shown, Figure 6b FIG. shows a schematic structural diagram of a display panel 10 employing an under-screen recognition technology (such as face recognition or fingerprint recognition). The display panel 10 can be provided with two first display areas 181. As Figure 7b shown, along the thickness direction of the display panel 10 (such as Figure 7b the Z direction), the two sensors 30 are both disposed on a side of the display panel 10 away from the display surface of the display panel (or the light-emitting surface of the display panel), and the two sensors 30 correspond to the two first display areas 181 one by one. Specifically, the orthographic projection of each sensor 30 on the display panel 10 can be at least partially located within the corresponding first display area 181.

[0085] Exemplarily, the second display area 182 is at least located on one side of the first display area 181. For example, the second display area 182 surrounds the two first display areas 181.

[0086] Exemplarily, the arrangement density of the multiple sub-pixels 14 located in the first display area 181 is the same as that of the multiple sub-pixels 14 located in the second display area 182; or, the arrangement density of the multiple sub-pixels 14 located in the first display area 181 is less than that of the multiple sub-pixels 14 located in the second display area 182.

[0087] Exemplarily, the first electrode 1433 can be a cathode. In the display panel 10, the structural layer formed by multiple cathodes can be called a cathode layer. The second electrode 1431 can be an anode. In the display panel 10, the structural layer formed by multiple anodes can be called an anode layer.

[0088] Exemplarily, the material of the connection body 1831 can be a transparent metal or a transparent metal oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), fluorine-doped tin oxide FTO, etc.

[0089] Exemplarily, the connection body 1831 can be connected to the continuous electrode 14332 and the independent electrode 14331 to form a continuous thin film structure.

[0090] Exemplarily, along the planar direction of the display panel 10 (such as Figure 6a the X direction or the Y direction in

[0091] Exemplarily, the negative power supply signal line may be the second power supply line PL2 in the above embodiments, and the second power supply line PL2 is configured to provide a second voltage signal VSS to the pixel circuit.

[0092] Exemplarily, as Figure 9 and Figure 11 , the independent electrode 14331 may extend in the plane direction of the display panel 10 to the connection body 1831 to electrically connect the independent electrode 14331 and the connection body 1831; the connection body 1831 may extend in the plane direction of the display panel 10 to the continuous electrode 14332 to electrically connect the connection body 1831 and the continuous electrode 14332, so as to electrically connect the independent electrode 14331 through the connection body 1831 and the continuous electrode 14332.

[0093] Exemplarily, as Figure 12 and Figure 13 , the independent electrode 14331 may extend in the plane direction of the display panel 10 to the connection body 1831 to electrically connect the independent electrode 14331 and the connection body 1831; a trace extending to the peripheral area 19 of the display panel 10 and electrically connected to the negative power supply signal line may be provided between the light-emitting element and the pixel circuit (exemplarily, the material of the trace may be the same as the material of the connection body 1831), and the connection body 1831 may extend downward in the thickness direction of the display panel 10 (exemplarily, the connection body 1831 may pass through the pixel defining layer 1434 and the planarization layer 186 through vias provided in the pixel defining layer 1434 and the planarization layer 186) to be electrically connected to the trace, so as to electrically connect the connection body 1831 to the negative power supply signal line through the trace, and further electrically connect the independent electrode 14331 through the connection body 1831 and the negative power supply signal line.

[0094] Exemplarily, as Figure 13 , the connection body 1831 may extend in the plane direction of the display panel 10 to the continuous electrode 14332 and be electrically connected to the continuous electrode 14332, and the connection body 1831 may also extend downward in the thickness direction of the display panel 10 at the same time and be electrically connected to the negative power supply signal line through a trace provided between the light-emitting element and the pixel circuit, so that the independent electrode 14331 extending in the plane direction of the display panel 10 to the connection body 1831 is electrically connected to both the continuous electrode 14332 and the negative power supply signal line at the same time.

[0095] Since the continuous electrode 14332 is in the second display area 182, while the multiple independent electrodes 14331 are all in the first display area 181 and correspond to the sub-pixels 14 in the first display area 181 (for example, one independent electrode 14331 can correspond to one sub-pixel 14, and one independent electrode 14331 can also correspond to at least two sub-pixels 14), this causes the continuous electrode 14332 and the independent electrodes 14331 to be spaced apart, that is, the continuous electrode 14332 and the independent electrodes 14331 are no longer directly connected through the material of the first electrode 1433 with a lower light transmittance. In the first display area 181, the adjacent independent electrodes 14331 are spaced apart, that is, the material of the first electrode 1433 with a lower light transmittance is no longer provided between the adjacent independent electrodes 14331. This helps to improve the light transmittance of the first display area 181 of the display panel 10.

[0096] Meanwhile, in order to enable the sub-pixels 14 located in the first display area 181 to display normally, corresponding voltage signals (such as the second voltage signal VSS) need to be transmitted to each independent electrode 14331, then an electrical connection needs to be established between the independent electrode 14331 and the continuous electrode 14332.

[0097] In order to ensure that the first display area 181 as a whole has a high light transmittance, in this embodiment, a connection body 1831 with a light transmittance greater than that of the first electrode 1433 is selected to achieve the above connection, so as to transmit corresponding voltage signals to each independent electrode 14331.

[0098] In the display panel 10 provided by the embodiment of the present application, in the first display area 181, the adjacent independent electrodes 14331 are spaced apart, so that there is no longer the material of the first electrode 1433 with a small light transmittance between the adjacent independent electrodes 14331. The multiple independent electrodes 14331 are electrically connected to the continuous electrode 14332 through a connection body 1831 with a light transmittance greater than that of the first electrode 1433, and / or the multiple independent electrodes 14331 are electrically connected to the negative power supply signal line through the connection body 1831. On the one hand, it can realize the transmission of corresponding voltage signals from the continuous electrode 14332 to each independent electrode 14331 through the connection body 1831, and / or the transmission of corresponding voltage signals from the negative power supply signal line to each independent electrode 14331 through the connection body 1831, so as to ensure that the sub-pixels 14 in the first display area 181 can display normally; on the other hand, due to the relatively large light transmittance of the connection body 1831, the overall light transmittance of the first display area 181 of the display panel 10 can be made greater than the overall light transmittance of the second display area 182, which helps to meet the light transmittance requirements for under-screen camera and under-screen recognition.

[0099] Such as Figure 8 and Figure 10As shown, in some embodiments, the connection body 1831 includes a grid structure, and the grid structure includes a plurality of intersecting grid lines to define a plurality of enclosed spaces 1832; at least one independent electrode 14331 is disposed in each enclosed space 1832, and the plurality of independent electrodes 14331 are electrically connected to the side walls of the grid lines; the ends of the grid lines extend to the second display area 182 and are electrically connected to the continuous electrode 14332.

[0100] Exemplarily, the enclosed space 1832 can be a polygon, such as a rectangle or a hexagon, etc.

[0101] Taking Figure 8 and Figure 9 the structure shown as an example for further illustration, one independent electrode 14331 is disposed in each enclosed space 1832. Specifically, each side wall of the independent electrode 14331 can be in contact connection with the side wall of the grid line in the connection body 1831 of the grid structure.

[0102] In order to transmit the corresponding voltage signal to the independent electrode 14331, the ends of at least some of the grid lines extend to the second display area 182 and are connected to the continuous electrode 14332 in the second display area 182. Specifically, the end of the grid line (hereinafter referred to as the grid line) of the connection body 1831 is electrically connected to the side wall of the continuous electrode 14332, such as Figure 9 . The voltage signal is transmitted from the continuous electrode 14332 to the end of the grid line and then transmitted through the grid line to the independent electrode 14331 electrically connected to the grid line to ensure the normal display of the sub-pixels 14 in the first display area 181.

[0103] Taking Figure 10 the structure shown as an example for further illustration, two independent electrodes 14331 are disposed in some of the enclosed spaces 1832. In this enclosed space 1832, the other side walls of the two independent electrodes 14331 except the opposite side walls can be connected to the grid lines. Specifically, as Figure 11 , the side wall of the independent electrode 14331 close to the grid line of the connection body 1831 is in contact connection with the side wall of the grid line. There is neither the first electrode 1433 material nor the connection body 1831 at the position between the opposite side walls of the two independent electrodes 14331. Therefore, the light transmittance at this position is greater than the light transmittance of the position where the connection body 1831 is provided. In other words, in Figure 10 the structure shown, since the connection body 1831 is not provided between some adjacent independent electrodes 14331, the overall light transmittance of the first display area 181 can be further improved. At the same time, since at least one side wall of each independent electrode 14331 is in contact connection with the side wall of the grid line, the independent electrode 14331 can also stably receive the corresponding voltage signal to ensure the normal display of the sub-pixels 14 in the first display area 181.

[0104] As Figure 8 , Figure 10 and Figure 11 shown, in some embodiments, the sidewall of the grid line located on the side of the grid structure close to the second display area 182 is electrically connected to the sidewall of the continuous electrode 14332.

[0105] The sidewall of the continuous electrode 14332 is in contact electrical connection with the sidewall of the grid line on the side of the grid structure close to the second display area 182, which helps to increase the contact area between the continuous electrode 14332 and the connection body 1831 of the grid structure, reduce the transfer impedance of the voltage signal, and helps to ensure the normal display of the sub-pixels 14 in the first display area 181.

[0106] As Figure 12 , in some embodiments, a part of the sidewall of the grid line located on the side of the grid structure close to the second display area 182 is spaced from the continuous electrode 14332 to form a spaced light-transmitting area 184 in a part of the area between the grid structure and the continuous electrode 14332.

[0107] Exemplarily, along the edge of the grid structure, the spaced light-transmitting area 184 is located between the ends of two adjacent grid lines.

[0108] Combined with the foregoing, the end of the grid line is electrically connected to the continuous electrode 14332 of the second display area 182. Then, even if a part of the sidewall of the grid line located on the side of the grid structure close to the second display area 182 is separated from the continuous electrode 14332, the independent electrode 14331 can still be electrically connected to the continuous electrode 14332 through the end of the grid line. At the same time, neither the material of the first electrode 1433 nor the material of the connection body 1831 is provided in the spaced light-transmitting area 184, so that the light transmittance of the spaced light-transmitting area 184 is greater than that of the connection body 1831, which can further improve the overall light transmittance of the first display area 181.

[0109] As Figure 13 shown, in some embodiments, the display panel 10 includes a driving circuit layer 141 on one side of the substrate 13. The driving circuit layer 141 includes pixel circuits and negative power signal lines. The grid structure is electrically connected to the negative power signal lines, and the negative power signal lines are configured to provide a negative power signal to the grid structure.

[0110] The negative power supply signal line can be disposed in the peripheral area 19 of the display panel 10 and extend to the first display area 181 through the extending trace 185. The extending trace 185 is electrically connected to the negative power supply signal line. It can be understood that the extending trace 185 can also be said to be a part of the negative power supply signal line. The connection body 1831 of the grid structure located in the first display area 181 can be electrically connected to the extending trace 185, so as to electrically connect the connection body 1831 of the grid structure and the negative power supply signal line, ensuring that the negative power supply signal line can provide a negative power supply signal (the negative power supply signal is the voltage signal in the foregoing embodiment, such as VSS) to the independent electrode 14331 through the connection body 1831 of the grid structure, which helps to ensure the normal display of the sub-pixels 14 in the first display area 181.

[0111] Exemplarily, the material of the extending trace 185 can be the same as that of the negative power supply signal line, or the material of the extending trace 185 can be the same as that of the connection body 1831, or the material of the extending trace 185 can be other conductive materials with a relatively high light transmittance.

[0112] Exemplarily, the extending trace 185 can be disposed on the same layer as the negative power supply signal line.

[0113] As Figure 13 shown, in some embodiments, the display panel 10 includes a planar layer 186 located between the negative power supply signal line and the connection body 183. The connection body 183 is electrically connected to the negative power supply signal line through a via hole penetrating into the planar layer 186.

[0114] The orthographic projection of the via hole on the driving circuit layer 141 at least partially coincides with the orthographic projection of the extending trace 185 on the driving circuit layer 141.

[0115] Taking Figure 13 the shown structure and direction as an example for illustration, the connection body 183 is located above the negative power supply signal line (the negative power supply signal line and the extending trace 185 are disposed on the same layer). In order to electrically connect the connection body 183 and the negative power supply signal line, it is necessary to make the connection body 183 penetrate the structural layer (including but not limited to the planar layer 186) between it and the extending trace 185.

[0116] As Figure 12 and Figure 13 shown, in some embodiments, while the connection body 1831 of the grid structure is electrically connected through the end continuous electrode 14332 of the grid line, it is also electrically connected to the negative power supply signal line.

[0117] To improve the reliability of transmitting the negative power supply signal to the independent electrode 14331, the end of the grid line of the connection body 1831 of the grid structure extends in the plane direction of the display panel 10 to the second display area 182 and is in electrical contact connection with the continuous electrode 14332 located in the second display area 182. At the same time, the connection body 1831 is also electrically connected to the extending trace 185 through at least the via hole passing through the flat layer 186, and is electrically connected to the negative power supply signal line through the extending trace 185. The negative power supply signal can be transmitted to each independent electrode 14331 by the continuous electrode 14332 and the negative power supply signal line simultaneously through the connection body 1831 of the grid structure.

[0118] As Figure 14 and Figure 15 , in some embodiments, two independent electrodes 14331 can also be provided in the partial enclosed space 1832, and an interval light-transmitting area 184 is formed in a partial area between the connection body 1831 of the grid structure and the continuous electrode 14332.

[0119] In this embodiment, the positions between the two independent electrodes 14331 in the same enclosed space 1832 and the interval light-transmitting area 184 all have a relatively large light transmittance, which can further improve the overall light transmittance of the first display area 181 of the display panel 10. As Figure 15 , in this embodiment, while the connection body 1831 of the grid structure is electrically connected to the continuous electrode 14332, it can also be electrically connected to the negative power supply signal line to improve the reliability of transmitting the negative power supply signal to the independent electrode 14331.

[0120] As Figure 16 , Figure 17 , Figure 18 and Figure 19 , in some embodiments, the first display area 181 includes a first electrode spacer sub-area 187 provided between the independent electrode 14331 and the adjacent continuous electrode 14332; the connection body 1831 includes at least one first connection line 18311 provided in the first electrode spacer sub-area 187, and a plurality of second connection lines 18312 provided between the adjacent independent electrodes 14331; the plurality of independent electrodes 14331 are electrically connected to each other through the second connection lines 18312; the independent electrode 14331 is electrically connected to the continuous electrode 14332 through the first connection line 18311, and / or the independent electrode 14331 is electrically connected to the negative power supply signal line through the first connection line 18311.

[0121] Combined with Figure 16, in the first display area 181, an annular region is formed between a ring of independent electrodes 14331 (the independent electrodes 14331 in the first row and the last row from top to bottom and the first column and the last column from left to right in the first display area 181) close to the edge of the first display area 181 and the adjacent continuous electrodes 14332, and this annular region is configured as the first electrode spacer region 187.

[0122] It should be noted that the way the independent electrode 14331 is electrically connected to the continuous electrode 14332 through the first connection line 18311 is similar to the way the independent electrode 14331 is electrically connected to the continuous electrode 14332 through the end of the grid line in the above embodiment, and will not be elaborated here.

[0123] It should be noted that the way the independent electrode 14331 is electrically connected to the negative power supply signal line through the first connection line 18311 is similar to the way the independent electrode 14331 is electrically connected to the negative power supply signal line through the connection body 1831 and the extension trace 185 in the above embodiment, and will not be elaborated here.

[0124] It should be noted that the independent electrode 14331 can be simultaneously electrically connected to the continuous electrode 14332 and the negative power supply signal line through the first connection line 18311 respectively, and the connection method is similar to the way the independent electrode 14331 is simultaneously electrically connected to the continuous electrode 14332 and the negative power supply signal line through the connection body 1831 respectively in the above embodiment, and will not be elaborated here.

[0125] In this embodiment, the first electrode spacer region 187 is located between the independent electrode 14331 and the continuous electrode 14332, that is, the material of the first electrode 1433 is not provided in the first electrode spacer region 187, so that the light transmittance of the first electrode spacer region 187 is relatively large. At the same time, since the first electrode spacer region 187 is located at the edge of the first display area 181, correspondingly, it helps to improve the overall light transmittance of the first display area 181.

[0126] Combined with Figure 16 For exemplary illustration, the independent electrode 14331 located in the middle of the first display area 181 can be electrically connected to eight independent electrodes 14331 close to the edge of the first display area 181 through four groups of second connection lines 18312 in an X shape to form a whole. When the first connection line 18311 obtains the corresponding negative power supply signal through the continuous electrode 14332 and / or the negative power supply signal line, it will be transmitted to the independent electrode 14331 electrically connected to the first connection line 18311 (for example Figure 16 the independent electrode 14331 in the upper left corner), and this independent electrode 14331 can be transmitted to the adjacent independent electrode 14331 through the second connection line 18312 (for example Figure 16The independent electrodes 14331 in the same row adjacent to the upper left independent electrode 14331, the independent electrodes 14331 in the same column, and the independent electrodes 14331 located in the middle of the first display area 181), and so on, so that all the independent electrodes 14331 can receive the negative power signal.

[0127] At the same time, since each independent electrode 14331 is connected as a whole, therefore, only one first connection line 18311 can be provided in the first electrode spacer region 187, which helps to keep a high light transmittance in the first electrode spacer region 187.

[0128] Such as Figure 16 shown, in some embodiments, one end of the first connection line 18311 is electrically connected to the independent electrode 14331, and the other end is electrically connected to the continuous electrode 14332.

[0129] The first connection line 18311 is only connected to the independent electrode 14331 and the continuous electrode 14332 through the end portions, which helps to shorten the length of the first connection line 18311, so as to increase the area of the region in the first electrode spacer region 187 where the first connection line 18311 is not provided, and helps to further increase the light transmittance of the first display area 181.

[0130] Similarly, exemplarily, the second connection line 18312 is also connected to the corresponding independent electrode 14331 through the end portion. This helps to shorten the length of the second connection line 18312, so as to increase the area of the region between adjacent independent electrodes 14331 where the second connection line 18312 is not provided, and helps to further increase the light transmittance of the first display area 181.

[0131] Exemplarily, when the independent electrode 14331 is rectangular, the end portions of the first connection line 18311 and the second connection line 18312 are respectively connected to the top corners of the independent electrode 14331.

[0132] Specifically, such as Figure 17 , taking the connection between the first connection line 18311 and the independent electrode 14331 as an example for illustration, the end portion of the first connection line 18311 is in contact connection with the side wall of the independent electrode 14331.

[0133] Such as Figure 18 and Figure 19 shown, in some embodiments, the first connection line 18311 is electrically connected to the independent electrode 14331 and is spaced from the continuous electrode 14332; the first connection line 18311 is electrically connected to the negative power signal line.

[0134] In this embodiment, the first connection line 18311 is spaced from the continuous electrode 14332, which can further shorten the length of the first connection line 18311 or reduce the number of the first connection lines 18311, so as to further increase the area of the region in the first electrode spacer region 187 where the first connection line 18311 is not provided, which helps to improve the light transmittance of the first display region 181. At this time, the independent electrode 14331 is no longer electrically connected to the continuous electrode 14332, but is electrically connected to the negative power supply signal line through the first connection line 18311, so that the independent electrode 14331 receives the negative power supply signal, ensuring that the sub-pixels 14 in the first display region 181 can be normally displayed.

[0135] As Figure 19 shown, in some embodiments, the display panel 10 further includes a pixel definition layer 1434. The pixel definition layer 1434 is located on the side of the pixel circuit away from the substrate 13. The pixel definition layer 1434 includes a plurality of pixel openings 14342. The light-emitting functional layer 1432 is located in the pixel openings 14342. The pixel definition layer 1434 includes a defining main body 14341 that defines the pixel openings 14342, and a connecting main body 1831 is located on the side of the defining main body 14341 away from the substrate 13.

[0136] The region where the defining main body 14341 is located is the region between adjacent sub-pixels 14. By disposing the connecting main body 1831 on the side of the defining main body 14341 away from the substrate 13, the connecting main body 1831 can be used to transfer the negative power supply signal from one sub-pixel 14 to an adjacent another sub-pixel 14, so as to ensure the normal display of each sub-pixel 14. Since the light transmittance of the connecting main body 1831 is relatively high, the light transmittance of the first display region 181 of the display panel 10 can be improved.

[0137] Meanwhile, by disposing the connecting main body 1831 on the defining main body 14341 with a relatively high height, when forming the light-emitting functional layer 1432 and the first electrode 1433, it helps to separate the two at the position where the connecting main body 1831 is located. The portion of the first electrode 1433 above the connecting main body 1831 after separation will be removed to improve the light transmittance of the first display region 181. The first electrode 1433 on the side of the connecting main body 1831 can be connected to the side wall of the connecting main body 1831.

[0138] As Figure 8 、 Figure 9 and Figure 19 shown, in some embodiments, along the thickness direction of the display panel 10 (such as Figure 19In the Z direction), the vertical distance between the surface of the connection body 1831 far from the substrate 13 and the substrate 13 is greater than the vertical distance between the surface of the first electrode 1433 far from the substrate 13 and the substrate 13, and the cross-section of the connection body 1831 along the thickness direction of the display panel 10 is an inverted trapezoid with the short side facing downwards.

[0139] Exemplarily, the thickness of the connection body 1831 can be 10 nm to 1000 nm, and can be specifically selected according to process and design requirements, and is not limited herein.

[0140] Such as Figure 20 , the bottom angle β of the cross-section of the connection body 1831 is greater than 90°.

[0141] Taking Figure 19 the shown structure and direction as an example for illustration, along the thickness direction of the display panel 10, the top end of the connection body 1831 is higher than the top end of the first electrode 1433. Since the light-emitting functional layer 1432 needs to be formed first before forming the connection body 1831, the connection body 1831 is higher than the first electrode 1433 and has an inverted trapezoid structure, which can ensure reliable connection between the side walls of the first electrode 1433 and the connection body 1831 when forming the first electrode 1433.

[0142] Such as Figure 8 and Figure 9 , in some embodiments, the display panel 10 further includes a connection protection layer 188, the connection protection layer 188 is disposed on the side of the connection layer 183 far from the substrate 13, the connection protection layer 188 covers the surface of the connection body 1831 far from the substrate 13, and the light transmittance of the connection protection layer 188 is greater than the light transmittance of the first electrode 1433.

[0143] Exemplarily, the material of the connection protection layer 188 can be an inorganic film layer with a high light transmittance. For example, the material of the connection protection layer 188 can be silicon oxide (SiOx) or silicon nitride (SiNx), etc.

[0144] Exemplarily, such as Figure 20 , the connection protection layer 188 is a regular trapezoid, and the bottom angle γ of its cross-section is less than 90°.

[0145] Exemplarily, the thickness of the connection protection layer 188 can be 10 nm to 5000 nm, and can be specifically selected according to process and design requirements, and is not limited herein.

[0146] Setting the connection protection layer 188 on the top of the connection body 1831 helps to isolate the light-emitting functional layer 1432 and the first electrode 1433 when forming the light-emitting functional layer 1432 and the first electrode 1433. At the same time, the connection protection layer 188 can also provide protection for the connection body 1831.

[0147] As Figure 9 shown, in some embodiments, the display panel 10 further includes an encapsulation layer 189 (TFE), and the encapsulation layer 189 covers at least the first electrode 1433 and the sidewall of the protruding first electrode 1433 connecting the main body 1831.

[0148] The encapsulation layer 189 can provide protection for the exposed sidewalls of the first electrode 1433 and the connection main body 1831, ensuring a reliable connection between the independent electrode 14331 and the connection main body 1831.

[0149] As Figure 8 shown, in some embodiments, a plurality of independent electrodes 14331 located in the first display area 181 correspond one-to-one with a plurality of sub-pixels 14 in the first display area 181.

[0150] For example, when an independent electrode 14331 corresponds to two sub-pixels 14, an independent electrode 14331 is also provided at the position between the two sub-pixels 14. Combining the above embodiments, it can be known that the material of the independent electrode 14331 (i.e., the material of the first electrode 1433) has a poor light transmittance. Therefore, in order to further improve the overall light transmittance of the first display area 181, in this embodiment, the independent electrode 14331 and the sub-pixel 14 are designed to correspond one-to-one. When the independent electrode 14331 and the sub-pixel 14 correspond one-to-one, since the adjacent independent electrodes 14331 are arranged at intervals, among the plurality of sub-pixels 14 located in the first display area 181, there is no material of the independent electrode 14331 with a poor light transmittance between two adjacent sub-pixels 14, which helps to improve the light transmittance between two adjacent sub-pixels 14, and further improves the overall light transmittance of the first display area 181.

[0151] Based on the same inventive concept, in combination with the description of the display panel 10 in the above embodiments, this embodiment provides a display device, which has the corresponding technical effects of the display panel 10 in the above embodiments, and will not be elaborated here.

[0152] A display device includes a sensor and the display panel 10 as described in the above embodiments; the orthographic projection of the sensor on the display panel 10 and the orthographic projection of the first display area 181 on the display panel 10 at least partially overlap.

[0153] Exemplarily, the orthographic projection of the sensor on the display panel 10 is located within the orthographic projection of the first display area 181 on the display panel 10.

[0154] Since the light transmittance of the first display area 181 of the display panel 10 is relatively large, by designing the sensor to at least partially overlap with the first display area 181, the amount of incident light entering the sensor can be increased through the first display area 181, which helps to meet the optical requirements of the sensor.

[0155] As Figure 7a and Figure 7b shown, in some embodiments, the sensor includes a camera 20 or an infrared sensor 30.

[0156] When the sensor is the camera 20, the imaging effect of the under-screen camera can be improved through the first display area 181 corresponding to the position of the camera.

[0157] When the sensor is the infrared sensor 30, the recognition effect of the under-screen recognition can be improved through the first display area 181 corresponding to the position of the infrared sensor 30.

[0158] Based on the same inventive concept, in combination with the description of the display panel 10 in the above embodiments, this embodiment provides a method for manufacturing a display panel 10, and this method has the corresponding technical effects of the display panel 10 in the above embodiments, which will not be elaborated here.

[0159] As Figure 21 , the method for manufacturing a display panel provided in this embodiment is used to manufacture the display panel 10 as described in the above embodiments, and the method includes:

[0160] Step S100: Provide a substrate, where the substrate includes a first display area and a second display area, and the second display area is located on at least one side of the first display area.

[0161] Step S200: Form a driving circuit layer on one side of the substrate, where the driving circuit layer includes a plurality of pixel circuits, and the plurality of pixel circuits are used to form a plurality of sub-pixels located in the first display area and the second display area.

[0162] The driving circuit layer 141 is located in the first display area 181 and the second display area 182, and the driving circuit layer 431 includes pixel circuits of a plurality of sub-pixels 14 in the first display area 181 and the second display area 182.

[0163] Step S300: Form a second electrode layer on the side of the driving circuit layer away from the substrate, where the second electrode layer includes second electrodes of a plurality of sub-pixels in the first display area and the second display area.

[0164] Before forming the second electrode layer after forming the driving circuit layer 141, a planarization layer 186 needs to be formed.

[0165] The second electrode layer is located in the first display area 181 and the second display area 182, and the second electrode layer includes second electrodes 1431 of a plurality of sub-pixels 14 in the first display area 181 and the second display area 182. Exemplarily, the second electrode 1431 can be used as the anode of the sub-pixel 14.

[0166] Step S400, form a connection layer at least located in the first display area on a side of the second electrode layer away from the substrate, and the connection layer includes a connection main body.

[0167] Exemplarily, the connection main body 1831 is formed by a patterning process.

[0168] After forming the second electrode layer and before forming the connection layer 183, it is also necessary to form a pixel definition layer 1434. The connection main body 1831 can be formed on the top surface of the defining main body 14341 of the pixel definition layer 1434. After forming the connection main body 1831, a connection protection layer 188 can also be formed on the top surface of the connection main body 1831.

[0169] Specifically, for Figure 9 the shown display panel 10 structure, as Figure 22 , connection main bodies 1831 are arranged on the defining main bodies 14341 in the first display area 181.

[0170] For Figure 11 the shown display panel 10 structure, as Figure 24 , connection main bodies 1831 are arranged on some of the defining main bodies 14341 in the first display area 181.

[0171] For Figure 13 the shown display panel 10 structure, as Figure 27 , connection main bodies 1831 are arranged on the defining main bodies 14341 in the first display area 181, and the connection main bodies 1831 are also electrically connected to the extended trace 185 through vias, so as to be electrically connected to the negative power supply signal line.

[0172] For Figure 15 the shown display panel 10 structure, as Figure 29 , connection main bodies 1831 are arranged on some of the defining main bodies 14341 in the first display area 181, and the connection main bodies 1831 are also electrically connected to the extended trace 185 through vias, so as to be electrically connected to the negative power supply signal line.

[0173] For Figure 17 the shown display panel 10 structure, similar to the structure shown in Figure 27 , connection main bodies 1831 are arranged at preset positions in the first display area 181, and the connection main bodies 1831 are also electrically connected to the extended trace 185 through vias, so as to be electrically connected to the negative power supply signal line.

[0174] For Figure 19 the shown display panel 10 structure, similar to the structure shown in Figure 27The structures shown are similar. A connection body 1831 is set at a preset position in the first display area 181, and the connection body 1831 is also electrically connected to the extended trace 185 through a via hole, thereby achieving electrical connection with the negative power signal line.

[0175] Step S500: Form a light-emitting functional layer of a plurality of sub-pixels on a side of the connection layer away from the substrate. A plurality of the light-emitting functional layers are arranged in an array and are located in the first display area and the second display area.

[0176] Step S600: Form a first electrode layer of a plurality of sub-pixels on a side of the light-emitting functional layer away from the substrate. The first electrode layer includes first electrodes of a plurality of sub-pixels in the first display area and the second display area.

[0177] Exemplarily, the first electrode 1433 is formed by a deposition process.

[0178] The light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831. After the first electrode 1433 is formed, a packaging layer 189 covering the first electrode 1433 is further formed.

[0179] Specifically, for Figure 9 the structure of the display panel 10 shown, as Figure 23 , after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are partial light-emitting functional layer 1432 and first electrode 1433 on the top surface of the connection body 1831, and the first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831.

[0180] For Figure 11 the structure of the display panel 10 shown, as Figure 25 , after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are partial light-emitting functional layer 1432 and first electrode 1433 on the top surface of the connection body 1831, and the first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831. And the top surface of the defining body 14341 without the connection body 1831 is covered by the first electrode 1433.

[0181] For Figure 13 the structure of the display panel 10 shown, as Figure 28 , after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are partial light-emitting functional layer 1432 and first electrode 1433 on the top surface of the connection body 1831, and the first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831.

[0182] ForFigure 15 The structure of the display panel 10 shown, such as Figure 30 , after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are parts of the light-emitting functional layer 1432 and the first electrode 1433 on the top surface of the connection body 1831. The first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831. The top surface of the defining body 14341 without the connection body 1831 is covered by the first electrode 1433.

[0183] For Figure 17 the structure of the display panel 10 shown, similar to Figure 28 the structure shown, after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are parts of the light-emitting functional layer 1432 and the first electrode 1433 on the top surface of the connection body 1831. The first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831.

[0184] For Figure 19 the structure of the display panel 10 shown, similar to Figure 28 the structure shown, after the light-emitting functional layer 1432 and the first electrode 1433 are separated at the connection body 1831, there are parts of the light-emitting functional layer 1432 and the first electrode 1433 on the top surface of the connection body 1831. The first electrodes 1433 on both sides of the connection body 1831 overlap with the connection body 1831.

[0185] Step S700, at least remove the parts of the light-emitting functional layer and the first electrode layer covering the connection body, so that the first electrode layer in the first display area is formed into independent electrodes, and the first electrodes in the second display area are formed into continuous electrodes connected to each other; the positive projection of the continuous electrode on the substrate covers the positive projection of the second display area on the substrate, and the multiple independent electrodes in the first display area correspond to the multiple sub-pixels in the first display area one by one; the adjacent independent electrodes are arranged at intervals, and the multiple independent electrodes are electrically connected to the continuous electrode through the connection body, and / or the multiple independent electrodes are configured to be electrically connected to the negative power signal line; wherein, the light transmittance of the connection body is greater than the light transmittance of the first electrode layer, so that the light transmittance of the first display area of the display panel is greater than the light transmittance of the second display area.

[0186] Exemplarily, when the material of the first electrode 1433 is a magnesium-silver alloy, a wet etching process can be used to remove the first electrode 1433. When the material of the first electrode 1433 is a magnesium-aluminum alloy (MgAl), a dry etching process can be used to remove the first electrode 1433.

[0187] Specifically, for Figure 9 the display panel 10 structure shown, it is only necessary to remove the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 located on the top surface of the connection body 1831.

[0188] For Figure 11 the display panel 10 structure shown, as Figure 26 , while removing the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 on the top surface of the connection body 1831, it is also necessary to remove the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 on the top surface of the defining body 14341 at a preset position. After that, it is also necessary to fill the material of the encapsulation layer 189 on the top surface of the defining body 14341 at the preset position to form a complete encapsulation layer 189.

[0189] For Figure 13 the display panel 10 structure shown, it is only necessary to remove the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 located on the top surface of the connection body 1831.

[0190] For Figure 15 the display panel 10 structure shown, as Figure 31 , while removing the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 on the top surface of the connection body 1831, it is also necessary to remove the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 on the top surface of the defining body 14341 at a preset position. After that, it is also necessary to fill the material of the encapsulation layer 189 on the top surface of the defining body 14341 at the preset position to form a complete encapsulation layer 189.

[0191] For Figure 17 and Figure 19 the display panel 10 structure shown, it is only necessary to remove the light-emitting functional layer 1432, the first electrode 1433, and the encapsulation layer 189 located on the top surface of the connection body 1831.

[0192] It should be noted that some embodiments of the present application are described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the above embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the specific order or sequential order shown to achieve the desired result. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0193] In the embodiments of the present application, a progressive approach is adopted for description. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0194] The description of the present application is given for purposes of illustration and description, and is not intended to be exhaustive or to limit the present application to the disclosed form. Many modifications and variations are obvious to those of ordinary skill in the art. The embodiments are chosen and described in order to better explain the principles of the present application and its practical application, and to enable those of ordinary skill in the art to understand the present application and design various embodiments with various modifications suitable for specific purposes.

[0195] Those of ordinary skill in the art should understand that: the discussion of any of the above embodiments is only exemplary, and is not intended to imply that the scope of the present application (including the claims) is limited to these examples; within the concept of the present application, the technical features among the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.

[0196] Although the present application has been described in conjunction with specific embodiments of the present application, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art based on the foregoing description.

[0197] The embodiments of the present application are intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application shall be included within the protection scope of the present application.

Claims

1. A display panel, characterized in that: include: A base substrate, comprising a first display area and a second display area, wherein the second display area is located at least on one side of the first display area, and the light transmittance of the first display area is greater than the light transmittance of the second display area; A plurality of sub-pixels are located in the first display area and the second display area; the sub-pixels include a pixel circuit and a light-emitting element which are arranged on one side of the base substrate and are sequentially stacked in a direction away from the base substrate, the light-emitting element includes a first electrode, a second electrode and a light-emitting functional layer located between the first electrode and the second electrode, the first electrode is located on a side of the light-emitting functional layer away from the base substrate; the first electrode located in the first display area is a plurality of independent electrodes, the first electrode located in the second display area is a continuous electrode connected to each other, the orthographic projection of the continuous electrode on the base substrate covers the orthographic projection of the second display area on the base substrate, at least one independent electrode among the plurality of independent electrodes located in the first display area corresponds to at least one sub-pixel among the plurality of sub-pixels in the first display area; adjacent independent electrodes are arranged at intervals; A connecting layer is located at least in the first display area and on a side of the pixel circuit away from the base substrate, the connecting layer includes a connecting body, the transmittance of the connecting body is greater than the transmittance of the first electrode; a plurality of the independent electrodes are electrically connected to the continuous electrode through the connecting body, and / or a plurality of the independent electrodes are configured to be electrically connected to a negative power signal line.

2. The display panel according to claim 1, characterized in that: The connecting body includes a grid structure, which includes a plurality of grid lines intersecting each other to define a plurality of closed spaces; at least one independent electrode is arranged in each of the closed spaces, and the plurality of independent electrodes are electrically connected to the side walls of the grid lines; the ends of the grid lines extend to the second display area and are electrically connected to the continuous electrodes.

3. The display panel according to claim 2, characterized in that: The sidewalls of the grid lines located at a side of the grid structure close to the second display area are electrically connected to the sidewalls of the continuous electrode.

4. The display panel according to claim 2, characterized in that: Part of the sidewall of the grid line located on the side of the grid structure close to the second display area is spaced apart from the continuous electrode to form a spaced light-transmitting area in a partial area between the grid structure and the continuous electrode.

5. The display panel according to claim 4, characterized in that: The display panel includes a driving circuit layer located on one side of the base substrate, the driving circuit layer includes the pixel circuit and a negative power signal line, the grid structure is electrically connected to the negative power signal line, and the negative power signal line is configured to provide a negative power signal to the grid structure.

6. The display panel according to claim 5, characterized in that: The display panel includes a planar layer located between the negative power signal line and the connection body, and the connection body is electrically connected to the negative power signal line through a via hole penetrating into the planar layer.

7. The display panel according to claim 1, characterized in that: The first display area includes a first electrode spacing sub-area disposed between the independent electrode and the adjacent continuous electrode; The connecting body includes at least one first connecting line arranged in the first electrode spacing sub-area, and a plurality of second connecting lines arranged between adjacent independent electrodes; the plurality of independent electrodes are electrically connected to each other through the second connecting lines; the independent electrode is electrically connected to the continuous electrode through the first connecting line, and / or the independent electrode is electrically connected to the negative power signal line through the first connecting line.

8. The display panel according to claim 7, characterized in that: One end of the first connecting line is electrically connected to the independent electrode, and the other end of the first connecting line is electrically connected to the continuous electrode.

9. The display panel according to claim 7, characterized in that: The first connecting line is electrically connected to the independent electrode and is spaced apart from the continuous electrode; the first connecting line is electrically connected to the negative power signal line.

10. The display panel according to claim 1, characterized in that: The display panel also includes a pixel definition layer, which is located on a side of the pixel circuit away from the substrate, the pixel definition layer includes a plurality of pixel openings, the light-emitting function layer is located in the pixel openings, the pixel definition layer includes a defining body that defines the pixel openings, and the connecting body is located on a side of the defining body away from the substrate.

11. The display panel according to claim 1, characterized in that: The display panel further includes a connection protection layer, which is arranged on a side of the connection layer away from the base substrate, covers a surface of the connection body away from the base substrate, and has a light transmittance greater than that of the first electrode.

12. The display panel according to claim 1, characterized in that: Along the thickness direction of the display panel, the vertical distance between the surface of the connecting body away from the base substrate and the base substrate is greater than the vertical distance between the surface of the first electrode away from the base substrate and the base substrate, and the cross-section of the connecting body along the thickness direction of the display panel is an inverted trapezoid with the short side facing downward.

13. The display panel according to claim 12, characterized in that: The display panel further includes an encapsulation layer, and the encapsulation layer at least covers the first electrode and a side wall of the connection body protruding from the first electrode.

14. The display panel according to claim 1, characterized in that: The plurality of independent electrodes located in the first display area correspond one-to-one to the plurality of sub-pixels in the first display area.

15. A display device, characterized in that: It comprises a sensor and a display panel as claimed in any one of claims 1 to 14; the orthographic projection of the sensor on the display panel and the orthographic projection of the first display area on the display panel at least partially overlap.

16. The display device according to claim 15, characterized in that: The sensor includes a camera or an infrared sensor.

Images