Alignment mark and semiconductor structure

Abstract

The utility model provides an alignment mark and a semiconductor structure, which are applied to the technical field of semiconductor photoetching and specifically comprise a first mark pattern, a second mark pattern and a third mark pattern which are sequentially stacked from bottom to top along a first direction perpendicular to the surface of a substrate and are positioned in different pattern layers, at least one of the first mark pattern, the second mark pattern and the third mark pattern is overlapped with the projection of other mark patterns in the first direction; according to the utility model, the alignment among the plurality of pattern layers is realized through the mark patterns arranged on the different pattern layers, and the projection of the mark pattern in at least one pattern layer in the three pattern layers is overlapped with the projection of the mark patterns in the other pattern layers in the first direction; the substrate occupied area of the alignment mark in the first direction is reduced, that is, the effective wiring area of the substrate and the manufacturing efficiency of the semiconductor structure are improved while the alignment precision is ensured.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor lithography, and particularly relates to an alignment mark and a semiconductor structure. Background Art

[0002] The manufacture of semiconductor integrated circuits (ICs) involves forming multiple pattern layers on a semiconductor wafer. Each layer must be aligned with the previous layer(s) so that the IC can operate properly. Various marks such as alignment marks can be used to align the layers during the manufacturing process.

[0003] However, in order to improve the overlay accuracy, the number of alignment marks provided on the existing semiconductor wafers is excessive, resulting in a relatively large area occupied by the alignment area on the substrate, and reducing the effective wiring area of the substrate (or the substrate). Summary of the Utility Model

[0004] The purpose of the utility model is to provide a novel structure of an alignment mark and a semiconductor structure to save the effective wiring area of the substrate occupied by the alignment mark.

[0005] In a first aspect, to solve the above technical problems, the utility model provides a semiconductor structure, which specifically may include:

[0006] A substrate;

[0007] A pattern layer, which may include a first pattern layer, a second pattern layer, and a third pattern layer stacked in sequence from bottom to top along a first direction;

[0008] An alignment mark, which includes a first mark pattern provided in the first pattern layer, a second mark pattern provided in the second pattern layer, and a third mark pattern provided in the third pattern layer;

[0009] Wherein, in the first direction, at least one of the first mark pattern, the second mark pattern, and the third mark pattern overlaps at least partially with the projections of the other mark patterns.

[0010] In some optional examples, the first mark pattern, the second mark pattern, and the third mark pattern may respectively include a rectangular block type mark, a rectangular frame type mark, or a grid bar group type mark.

[0011] In some optional examples, the rectangular frame type mark may include a closed rectangular frame type pattern or an unclosed rectangular frame type pattern formed by four rectangular mark bars, and the grid bar group type mark may include multiple grid bar block type mark bars or multiple grid bar frame type mark bars.

[0012] In some alternative examples, the first marking pattern and the second marking pattern may be rectangular frame marks, and the third marking pattern may be a grating group mark or a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the projection overlap of the first marking pattern and the second marking pattern in the first direction is a double-square shape, and the width of the third marking pattern in the second direction is greater than the widths of the first marking pattern and the second marking pattern in the second direction.

[0013] In some alternative examples, the second marking pattern and the third marking pattern may be rectangular frame marks, and the first marking pattern may be a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the projection overlap of the second marking pattern and the third marking pattern in the first direction is a double-square shape, and the width of the first marking pattern in the second direction is greater than the widths of the second marking pattern and the third marking pattern in the second direction.

[0014] In some alternative examples, the first pattern layer may include two of the first marking patterns, and the two first marking patterns are respectively located at two ends of the same diagonal of a rectangular frame.

[0015] In some alternative examples, the second pattern layer may include four of the second marking patterns, and the four second marking patterns enclose a rectangular frame and are respectively located at four corners of the rectangular frame.

[0016] In some alternative examples, the third pattern layer may include two third marking patterns, and the two third marking patterns enclose a discontinuous L-shaped frame and are respectively located on two side frames of the discontinuous L-shaped frame, and there is a notch at the corner of the discontinuous L-shaped frame.

[0017] In some alternative examples, the first pattern layer may include four of the first marking patterns, and the four first marking patterns are grouped in pairs to form two rectangular block structures, and the two rectangular block structures are respectively located at two ends of the same diagonal of a rectangular frame, and the two first marking patterns in each rectangular block structure are arranged at intervals along the third direction, and the third direction is perpendicular to the second direction and they are in the same plane.

[0018] In some alternative examples, at least one of the first marking pattern, the second marking pattern and the third marking pattern may respectively include multiple groups of repeated patterns, and the multiple groups of repeated patterns may be arranged in parallel at intervals along the second direction or the third direction.

[0019] In a second aspect, based on the same inventive concept, the present utility model further provides an alignment mark, which may include:

[0020] Substrate;

[0021] A first marking pattern, disposed on the substrate;

[0022] A second marking pattern, disposed on the first marking pattern;

[0023] A third marking pattern, disposed on the second marking pattern;

[0024] Wherein, in a first direction perpendicular to the substrate, at least one of the first marking pattern, the second marking pattern and the third marking pattern overlaps at least partially with the projections of the other two.

[0025] In some alternative examples, the first marking pattern, the second marking pattern and the third marking pattern may respectively include a rectangular block marking, a rectangular frame marking or a grid bar group marking.

[0026] In some alternative examples, the rectangular frame marking may include a closed rectangular frame pattern or an unclosed rectangular frame pattern formed by four rectangular marking bars, and the grid bar group marking may include a plurality of grid bar block marking bars or a plurality of grid bar frame marking bars.

[0027] In some alternative examples, the first marking pattern and the second marking pattern are rectangular frame markings, and the third marking pattern is a grid bar group marking or a rectangular block marking extending in a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the first marking pattern and the second marking pattern in the first direction is a double-square shape, and the width of the third marking pattern in the second direction is greater than the widths of the first marking pattern and the second marking pattern in the second direction.

[0028] In some alternative examples, the second marking pattern and the third marking pattern are rectangular frame markings, and the first marking pattern is a rectangular block marking extending in a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the second marking pattern and the third marking pattern in the first direction is a double-square shape, and the width of the first marking pattern in the second direction is greater than the widths of the second marking pattern and the third marking pattern in the second direction.

[0029] In some alternative examples, the first pattern layer includes two of the first marking patterns, and the two first marking patterns may be respectively located at two ends of the same diagonal of a rectangular frame.

[0030] In some alternative examples, the second pattern layer may include four of the second marking patterns, and the four second marking patterns enclose a rectangular frame and are respectively located at the four corners of the rectangular frame.

[0031] In some alternative examples, the third pattern layer may include two third marker patterns, the two third marker patterns enclose a discontinuous L-shaped frame and are respectively located on two side borders of the discontinuous L-shaped frame, and there is a notch at the corner of the discontinuous L-shaped frame.

[0032] In some alternative examples, the first pattern layer may include four of the first marker patterns, the four first marker patterns are grouped in pairs to form two rectangular block structures, the two rectangular block structures are respectively located at both ends of the same diagonal of the rectangular frame, and the two first marker patterns in each of the rectangular block structures are arranged at intervals along the third direction, the third direction is perpendicular to the second direction and the two are in the same plane.

[0033] In some alternative examples, at least one of the first marker pattern, the second marker pattern, and the third marker pattern may respectively include multiple groups of repeating patterns, and the multiple groups of repeating patterns are arranged in parallel at intervals along the second direction or the third direction.

[0034] Compared with the prior art, the present utility model has at least the following technical effects:

[0035] As described above, an alignment mark and a semiconductor structure provided by the present utility model include a first marker pattern, a second marker pattern, and a third marker pattern located in different pattern layers and arranged along a first direction perpendicular to the surface of the substrate, and at least one of the first marker pattern, the second marker pattern, and the third marker pattern overlaps with the projections of the other marker patterns in the first direction; the present utility model realizes the alignment between multiple pattern layers through the marker patterns provided on different pattern layers, and by using the method that the projections of the marker patterns in at least one of the three pattern layers overlap with the marker patterns located in other pattern layers in the first direction, the substrate occupation area of the alignment mark in the first direction is reduced, that is, while ensuring the alignment accuracy, the effective wiring area of the substrate and the manufacturing efficiency of the semiconductor structure are improved. Description of the Drawings

[0036] Figure 1 A top view of an example of the first marker pattern provided in the first pattern layer in some embodiments of the present utility model.

[0037] Figure 2 A top view of another example of the first marker pattern provided in the first pattern layer in some embodiments of the present utility model.

[0038] Figure 3A top view of another example of the first marking pattern provided in some embodiments of the present utility model and disposed within the first pattern layer.

[0039] Figure 4 A top view of one example of the second marking pattern provided in some embodiments of the present utility model and disposed within the second pattern layer.

[0040] Figure 5 A top view of another example of the second marking pattern provided in some embodiments of the present utility model and disposed within the second pattern layer.

[0041] Figure 6 A top view of one example of the third marking pattern provided in some embodiments of the present utility model and disposed within the third pattern layer.

[0042] Figure 7 A top view of another example of the third marking pattern provided in some embodiments of the present utility model and disposed within the third pattern layer.

[0043] Figure 8 A top view of another example of the third marking pattern provided in some embodiments of the present utility model and disposed within the third pattern layer.

[0044] Figure 9 A top view of another example of the third marking pattern provided in some embodiments of the present utility model and disposed within the third pattern layer.

[0045] Figure 10 A top view of one example of a semiconductor structure or alignment mark provided in some embodiments of the present utility model.

[0046] Figure 11 A top view of another example of a semiconductor structure or alignment mark provided in some embodiments of the present utility model.

[0047] Figure 12 A top view of another example of a semiconductor structure or alignment mark provided in some embodiments of the present utility model.

[0048] Figure 13 A top view of another example of a semiconductor structure or alignment mark provided in some embodiments of the present utility model.

[0049] Figure 14 A top view of another example of a semiconductor structure or alignment mark provided in some embodiments of the present utility model.

[0050] Figure 15 For Figure 10Corresponding relationship diagram of the top view of the local structure of the semiconductor structure or alignment mark shown and its sectional view. Detailed implementation manners

[0051] The following uses specific specific embodiments to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0052] For the convenience of unified description, the present invention defines a first direction, a second direction, and a third direction below, and defines directions D1, D2, and D3 in the accompanying drawings of the specification. Among them, the first direction corresponds to D1 in the accompanying drawings of the specification (hereinafter simply referred to as the first direction D1). The first direction D1 is the direction perpendicular to the surface of the substrate. The substrate is the base material for forming the semiconductor structure or alignment mark proposed by the present invention; the second direction corresponds to D2 in the accompanying drawings of the specification (hereinafter simply referred to as the second direction D2). The second direction D2 is perpendicular to the first direction D1, and the plane where the second direction D2 is located is also perpendicular to the plane where the first direction D1 is located; the third direction corresponds to D3 in the accompanying drawings of the specification (hereinafter simply referred to as the third direction D3). The third direction D3 is perpendicular to both the second direction D2 and the first direction D1, and the third direction D3 and the second direction D2 are located in the same plane.

[0053] For the convenience of observation, the semiconductor structure and alignment mark provided by the present invention are introduced in detail below by first showing the marked patterns located in different pattern layers in different accompanying drawings of the specification, and then combining them in the same accompanying drawing of the specification.

[0054] Please refer to Figures 1 - 3 , Figures 1 - 3 is a top view of three examples of the first marked pattern provided in the first pattern layer in some embodiments of the present invention. As Figures 1 - 3As can be seen from the figure, in the semiconductor structure and alignment marks of the present utility model, multiple groups of repeated patterns can be provided in the first pattern layer, and any group of repeated patterns located in the first pattern layer is referred to as a first mark pattern. Exemplarily, two (two groups) or four (four groups) first mark patterns can be provided in the first pattern layer; specifically, when the first pattern layer includes two first mark patterns, the two first mark patterns are respectively located at both ends of the same diagonal of the rectangular frame; when the first pattern layer includes four first mark patterns, the four first mark patterns are grouped in pairs to form two rectangular block structures, and the two rectangular block structures are respectively located at both ends of the same diagonal of the rectangular frame, and the two first mark patterns in each rectangular block structure are both arranged at intervals along the third direction D3.

[0055] As Figure 1 shown, as an example, the shapes of the two first mark patterns in the first pattern layer can both be closed rectangular frame patterns in the rectangular frame mark, and the lengths of the four side frames of the closed rectangular frame pattern along the second direction D2 and the third direction D3 can be the same or different. In the present utility model, it is preferably set that the lengths of the four side frames are the same.

[0056] As Figure 2 shown, as another example, the shapes of the two first mark patterns in the first pattern layer can both be unclosed rectangular frame patterns surrounded by four rectangular mark strips in the rectangular frame mark, and the lengths of the four rectangular mark strips along the second direction D2 or the third direction D3 can be the same or different. In the present utility model, it is preferably set that the lengths of the four rectangular mark strips are the same.

[0057] As Figure 3 shown, as another example, the shapes of the four first mark patterns in the first pattern layer can all be rectangular block marks, and the lengths of the four rectangular block marks along the second direction D2 and the third direction D3 can be the same or different. In the present utility model, it is preferably set that the lengths of the four rectangular mark strips are the same.

[0058] Please refer to Figures 4 - 5 , Figures 4 - 5 which is a top view of two examples of the second mark patterns provided in the second pattern layer in some embodiments of the present utility model. As Figures 4 - 5As can be seen from the figure, in the semiconductor structure and alignment marks of the present utility model, multiple sets of repeating patterns can be provided in the second pattern layer, and any set of repeating patterns located in the second pattern layer is referred to as a second marking pattern. Exemplarily, four (four sets) of second marking patterns can be provided in the second pattern layer, and the four second marking patterns enclose a rectangular frame and are respectively located at the four corners of the rectangular frame; specifically, the four second marking patterns can be a closed rectangular frame pattern in the rectangular frame type marking, or one of the non-closed rectangular frame patterns formed by four rectangular marking bars in the rectangular frame type marking.

[0059] As Figure 4 shown, as an example, the shapes of the four second marking patterns in the second pattern layer can all be closed rectangular frame patterns, and the lengths of the four side frames of the closed rectangular frame pattern along the second direction D2 and the third direction D3 can be the same or different. In the present utility model, it is preferably set that the lengths of the four side frames are the same.

[0060] As Figure 5 shown, as another example, the shapes of the four second marking patterns in the second pattern layer can all be non-closed rectangular frame patterns formed by four rectangular marking bars, and the lengths of each rectangular marking bar in the non-closed rectangular frame pattern along the second direction D2 and the third direction D3 can be the same or different. In the present utility model, it is preferably set that the lengths of the four rectangular marking bars in each non-closed rectangular frame pattern are the same.

[0061] Please refer to Figures 6 - 9 , Figures 6 - 9 which is a top view of four examples of the third marking patterns provided in the third pattern layer in some embodiments of the present utility model. As Figures 6 - 9 shown, as can be seen from the figure, in the semiconductor structure and alignment marks of the present utility model, multiple sets of repeating patterns can be provided in the third pattern layer, and any set of repeating patterns located in the third pattern layer is referred to as a third marking pattern. Exemplarily, two (two sets) of third marking patterns can be provided in the third pattern layer, and the two third marking patterns can enclose a non-continuous L-shaped frame and are respectively located on two side frames of the non-continuous L-shaped frame, and there is a notch at the corner of the non-continuous L-shaped frame, or the two third marking patterns can be respectively located at both ends of the same diagonal of the rectangular frame; specifically, the two third marking patterns can be a closed rectangular frame pattern in the rectangular frame type marking, and at least one of multiple grid bar type marking bars or multiple grid frame type marking bars in the grid bar group type marking.

[0062] As Figure 6As shown, as an example, the shapes of the two third marker patterns in the third pattern layer can both be rectangular block markers, and the lengths of the rectangular block markers along the second direction D2 or the third direction D3 can be the same or different. In the present invention, it is preferably set that the lengths of the two rectangular block markers of the two third marker patterns are the same.

[0063] As Figure 7 shown, as another example, the shapes of the two third marker patterns in the third pattern layer can both be multiple grid bar block marker strips, and the lengths of the multiple grid bar block marker strips in each third marker pattern along the second direction D2 or the third direction D3 can be the same or different. In the present invention, it is preferably set that the lengths of the multiple grid bar block marker strips in each third marker pattern are the same.

[0064] As Figure 8 shown, as another example, the shapes of the two third marker patterns in the third pattern layer can both be multiple grid frame marker strips, and the lengths of the multiple grid frame marker strips in each third marker pattern along the second direction D2 or the third direction D3 can be the same or different. In the present invention, it is preferably set that the lengths of the multiple grid frame marker strips in each third marker pattern are the same.

[0065] As Figure 9 shown, as another example, the shapes of the two third marker patterns in the third pattern layer can both be a closed rectangular frame pattern, and the lengths of the four side frames of any closed rectangular frame pattern in each third marker pattern along the second direction D2 and the third direction D3 can be the same or different. In the present invention, it is preferably set that the lengths of the four side frames are the same.

[0066] Based on the above Figures 1 - 9 shown first marker pattern, second marker pattern, and various pattern situations of the third marker pattern, in the following embodiments of the present invention, they can be combined in various ways to form Figures 10 - 14 the alignment markers shown and semiconductor structures including the alignment markers.

[0067] Please refer to Figure 10 , Figure 10 which is a top view of an example of the alignment markers formed based on the Figure 1 , Figure 4 and Figure 6 shown first marker pattern, second marker pattern, third marker pattern and semiconductor structures including the alignment markers provided in some embodiments of the present invention. As Figure 10As shown, when the first marking pattern and the second marking pattern are closed rectangular frame patterns, and the third marking pattern is a rectangular block marking extending along a second direction D2 or a third direction D3 perpendicular to the first direction D1, at least one of the first marking pattern, the second marking pattern, and the third marking pattern overlaps at least partially with the projections of the other marking patterns in the first direction D1. Specifically, the shape of the overlapping projections of the first marking pattern and the second marking pattern in the first direction D1 is a double-square shape. The width of the third marking pattern along the second direction D2 or the third direction D3 is greater than the widths of the first marking pattern and the second marking pattern along the second direction D2 or the third direction D3, that is, the third marking pattern straddles the first marking pattern and the second marking pattern along the second direction D2 or the third direction D3.

[0068] Please refer to Figure 11 or Figure 12 , Figure 11 or Figure 12 which is a top view of an example of an alignment mark formed by the first marking pattern, the second marking pattern, and the third marking pattern provided in some embodiments of the present invention based on Figure 1 , Figure 4 and Figure 7 (or Figure 8 ) and a semiconductor structure including the alignment mark. As Figure 11 or Figure 12 shown, when the first marking pattern and the second marking pattern are closed rectangular frame patterns, and the third marking pattern is a plurality of grid bar block marking strips or a plurality of grid frame marking strips in a grid bar group marking extending along a second direction D2 or a third direction D3 perpendicular to the first direction D1, at least one of the first marking pattern, the second marking pattern, and the third marking pattern overlaps at least partially with the projections of the other marking patterns in the first direction D1. Specifically, the shape of the overlapping projections of the first marking pattern and the second marking pattern in the first direction D1 is a double-square shape. The width of the third marking pattern along the second direction D2 or the third direction D3 is greater than the widths of the first marking pattern and the second marking pattern along the second direction D2 or the third direction D3, that is, the third marking pattern straddles the first marking pattern and the second marking pattern along the second direction D2 or the third direction D3.

[0069] Please refer to Figure 13 , Figure 13 which is a top view of an example of an alignment mark formed by the first marking pattern, the second marking pattern, and the third marking pattern provided in some embodiments of the present invention based on Figure 2 , Figure 5 and Figure 7A top view of an example of an alignment mark formed by the first mark pattern, the second mark pattern, and the third mark pattern and a semiconductor structure including the alignment mark. Figure 13 As shown, when the first marking pattern and the second marking pattern are non-closed rectangular frame patterns surrounded by four rectangular marking strips, and the third marking pattern is a plurality of grid bar block marking strips (of course, it can also be a plurality of grid bar frame marking strips) in a grid bar group marking extending along a second direction D2 or a third direction D3 perpendicular to the first direction D1, at least one of the first marking pattern, the second marking pattern and the third marking pattern at least partially overlaps with the projections of the other marking patterns in the first direction D1. Specifically, the overlapping shape of the projections of the first marking pattern and the second marking pattern in the first direction D1 is a U-shape, and the width of the third marking pattern in the second direction D2 or the third direction D3 is greater than the width of the first marking pattern and the second marking pattern in the second direction D2 or the third direction D3, that is, the third marking pattern spans the first marking pattern and the second marking pattern in the second direction D2 or the third direction D3.

[0070] See also Figure 14 , Figure 14 Based on some embodiments of the present invention Figure 3 , Figure 5 and Figure 9 A top view of an example of an alignment mark formed by the first mark pattern, the second mark pattern, and the third mark pattern and a semiconductor structure including the alignment mark. Figure 14 As shown, when the second marking pattern and the third marking pattern are closed rectangular frame patterns (of course, they can also be open rectangular frame patterns surrounded by four rectangular marking strips), the first marking pattern is a rectangular block mark extending along the second direction D2 or the third direction D3 perpendicular to the first direction D1; wherein the shape of the overlapping projections of the second marking pattern and the third marking pattern in the first direction D1 is a U-shape, and the width of the first marking pattern along the second direction D2 or the third direction D3 is greater than the width of the second marking pattern and the third marking pattern in the second direction D2 or the third direction D3.

[0071] It can be understood that if the utility model collectively refers to a closed rectangular frame pattern and an open rectangular frame pattern surrounded by four rectangular marking strips as a rectangular frame mark, and collectively refers to a plurality of grid bar block marking strips and a plurality of grid bar frame marking strips as a grid bar group mark, then in combination with the one provided in this embodiment, Figures 11 - 14It can be seen that the alignment mark with three layers of marking patterns in the present utility model, and the first marking pattern, the second marking pattern, and the third marking pattern in the semiconductor structure can be any combination of the Figures 1 - 3 and the Figures 4 - 5 , and the Figures 6 - 9 . The Figures 11 - 14 provided in this embodiment is only a preferred example. Therefore, as long as at least one of the alignment mark and the first marking pattern, the second marking pattern, and the third marking pattern in the semiconductor structure overlaps at least partially with the projections of other marking patterns in the first direction D1, it is within the protection scope of the present utility model.

[0072] Please refer to Figure 15 , Figure 15 which is Figure 10 the corresponding relationship diagram of the top view of the local structure of the semiconductor structure or the alignment mark shown in Figure 15 and its sectional view. As can be seen from Figure 15 , in an alignment mark and a semiconductor structure provided by the present utility model, the first marking pattern, the second marking pattern, and the third marking pattern arranged along the first direction D1 are respectively located in different pattern layers or material layers. As an example, the third pattern layer containing the third marking pattern can be arranged on the second pattern layer containing the second marking pattern along the first direction D1, and the second pattern layer containing the second marking pattern can be arranged on the first pattern layer containing the first marking pattern, but it is not limited thereto.

[0073] It should be understood that the methods, processes, and flow steps involved in the present utility model are all prior arts.

[0074] In summary, the present utility model realizes the alignment between multiple pattern layers through the marking patterns arranged on different pattern layers, and by using the way that the projections of the marking patterns in at least one of the three pattern layers overlap with the marking patterns located in other pattern layers in the first direction, the substrate occupation area of the alignment mark in the first direction is reduced. That is, while ensuring the alignment accuracy, the effective wiring area of the substrate and the manufacturing efficiency of the semiconductor structure are improved.

[0075] It should be noted that the above description is only the preferred embodiment of this application and the explanation of the applied technical principles. Those skilled in the art should understand that the scope of the utility model involved in this application is not limited to the technical solutions formed by the specific combination of the above technical features, and should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept of the utility model. For example, the technical solutions formed by mutually replacing the above features with (but not limited to) the technical features with similar functions disclosed in this application.

[0076] Except for the technical features described in the specification, the remaining technical features are well-known technologies to those skilled in the art. To highlight the innovative features of the present utility model, the remaining technical features will not be elaborated herein.

Claims

1. A semiconductor structure, characterized in that: include: substrate; The pattern layer comprises a first pattern layer, a second pattern layer and a third pattern layer which are sequentially stacked from bottom to top along a first direction; an alignment mark, comprising a first mark pattern disposed in the first pattern layer, a second mark pattern disposed in the second pattern layer, and a third mark pattern disposed in the third pattern layer; Wherein, in the first direction, at least one of the first marking pattern, the second marking pattern and the third marking pattern at least partially overlaps with the projections of the other marking patterns.

2. The semiconductor structure according to claim 1, wherein: The first marking pattern, the second marking pattern and the third marking pattern respectively include rectangular block marks, rectangular frame marks or grid bar group marks.

3. The semiconductor structure according to claim 2, wherein: The rectangular frame mark includes a closed rectangular frame pattern or an open rectangular frame pattern surrounded by four rectangular marking strips, and the grid bar group mark includes a plurality of grid bar block marking strips or a plurality of grid bar frame marking strips.

4. The semiconductor structure according to claim 2, characterized in that The first marking pattern and the second marking pattern are rectangular frame marks, and the third marking pattern is a bar group mark or a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the first marking pattern and the second marking pattern in the first direction is a U-shape, and the width of the third marking pattern along the second direction is greater than the width of the first marking pattern and the second marking pattern in the second direction.

5. The semiconductor structure according to claim 2, wherein: The second marking pattern and the third marking pattern are rectangular frame marks, and the first marking pattern is a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the second marking pattern and the third marking pattern in the first direction is a U-shape, and the width of the first marking pattern along the second direction is greater than the width of the second marking pattern and the third marking pattern in the second direction.

6. The semiconductor structure according to claim 1, wherein: The first pattern layer includes two first marking patterns, and the two first marking patterns are respectively located at two ends of the same diagonal line of the rectangular frame.

7. The semiconductor structure according to claim 1, wherein: The second pattern layer includes four second marking patterns, which form a rectangular frame and are respectively located at four corners of the rectangular frame.

8. The semiconductor structure according to claim 1, wherein: The third pattern layer includes two third marking patterns, which surround a non-continuous L-shaped frame and are respectively located on two borders of the non-continuous L-shaped frame. The non-continuous L-shaped frame has a notch at a corner.

9. The semiconductor structure according to claim 5, characterized in that The first pattern layer includes four first marking patterns, and the four first marking patterns are grouped in pairs to form two rectangular block structures. The two rectangular block structures are respectively located at the two ends of the same diagonal of the rectangular frame, and the two first marking patterns in each of the rectangular block structures are arranged at intervals along a third direction, and the third direction is perpendicular to the second direction and the two are located in the same plane.

10. The semiconductor structure according to claim 1, wherein: At least one of the first marking pattern, the second marking pattern and the third marking pattern includes a plurality of groups of repeated patterns, respectively, and the plurality of groups of repeated patterns are arranged in parallel and spaced apart along a second direction or a third direction perpendicular to the first direction.

11. An alignment mark, characterized in that: include: substrate; A first marking pattern is disposed on the substrate; a second marking pattern, arranged on the first marking pattern; a third marking pattern, arranged on the second marking pattern; In a first direction perpendicular to the substrate, projections of at least one of the first marking pattern, the second marking pattern and the third marking pattern at least partially overlap with the projections of the other two.

12. The alignment mark according to claim 11, wherein: The first marking pattern, the second marking pattern and the third marking pattern respectively include rectangular block marks, rectangular frame marks or grid bar group marks.

13. The alignment mark according to claim 12, wherein: The rectangular frame mark includes a closed rectangular frame pattern or an open rectangular frame pattern surrounded by four rectangular marking strips, and the grid bar group mark includes a plurality of grid bar block marking strips or a plurality of grid bar frame marking strips.

14. The alignment mark according to claim 12, wherein: The first marking pattern and the second marking pattern are rectangular frame marks, and the third marking pattern is a bar group mark or a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the first marking pattern and the second marking pattern in the first direction is a U-shape, and the width of the third marking pattern along the second direction is greater than the width of the first marking pattern and the second marking pattern in the second direction.

15. The alignment mark according to claim 12, wherein: The second marking pattern and the third marking pattern are rectangular frame marks, and the first marking pattern is a rectangular block mark extending along a second direction perpendicular to the first direction; wherein, the shape of the overlapping projections of the second marking pattern and the third marking pattern in the first direction is a U-shape, and the width of the first marking pattern along the second direction is greater than the width of the second marking pattern and the third marking pattern in the second direction.

16. The alignment mark according to claim 11, wherein: The substrate further includes a first pattern layer, the first pattern layer includes two first marking patterns, and the two first marking patterns are respectively located at two ends of the same diagonal line of the rectangular frame.

17. The alignment mark according to claim 11, wherein: The substrate further includes a second pattern layer, the second pattern layer includes four second marking patterns, the four second marking patterns form a rectangular frame and are respectively located at four corners of the rectangular frame.

18. The alignment mark according to claim 11, wherein: The substrate also includes a third pattern layer, which includes two third marking patterns. The two third marking patterns form a non-continuous L-shaped frame and are respectively located on two borders of the non-continuous L-shaped frame. The non-continuous L-shaped frame has a notch at a corner.

19. The alignment mark according to claim 14, wherein: The substrate also includes a first pattern layer, which includes four first marking patterns. The four first marking patterns are grouped in pairs to form two rectangular block structures. The two rectangular block structures are respectively located at the two ends of the same diagonal of the rectangular frame, and the two first marking patterns in each of the rectangular block structures are arranged at intervals along a third direction, which is perpendicular to the second direction and the two are located in the same plane.

20. The alignment mark according to claim 11, wherein At least one of the first marking pattern, the second marking pattern and the third marking pattern includes a plurality of groups of repeated patterns, respectively, and the plurality of groups of repeated patterns are arranged in parallel and spaced apart along a second direction or a third direction perpendicular to the first direction.

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