Digital-to-analog conversion circuit with signal anti-interference function and corresponding circuit board

Abstract

The utility model provides a digital-to-analog conversion circuit with a signal anti-interference function and a corresponding circuit board, a buffer module receives digital serial data signals sent by an FPGA chip, and the buffer module can filter noise interference of the digital serial data signals. The digital-to-analog conversion module is connected with the buffer module, and the digital-to-analog conversion module can perform digital-to-analog conversion operation on the digital serial data signal and can generate an analog serial data signal. The current limiting module and the voltage limiting module are both connected with the digital-to-analog conversion module, the current limiting module can perform current limiting operation on the analog serial data signals, and the voltage limiting module can perform voltage limiting operation on the analog serial data signals. The interface module transmits the analog serial data signal to a post-stage device, and the surge suppression module and the discharge module are both connected with the interface module in parallel. The surge suppression module can perform surge suppression operation on the analog serial data signals, and the discharge module can perform discharge operation on electrostatic interference of the analog serial data signals.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, and particularly relates to a digital-to-analog conversion circuit with a signal anti-interference function and a corresponding circuit board. Background Art

[0002] In modern society, FPGAs are widely used in many fields such as communication. The FPGA chip can output digital signals, and the digital-to-analog conversion chip can perform digital-to-analog conversion operations on these digital signals. The digital-to-analog conversion chip can generate analog signals, which can be used to control subsequent devices. However, during the transmission process, the analog signal is prone to interference such as noise or static electricity, resulting in a reduction in the control accuracy of the analog signal for subsequent devices.

[0003] Therefore, it is necessary to provide a digital-to-analog conversion circuit with a signal anti-interference function and a corresponding circuit board to solve the above technical problems. Summary of the Utility Model

[0004] The utility model provides a digital-to-analog conversion circuit with a signal anti-interference function and a corresponding circuit board, effectively solving the technical problem of the reduction in the control accuracy of the analog signal for subsequent devices.

[0005] The utility model provides a digital-to-analog conversion circuit with a signal anti-interference function, which includes:

[0006] A buffer module that receives the digital serial data signal sent by the FPGA chip and is used to filter out the noise interference of the digital serial data signal;

[0007] A digital-to-analog conversion module, connected to the buffer module, for performing digital-to-analog conversion operations on the digital serial data signal to generate an analog serial data signal;

[0008] A current limiting module, connected to the digital-to-analog conversion module, for performing current limiting operations on the analog serial data signal;

[0009] A voltage limiting module, connected to the digital-to-analog conversion module and connected in parallel with the current limiting module, for performing voltage limiting operations on the analog serial data signal;

[0010] An interface module, connected to the current limiting module, for transmitting the analog serial data signal to subsequent devices, and the analog serial data signal is used to control subsequent devices;

[0011] A surge suppression module, connected in parallel with the interface module, for performing surge suppression operations on the analog serial data signal;

[0012] A discharge module, connected in parallel with the interface module, is used to discharge the electrostatic interference of the analog serial data signal. The buffer module can perform noise reduction operations on the digital serial data signal output by the FPGA. The digital-to-analog conversion module performs digital-to-analog conversion operations on the digital serial data signal, so that the digital-to-analog conversion module outputs an analog serial data signal. The analog serial data signal can control the subsequent device, and the surge suppression module can perform surge suppression operations on the analog serial data signal. The discharge module can discharge the electrostatic interference of the analog serial data signal, thereby improving the anti-interference ability of the analog serial data signal and further enhancing the reliability of the circuit. Moreover, the voltage limiting module can perform voltage limiting operations on the analog serial data signal, and the current limiting module can perform current limiting operations on the analog serial data signal, which can avoid transient overvoltage and transient overcurrent from damaging circuit devices, thus effectively protecting the circuit.

[0013] Furthermore, the digital-to-analog conversion circuit with signal anti-interference function further includes an electromagnetic interference suppression module, which is used to suppress the electromagnetic interference of the analog serial data signal. The digital-to-analog conversion module includes an analog ground terminal and a digital ground terminal. One end of the electromagnetic interference suppression module is connected to the analog ground terminal, and the other end of the electromagnetic interference suppression module is connected to the digital ground terminal, which is used to further improve the anti-electromagnetic interference ability of the analog serial data signal.

[0014] Furthermore, the buffer module includes a buffer chip, and the buffer chip includes an input pin and an output pin. The digital-to-analog conversion module includes a digital-to-analog conversion chip, and the digital-to-analog conversion chip includes SDI N pin, VOUT A pin, VOUT B pin, VOUT C pin, VOUT D pin;

[0015] The input pin is used to receive the digital serial data signal. The buffer chip is used to filter out the noise interference of the digital serial data signal. The output pin is connected to the SDI N pin. The digital-to-analog conversion chip is used to perform digital-to-analog conversion operations on the digital serial data signal. The VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin are all used to output the analog serial data signal, and the analog serial data signal is used to output from any one of the VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin.

[0016] Furthermore, the current limiting module includes a first self-resetting fuse, a second self-resetting fuse, a third self-resetting fuse, and a fourth self-resetting fuse. The interface module includes a first interface, a second interface, a third interface, and a fourth interface;

[0017] One end of the first self - restoring fuse is connected to the VOUT A pin, and the other end of the first self - restoring fuse is connected to the first interface; one end of the second self - restoring fuse is connected to the VOUT B pin, and the other end of the second self - restoring fuse is connected to the second interface; one end of the third self - restoring fuse is connected to the VOUT C pin, and the other end of the third self - restoring fuse is connected to the third interface; one end of the fourth self - restoring fuse is connected to the VOUT D pin, and the other end of the fourth self - restoring fuse is connected to the fourth interface. When the current value of the analog serial data signal is greater than the set value, the self - restoring fuse is in the off state; when the current value of the analog serial data signal is less than or equal to the set value, the self - restoring fuse is in the on state, thus effectively suppressing the transient over - current and protecting the circuit.

[0018] Further, the voltage - limiting module includes a first switching diode, a second switching diode, a third switching diode, and a fourth switching diode. The first switching diode is connected in parallel between the first self - restoring fuse and the VOUT A pin; the second switching diode is connected in parallel between the second self - restoring fuse and the VOUT B pin; the third switching diode is connected in parallel between the third self - restoring fuse and the VOUT C pin; the fourth switching diode is connected in parallel between the fourth self - restoring fuse and the VOUT D pin. The switching diodes are used to discharge the transient over - voltage, thereby limiting the voltage of the analog serial data signal and further protecting the circuit.

[0019] Further, the surge - suppression module includes a first transient voltage suppressor and a second transient voltage suppressor. One end of the first transient voltage suppressor is connected to the first self - restoring fuse, and the other end of the first transient voltage suppressor is connected to the analog ground terminal. One end of the second transient voltage suppressor is connected to the first self - restoring fuse, and the other end of the second transient voltage suppressor is connected to the protective ground terminal;

[0020] The surge - suppression module includes a third transient voltage suppressor and a fourth transient voltage suppressor. One end of the third transient voltage suppressor is connected to the second self - restoring fuse, and the other end of the third transient voltage suppressor is connected to the analog ground terminal. One end of the fourth transient voltage suppressor is connected to the second self - restoring fuse, and the other end of the fourth transient voltage suppressor is connected to the protective ground terminal;

[0021] The surge suppression module includes a fifth transient voltage suppression diode and a sixth transient voltage suppression diode. One end of the fifth transient voltage suppression diode is connected to the third self - restoring fuse, and the other end of the fifth transient voltage suppression diode is connected to the analog ground terminal. One end of the sixth transient voltage suppression diode is connected to the third self - restoring fuse, and the other end of the sixth transient voltage suppression diode is connected to the protective ground terminal;

[0022] The surge suppression module includes a seventh transient voltage suppression diode and an eighth transient voltage suppression diode. One end of the seventh transient voltage suppression diode is connected to the fourth self - restoring fuse, and the other end of the seventh transient voltage suppression diode is connected to the analog ground terminal. One end of the eighth transient voltage suppression diode is connected to the fourth self - restoring fuse, and the other end of the eighth transient voltage suppression diode is connected to the protective ground terminal.

[0023] Further, the discharge module includes a first discharge resistor and a first discharge capacitor. One end of the first discharge capacitor is connected to the first interface, the other end of the first discharge capacitor is connected to the protective ground terminal, and the first discharge resistor is connected in parallel with the first discharge capacitor;

[0024] The discharge module includes a second discharge resistor and a second discharge capacitor. One end of the second discharge capacitor is connected to the second interface, the other end of the second discharge capacitor is connected to the protective ground terminal, and the second discharge resistor is connected in parallel with the second discharge capacitor;

[0025] The discharge module includes a third discharge resistor and a third discharge capacitor. One end of the third discharge capacitor is connected to the third interface, the other end of the third discharge capacitor is connected to the protective ground terminal, and the third discharge resistor is connected in parallel with the third discharge capacitor;

[0026] The discharge module includes a fourth discharge resistor and a fourth discharge capacitor. One end of the fourth discharge capacitor is connected to the fourth interface, the other end of the fourth discharge capacitor is connected to the protective ground terminal, and the fourth discharge resistor is connected in parallel with the fourth discharge capacitor.

[0027] Further, the digital - to - analog conversion module further includes a reference voltage unit. The digital - to - analog conversion chip includes a reference voltage pin. The input end of the reference voltage unit is connected to an external power supply, the output end of the reference voltage unit is connected to the reference voltage pin. The reference voltage unit is used to generate a reference voltage based on the voltage output by the external power supply and transmit the reference voltage to the digital - to - analog conversion chip. The reference voltage module can be used to ensure that the conversion between digital signals and analog signals is more accurate.

[0028] Further, the model number of the buffer chip is 74LVC245, and the model number of the digital - to - analog conversion chip is AD5754RBREZ.

[0029] A circuit board, which includes the digital-to-analog conversion circuit with signal anti-interference function described in any one of the above.

[0030] Compared with the prior art, the beneficial effects of the present utility model are as follows: The present utility model provides a digital-to-analog conversion circuit with signal anti-interference function, and the digital-to-analog conversion circuit with signal anti-interference function includes a buffer module, a digital-to-analog conversion module, a current limiting module, a voltage limiting module, a surge suppression module, and a discharge module. The buffer module can perform noise reduction operation on the digital serial data signal output by the FPGA, and the digital-to-analog conversion module performs digital-to-analog conversion operation on the digital serial data signal.

[0031] Moreover, the digital-to-analog conversion module can generate an analog serial data signal. The analog serial data signal can be used to control the subsequent device. The surge suppression module can perform surge suppression operation on the analog serial data signal, and the discharge module can perform discharge operation on the electrostatic interference of the analog serial data signal. Thus, the anti-interference ability of the analog serial data signal is improved, and the reliability of the circuit is enhanced. Furthermore, during the transmission process of the analog serial data signal, it is difficult for interference such as noise or static electricity to have an adverse effect on the analog serial data signal. Further, the analog serial data signal is transmitted through the digital-to-analog conversion circuit with signal anti-interference function, which can improve the transmission quality of the analog serial data signal and effectively solve the technical problem of the reduction of the control accuracy of the analog signal to the subsequent device.

[0032] Therefore, the analog serial data signal can accurately control the subsequent device for a long time. Also, the voltage limiting module can perform voltage limiting operation on the analog serial data signal, and the current limiting module can perform current limiting operation on the analog serial data signal. It can avoid transient overvoltage and transient overcurrent from damaging circuit devices. Therefore, the settings of the voltage limiting module and the current limiting module effectively protect the digital-to-analog conversion circuit with signal anti-interference function. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following briefly introduces the drawings required to be used in the embodiments. The drawings in the following description are only the corresponding drawings of some embodiments of the present utility model.

[0034] Figure 1 It is a block diagram of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0035] Figure 2 It is a circuit diagram of the buffer module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0036] Figure 3Circuit diagram of the digital-to-analog conversion module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0037] Figure 4 Circuit diagram of the reference voltage unit of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0038] Figure 5 Circuit diagram of the current limiting module, voltage limiting module and surge suppression module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0039] Figure 6 Circuit diagram of the interface module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0040] Figure 7 Diagram of the discharge module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0041] Figure 8 Circuit diagram of the electromagnetic interference suppression module of an embodiment of the digital-to-analog conversion circuit with signal anti-interference function of the present utility model.

[0042] In the figure, 10 is the digital-to-analog conversion circuit; 11 is the buffer module; 12 is the digital-to-analog conversion module; 121 is the reference voltage unit; 13 is the current limiting module; 14 is the voltage limiting module; 15 is the interface module; 16 is the surge suppression module; 17 is the discharge module; 18 is the electromagnetic interference suppression module; 19 is the FPGA chip. Detailed implementation manners

[0043] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative efforts fall within the protection scope of the present utility model.

[0044] The directional terms mentioned in the present utility model, such as "up", "down", "front", "rear", "left", "right", "inside", "outside", "side", "top" and "bottom" and other words, are only references to the orientation of the accompanying drawings. The directional terms used are for the purpose of explaining and understanding the present utility model, rather than for limiting the present utility model.

[0045] The terms "first", "second" and other words in the terms of the present utility model are only for the purpose of description, and cannot be understood as indicating or implying relative importance, nor as a limitation on the order of precedence.

[0046] In the figure, units with similar structures are denoted by the same reference numerals.

[0047] Please refer to Figure 1 , the present utility model provides a digital-to-analog conversion circuit 10 with a signal anti-interference function. The digital-to-analog conversion circuit 10 with a signal anti-interference function is applied to a circuit board. The digital-to-analog conversion circuit 10 with a signal anti-interference function includes a buffer module 11, a digital-to-analog conversion module 12, a current limiting module 13, a voltage limiting module 14, a surge suppression module 16, a discharge module 17, and an electromagnetic interference suppression module 18. The buffer module 11 receives the digital serial data signal sent by the FPGA chip 19, and the buffer module can be used to filter out the noise interference of the digital serial data signal. The digital-to-analog conversion module 12 is connected to the buffer module 11. The digital-to-analog conversion module 12 can be used to perform digital-to-analog conversion operations on the digital serial data signal, and the digital-to-analog conversion module 12 can generate an analog serial data signal.

[0048] Please refer to Figure 2 and Figure 3 , the buffer module 11 includes a buffer chip U801, and the model of the buffer chip U801 is 74LVC245. The buffer chip U801 includes an input pin B3 and an output pin A3. The digital-to-analog conversion module 12 includes a digital-to-analog conversion chip U802. The model of the digital-to-analog conversion chip U802 is AD5754RBREZ. The digital-to-analog conversion chip U802 includes an SDI N pin, a VOUT A pin, a VOUT B pin, a VOUT C pin, and a VOUT D pin. The FPGA chip 19 includes an ASDI N pin, and the input pin B3 is connected to the ASDI N pin. The input pin B3 is used to receive the digital serial data signal, and the buffer chip U801 is used to filter out the noise interference of the digital serial data signal. The output pin A3 is connected to the SDI N pin. The digital-to-analog conversion chip U802 is used to perform digital-to-analog conversion operations on the digital serial data signal. The VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin are all used to output the analog serial data signal. Moreover, the analog serial data signal is used to be output from any one of the VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin. During the signal transmission process, if the signal source and the load do not match, noise interference will be generated in the circuit, resulting in signal distortion. The main function of the buffer chip U801 is to filter out the noise interference. Therefore, the setting of the buffer chip U801 can improve the signal transmission quality, enhance the signal driving ability, and also improve the reliability of the digital-to-analog conversion circuit 10.

[0049] Please refer to Figure 1 Figure 3 and Figure 4, the digital-to-analog conversion module 12 further includes a reference voltage unit 121. The digital-to-analog conversion chip U802 includes reference voltage pins REFIN / REFOUT. The input end of the reference voltage unit 121 is connected to an external power supply VCC, and the external power supply VCC is a 3.3V power supply. The output end of the reference voltage unit 121 is connected to the reference voltage pins REFIN / REFOUT. The reference voltage unit 121 is used to generate a reference voltage based on the voltage output by the external power supply VCC. The reference voltage unit 121 transmits the reference voltage to the digital-to-analog conversion chip U802. The setting of the reference voltage module can ensure more accurate conversion between digital signals and analog signals.

[0050] Please refer to Figure 4 , the reference voltage unit 121 includes a reference voltage chip U803, and the model of the reference voltage chip U803 is AZ431AN-ATRE1. The first end of the reference voltage chip U803 is connected to the external power supply VCC, and the second end of the reference voltage chip U803 is connected to the first end of the reference voltage chip U803. The second end of the reference voltage chip U803 is connected to the reference voltage pins REFIN / REFOUT, and the third end of the reference voltage chip U803 is connected to the analog ground terminal GND_DA. The reference voltage unit 121 includes a resistor R813, a capacitor C814, and a bead FB803. One end of the resistor R813 is connected to the external power supply VCC, and the other end of the resistor R813 is connected to the first end of the reference voltage chip U803. The bead FB803 is connected between the external power supply VCC and the resistor R813. One end of the capacitor C814 is connected between the resistor R813 and the bead FB803, and the other end of the capacitor C814 is connected to the analog ground terminal GND_DA.

[0051] On the basis of Figure 1 and Figure 3 , please combine Figure 5 and Figure 6。The current limiting module 13 is connected to the digital-to-analog conversion module 12. The current limiting module 13 is used to perform current limiting operations on the analog serial data signal. The interface module 15 is connected to the current limiting module 13. The interface module 15 is used to transmit the analog serial data signal to the subsequent device. The analog serial data signal is used to control the subsequent device. The current limiting module 13 includes a first self-resetting fuse RT801, a second self-resetting fuse RT802, a third self-resetting fuse RT803, and a fourth self-resetting fuse RT804. The interface module 15 includes a first interface J801, a second interface J802, a third interface J803, and a fourth interface J804. The first interface J801 is provided with a first connection terminal AOUT1+. The second interface J802 is provided with a second connection terminal AOUT2+. The third interface J803 is provided with a third connection terminal AOUT3+. The fourth interface J804 is provided with a fourth connection terminal AOUT4+. One end of the first self-resetting fuse RT801 is connected to the VOUT A pin, and the other end of the first self-resetting fuse RT801 is connected to the first connection terminal AOUT1+. One end of the second self-resetting fuse RT802 is connected to the VOUT B pin, and the other end of the second self-resetting fuse RT802 is connected to the second connection terminal AOUT2+. One end of the third self-resetting fuse RT803 is connected to the VOUT C pin, and the other end of the third self-resetting fuse RT803 is connected to the third connection terminal AOUT3+. One end of the fourth self-resetting fuse RT804 is connected to the VOUT D pin, and the other end of the fourth self-resetting fuse RT804 is connected to the fourth connection terminal AOUT4+.

[0052] Please refer to Figure 1 When the current value of the analog serial data signal is greater than the set value, the self-resetting fuse is in the off state. When the current value of the analog serial data signal is less than or equal to the set value, the self-resetting fuse is in the on state. The current limiting module 13 effectively suppresses transient overcurrent, and thus can protect the digital-to-analog conversion circuit 10. A self-resetting fuse is connected in series at the analog signal output end. When the current value in the circuit exceeds the set value, the self-resetting fuse will quickly cut off the circuit, thereby avoiding transient overcurrent in the circuit components. After troubleshooting, the self-resetting fuse can automatically reset and return to the normal working state. Therefore, users do not need to manually repair or replace the self-resetting fuse, which can reduce the maintenance cost of the circuit and improve the reliability of the circuit. In the digital-to-analog conversion circuit 10, since the analog serial data signal has four data transmission channels, when a circuit component in one of the data transmission channels is damaged, the analog serial data signal can still be transmitted through the remaining three data transmission channels. Therefore, the digital-to-analog conversion circuit 10 has high reliability.

[0053] Please refer to Figure 5, the voltage limiting module 14 is connected to the digital-to-analog conversion module 12, and the voltage limiting module 14 is connected in parallel with the current limiting module 13. The voltage limiting module 14 is used to perform a voltage limiting operation on the analog serial data signal. The voltage limiting module 14 includes a first switching diode D801, a second switching diode D802, a third switching diode D803, and a fourth switching diode D804. The first switching diode D801 is connected in parallel between the first self-resetting fuse RT801 and the VOUT A pin. The second switching diode D802 is connected in parallel between the second self-resetting fuse RT802 and the VOUT B pin. The third switching diode D803 is connected in parallel between the third self-resetting fuse RT803 and the VOUT C pin. The fourth switching diode D804 is connected in parallel between the fourth self-resetting fuse RT804 and the VOUT D pin. The switching diode can be used to discharge the transient overvoltage, thereby limiting the voltage of the analog serial data signal. Therefore, the setting of the switching diode can protect the subsequent circuit.

[0054] Please refer to Figure 5 , the positive electrode of the switching diode is connected to the positive analog power supply 12V DA, and the negative electrode of the switching diode is connected to the negative analog power supply -12V DA. Among them, both the positive analog power supply 12V DA and the negative analog power supply -12V DA are 12V power supplies. Connecting the switching diode in parallel at the output end of the analog serial signal can play a role in limiting the voltage. If an abnormal voltage appears in the peripheral device, the abnormal voltage can be conducted to the power supply voltage through the one-way conduction of the diode, and the abnormal voltage can be discharged. Thus, the circuit components can be protected from damage by the abnormal voltage. The voltage limiting module 14 can protect the circuit components in the digital-to-analog conversion circuit 10, and can also improve the overall stability and reliability of the circuit.

[0055] Please refer to Figure 5, the surge suppression module 16 is connected in parallel with the interface module 15, and the surge suppression module 16 is used to perform surge suppression operations on the analog serial data signal. The surge suppression module 16 includes a first transient voltage suppression diode D823 and a second transient voltage suppression diode D805. One end of the first transient voltage suppression diode D823 is connected to the first self - recovering fuse RT801, and the other end of the first transient voltage suppression diode D823 is connected to the analog ground terminal GND_DA. One end of the second transient voltage suppression diode D805 is connected to the first self - recovering fuse RT801, and the other end of the second transient voltage suppression diode D805 is connected to the protective ground terminal PE. The surge suppression module 16 includes a third transient voltage suppression diode D822 and a fourth transient voltage suppression diode D806. One end of the third transient voltage suppression diode D822 is connected to the second self - recovering fuse RT802, and the other end of the third transient voltage suppression diode D822 is connected to the analog ground terminal GND_DA. One end of the fourth transient voltage suppression diode D806 is connected to the second self - recovering fuse RT802, and the other end of the fourth transient voltage suppression diode D806 is connected to the protective ground terminal PE.

[0056] Please refer to Figure 5 , the surge suppression module 16 includes a fifth transient voltage suppression diode D821 and a sixth transient voltage suppression diode D807. One end of the fifth transient voltage suppression diode D821 is connected to the third self - recovering fuse RT803, and the other end of the fifth transient voltage suppression diode D821 is connected to the analog ground terminal GND_DA. One end of the sixth transient voltage suppression diode D807 is connected to the third self - recovering fuse RT803, and the other end of the sixth transient voltage suppression diode D807 is connected to the protective ground terminal PE. The surge suppression module 16 includes a seventh transient voltage suppression diode D820 and an eighth transient voltage suppression diode D808. One end of the seventh transient voltage suppression diode D820 is connected to the fourth self - recovering fuse RT804, and the other end of the seventh transient voltage suppression diode D820 is connected to the analog ground terminal GND_DA. One end of the eighth transient voltage suppression diode D808 is connected to the fourth self - recovering fuse RT804, and the other end of the eighth transient voltage suppression diode D808 is connected to the protective ground terminal PE. The transient voltage suppression diode can shunt and clamp the surge voltage, so that the transient voltage suppression diode can be used to protect each circuit element in the circuit and prevent the circuit element from being damaged by the instantaneous surge voltage.

[0057] Please refer to Figure 6 and Figure 7, the discharge module 17 is connected in parallel with the interface module 15. The discharge module 17 is used to perform a discharge operation on the electrostatic interference of the simulated serial data signal. The discharge module 17 includes a first discharge resistor R860 and a first discharge capacitor C860. One end of the first discharge capacitor C860 is connected to the first connection terminal AOUT1+. The other end of the first discharge capacitor C860 is connected to the protective ground terminal PE. The first discharge resistor R860 is connected in parallel with the first discharge capacitor C860. The discharge module 17 includes a second discharge resistor R861 and a second discharge capacitor C861. One end of the second discharge capacitor C861 is connected to the second connection terminal AOUT2+. The other end of the second discharge capacitor C861 is connected to the protective ground terminal PE. The second discharge resistor R861 is connected in parallel with the second discharge capacitor C861.

[0058] Please refer to Figure 6 and Figure 7 , the discharge module 17 includes a third discharge resistor R862 and a third discharge capacitor C862. One end of the third discharge capacitor C862 is connected to the third connection terminal AOUT3+. The other end of the third discharge capacitor C862 is connected to the protective ground terminal PE. The third discharge resistor R862 is connected in parallel with the third discharge capacitor C862. The discharge module 17 includes a fourth discharge resistor R863 and a fourth discharge capacitor C863. One end of the fourth discharge capacitor C863 is connected to the fourth connection terminal AOUT4+. The other end of the fourth discharge capacitor C863 is connected to the protective ground terminal PE. The fourth discharge resistor R863 is connected in parallel with the fourth discharge capacitor C863. By setting the discharge resistor and the discharge capacitor at the position where the simulated serial data signal is close to the interface end, the discharge operation of the electrostatic interference can be performed, thereby enhancing the anti-interference ability of the digital-to-analog conversion circuit 10.

[0059] Please refer to Figure 8, the digital-to-analog conversion circuit 10 with signal anti-interference function further includes an electromagnetic interference suppression module 18, and the electromagnetic interference suppression module 18 is used to suppress the electromagnetic interference of the analog serial data signal. The digital-to-analog conversion module 12 includes an analog ground terminal GND_DA and a digital ground terminal GND. One end of the electromagnetic interference suppression module 18 is connected to the analog ground terminal GND_DA, and the other end of the electromagnetic interference suppression module 18 is connected to the digital ground terminal GND. The electromagnetic interference suppression module 18 includes a stitching capacitor C851, a stitching capacitor C852, a stitching capacitor C853, a stitching capacitor C854, a stitching capacitor C855, a stitching capacitor C856, a stitching capacitor C857, and a stitching capacitor C858. One end of the stitching capacitor C851 is connected to the analog ground terminal GND_DA, and the other end of the stitching capacitor C851 is connected to the digital ground terminal GND. The stitching capacitors C852, C853, C854, C855, C856, C857, and C858 are all connected in parallel with the stitching capacitor C851. The stitching capacitor can separate the digital ground terminal GND from the analog ground terminal GND_DA, so that the stitching capacitor can suppress the electromagnetic interference of the analog serial data signal.

[0060] Please refer to Figure 2 and Figure 3 , the buffer chip U801 further includes a B5 pin, a B4 pin, a B2 pin, a B1 pin, an A5 pin, an A4 pin, an A2 pin, and an A1 pin. The digital-to-analog conversion chip U802 includes a SYNC pin, an SCLK pin, an LDAC pin, and a CLR pin. The B5 pin is connected to the ACLR pin of the FPGA chip 19, and the B5 pin is used to receive the reset signal sent by the FPGA chip 19. The B4 pin is connected to the ALDAC pin of the FPGA chip 19, and the B4 pin is used to receive the logic signal sent by the FPGA chip 19. The B2 pin is connected to the ASCLK pin of the FPGA chip 19, and the B2 pin is used to receive the clock signal sent by the FPGA chip 19. The B1 pin is connected to the ASYNC pin of the FPGA chip 19, and the B1 pin is used to receive the synchronization signal sent by the FPGA chip 19. The A5 pin is connected to the CLR pin, and the A4 pin is connected to the LDAC pin. The A2 pin is connected to the SCLK pin, and the SYNC pin is connected to the A1 pin.

[0061] Please refer to Figure 1 , Figure 2 and Figure 3, the buffer chip U801 can transmit a reset signal to the digital-to-analog conversion chip U802. The reset signal is used to restore the entire circuit or a specific part of the circuit to its initial state. The buffer chip U801 can transmit a logic signal to the digital-to-analog conversion chip U802. The logic signal is used to control the modification of the register. When the logic signal is at a low level, the content of the register can be modified. When the logic signal is at a high level, the content of the register is fixed and cannot be modified. The buffer chip U801 can transmit a clock signal to the digital-to-analog conversion chip U802. The clock signal is used to provide a common time reference for the circuit, ensuring that each module of the circuit operates at the correct time point. And the clock signal can also control the timing of the circuit, ensuring that the circuit works in a predetermined order, thus avoiding data chaos or logic errors in the circuit. The buffer chip U801 can transmit a synchronization signal to the digital-to-analog conversion chip U802. The synchronization signal is used to provide a signal with the same time reference for machine devices that need to synchronize processing information.

[0062] Please refer to Figure 2 and Figure 3 , the buffer chip U801 also includes a B6 pin and an A6 pin, and the digital-to-analog conversion chip U802 includes an SDO pin. The A6 pin is connected to the SDO pin, and the B6 pin is connected to the FPGA chip 19. Therefore, the digital-to-analog conversion chip U802 can output a feedback signal, and this feedback signal can be transmitted to the ASDO pin of the FPGA chip 19 through the buffer chip U801. Among them, this feedback signal can be used to feedback whether the digital-to-analog conversion chip U802 is working properly. Furthermore, the user can obtain the working state of the digital-to-analog conversion chip U802 based on this feedback signal.

[0063] Please refer to Figure 2 , the buffer module 11 also includes a resistor R801, a resistor R802, a resistor R814, and a resistor R809. One end of the resistor R801 is connected to the B1 pin, and the other end of the resistor R801 is connected to the external power supply VCC. One end of the resistor R802 is connected to the B1 pin, and the other end of the resistor R802 is connected to the external power supply VCC. One end of the resistor R814 is connected to the B0 pin, and one end of the resistor R814 is connected to the digital ground terminal GND. One end of the resistor R809 is connected to the B3 pin, and one end of the resistor R809 is connected to the digital ground terminal GND. The buffer chip U801 also includes a DIR pin, an OE pin, and a GND pin, and the DIR pin, the OE pin, and the GND pin are all grounded.

[0064] Please refer to Figure 3, the digital-to-analog conversion chip U802 also includes an AVSS pin, an AVDD pin, and an EPAD pin. The AVSS pin and the EPAD pin are connected to the reverse analog power supply -12V DA, and the AVDD pin is connected to the forward analog power supply 12V DA. The digital-to-analog conversion module 12 includes a capacitor C801, a capacitor C802, a capacitor C803, and a capacitor C804. One end of the capacitor C801 is connected to the AVSS pin, the other end of the capacitor C801 is grounded, and the capacitor C803 is connected in parallel with the capacitor C801. One end of the capacitor C802 is connected to the AVDD pin, the other end of the capacitor C802 is grounded, and the capacitor C804 is connected in parallel with the capacitor C803. The digital-to-analog conversion module 12 also includes a capacitor C820, a capacitor C821, and a capacitor C805. The digital-to-analog conversion chip U802 also includes a DVCC pin, and the DVCC pin is connected to an external power supply VCC. One end of the capacitor C820 is connected to the DVCC pin, the other end of the capacitor C820 is connected to the digital ground terminal GND, and the capacitor C821 is connected in parallel with the capacitor C820.

[0065] Please refer to Figure 3 , the digital-to-analog conversion module 12 includes a resistor R803, a resistor R804, a resistor R805, a resistor R806, and a resistor R807. The resistor R803 is connected between the SYNC pin and the A1 pin, and the resistor R804 is connected between the A2 pin and the SCLK pin. The resistor R805 is connected between the reference pin and the reference voltage chip U803, the resistor R806 is connected between the output pin A3 and the S IDN pin, and the resistor R807 is connected between the SDO pin and the A6 pin. Moreover, the digital-to-analog conversion module 12 includes a resistor R808, a resistor R810, a resistor R811, and a resistor R812. The resistor R808 is connected between the A4 pin and the LDAC pin, and the resistor R810 is connected between the A5 pin and the CLR pin. The digital-to-analog conversion chip U802 also includes a B I N pin. One end of the resistor R810 is connected to the B I N pin, and the other end of the resistor R810 is connected to the external power supply VCC. One end of the resistor R811 is connected to the B I N pin, and the other end of the resistor R811 is connected to the digital ground terminal GND. The digital-to-analog conversion chip U802 also includes a S I G_GND pin and a DAC_GND pin, and the S I G_GND pin and the DAC_GND pin are connected to the analog ground terminal GND_DA. The digital-to-analog conversion chip U802 also includes a GND pin, and the GND pin is connected to the digital ground terminal GND.

[0066] The working principle of the present utility model is as follows: When the digital-to-analog conversion circuit 10 operates, first, the FPGA chip 19 outputs a digital serial data signal. The buffer chip U801 of the buffer module 11 receives this digital serial data signal, and the buffer chip U801 can filter out the noise interference of the digital serial data signal. Then, the buffer chip U801 transmits this digital serial data signal to the digital-to-analog conversion chip U802 of the digital-to-analog conversion module 12. The digital-to-analog conversion chip U802 can perform digital-to-analog conversion operations on the digital serial data signal, so that the digital-to-analog conversion chip U802 can generate an analog serial data signal. And the analog serial data signal can be output from any one of the VA pin, VB pin, VC pin, and VD pin. Then, the analog serial data signal can pass through the current limiting module 13. If the current value of the analog serial data signal is greater than the set value, the self-resetting fuse is in the off state; if the current value of the analog serial data signal is less than or equal to the set value, the self-resetting fuse is in the on state. In order to perform voltage limiting operations on the analog serial data signal, the voltage limiting module 14 is provided with a switching diode. In order to perform surge suppression operations on the analog serial data signal, the surge suppression module 16 is provided with a transient voltage suppression diode. In order to perform electromagnetic interference discharge operations on the analog serial data signal, the discharge module 17 is provided with a discharge resistor and a discharge capacitor. Because the digital-to-analog conversion circuit 10 is provided with an electromagnetic interference suppression module 18, the electromagnetic interference suppression module 18 can suppress the electromagnetic interference of the analog serial data signal through a patching capacitor. Then, the current limiting module 13 transmits the analog serial data signal to the interface module 15. The interface module 15 can transmit this analog serial data signal to the subsequent device, and this analog serial data signal can be used to control the subsequent device.

[0067] The present utility model provides a digital-to-analog conversion circuit with a signal anti-interference function. The digital-to-analog conversion circuit with a signal anti-interference function includes a buffer module, a digital-to-analog conversion module, a current limiting module, a voltage limiting module, a surge suppression module, and a discharge module. The buffer module can perform noise reduction operations on the digital serial data signal output by the FPGA, and the digital-to-analog conversion module performs digital-to-analog conversion operations on the digital serial data signal.

[0068] Moreover, the digital-to-analog conversion module can generate an analog serial data signal. The analog serial data signal can be used to control the subsequent device. The surge suppression module can perform surge suppression operations on the analog serial data signal, and the discharge module can perform electrostatic interference discharge operations on the analog serial data signal. Thereby, the anti-interference ability of the analog serial data signal is improved, and the reliability of the circuit is enhanced. Furthermore, during the transmission of the analog serial data signal, it is difficult for interference such as noise or static electricity to have an adverse effect on the analog serial data signal. Further, the analog serial data signal is transmitted through the digital-to-analog conversion circuit with signal anti-interference function, which can improve the transmission quality of the analog serial data signal and effectively solve the technical problem of the reduction of the control accuracy of the subsequent device by the analog signal.

[0069] Therefore, the analog serial data signal can accurately control the subsequent device for a long time. Moreover, the voltage limiting module can perform voltage limiting operations on the analog serial data signal, and the current limiting module can perform current limiting operations on the analog serial data signal. Transient overvoltage and transient overcurrent can be avoided from damaging circuit devices. Therefore, the settings of the voltage limiting module and the current limiting module effectively protect the digital-to-analog conversion circuit with signal anti-interference function.

[0070] In summary, although the present utility model has been disclosed above with the preferred embodiments, the above preferred embodiments are not intended to limit the present utility model. Those of ordinary skill in the art can make various changes and modifications without departing from the spirit and scope of the present utility model. Therefore, the protection scope of the present utility model shall be subject to the scope defined by the claims.

Claims

1. A digital-to-analog conversion circuit with signal anti-interference function, characterized in that: These include, A buffer module receives a digital serial data signal sent by the FPGA chip and is used to filter out noise interference of the digital serial data signal; A digital-to-analog conversion module, connected to the buffer module, for performing a digital-to-analog conversion operation on the digital serial data signal to generate an analog serial data signal; A current limiting module, connected to the digital-to-analog conversion module, and configured to perform a current limiting operation on the analog serial data signal; A voltage limiting module, connected to the digital-to-analog conversion module and connected in parallel with the current limiting module, and used for performing a voltage limiting operation on the analog serial data signal; An interface module, connected to the current limiting module, used to transmit the analog serial data signal to a subsequent device, wherein the analog serial data signal is used to control the subsequent device; A surge suppression module, connected in parallel with the interface module, and configured to perform surge suppression on the analog serial data signal; The discharge module is connected in parallel with the interface module and is used for performing a discharge operation on the electrostatic interference of the analog serial data signal.

2. The digital-to-analog conversion circuit with signal anti-interference function according to claim 1, characterized in that: The digital-to-analog conversion circuit with signal anti-interference function also includes an electromagnetic interference suppression module, which is used to suppress the electromagnetic interference of the analog serial data signal; the digital-to-analog conversion module includes an analog ground terminal and a digital ground terminal, one end of the electromagnetic interference suppression module is connected to the analog ground terminal, and the other end of the electromagnetic interference suppression module is connected to the digital ground terminal.

3. The digital-to-analog conversion circuit with signal anti-interference function according to claim 2, characterized in that: The buffer module includes a buffer chip, the buffer chip includes an input pin and an output pin, the digital-to-analog conversion module includes a digital-to-analog conversion chip, the digital-to-analog conversion chip includes an SDIN pin, a VOUT A pin, a VOUT B pin, a VOUT C pin, and a VOUT D pin; The input pin is used to receive a digital serial data signal, the buffer chip is used to filter out noise interference of the digital serial data signal, the output pin is connected to the SDIN pin, the digital-to-analog conversion chip is used to perform a digital-to-analog conversion operation on the digital serial data signal, the VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin are all used to output an analog serial data signal, and the analog serial data signal is used to be output from any one of the VOUT A pin, the VOUT B pin, the VOUT C pin, and the VOUT D pin.

4. The digital-to-analog conversion circuit with signal anti-interference function according to claim 3, characterized in that: The current limiting module includes a first resettable fuse, a second resettable fuse, a third resettable fuse, and a fourth resettable fuse, and the interface module includes a first interface, a second interface, a third interface, and a fourth interface; One end of the first resettable fuse is connected to the VOUT A pin, and the other end of the first resettable fuse is connected to the first interface; one end of the second resettable fuse is connected to the VOUT B pin, and the other end of the second resettable fuse is connected to the second interface; one end of the third resettable fuse is connected to the VOUT C pin, and the other end of the third resettable fuse is connected to the third interface; one end of the fourth resettable fuse is connected to the VOUT D pin, and the other end of the fourth resettable fuse is connected to the fourth interface.

5. The digital-to-analog conversion circuit with signal anti-interference function according to claim 4, characterized in that: The voltage limiting module includes a first switch diode, a second switch diode, a third switch diode, and a fourth switch diode. The first switch diode is connected in parallel between the first resettable fuse and the VOUT A pin; the second switch diode is connected in parallel between the second resettable fuse and the VOUT B pin; the third switch diode is connected in parallel between the third resettable fuse and the VOUT C pin; and the fourth switch diode is connected in parallel between the fourth resettable fuse and the VOUT D pin.

6. The digital-to-analog conversion circuit with signal anti-interference function according to claim 4, characterized in that: The surge suppression module includes a first transient voltage suppression tube and a second transient voltage suppression tube, one end of the first transient voltage suppression tube is connected to a first resettable fuse, the other end of the first transient voltage suppression tube is connected to the analog ground terminal, one end of the second transient voltage suppression tube is connected to the first resettable fuse, and the other end of the second transient voltage suppression tube is connected to a protective ground terminal; The surge suppression module includes a third transient voltage suppression tube and a fourth transient voltage suppression tube, one end of the third transient voltage suppression tube is connected to the second self-recovery fuse, the other end of the third transient voltage suppression tube is connected to the analog ground terminal, one end of the fourth transient voltage suppression tube is connected to the second self-recovery fuse, and the other end of the fourth transient voltage suppression tube is connected to the protection ground terminal; The surge suppression module includes a fifth transient voltage suppression tube and a sixth transient voltage suppression tube, one end of the fifth transient voltage suppression tube is connected to the third self-recovery fuse, the other end of the fifth transient voltage suppression tube is connected to the analog ground terminal, one end of the sixth transient voltage suppression tube is connected to the third self-recovery fuse, and the other end of the sixth transient voltage suppression tube is connected to the protection ground terminal; The surge suppression module includes a seventh transient voltage suppression tube and an eighth transient voltage suppression tube, one end of the seventh transient voltage suppression tube is connected to the fourth self-recovery fuse, and the other end of the seventh transient voltage suppression tube is connected to the analog ground terminal, one end of the eighth transient voltage suppression tube is connected to the fourth self-recovery fuse, and the other end of the eighth transient voltage suppression tube is connected to the protective ground terminal.

7. The digital-to-analog conversion circuit with signal anti-interference function according to claim 4, characterized in that: The discharge module includes a first discharge resistor and a first discharge capacitor, one end of the first discharge capacitor is connected to the first interface, the other end of the first discharge capacitor is connected to the protective grounding terminal, and the first discharge resistor is connected in parallel with the first discharge capacitor; The discharge module includes a second discharge resistor and a second discharge capacitor, one end of the second discharge capacitor is connected to the second interface, the other end of the second discharge capacitor is connected to the protective grounding terminal, and the second discharge resistor is connected in parallel with the second discharge capacitor; The discharge module includes a third discharge resistor and a third discharge capacitor, one end of the third discharge capacitor is connected to the third interface, the other end of the third discharge capacitor is connected to the protective grounding terminal, and the third discharge resistor is connected in parallel with the third discharge capacitor; The discharge module includes a fourth discharge resistor and a fourth discharge capacitor, one end of the fourth discharge capacitor is connected to the fourth interface, the other end of the fourth discharge capacitor is connected to the protective grounding terminal, and the fourth discharge resistor is connected in parallel with the fourth discharge capacitor.

8. The digital-to-analog conversion circuit with signal anti-interference function according to claim 4, characterized in that: The digital-to-analog conversion module also includes a reference voltage unit, the digital-to-analog conversion chip includes a reference voltage pin, the input end of the reference voltage unit is connected to an external power supply, the output end of the reference voltage unit is connected to the reference voltage pin, and the reference voltage unit is used to generate a reference voltage based on the voltage output by the external power supply and transmit the reference voltage to the digital-to-analog conversion chip.

9. The digital-to-analog conversion circuit with signal anti-interference function according to claim 3, characterized in that: The model of the buffer chip is 74LVC245, and the model of the digital-to-analog conversion chip is AD5754RBREZ.

10. A circuit board, characterized in that: It includes the digital-to-analog conversion circuit with signal anti-interference function as described in any one of claims 1-9.

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