Driver circuit capable of preventing electric leakage
By designing a driver circuit including a precharge circuit, a precharge switching circuit and an output transistor, the problem of leakage and DC bias in the prior art driver circuit is easily affected by the touch display panel, and efficient voltage management in the touch mode is realized, ensuring the normal operation of the driver circuit.
Patent Information
- Application Number
- CN202422081785.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-27
- Publication Date
- 2025-06-24
- Estimated Expiration
- 2034-08-27
AI Technical Summary
The existing driver circuit is prone to leakage when driving multiple transistors in the touch display panel, and is affected by DC bias, which makes it impossible to effectively and accurately drive multiple transistors in the touch panel, affecting the scanning and display functions.
A driver circuit including a precharge circuit, a precharge switching circuit and an output transistor is designed. The control end of the output transistor is voltage-managed in the touch mode through the precharge switching circuit and the discharge circuit to prevent leakage and DC bias from affecting it.
It effectively prevents the leakage problem of the driver circuit in touch mode. Even under high temperature operation, the high potential of the node can be maintained, ensuring smooth charging when re-entering the display mode from touch mode, and ensuring normal driving of the output transistor.
Smart Images

Figure CN223024410U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a driver circuit, in particular to a driver circuit capable of preventing electric leakage. Background Art
[0002] With the rapid development of technology, touch display panels are more widely used, including smart phones, tablet computers, and so on. There are many types of existing touch display panels, including external touch display panels (Out-cell) and in-cell touch display panels (On-cell&In-cell). Among them, due to the advantages of thinness, high light transmittance, etc. of In-cell touch display panels, they have great development potential for modern technology that pursues better display effects.
[0003] However, during the process of driving multiple transistors of a touch display panel by an existing driver circuit, electric leakage occurs inside the existing driver circuit, and affected by the DC bias voltage, it is impossible to effectively and accurately drive the operation of multiple transistors of the touch panel, resulting in the touch panel not having good scanning and display functions. Summary of the Utility Model
[0004] Aiming at the deficiencies of the prior art, the utility model provides a driver circuit capable of preventing electric leakage. The driver circuit capable of preventing electric leakage of the utility model is applied to a display device. The driver circuit capable of preventing electric leakage of the utility model includes a pre-charge circuit, a pre-charge switching circuit, and an output transistor. The pre-charge circuit includes a first switch component, a second switch component, and a third switch component. The pre-charge switching circuit includes a first switching component and a second switching component. The first end of the first switch component is coupled to a first pre-charge voltage. The control end of the first switch component is coupled to a charging voltage. The first end of the second switch component is connected to the second end of the first switch component. The control end of the second switch component is coupled to a first pre-charge control voltage. The first end of the third switch component is coupled to a second pre-charge voltage. The first end of the first switching component is coupled to a pre-charge input voltage. The control end of the first switching component is connected to the second end of the second switch component and the second end of the third switch component. The first end of the second switching component is connected to the second end of the first switching component and the control end of the second switching component. The first end of the output transistor receives a drive input signal. The control end of the output transistor is coupled to the charging voltage and the second end of the second switching component. The second end of the output transistor outputs the drive voltage to the control end of the third switch component and one or more transistors of the display device.
[0005] Optionally, the anti-leakage-capable driver circuit further includes: a fourth switch component, the first end of the fourth switch component is coupled to a first pre-charge voltage, and the control end of the fourth switch component is coupled to a discharge voltage; and a fifth switch component, the first end of the fifth switch component is connected to the second end of the fourth switch component, the control end of the fifth switch component is coupled to a discharge control voltage, and the second end of the fifth switch component is connected to the control end of the first switching component.
[0006] Optionally, the anti-leakage-capable driver circuit further includes: a discharge circuit that discharges the voltage at the control end of the output transistor in the touch mode, and the discharge circuit is connected to the control end of the output transistor.
[0007] Optionally, the discharge circuit includes: a discharge transistor, the first end of the discharge transistor is connected to the control end of the output transistor, the second end of the discharge transistor is coupled to a reference potential, the control end of the discharge transistor is coupled to a touch start voltage, and the discharge transistor is turned on in the touch mode.
[0008] Optionally, the anti-leakage-capable driver circuit further includes: a voltage drop circuit that drops at least one of the voltage at the control end and the voltage at the second end of the output transistor, and the voltage drop circuit is connected to the control end and the second end of the output transistor.
[0009] Optionally, the voltage drop circuit includes: a first voltage drop transistor, the first end of the first voltage drop transistor is connected to the second end of the output transistor, the second end of the first voltage drop transistor is coupled to a reference potential, and the control end of the first voltage drop transistor is coupled to a voltage drop control voltage.
[0010] Optionally, the voltage drop circuit includes: a capacitor, the first end of the capacitor is connected to the first end of the first voltage drop transistor and the control end of the output transistor, and the second end of the capacitor is connected to the second end of the output transistor.
[0011] Optionally, the voltage drop circuit further includes: a second voltage drop transistor, the first end of the second voltage drop transistor is connected to the second end of the output transistor, the second end of the second voltage drop transistor is coupled to a reference potential, and the control end of the second voltage drop transistor is coupled to the voltage drop control voltage.
[0012] Optionally, the voltage drop circuit further includes: a third voltage drop transistor, the first end of the third voltage drop transistor is connected to the second end of the output transistor, the second end of the third voltage drop transistor is coupled to a reference potential, and the control end of the third voltage drop transistor is coupled to an output control voltage.
[0013] Optionally, the voltage drop circuit further includes: a voltage drop activation circuit that turns on the first voltage drop transistor, and the voltage drop activation circuit is connected to the control end of the first voltage drop transistor.
[0014] Optionally, the voltage drop activation circuit includes:
[0015] A first drop activation transistor, the control terminal of the first drop activation transistor is connected to the control terminal of the output transistor;
[0016] A second drop activation transistor, the first terminal and the control terminal of the second drop activation transistor are coupled to a common voltage, the second terminal of the second drop activation transistor is connected to the first terminal of the first drop activation transistor, and the second terminal of the first drop activation transistor is coupled to a reference potential;
[0017] A third drop activation transistor, the first terminal of the third drop activation transistor is connected to and coupled to a common voltage, the control terminal of the third drop activation transistor is connected to the second terminal of the second drop activation transistor; and
[0018] A fourth drop activation transistor, the first terminal of the fourth drop activation transistor is connected to the second terminal of the third drop activation transistor, the control terminal of the fourth drop activation transistor is connected to the control terminal of the output transistor, and the second terminal of the fourth drop activation transistor is coupled to a reference potential.
[0019] Optionally, the anti-leakage driver circuit further includes: a first input switch component, the first terminal of the first input switch component is coupled to a charging voltage, the second terminal of the first input switch component is connected to the control terminal of the output transistor, and the control terminal of the first input switch component is coupled to a first pre-charge control voltage.
[0020] Optionally, the anti-leakage driver circuit further includes: a second input switch component, the first terminal of the second input switch component is coupled to a discharge voltage, the second terminal of the second input switch component is connected to the control terminal of the output transistor, and the control terminal of the second input switch component is coupled to a discharge control voltage. As described above, the present invention provides an anti-leakage driver circuit. The anti-leakage driver circuit of the present invention takes preventive measures against the leakage problem of the nodes between multiple transistors in the touch mode. Even under high-temperature operation, the high potential of this node can be maintained, so that when re-entering the display mode from the touch mode, the control terminal of the output transistor can be successfully recharged to a high potential, enabling the second terminal of the output transistor to output a driving voltage to the transistor of the display device. In the anti-leakage driver circuit of the present invention, the control terminal and the second terminal of the output transistor, which is the output component of the anti-leakage driver circuit, are maintained at a low potential in the non-operating state to prevent noise generation.
[0021] Furthermore, in the touch mode, the discharge circuit and the voltage drop circuit of the anti-leakage driver circuit of the present invention pull the voltage of the control terminal of the output transistor to a low potential, preventing the control terminal of the output transistor from being affected by a long-term DC bias voltage.
[0022] In addition, the leakage-proof driver circuit of the present utility model can also be applied to the forward and reverse bidirectional scanning of a small-sized inlaid touch display, making the touch display panel more flexible, and when operating at low temperature, normal temperature, and high temperature, both the touch function and the display function are normal.
[0023] To enable a further understanding of the features and technical content of the present utility model, please refer to the following detailed description and drawings of the present utility model. However, the provided drawings are only for reference and illustration, and are not used to limit the present utility model. Description of the Drawings
[0024] Figure 1 Circuit diagram of the leakage-proof driver circuit according to the first embodiment of the present utility model.
[0025] Figure 2 Circuit diagram of the leakage-proof driver circuit according to the second embodiment of the present utility model.
[0026] Figure 3 Circuit diagram of the leakage-proof driver circuit according to the third embodiment of the present utility model.
[0027] Figure 4 Circuit diagram of the leakage-proof driver circuit according to the fourth embodiment of the present utility model.
[0028] Figure 5 Circuit diagram of the leakage-proof driver circuit according to the fifth embodiment of the present utility model.
[0029] Figure 6 Circuit diagram of the leakage-proof driver circuit according to the sixth embodiment of the present utility model.
[0030] Figure 7 Circuit diagram of the leakage-proof driver circuit according to the seventh embodiment of the present utility model.
[0031] Figure 8 Waveform diagram of the signal of the leakage-proof driver circuit according to the seventh embodiment of the present utility model.
[0032] Figure 9 Block diagram of the leakage-proof driver circuit according to the first to seventh embodiments of the present utility model.
[0033] Figure 10 Schematic diagram of the leakage-proof driver circuit according to the first to seventh embodiments of the present utility model configured in a display device. Detailed Description of the Embodiments
[0034] The following are specific embodiments to illustrate the implementation manners of the present utility model. Those skilled in the art can understand the advantages and effects of the present utility model from the content disclosed in this specification. The present utility model can be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed based on different viewpoints and applications without departing from the concept of the present utility model. Additionally, the drawings of the present utility model are only simple schematic illustrations and are not drawn according to actual sizes, which is hereby stated in advance. The following embodiments will further detail the related technical content of the present utility model, but the disclosed content is not used to limit the protection scope of the present utility model. In addition, the term "or" used herein may, depending on the actual situation, include any one or a combination of more of the associated listed items.
[0035] Please refer to Figure 1 , in which Figure 1 is the circuit diagram of the driver circuit capable of preventing electric leakage according to the first embodiment of the present utility model, Figure 9 is the block diagram of the driver circuit capable of preventing electric leakage according to the first to seventh embodiments of the present utility model, Figure 10 is the schematic diagram of the driver circuit capable of preventing electric leakage according to the first to seventh embodiments of the present utility model configured in a display device.
[0036] The driver circuit of the present utility model can be applied to a display device, and this display device can be an inlaid touch display.
[0037] As Figure 9 and Figure 10 shown, each of the multiple drivers 1000 in a display device (such as, but not limited to, an inlaid touch display device) can include the driver circuit of the present utility model as shown in any one of Figures 1 to 7 . On the display panel of the display device, multiple pixel units (pixels) are arranged in an array, and a transistor is provided in each pixel unit. The control ends (such as gates) of multiple transistors in different columns on the display panel of the display device can be connected to the driver circuits of the present utility model in the multiple drivers 1000. The driver circuit of the present utility model in each driver 1000 can be connected to the control ends (such as gates) of multiple transistors in the same column on the touch display panel of the display device and can be coupled to a scan driving voltage STV.
[0038] The driver circuits of the present utility model for multiple drivers 1000 respectively receive multiple clock signals CLK1 to CLK8. The waveforms of these clock signals CLK1 to CLK8 can be staggered from each other, so that the multiple drivers 1000 respectively output drive voltages Gn of a target potential (such as a high potential) to the control terminals (such as gates) of multiple transistors in different columns or rows of the display device at different time intervals, to turn on the transistors in different columns in turn. In this way, scanning detection can be realized, which can include forward scanning, reverse scanning or a combination thereof.
[0039] As Figure 1 shown, the leak-proof driver circuit of the first embodiment of the present utility model includes a pre-charge circuit NPR1, a pre-charge switching circuit RPE, and an output transistor Tm. The pre-charge circuit NPR1 includes a first switch component TS1, a second switch component TS2, and a third switch component TS3. The pre-charge switching circuit RPE includes a first switching component TR1 and a second switching component TR2.
[0040] As Figure 1 shown, the first switch component TS1, the second switch component TS2, the third switch component TS3, the first switching component TR1, and the second switching component TR2 can be transistors, but the present utility model is not limited thereto.
[0041] The first end of the first switch component TS1 is coupled to a first pre-charge voltage RSTA. The control end of the first switch component TS1 is coupled to a charging voltage U2D, or is practically connected to an external control circuit and receives a charging voltage U2D from this external control circuit.
[0042] The first end of the second switch component TS2 is connected to the second end of the first switch component TS1. The control end of the second switch component TS2 is coupled to a first pre-charge control voltage DHT. As Figure 10 shown, the first pre-charge control voltage DHT received by the control end of the second switch component TS2 in the driver circuit of the present utility model inside the Nth driver 1000 among the multiple drivers 1000 of the display device can be, for example but not limited to, the voltage at the second end of the output transistor Tm in the driver circuit of the present utility model inside the (N - x)th driver 1000 among the multiple drivers 1000, where N and x are integer values, and x is, for example but not limited to, 4.
[0043] In the driver circuit of the present utility model of each driver 1000, the control end of the third switch component TS3 is connected to the second end of the output transistor Tm to receive a drive voltage Gn from the second end of the output transistor Tm. The first end of the third switch component TS3 is coupled to a second pre-charge voltage RSTB.
[0044] The first end of the first switching component TR1 is coupled to a precharge input voltage TPU, or practically connected to an external control circuit and receiving a precharge input voltage TPU from this external control circuit. The control end of the first switching component TR1 is connected to the second end of the second switching component TS2 and the second end of the third switching component TS3. The first end of the second switching component TR2 is connected to the second end of the first switching component TR1 and the control end of the second switching component TR2. And the second end of the second switching component TR2 is connected to the control end of the output transistor Tm.
[0045] The first end of the output transistor Tm receives a drive input signal OTS, or practically connected to an external control circuit and receiving a drive input signal OTS from this external control circuit. As in Figure 10 shown, the drive input signal OTS received at the first end of the output transistor Tm inside each driver 1000 as shown in Figure 1 can be one of the multiple clock signals CLK1 to CLK8 as shown in Figure 10 shown. The control end of the output transistor Tm is coupled to a charging voltage U2D.
[0046] The second end of the output transistor Tm of each driver 1000, as an output end of the driver circuit of the present utility model of each driver 1000, is used to output a drive signal Gn to the control ends of one or more transistors in the same column on the touch display panel of the display device to turn on or off these one or more transistors.
[0047] Please refer to Figure 2 , which is the circuit diagram of the leakage-proof driver circuit according to the second embodiment of the present utility model. The same content of the second embodiment and the first embodiment of the present utility model will not be elaborated herein.
[0048] The difference between the second embodiment and the first embodiment of the present utility model is that, as in Figure 2 shown, the driver circuit of the second embodiment of the present utility model further includes a discharge circuit DIS. The discharge circuit DIS is connected to the control end of the output transistor Tm.
[0049] The discharge circuit DIS can be coupled to a reference potential VSS or grounded. The discharge circuit DIS can also be coupled to a touch start voltage TPD, or practically connected to an external control circuit and receiving a touch start voltage TPD from this external control circuit.
[0050] When the charging voltage U2D is set to a constant high potential voltage, the driver circuit of the present utility model can also be as in Figure 2As shown, it includes a first input switch component TP1. In practice, if the charging voltage U2D is a variable voltage that can be appropriately changed between a high potential and a low potential by an (external control circuit), the setting of the first input switch component TP1 can be omitted.
[0051] The first end of the first input switch component TP1 is coupled to the charging voltage U2D. The second end of the first input switch component TP1 is connected to the control end of the output transistor Tm. The control end of the first input switch component TP1 is coupled to the first pre-charge control voltage DHT.
[0052] When charging the control end of the output transistor Tm to a target high potential through a charging voltage U2D in the display mode, the control end of the first input switch component TP1 switches to the off state according to the received (low-potential) first pre-charge control voltage DHT to stop the charging voltage U2D from charging the control end of the output transistor Tm.
[0053] It should be noted that when the discharge circuit DIS determines that the display device enters a touch mode from a display mode based on a (high-potential) touch start voltage TPD, the discharge circuit DIS discharges a drive control voltage Qn at the control end of the output transistor Tm.
[0054] In this way, it can prevent the control end of the output transistor Tm in the driver circuit of the present invention from being affected by a long-term DC bias in the touch mode.
[0055] Please refer to Figure 3 , which is the circuit diagram of the leakage-proof driver circuit according to the third embodiment of the present invention. The same content of the third embodiment of the present invention as that of the first and second embodiments will not be described in detail herein.
[0056] The difference between the third embodiment of the present invention and the second embodiment is that, as Figure 3 shown, the discharge circuit DIS1 of the driver circuit according to the third embodiment of the present invention includes a discharge transistor TD.
[0057] The first end of the discharge transistor TD is connected to the control end of the output transistor Tm. The second end of the discharge transistor TD is coupled to a reference potential VSS or grounded. The control end of the discharge transistor TD is coupled to a touch start voltage TPD, or practically connected to an external control circuit and receiving a touch start voltage TPD from this external control circuit.
[0058] When the display device enters the touch mode from the display mode, a touch start voltage TPD received at the control terminal of the discharge transistor TD changes in potential, for example, changes from a low potential to a high potential, to switch the discharge transistor TD from the off state to the on state. The discharge current at the control terminal of the output transistor Tm flows through the conducting discharge transistor TD to the reference potential VSS for discharging, or a drive control voltage Qn at the control terminal of the output transistor Tm is pulled down to the reference potential VSS. In this way, it is possible to prevent the control terminal of the output transistor Tm in the drive circuit of the present invention from being affected by a long-term DC bias in the touch mode.
[0059] Please refer to Figure 4 , which is a circuit diagram of a drive circuit capable of preventing leakage in the fourth embodiment of the present invention. The same content of the fourth embodiment and the first embodiment of the present invention will not be elaborated herein.
[0060] The difference between the fourth embodiment and the first embodiment of the present invention is that the drive circuit of the fourth embodiment of the present invention further includes a voltage drop circuit PDV.
[0061] The voltage drop circuit PDV is connected to the control terminal and the second terminal of the output transistor Tm.
[0062] When the display device enters the touch mode from the display mode, the voltage drop circuit PDV drops the voltage of the control terminal, the second terminal, or both of the output transistor Tm. In this way, it is possible to prevent the control terminal and the second terminal of the output transistor Tm in the drive circuit of the present invention from being affected by a long-term DC bias in the touch mode, thereby avoiding affecting the driving of the transistors of the display device.
[0063] Please refer to Figure 5 , which is a circuit diagram of a drive circuit capable of preventing leakage in the fifth embodiment of the present invention. The same content of the fifth embodiment and the first to fourth embodiments of the present invention will not be elaborated herein.
[0064] The difference between the fifth embodiment and the third embodiment of the present invention is that, as Figure 5 shown, the drive circuit of the fifth embodiment of the present invention further includes a voltage drop circuit PDV1. The voltage drop circuit PDV1 includes a voltage drop activation circuit TR, a first voltage drop transistor TF1, and a capacitor C1.
[0065] The control terminal of the first voltage drop transistor TF1 is connected to the voltage drop activation circuit TR to receive a voltage drop control voltage QBn from the voltage drop activation circuit TR, or is practically directly coupled to a voltage drop control voltage QBn. A voltage drop control voltage QBn described herein has a potential opposite to that of a drive control voltage Qn.
[0066] The first end of the first voltage drop transistor TF1 is connected to the control end of the output transistor Tm. The second end of the first voltage drop transistor TF1 is coupled to the reference potential VSS. The first end of the capacitor C1 is connected to the first end of the first voltage drop transistor TF1 and the control end of the output transistor Tm. The second end of the capacitor C1 is connected to the second end of the output transistor Tm.
[0067] When the display device enters the touch mode from the display mode, the voltage drop activation circuit TR outputs (a high potential) a voltage drop control voltage QBn to the first voltage drop transistor TF1 to turn on the first voltage drop transistor TF1. As a result, a drive control voltage Qn at the control end of the output transistor Tm is dropped or discharged to the reference potential VSS through the turned-on first voltage drop transistor TF1, and at the same time, a drive voltage Gn at the second end of the output transistor Tm is dropped or discharged to the reference potential VSS through the capacitor C1 and the turned-on first voltage drop transistor TF1. In this way, it is possible to prevent the control end and the second end of the output transistor Tm in the driver circuit of the present invention from being affected by a long-term DC bias in the touch mode, thereby avoiding affecting the driving of the transistors of the display device.
[0068] Please refer to Figure 6 , which is a circuit diagram of a leakage-proof driver circuit according to the sixth embodiment of the present invention. The same content of the sixth embodiment of the present invention as that of the first to fifth embodiments will not be described in detail herein.
[0069] The difference between the sixth embodiment and the fifth embodiment of the present invention is that, as Figure 6 shown, the voltage drop circuit PDV2 of the driver circuit according to the sixth embodiment of the present invention includes a voltage drop activation circuit TRA and a capacitor C1. The voltage drop activation circuit TRA includes a first drop activation transistor TE1, a second drop activation transistor TE2, a third drop activation transistor TE3, and a fourth drop activation transistor TE4.
[0070] The control end of the first drop activation transistor TE1 is connected to the control end of the output transistor Tm. The second end of the first drop activation transistor TE1 is coupled to the reference potential VSS. The first end and the control end of the second drop activation transistor TE2 are coupled to a common voltage VDD. The second end of the second drop activation transistor TE2 is connected to the first end of the first drop activation transistor TE1.
[0071] The first terminal of the third pull-down activation transistor TE3 is connected and coupled to the common voltage VDD. The control terminal of the third pull-down activation transistor TE3 is connected to the second terminal of the second pull-down activation transistor TE2. The first terminal of the fourth pull-down activation transistor TE4 is connected to the second terminal of the third pull-down activation transistor TE3 and the control terminal of the first voltage pull-down transistor TF1. The control terminal of the fourth pull-down activation transistor TE4 is connected to the control terminal of the output transistor Tm (and the control terminal of the first pull-down activation transistor TE1). The control terminal of the fourth pull-down activation transistor TE4 is coupled to the reference potential VSS.
[0072] When the display device enters the touch mode from the display mode, a drive control voltage Qn at the control terminal of the output transistor Tm is pulled down from a high potential to the low-potential reference potential VSS through the conducting discharge transistor TD. As a result, the first pull-down activation transistor TE1 and the fourth pull-down activation transistor TE4 are switched from the on state to the off state. At the same time, the second pull-down activation transistor TE2 and the third pull-down activation transistor TE3 are switched from the off state to the on state, so that a voltage pull-down control voltage QBn at the control terminal of the first voltage pull-down transistor TF1 is changed from a low potential to a high potential, thereby switching the first voltage pull-down transistor TF1 from the off state to the on state. The voltages at the control terminal and the second terminal of the output transistor Tm are pulled down to the reference potential VSS through the conducting first voltage pull-down transistor TF1, or discharged to the reference potential VSS.
[0073] In this way, it is possible to prevent the control terminal and the second terminal of the output transistor Tm in the driver circuit of the present utility model from being affected by a long-term DC bias in the touch mode, thereby avoiding affecting the driving of the transistors of the display device.
[0074] Please refer to Figure 7 and Figure 8 , where Figure 7 is the circuit diagram of the leakage-proof driver circuit according to the seventh embodiment of the present utility model, Figure 8 is the waveform diagram of the signals of the leakage-proof driver circuit according to the seventh embodiment of the present utility model. The same content of the seventh embodiment and the sixth embodiment of the present utility model will not be elaborated herein.
[0075] The difference between the seventh embodiment and the sixth embodiment of the present utility model is that, as Figure 7 shown, the driver circuit of the seventh embodiment of the present utility model further includes a second input switch component TP2, and the voltage pull-down circuit PDV3 further includes a second voltage pull-down transistor TF2 and a third voltage pull-down transistor TF3, and the pre-charge circuit NPR1 further includes a fourth switch component TS4 and a fifth switch component TS5.
[0076] The first end of the second voltage-dropping transistor TF2 is connected to the second end of the output transistor Tm. The second end of the second voltage-dropping transistor TF2 is coupled to the reference potential VSS. The control end of the second voltage-dropping transistor TF2 is connected to the node between the first end of the fourth voltage-dropping activation transistor TE4 and the second end of the third voltage-dropping activation transistor TE3 to receive a voltage-dropping control voltage QBn from this node.
[0077] The first end of the third voltage-dropping transistor TF3 is connected to the second end of the output transistor Tm. The second end of the third voltage-dropping transistor TF3 is coupled to the reference potential VSS. The control end of the third voltage-dropping transistor TF3 is coupled to an output control voltage XCR, or practically connected to an external control circuit to receive an output control voltage XCR from this external control circuit.
[0078] The first end of the second input switch component TP2 is coupled to a discharge voltage D2U, or practically connected to an external control circuit to receive a discharge voltage D2U from this external control circuit. The second end of the second input switch component TP2 is connected to the control end of the output transistor Tm. The control end of the second input switch component TP2 is coupled to a discharge control voltage CHT. As Figure 9 and Figure 10 A discharge control voltage CHT of the driver circuit of the present utility model inside the Nth driver 1000 among multiple drivers 1000 of the display device as shown can be, for example but not limited to, the voltage at the second end of the output transistor Tm of the driver circuit of the present utility model inside the (N + y)th driver 1000 among multiple drivers 1000, where N and y are integer values, and y is, for example but not limited to, 4.
[0079] The first end of the fourth switch component TS4 is coupled to a first pre-charge voltage RSTA, or practically connected to an external control circuit to receive a first pre-charge voltage RSTA from this external control circuit. The control end of the fourth switch component TS4 is coupled to a discharge voltage D2U, or practically connected to an external control circuit to receive a discharge voltage D2U from this external control circuit.
[0080] The first end of the fifth switch component TS5 is connected to the second end of the fourth switch component TS4. The control end of the fifth switch component TS5 is coupled to a discharge control voltage CHT. The second end of the fifth switch component TS5 is connected to the control end of the first switching component TR1.
[0081] As the display device switches between the display mode and the touch mode, the potential of a driving voltage Gn output from the second end of the output transistor Tm of the driver circuit of the present utility model to the control ends (such as gates) of multiple transistors among multiple pixel units on the touch display panel of the display device switches between a low potential and a high potential.
[0082] The working period of the display device can be divided into multiple working intervals. For example, as Figure 8 shown, within the display mode time intervals T1 and T3, the display device enters the display mode, while within the touch mode time interval T2, the display device enters the touch mode. The display mode time interval T1 includes a first pre-display time interval t11 and a second pre-display time interval t12. The touch mode time interval T2 includes a pre-touch time interval t21 and a post-touch time interval t22. The display mode time interval T3 includes a first post-display time interval t31 and a second post-display time interval t32.
[0083] Within the first sub-pre-display time interval included in the first pre-display time interval t11 (this is the time when the first pre-charge voltage RSTA in the first pre-display time interval t11 is maintained at a low potential), the control terminal of the first switch component TS1 receives a charging voltage U2D at a high potential and switches to the on state, and the control terminals of the first input switch component TP1 and the second switch component TS2 receive a first pre-charge control voltage DHT at a high potential and switch to the on state. As a result, the charging voltage U2D charges a drive control voltage Qn at the control terminal of the output transistor Tm to a high potential pre-charge control voltage value through the conducting first input switch component TP1, causing the output transistor Tm to switch to the on state. However, at this time, a drive input signal OTS coupled to the first end of the second switch component TS2 is at a low potential, so a drive voltage Gn received by multiple transistors in the display device from the second end of the second switch component TS2 is at a low potential.
[0084] Next, when entering the second sub-pre-display time interval of the first pre-display time interval t11 after the end of the first sub-pre-display time interval of the first pre-display time interval t11 (this is the time when the first pre-charge voltage RSTA in the first pre-display time interval t11 is at a high potential), the first pre-charge voltage RSTA changes from a low potential state to a high potential state, and the high potential first pre-charge voltage RSTA pulls up a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 to a high potential through the conducting first switch component TS1 and the second switch component TS2, causing the first switching component TR1 to switch from the switching state to the on state.
[0085] It should be noted that when entering the second pre-display time interval t12 after the end of the first pre-display time interval t11, the first pre-charge control voltage DHT received by the control terminal of the second switch component TS2 changes from a high potential state to a low potential state, causing the second switch component TS2 and the first input switch component TP1 to switch from an on state to an off state. As a result, after a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 is charged to a pre-charge control voltage value (which is a high potential), it is prevented from discharging / leaking the first pre-charge voltage RSTA through the first switch component TS1 and the second switch component TS2. At the same time, the charging voltage U2D stops charging the control terminal of the output transistor Tm.
[0086] It should be noted that when entering the second pre-display time interval t12 after the end of the first pre-display time interval t11, the second switch component TS2, the third switch component TS3, and the fifth switch component TS5 all remain in the off state. In this way, it is prevented that a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 discharges / leaks the first pre-charge voltage RSTA undesirably along a discharge path generated by the first switch component TS1 and the second switch component TS2, or along a discharge path generated by the fourth switch component TS4 and the fifth switch component TS5. At the same time, a drive voltage Gn received by the control terminal of the third switch component TS3 remains at a low potential, causing the third switch component TS3 to remain in the off state to prevent a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 from discharging / leaking the second pre-charge voltage RSTB undesirably through the third switch component TS3.
[0087] It should be noted that when entering a pre-touch time interval t21 after the end of the second pre-display time interval t12, a touch start voltage TPD received by the control terminal of the discharge transistor TD changes from a low potential state to a high potential state, causing a drive control voltage Qn at the control terminal of the output transistor Tm to discharge to a reference potential VSS or be pulled down to a reference potential VSS through the discharge transistor TD. In this way, it is prevented that the control terminal of the output transistor Tm is affected by a DC bias voltage for a long time in the touch mode.
[0088] Furthermore, when a drive control voltage Qn at the control terminal of the output transistor Tm drops from a high potential to a low potential within the second pre-touch display time interval t12, the first pull-down activation transistor TE1 and the fourth pull-down activation transistor TE4 switch from an on state to an off state, causing the first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2 to switch from an off state to an on state. As a result, a drive control voltage Qn at the control terminal of the output transistor Tm and a drive voltage Gn at the second terminal of the output transistor Tm discharge or are pulled down to equal or close to a reference potential VSS through the first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2. In this way, it is possible to more effectively prevent the control terminal of the output transistor Tm from being affected by a DC bias for a long time in the touch mode and generating noise.
[0089] When entering a post-touch time interval t22 after the pre-touch time interval t21 ends, a touch start voltage TPD received at the control terminal of the discharge transistor TD changes from a high potential to a low potential, causing a drive control voltage Qn at the control terminal of the output transistor Tm to stop discharging to a reference potential VSS through the discharge transistor TD. At the same time, the fourth pull-down activation transistor TE4 is turned on by a drive control voltage Qn at a high potential, pulling the control terminals of the first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2 to a low potential reference potential VSS, causing the first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2 to switch from an off state to an on state. At this time, the control terminal and the second terminal of the output transistor Tm stop discharging to the reference potential VSS through the first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2.
[0090] It should be noted that within a post-touch time interval t22, a pre-charge input voltage TPU received at the first terminal of the first switching component TR1 changes from a low potential to a high potential. Since a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 does not leak as described above and can be maintained at a high potential pre-charge control voltage value to keep the first switching component TR1 turned on, the high potential pre-charge input voltage TPU pre-charges a drive control voltage Qn at the control terminal of the output transistor Tm through the turned-on first switching component TR1 and the second switching component TR2.
[0091] When entering the first post-display time interval t31 after the end of a later touch time interval t22, a drive control voltage Qn at the control terminal of the output transistor Tm is coupled upward by a voltage due to the coupling effect of the capacitor C1. The output transistor Tm remains in the on state, and a drive input signal OTS received at the first terminal of the output transistor Tm transitions from a low potential to a high potential, causing a drive voltage Gn of a high potential to be output from the second terminal of the output transistor Tm to the control terminal of the third switch component TS3 and the transistor of the display device.
[0092] When a drive voltage Gn of a high potential is output from the second terminal of the output transistor Tm to the control terminal of the third switch component TS3, the third switch component TS3 switches from the off state to the on state, and a pre-charge switching voltage Pn at the control terminal of the first switching component TR1 discharges a reference potential VSS (e.g., to ground) through the turned-on third switch component TS3.
[0093] When entering the second post-display time interval t32 after the end of the first post-display time interval t31, a discharge control voltage CHT received at the control terminal of the second input switch component TP2 transitions from a low potential to a high potential, causing a discharge voltage D2U of a low potential to pull down a drive control voltage Qn at the control terminal of the output transistor Tm from a high potential to a low potential through the turned-on second input switch component TP2, so as to switch the output transistor Tm from the on state to the off state.
[0094] Furthermore, when a drive control voltage Qn at the control terminal of the output transistor Tm is pulled down to a low potential, the first pull-down activation transistor TE1 and the fourth pull-down activation transistor TE4 switch from the on state to the off state. As a result, a drive control voltage Qn at the control terminal of the output transistor Tm and a drive voltage Gn at the second terminal of the output transistor Tm discharge a reference potential VSS or are pulled down to be equal to or close to a reference potential VSS through the turned-on first voltage pull-down transistor TF1 and the second voltage pull-down transistor TF2. At the same time, an output control voltage XCR received at the control terminal of the third voltage pull-down transistor TF3 transitions from a low potential to a high potential, causing the third voltage pull-down transistor TF3 to conduct, so as to ensure that a drive voltage Gn at the second terminal of the output transistor Tm is pulled down to be equal to a reference potential VSS. In this way, it is possible to more effectively prevent the control terminal of the output transistor Tm from being affected by a DC bias for a long time in the touch mode and generating noise.
[0095] In summary, the present utility model provides a driver circuit capable of preventing electric leakage. The driver circuit capable of preventing electric leakage of the present utility model takes preventive measures against the electric leakage problem of the nodes between multiple transistors in the touch mode. Even under high-temperature operation, the high potential of this node can be maintained, so that when re-entering the display mode from the touch mode, the control terminal of the output transistor can be successfully recharged to the high potential, enabling the second terminal of the output transistor to output a driving voltage to the transistor of the display device. In the driver circuit capable of preventing electric leakage of the present utility model, the control terminal and the second terminal of the output transistor, which is the output component of the driver circuit capable of preventing electric leakage, are maintained at a low potential in the non-operating state to prevent noise generation.
[0096] Furthermore, in the touch mode, the discharge circuit and the voltage drop circuit of the driver circuit capable of preventing electric leakage of the present utility model pull the voltage of the control terminal of the output transistor to a low potential, preventing the control terminal of the output transistor from being affected by a long-term DC bias voltage.
[0097] In addition, the driver circuit capable of preventing electric leakage of the present utility model can also be applied to the forward and reverse bidirectional scanning of a small-sized in-cell touch display, making the touch display panel more flexible, and when operating at low temperature, normal temperature and high temperature, the touch function and the display function are both normal.
[0098] The content disclosed above is only the preferred feasible embodiment of the present utility model, and does not limit the claims of the present utility model. Therefore, all equivalent technical changes made by using the content of the specification and drawings of the present utility model are included in the claims of the present utility model.
Claims
1. A driver circuit capable of preventing leakage, applied to a display device, characterized in that: The driver circuit capable of preventing leakage comprises: A pre-charging circuit, comprising: A first switch component, wherein a first end of the first switch component is coupled to a first pre-charge voltage, and a control end of the first switch component is coupled to a charge voltage; a second switch component, wherein a first end of the second switch component is connected to a second end of the first switch component, and a control end of the second switch component is coupled to a first pre-charge control voltage; and a third switch component, wherein a first end of the third switch component is coupled to a second pre-charge voltage; The pre-charge switching circuit comprises: a first switching component, wherein a first terminal of the first switching component is coupled to a precharge input voltage, and a control terminal of the first switching component is connected to a second terminal of the second switching component and a second terminal of the third switching component; and a second switching component, wherein a first end of the second switching component is connected to a second end of the first switching component and a control end of the second switching component; as well as An output transistor, wherein the first end of the output transistor receives a driving input signal, the control end of the output transistor is coupled to the charging voltage and the second end of the second switching component, and the second end of the output transistor outputs a driving voltage to the control end of the third switching component and one or more transistors of the display device.
2. The driver circuit capable of preventing leakage according to claim 1, characterized in that: The driver circuit capable of preventing leakage further comprises: a fourth switch component, wherein a first terminal of the fourth switch component is coupled to the first pre-charge voltage, and a control terminal of the fourth switch component is coupled to a discharge voltage; and A fifth switch component, wherein a first end of the fifth switch component is connected to a second end of the fourth switch component, a control end of the fifth switch component is coupled to a discharge control voltage, and a second end of the fifth switch component is connected to a control end of the first switch component.
3. The driver circuit capable of preventing leakage according to claim 1, characterized in that: The driver circuit capable of preventing leakage further comprises: A discharge circuit discharges the voltage of the control terminal of the output transistor in a touch mode, wherein the discharge circuit is connected to the control terminal of the output transistor.
4. The driver circuit capable of preventing leakage of electricity according to claim 3, characterized in that: The discharge circuit comprises: A discharge transistor, wherein a first end of the discharge transistor is connected to the control end of the output transistor, a second end of the discharge transistor is coupled to a reference potential, a control end of the discharge transistor is coupled to a touch start voltage, and the discharge transistor is turned on in the touch mode.
5. The driver circuit capable of preventing leakage of electricity according to claim 1, characterized in that: The driver circuit capable of preventing leakage further comprises: A voltage pull-down circuit is provided for pulling down at least one of the voltage of the control terminal and the voltage of the second terminal of the output transistor, wherein the voltage pull-down circuit is connected to the control terminal and the second terminal of the output transistor.
6. The driver circuit capable of preventing leakage of electricity according to claim 5, characterized in that: The voltage pull-down circuit comprises: A first voltage pull-down transistor, wherein the first end of the first voltage pull-down transistor is connected to the second end of the output transistor, the second end of the first voltage pull-down transistor is coupled to a reference potential, and the control end of the first voltage pull-down transistor is coupled to a voltage pull-down control voltage.
7. The driver circuit capable of preventing leakage of electricity according to claim 6, characterized in that: The voltage pull-down circuit comprises: A capacitor, a first end of the capacitor is connected to the first end of the first voltage pull-down transistor and the control end of the output transistor, and a second end of the capacitor is connected to the second end of the output transistor.
8. The driver circuit capable of preventing leakage of electricity according to claim 6, characterized in that: The voltage pull-down circuit further comprises: A second voltage pull-down transistor, wherein the first end of the second voltage pull-down transistor is connected to the second end of the output transistor, the second end of the second voltage pull-down transistor is coupled to the reference potential, and the control end of the second voltage pull-down transistor is coupled to the voltage pull-down control voltage.
9. The driver circuit capable of preventing leakage of electricity according to claim 8, characterized in that: The voltage pull-down circuit further comprises: A third voltage pull-down transistor, wherein the first end of the third voltage pull-down transistor is connected to the second end of the output transistor, the second end of the third voltage pull-down transistor is coupled to the reference potential, and the control end of the third voltage pull-down transistor is coupled to an output control voltage.
10. The driver circuit capable of preventing leakage of electricity according to claim 6, characterized in that: The voltage pull-down circuit further comprises: A voltage pull-down activation circuit of the first voltage pull-down transistor is turned on, wherein the voltage pull-down activation circuit is connected to a control terminal of the first voltage pull-down transistor.
11. The driver circuit capable of preventing leakage of electricity according to claim 10, characterized in that: The voltage pull-down activation circuit comprises: a first pull-down activation transistor, wherein a control terminal of the first pull-down activation transistor is connected to a control terminal of the output transistor; a second pull-down activation transistor, wherein a first terminal and a control terminal of the second pull-down activation transistor are coupled to a common voltage, a second terminal of the second pull-down activation transistor is connected to the first terminal of the first pull-down activation transistor, and a second terminal of the first pull-down activation transistor is coupled to the reference potential; a third pull-down activation transistor, wherein a first terminal of the third pull-down activation transistor is connected and coupled to the common voltage, and a control terminal of the third pull-down activation transistor is connected to a second terminal of the second pull-down activation transistor; as well as A fourth pull-down activation transistor, wherein the first end of the fourth pull-down activation transistor is connected to the second end of the third pull-down activation transistor, the control end of the fourth pull-down activation transistor is connected to the control end of the output transistor, and the second end of the fourth pull-down activation transistor is coupled to the reference potential.
12. The driver circuit capable of preventing leakage of electricity according to claim 1, characterized in that: The driver circuit capable of preventing leakage further comprises: A first input switch component, wherein a first end of the first input switch component is coupled to the charging voltage, a second end of the first input switch component is connected to a control end of the output transistor, and a control end of the first input switch component is coupled to the first pre-charge control voltage.
13. The driver circuit capable of preventing leakage of electricity according to claim 12, characterized in that: The driver circuit capable of preventing leakage further comprises: The second input switch component has a first terminal coupled to a discharge voltage, a second terminal connected to the control terminal of the output transistor, and a control terminal coupled to a discharge control voltage.