Secondary boost circuit and emergency lamp

Abstract

The utility model discloses a secondary boost circuit and an emergency lamp, and relates to the technical field of direct current boost, the secondary boost circuit comprises a first boost circuit, the input end of the first boost circuit is connected with a power supply to be boosted; the second booster circuit comprises a first diode, a second diode, a first capacitor and a second capacitor, one end of the first capacitor is connected with the first output end of the first booster circuit, and the positive electrode of the first diode is connected with the second output end of the first booster circuit; the cathode of the first diode is connected with the other end of the first capacitor and the anode of the second diode, the cathode of the second diode is connected with the anode of the second capacitor for supplying power to the anode of the load after filtering, and the cathode of the second capacitor is grounded; and the modulation output end of the main control chip is connected with the control end of the first booster circuit. The second boost circuit continues to boost the voltage output by the first boost circuit to achieve the effect of secondary boost, so that the finally output voltage is higher.

Description

Technical Field

[0001] The utility model relates to the technical field of DC boost, in particular to a secondary boost circuit and an emergency lamp. Background Art

[0002] The traditional Boost boost circuit is a DC boost circuit. By inputting direct current, a direct current with a higher voltage than the input voltage can be obtained. The Boost boost circuit is widely used in occasions where the supply voltage is lower than the voltage required by the load. Theoretically, the boost ratio of the traditional Boost boost circuit can be very large, but in practical applications, the boost ratio of the traditional Boost boost circuit is limited, and the ratio of the output voltage to the input voltage is difficult to exceed 10, which cannot meet the load's demand for a high boost ratio. Summary of the Utility Model

[0003] The purpose of the utility model is to provide a secondary boost circuit and an emergency lamp, which are provided with a first boost circuit and a second boost circuit. The second boost circuit further boosts the voltage output by the first boost circuit to achieve the effect of secondary boost, so that the finally output voltage is higher.

[0004] To solve the above technical problems, the utility model adopts the following technical solutions:

[0005] One aspect of the embodiment of the utility model provides a secondary boost circuit, which includes: a first boost circuit, the input end of the first boost circuit is connected to the power supply to be boosted; a second boost circuit, the second boost circuit includes a first diode, a second diode, a first capacitor and a second capacitor. One end of the first capacitor is connected to the first output end of the first boost circuit. The positive pole of the first diode is connected to the second output end of the first boost circuit. The negative pole of the first diode is connected to the other end of the first capacitor and the positive pole of the second diode. The negative pole of the second diode is connected to the positive pole of the second capacitor to supply power to the positive pole of the load after filtering, and the negative pole of the second capacitor is grounded; a main control chip, the modulation output end of the main control chip is connected to the control end of the first boost circuit to control the first boost circuit to perform boost work.

[0006] In some embodiments, the first boost circuit includes an inductor, an NMOS transistor, a first resistor, a third diode and a third capacitor. One end of the inductor is connected to the power supply to be boosted. The other end of the inductor is connected to the drain of the NMOS transistor, the positive pole of the third diode and one end of the first capacitor. The gate of the NMOS transistor is connected to the modulation output end of the main control chip and one end of the first resistor. The source of the NMOS transistor and the other end of the first resistor are grounded. The negative pole of the third diode is connected to the positive pole of the third capacitor and the positive pole of the first diode, and the negative pole of the third capacitor is grounded.

[0007] In some embodiments, the second boost circuit further includes a PMOS transistor, a second resistor, and a third resistor. The source of the PMOS transistor is connected to one end of the third resistor, the negative electrode of the third diode, and the positive electrode of the third capacitor. The gate of the PMOS transistor is connected to one end of the second resistor and the other end of the third resistor. The other end of the second resistor is connected to the power supply to be boosted. The drain of the PMOS transistor is connected to the positive electrode of the first diode.

[0008] In some embodiments, the secondary boost circuit further includes a fourth resistor, a fifth resistor, and a fourth capacitor. One end of the fourth resistor is grounded. One end of the fifth resistor and one end of the fourth capacitor are connected to the current detection terminal of the main control chip. The other end of the fourth capacitor is grounded. The other end of the fourth resistor and the other end of the fifth resistor are used to connect to the negative electrode of the load.

[0009] In some embodiments, the secondary boost circuit further includes a fuse. One end of the fuse is connected to one end of the inductor and the other end of the second resistor. The other end of the fuse is used to connect to the power supply to be boosted.

[0010] In some embodiments, the secondary boost circuit further includes a power supply interface and a load interface. The first electrode of the power supply interface is connected to the other end of the fuse. The second electrode of the power supply interface is connected to the ground of the secondary boost circuit. The first electrode of the load interface is connected to the negative electrode of the second diode and the positive electrode of the second capacitor. The second electrode of the load interface is connected to the other end of the fourth resistor and the other end of the fifth resistor.

[0011] One aspect of the embodiments of the present invention provides an emergency lamp. The emergency lamp includes the secondary boost circuit as described above, as well as a battery and a light source. The load interface further includes a third electrode and a fourth electrode. The third electrode of the load interface is connected to the fourth electrode of the load interface to serve as a passive emergency circuit for the light source. The load interface is used to connect to the light source. The power supply interface is used to connect to the battery.

[0012] A secondary boost circuit and an emergency lamp according to an embodiment of the present utility model have at least the following beneficial effects: The present application is provided with a first boost circuit and a second boost circuit. The first boost circuit boosts the power supply to be boosted and then outputs it to the second boost circuit. The second boost circuit further boosts the voltage output by the first boost circuit to achieve the effect of secondary boosting, so that the finally output voltage is higher. The current detection terminal of the main control chip detects whether the working current of the load is normal through the fifth resistor. If the working current of the load is abnormal, the main control chip controls the NMOS transistor to cut off through the modulation output terminal, and the first boost circuit stops boosting. The source voltage and the gate voltage of the PMOS transistor are not much different, and the PMOS transistor cuts off to prevent further damage to the load.

[0013] It should be understood that the above general description and the following detailed description are only exemplary and do not limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0015] Figure 1 It is a schematic diagram of the secondary boost circuit according to the embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0016] The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the drawings in the embodiments of the present utility model. Obviously, the described embodiments are only some of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0017] The terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first", "second", and "third" may explicitly or implicitly include one or more of such features. In the description of the present utility model, unless otherwise specified, the meaning of "a plurality" is two or more.

[0018] In the description of the present utility model, it should be noted that unless otherwise clearly specified and defined, the terms "connected" and "coupled" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0019] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in various forms and should not be construed as limited to the examples set forth herein; rather, these example embodiments are provided so that this disclosure will be more complete and comprehensive, and will fully convey the concept of the example embodiments to those skilled in the art. The drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted.

[0020] The technical solutions of the embodiments of the present application will be briefly described below:

[0021] According to some embodiments, as Figure 1 shown, the present application provides a secondary boost circuit, and the secondary boost circuit includes:

[0022] A first boost circuit, the input end of the first boost circuit is connected to the power supply to be boosted;

[0023] A second boost circuit, the second boost circuit includes a first diode D1, a second diode D2, a first capacitor C1 and a second capacitor C2. One end of the first capacitor C1 is connected to the first output end of the first boost circuit, the positive electrode of the first diode D1 is connected to the second output end of the first boost circuit, the negative electrode of the first diode D1 is connected to the other end of the first capacitor C1 and the positive electrode of the second diode D2, and the negative electrode of the second diode D2 is connected to the positive electrode of the second capacitor C2 for supplying power to the positive electrode of the load after filtering, and the negative electrode of the second capacitor C2 is grounded;

[0024] A main control chip U, the modulation output end PWM of the main control chip U is connected to the control end of the first boost circuit to control the first boost circuit to perform boost operation.

[0025] Specifically, as Figure 1 shown, the power input end of the main control chip U is connected to the power supply VCC and the capacitor C5, and the other end of the capacitor C5 and the grounding end of the main control chip U are both connected to the ground point.

[0026] The working principle of the above embodiment is that the first boost circuit boosts the power supply to be boosted. After boosting, it is output through the first diode D1 and the second diode D2, and jointly completes the secondary boost with the second capacitor C2, and finally outputs to the load. The second boost circuit of the present application further boosts the voltage output by the first boost circuit to achieve the effect of secondary boost, so that the finally output voltage is higher.

[0027] The following further elaborates in detail the preferred embodiments of the present disclosure Figure 1 in conjunction with the accompanying drawings of this specification.

[0028] According to some embodiments, as Figure 1 shown, the first boost circuit includes an inductor L, an NMOS transistor QN, a first resistor R1, a third diode D3, and a third capacitor C3. One end of the inductor L is connected to the power supply to be boosted, and the other end of the inductor L is connected to the drain of the NMOS transistor QN, the positive electrode of the third diode D3, and one end of the first capacitor C1. The gate of the NMOS transistor QN is connected to the modulation output terminal PWM of the main control chip U and one end of the first resistor R1. The source of the NMOS transistor QN and the other end of the first resistor R1 are grounded. The negative electrode of the third diode D3 is connected to the positive electrode of the third capacitor C3 and the positive electrode of the first diode D1, and the negative electrode of the third capacitor C3 is grounded.

[0029] The working principle of the above embodiment is that when the first boost circuit works, the modulation output terminal PWM of the main control chip U outputs a PWM pulse signal to the gate of the NMOS transistor. The main control chip U controls the NMOS transistor QN to turn on, and the inductor L stores energy. Then the main control chip U controls the NMOS transistor QN to turn off, and the inductor L outputs power through the third diode D3, and jointly completes the boost with the third capacitor C3, and finally outputs the power supply after the first boost.

[0030] According to some embodiments, as Figure 1 shown, the second boost circuit further includes a PMOS transistor QP, a second resistor R2, and a third resistor R3. The source of the PMOS transistor QP is connected to one end of the third resistor R3, the negative electrode of the third diode D3, and the positive electrode of the third capacitor C3. The gate of the PMOS transistor QP is connected to one end of the second resistor R2 and the other end of the third resistor R3. The other end of the second resistor R2 is connected to the power supply to be boosted. The drain of the PMOS transistor QP is connected to the positive electrode of the first diode D1.

[0031] Based on the working principle of the above embodiments, when the first boost circuit works, the modulation output terminal PWM of the main control chip U outputs a PWM pulse signal to the gate of the NMOS transistor. The main control chip U controls the NMOS transistor QN to turn on, and the inductor L stores energy. Then, the main control chip U controls the NMOS transistor QN to turn off, and the inductor L outputs power through the third diode D3, and together with the third capacitor C3, completes the boost. At this time, the source voltage of the PMOS transistor QP is higher than the gate voltage, and the PMOS transistor QP conducts, outputting the power after the first boost.

[0032] When the first boost circuit stops working, the main control chip U controls the NMOS transistor QN to be constantly off. At this time, the difference between the source voltage and the gate voltage of the PMOS transistor is not large, and the PMOS transistor is cut off and does not output.

[0033] According to some embodiments, such as Figure 1 As shown, the secondary boost circuit further includes a fourth resistor R4, a fifth resistor R5, and a fourth capacitor C4. One end of the fourth resistor R4 is grounded, one end of the fifth resistor R5 and one end of the fourth capacitor C4 are connected to the current detection terminal I_LED of the main control chip U, the other end of the fourth capacitor C4 is grounded, and the other end of the fourth resistor R4 and the other end of the fifth resistor R5 are used to connect to the negative pole of the load.

[0034] Among them, the main control chip U detects whether the working current of the load is normal through the current detection terminal I_LED. When the working current of the load is abnormal, the main control chip U controls the NMOS transistor QN to turn off through the modulation output terminal PWM, and the first boost circuit stops the boost operation. The difference between the source voltage and the gate voltage of the PMOS transistor QP is not large, and the PMOS transistor QP is cut off to prevent further damage to the load.

[0035] According to some embodiments, such as Figure 1 As shown, the secondary boost circuit further includes a fuse F. One end of the fuse F is connected to one end of the inductor L and the other end of the second resistor R2, and the other end of the fuse F is used to connect to the power supply to be boosted.

[0036] Among them, the fuse F plays a role in overcurrent protection. When the current abnormally rises to a certain level, the fuse F will melt itself to cut off the current and protect the safe operation of the circuit.

[0037] According to some embodiments, such as Figure 1 As shown, the secondary boost circuit further includes a power supply interface and a load interface. The first electrode of the power supply interface is connected to the other end of the fuse F, the second electrode of the power supply interface is connected to the ground of the secondary boost circuit, the first electrode of the load interface is connected to the negative pole of the second diode D2 and the positive pole of the second capacitor C2, and the second electrode of the load interface is connected to the other end of the fourth resistor R4 and the other end of the fifth resistor R5.

[0038] According to some embodiments, such asFigure 1 As shown, the present application provides an emergency lamp, which includes the secondary boost circuit as described above, as well as a battery and a light source. The load interface further includes a third electrode and a fourth electrode. The third electrode of the load interface is short-circuited to the fourth electrode of the load interface to serve as a passive emergency circuit for the light source. The load interface is used to connect the light source, and the power interface is used to connect the battery.

[0039] In some embodiments, the third electrode and the fourth electrode of the load interface are respectively connected to two detection pins of the main control chip, and an emergency switch is provided between the load interface and the main control chip. When there is no emergency, the emergency switch is disconnected, and the circuit of the third electrode and the fourth electrode of the load interface is open; when an emergency occurs, the emergency switch is closed, and the circuit of the third electrode and the fourth electrode of the load interface is closed. The main control chip determines whether it is in an emergency state based on whether the circuit of the third electrode and the fourth electrode of the load interface is closed, so as to control the operation of the light source according to the emergency state.

[0040] In the description of the above embodiments, the specific features, structures, materials or characteristics can be combined in a suitable manner in any one or more embodiments or examples.

[0041] Although the present disclosure has been described with reference to several exemplary embodiments, it should be understood that the terms used are illustrative and exemplary, rather than restrictive. Since the present disclosure can be embodied in many forms without departing from the spirit or essence of the present application, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be broadly construed within the spirit and scope defined by the appended claims. Therefore, all changes and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. A secondary boost circuit, characterized in that: The secondary boost circuit comprises: A first boost circuit, wherein an input end of the first boost circuit is connected to a power source to be boosted; a second boost circuit, wherein the second boost circuit comprises a first diode, a second diode, a first capacitor and a second capacitor, wherein one end of the first capacitor is connected to the first output end of the first boost circuit, the positive electrode of the first diode is connected to the second output end of the first boost circuit, the negative electrode of the first diode is connected to the other end of the first capacitor and the positive electrode of the second diode, the negative electrode of the second diode is connected to the positive electrode of the second capacitor for supplying power to the positive electrode of the load after filtering, and the negative electrode of the second capacitor is grounded; A main control chip, wherein a modulation output end of the main control chip is connected to a control end of the first boost circuit to control the first boost circuit to perform a boost operation.

2. The secondary boost circuit according to claim 1, characterized in that: The first boost circuit includes an inductor, an NMOS tube, a first resistor, a third diode and a third capacitor. One end of the inductor is connected to the power supply to be boosted, the other end of the inductor is connected to the drain of the NMOS tube, the anode of the third diode and one end of the first capacitor, the gate of the NMOS tube is connected to the modulation output end of the main control chip and one end of the first resistor, the source of the NMOS tube and the other end of the first resistor are grounded, the cathode of the third diode is connected to the anode of the third capacitor and the anode of the first diode, and the cathode of the third capacitor is grounded.

3. The secondary boost circuit according to claim 2, characterized in that: The second boost circuit also includes a PMOS tube, a second resistor and a third resistor, the source of the PMOS tube is connected to one end of the third resistor, the negative electrode of the third diode and the positive electrode of the third capacitor, the gate of the PMOS tube is connected to one end of the second resistor and the other end of the third resistor, the other end of the second resistor is connected to the power supply to be boosted, and the drain of the PMOS tube is connected to the positive electrode of the first diode.

4. The secondary boost circuit according to claim 3, characterized in that: The secondary boost circuit also includes a fourth resistor, a fifth resistor and a fourth capacitor, one end of the fourth resistor is grounded, one end of the fifth resistor and one end of the fourth capacitor are connected to the current detection end of the main control chip, the other end of the fourth capacitor is grounded, and the other end of the fourth resistor and the other end of the fifth resistor are used to connect the negative electrode of the load.

5. The secondary boost circuit according to claim 4, characterized in that: The secondary boost circuit further includes a fuse, one end of which is connected to one end of the inductor and the other end of the second resistor, and the other end of the fuse is used to connect to a power source to be boosted.

6. The secondary boost circuit according to claim 5, characterized in that: The secondary boost circuit also includes a power interface and a load interface, the first electrode of the power interface is connected to the other end of the fuse, the second electrode of the power interface is connected to the location of the secondary boost circuit, the first electrode of the load interface is connected to the cathode of the second diode and the anode of the second capacitor, and the second electrode of the load interface is connected to the other end of the fourth resistor and the other end of the fifth resistor.

7. An emergency light, characterized in that: The emergency light includes the secondary boost circuit as described in claim 6, as well as a battery and a light source. The load interface also includes a third electrode and a fourth electrode. The third electrode of the load interface is connected to the fourth electrode of the load interface to serve as a passive emergency circuit of the light source. The load interface is used to connect the light source, and the power interface is used to connect the battery.

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