High-precision synchronizer for transformer substation lightning arrester on-line monitoring system
By introducing pulse delay circuits into the online monitoring system of the substation lightning arrester, the signal delay is adjusted, the synchronization error problem is solved, high-precision synchronization and phase error elimination are achieved, and the accuracy of the monitoring system is improved.
Patent Information
- Application Number
- CN202421215293.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-30
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2034-05-30
AI Technical Summary
In the existing substation lightning arrester online monitoring system, the electrical signal synchronization method is easily affected by environmental interference, and when the RS485 bus line is long, the delay error during synchronization is large, affecting the accuracy of phase angle difference calculation.
The pulse delay circuit is added in the voltage signal acquisition and processing unit and the current signal acquisition and processing unit. By adjusting the signal delay, synchronization error is eliminated, and high-precision synchronization between the units is ensured.
It effectively eliminates synchronization errors caused by inconsistent line and response time, improves the synchronization accuracy of the system, ensures the accuracy of phase errors, and reflects the accuracy of the degree of insulation degradation of the lightning arrester.
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Figure CN223092049U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of on-line monitoring, and particularly relates to a high-precision synchronization device for an on-line monitoring system of a substation lightning arrester. Background Art
[0002] A zinc oxide lightning arrester (MOA) is a device used to protect various power equipment in a power system. It can protect various power equipment connected in parallel thereto from being impacted by abnormally high voltages, thereby ensuring the safe power supply of the entire power system. Therefore, its normal operation plays a very important role in power equipment and even the entire power system. Therefore, the monitoring of the lightning arrester is of great significance. An on-line monitoring system for a lightning arrester generally includes a bus voltage monitoring unit and a zinc oxide lightning arrester monitoring unit; both of these monitoring units need to calculate the phases of their respective monitored signals and perform phase angle differences; the value of this phase angle difference reflects the degree of insulation deterioration of the lightning arrester and has important reference significance. Therefore, these two monitoring units need to be strictly synchronized. The commonly used synchronization method is electrical signal synchronization, which is connected through a cable. However, this synchronization method is easily affected by environmental interference and has poor synchronization time delay, resulting in a large error in the calculated phase angle difference. To solve this problem, a high-precision synchronization device for an on-line monitoring system of a substation lightning arrester solves this problem well. This device can well eliminate the time delay errors caused by lines and devices, making the synchronization between the devices of the on-line monitoring system more accurate; however, this method still has certain defects. When the RS485 bus line is relatively long, the time delay error caused by the line still makes the synchronization between units have a large error. The utility model solves this problem well by adding a pulse time delay circuit in each voltage / current acquisition and processing unit. Summary of the Utility Model
[0003] According to an embodiment of the utility model, there is provided a high-precision synchronization device for an on-line monitoring system of a substation lightning arrester, including: a voltage signal acquisition and processing unit, a plurality of current signal acquisition and processing units, an RS485 bus, and a plurality of pulse time delay circuits;
[0004] The voltage signal acquisition and processing unit is connected to the plurality of current signal acquisition and processing units through the RS485 bus;
[0005] The voltage signal acquisition and processing unit and any one of the current signal acquisition and processing units are each connected to its corresponding pulse time delay circuit.
[0006] Further, the voltage signal acquisition and processing unit includes: a voltage signal acquisition and processing circuit, an interface conversion circuit I, and an interface conversion circuit II;
[0007] One end of the voltage signal acquisition and processing circuit is connected to the input end of the interface conversion circuit I, and the other end is connected to the output end of its corresponding pulse time delay circuit;
[0008] The output end of the first interface conversion circuit is respectively connected to a plurality of current signal acquisition and processing units and the input end of the second interface conversion circuit;
[0009] The output end of the second interface conversion circuit is connected to the input end of its corresponding pulse delay circuit, which is used to convert the RS485 signal into a CMOS level signal.
[0010] Furthermore, any one of the current signal acquisition and processing units includes: a third interface conversion circuit and a current signal acquisition and processing circuit;
[0011] The input end of the third interface conversion circuit is connected to the output end of the first interface conversion circuit, and the output end is connected to the input end of its corresponding pulse delay circuit, which is used to convert the RS485 signal into a CMOS level signal;
[0012] The current signal acquisition and processing circuit is connected to the output end of its corresponding pulse delay circuit.
[0013] According to an embodiment of the present invention, a high-precision synchronization device for an on-line monitoring system of substation lightning arresters, the voltage / current signal acquisition and processing unit obtains a synchronization signal from the same RS485 bus, and adjusts the delay of the synchronization signal input to the voltage / current signal acquisition and processing unit through the pulse delay circuit, which can eliminate the synchronization error between the voltage / each current signal acquisition and processing unit and the last current signal acquisition and processing unit of the bus, so as to accurately match the synchronization of the voltage / each current signal acquisition and processing unit, eliminate the phase error of system measurement, and thus improve the synchronization accuracy of the system.
[0014] It should be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the claimed technology. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 It is a structural block diagram of a high-precision synchronization device for an on-line monitoring system of substation lightning arresters according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS
[0016] Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the present invention will be further elaborated.
[0017] First, it will be combined with Figure 1 Describe a high-precision synchronization device for an on-line monitoring system of substation lightning arresters according to an embodiment of the present invention, which is used in an on-line monitoring system of substation lightning arresters and has a wide range of application scenarios.
[0018] Such as Figure 1As shown in the figure, a high-precision synchronization device for an on-line monitoring system of a substation lightning arrester in an embodiment of the present utility model includes a voltage signal acquisition and processing unit 1, a plurality of current signal acquisition and processing units 2 (numbered n, n = 1, 2, 3....N), an RS485 bus 3, and a plurality of pulse delay circuits 4; the voltage signal acquisition and processing unit 1 is connected to the plurality of current signal acquisition and processing units 2 through the RS485 bus 3; the voltage signal acquisition and processing unit 1 and any one of the current signal acquisition and processing units 2 are respectively connected to their corresponding pulse delay circuits 4.
[0019] Further, as Figure 1 shown, the voltage signal acquisition and processing unit 1 includes: a voltage signal acquisition and processing circuit 11, an interface conversion circuit 12, and an interface conversion circuit 13; one end of the voltage signal acquisition and processing circuit 11 is connected to the input end of the interface conversion circuit 12, and the other end is connected to the output end of its corresponding pulse delay circuit 4; the output end of the interface conversion circuit 12 is respectively connected to the plurality of current signal acquisition and processing units 2 and the input end of the interface conversion circuit 13; the output end of the interface conversion circuit 13 is connected to the input end of its corresponding pulse delay circuit 4, and is used to convert the RS485 signal into a CMOS level signal. In this embodiment, the pulse delay circuit 4 is used to adjust the delay of the synchronization signal received by the interface conversion circuit 13, and the delay time can be set by the voltage signal acquisition and processing circuit 11, so as to eliminate the synchronization error caused by the inconsistency of the line and response time between the voltage signal acquisition and processing unit 1 and the last current signal acquisition and processing unit 2 (numbered N) on the bus.
[0020] Further, any one of the current signal acquisition and processing units 2 includes: an interface conversion circuit 21 and a current signal acquisition and processing circuit 22; the input end of the interface conversion circuit 21 is connected to the output end of the interface conversion circuit 12, and the output end is connected to the input end of its corresponding pulse delay circuit 4, and is used to convert the RS485 signal into a CMOS level signal; the current signal acquisition and processing circuit 22 is connected to the output end of its corresponding pulse delay circuit 4. In this embodiment, the pulse delay circuit 4 is used to adjust the delay of the synchronization signal received by the interface conversion circuit 21, and the delay time can be set by the current signal acquisition and processing circuit 22, so as to eliminate the synchronization error caused by the inconsistency of the line and response time between the current signal acquisition and processing unit 2 and the last current signal acquisition and processing unit 2 (numbered N) on the bus.
[0021] In this embodiment, the output signal of the interface conversion circuit 2 13 returns to the voltage signal acquisition and processing circuit 11 after being delayed by the corresponding pulse delay circuit 4, triggering the latter to acquire the bus voltage signal and calculate the phase of the voltage signal, denoted as A. The output signal of the interface conversion circuit 3 21 reaches the current signal acquisition and processing circuit 22 after being delayed by the corresponding pulse delay circuit 4, triggering the latter to acquire the full current signal of the zinc oxide arrester and calculate the phase of the current signal, denoted as B; then the phase B is sent to the voltage signal acquisition unit 1 through the RS485 bus 3. This ensures that the phase A of the voltage signal and the current phases B of each current signal acquisition and processing unit 2 are free from line delay errors caused by different bus lengths, ensuring high-precision synchronization.
[0022] The voltage signal acquisition and processing unit 1 subtracts the current phase B from the voltage signal phase A to obtain the phase angle difference, i.e., A - B; the value of this phase angle difference reflects the degree of insulation deterioration of the arrester and has important reference significance; for this reason, the voltage signal acquisition and processing unit 1 and each current signal acquisition and processing unit 2 need to be strictly synchronized to eliminate phase errors caused by line delay and the like.
[0023] The specific working principle is as follows:
[0024] Step 1: The voltage signal acquisition and processing circuit 11 of the voltage signal acquisition and processing unit 1 sends a synchronization signal, which is simultaneously sent to the interface conversion circuit 2 13 and the interface conversion circuit 3 21 through the interface conversion circuit 1 12.
[0025] Step 2: The interface conversion circuit 2 13 and the interface conversion circuit 3 21 respectively receive the synchronization signal in Step 1 (denoted as Sa);
[0026] Step 3: The interface conversion circuit 2 13 outputs a synchronization signal (denoted as Sb) to the corresponding pulse delay circuit 4, and this pulse delay circuit 4 delays the synchronization signal Sb to obtain a synchronization signal Sc; the length of the delay time can be set by the voltage signal acquisition and processing circuit 11, for example, it can be set to a 3 us delay; the setting basis is to calculate according to the system response error between the voltage signal acquisition and processing unit 1 and the current signal acquisition and processing unit 2 measured in the laboratory, and the time delay caused by the length difference of the RS485 bus between this unit and the last current signal acquisition and processing unit 2 (numbered N) of the bus.
[0027] Step 4: The synchronization signal Sc generated in Step 3 is input to the voltage signal acquisition and processing circuit 11 as the synchronization acquisition trigger signal for the latter.
[0028] Step 5: The interface conversion circuit two 13 outputs a synchronization signal (denoted as Sd), and the synchronization signal Sd is delayed by the corresponding pulse delay circuit 4 to obtain a synchronization signal Se; the delay time length can be set by the current signal acquisition and processing circuit 22, for example, it can be set to a delay of 2 us; the setting basis is calculated according to the time delay caused by the length difference between this unit and the RS485 bus of the last current signal acquisition and processing unit 2 (numbered N) of the bus.
[0029] Step 6: The synchronization signal Se generated in Step 5 is input to the current signal acquisition and processing circuit 22 as the synchronization acquisition trigger signal of the latter.
[0030] As described above, a high-precision synchronization device for an on-line monitoring system of substation lightning arresters of the present utility model eliminates the synchronization error between the voltage signal acquisition and processing unit 1 and the current signal acquisition and processing unit 2, and improves the measurement accuracy of the system.
[0031] It should be noted that in this specification, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the statement "comprising..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the said element.
[0032] Although the content of the present utility model has been introduced in detail through the above preferred embodiments, it should be recognized that the above description should not be considered as a limitation of the present utility model. After those skilled in the art have read the above content, various modifications and substitutions to the present utility model will be obvious. Therefore, the protection scope of the present utility model should be defined by the appended claims.
Claims
1. A high-precision synchronization device for an on-line monitoring system of substation lightning arresters, characterized in that, It includes: a voltage signal acquisition and processing unit, multiple current signal acquisition and processing units, an RS485 bus, and multiple pulse delay circuits; The voltage signal acquisition and processing unit is connected to the multiple current signal acquisition and processing units through the RS485 bus; The voltage signal acquisition and processing unit and any one of the current signal acquisition and processing units are each connected to its corresponding pulse delay circuit.
2. The high-precision synchronization device for the on-line monitoring system of substation lightning arresters according to claim 1, characterized in that, The voltage signal acquisition and processing unit includes: a voltage signal acquisition and processing circuit, an interface conversion circuit one, and an interface conversion circuit two; One end of the voltage signal acquisition and processing circuit is connected to the input end of the interface conversion circuit one, and the other end is connected to the output end of its corresponding pulse delay circuit; The output end of the interface conversion circuit one is respectively connected to the multiple current signal acquisition and processing units and the input end of the interface conversion circuit two; The output end of the interface conversion circuit two is connected to the input end of its corresponding pulse delay circuit, and is used for converting the RS485 signal into a CMOS level signal.
3. The high-precision synchronization device for the on-line monitoring system of substation lightning arresters according to claim 2, characterized in that, Any one of the current signal acquisition and processing units includes: an interface conversion circuit three, a pulse delay circuit, and a current signal acquisition and processing circuit; The input end of the interface conversion circuit three is connected to the output end of the interface conversion circuit one, and the output end is connected to the input end of its corresponding pulse delay circuit, and is used for converting the RS485 signal into a CMOS level signal; The current signal acquisition and processing circuit is connected to the output end of its corresponding pulse delay circuit.