Edge ring
The edge ring with a specific angle and dimensions addresses uneven etch rates and contamination issues in plasma etching by enhancing uniformity and durability, thus reducing maintenance and improving production efficiency.
Patent Information
- Application Number
- CN202421942862.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-09
- Publication Date
- 2025-07-15
- Estimated Expiration
- 2034-08-09
AI Technical Summary
In the plasma etching process of semiconductor structures, when the wafer is fixed on the electrostatic chuck, the radio frequency electric field cannot be concentrated, resulting in uneven etching rate and the wafer bearing surface is susceptible to plasma bombardment, causing contamination of the electrostatic chuck. The unreasonable design of the edge ring structure leads to a short service life and a high cleaning frequency.
An edge ring is designed, with the angle between the inner side and the first direction being less than 45 degrees, the size of the first and second parts is larger, which increases the distance between the wafer and the edge ring, reduces contact and sediment peeling, and is connected to the radio frequency power supply to provide uniform electric field distribution.
Extend the service life of edge rings, reduce cleaning frequency, improve etching efficiency and reliability, and reduce production costs.
Smart Images
Figure CN223108839U_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of semiconductor technology, and particularly to an edge ring. Background Art
[0002] When performing a plasma etching process on a semiconductor structure, a wafer needs to be fixed at the bottom of an etching chamber. To reduce the damage to the wafer caused by the wafer fixing means, an Electro-Static Chuck (ESC) has been proposed as a wafer fixing device. The ESC uses electrostatic attraction to adsorb the wafer to fix, support, and transfer the wafer in the etching chamber. However, the area of the wafer is smaller than the area of the wafer bearing surface of the ESC, which may cause the radio frequency electric field not to be concentrated on the wafer surface. There may be a difference in the etching rate between the central part and the edge part of the wafer, and the exposed wafer bearing surface is vulnerable to plasma bombardment, resulting in contamination of the ESC. Summary of the Utility Model
[0003] In view of this, an embodiment of the present disclosure provides an edge ring, which includes an inner side surface, an outer side surface, a top surface, and a bottom surface; wherein,
[0004] The inner side surface includes a first part intersecting with a first direction, and a second part connected to both the first part and the top surface; the included angle between the second part and the first direction is less than 45 degrees; the first direction is the thickness direction of the edge ring.
[0005] In an optional embodiment, the included angle between the second part and the first direction ranges from 20 degrees to 30 degrees.
[0006] In an optional embodiment, the intersection line between the first part and the second part is circular, and the diameter of the circle ranges from 298 millimeters to 305 millimeters.
[0007] In an optional embodiment, the thickness of the edge ring in the first direction ranges from 7 millimeters to 8 millimeters.
[0008] In an optional embodiment, the dimension of the second part in the first direction ranges from 4 millimeters to 5 millimeters.
[0009] In an optional embodiment, the edge ring surrounds a wafer bearing device; the second part surrounds the wafer bearing surface of the wafer bearing device; the wafer bearing surface is perpendicular to the first direction; the width of the first part in a second direction is greater than twice the minimum distance between the first part and the wafer bearing surface in the second direction; the second direction is perpendicular to the first direction.
[0010] In an alternative embodiment, the edge of the wafer located on the wafer carrying surface protrudes beyond the side surface of the wafer carrying device; the first part includes a first sub-part located directly below the wafer in the first direction and a second sub-part connected to the first sub-part; the width of the second sub-part in the second direction is greater than the width of the first sub-part in the second direction.
[0011] In an alternative embodiment, the inner side surface further includes a third part connected to both the first part and the bottom surface, and the third part intersects the bottom surface.
[0012] In an alternative embodiment, the edge ring is located in the etching machine and surrounds the electrostatic chuck in the etching machine.
[0013] In an alternative embodiment, the edge ring is grounded or connected to a radio frequency power supply.
[0014] In the technical solution provided by the present disclosure, an edge ring is provided. The included angle between the second part of the inner side surface of the edge ring and the first direction is small. When the radial dimension of the bottom surface of the edge ring remains unchanged, the radial dimension of the first part of the edge ring, the dimension of the second part in the first direction, and the diameter of the circular boundary line between the first part and the second part are all large. On the one hand, the large dimension of the second part in the first direction can increase the loss margin of the edge ring, thereby extending the service life of the edge ring; on the other hand, the large radial dimension of the first part and the large diameter of the circular boundary line can increase the distance between the second part and the wafer, thereby reducing the possibility that the wafer contacts the edge ring and causes the material deposited on the back and side surfaces of the wafer to flake off and contaminate the edge ring. Thus, the service life of the edge ring can be further extended and the cleaning frequency of the edge ring can be reduced. Description of the Drawings
[0015] Figure 1 It is a top view of the edge ring provided by an embodiment of the present disclosure;
[0016] Figure 2 is Figure 1 a cross-sectional view along line AA';
[0017] Figure 3 It is a cross-sectional view of the wafer carrying device and the edge ring provided by an embodiment of the present disclosure;
[0018] Figure 4 It is a cross-sectional comparison diagram of the edge ring provided by an embodiment of the present disclosure and the edge ring provided by the related art;
[0019] Figure 5 It is a cross-sectional view of the edge ring provided by another embodiment of the present disclosure. Detailed Embodiments
[0020] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the specific embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure can be more thoroughly understood and the scope of the present disclosure can be fully conveyed to those skilled in the art.
[0021] In the following description, numerous specific details are given to provide a more thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that the present disclosure may be practiced without one or more of these details. In other instances, some well-known technical features are not described in order to avoid obscuring the present disclosure; that is, not all features of the actual embodiments are described here, and the well-known functions and structures are not described in detail.
[0022] In the drawings, the same reference numerals throughout the drawings indicate the same elements.
[0023] It should be understood that spatial relationship terms such as "under", "below", "beneath", "underneath", "above", "over", etc. may be used herein for convenience in describing the relationship of one element or feature shown in the drawings to other elements or features. It should be understood that, in addition to the orientation shown in the drawings, spatial relationship terms are intended to include different orientations of the device during use and operation. For example, if the device in the drawings is flipped, then an element or feature described as "under" or "beneath" or "underneath" other elements or features will be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptive terms used herein are to be interpreted accordingly.
[0024] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.
[0025] When performing a plasma etching process on a semiconductor structure, the wafer needs to be fixed at the bottom of the etching chamber. To reduce the damage to the wafer caused by the wafer fixing means, it has been proposed to use an Electro-Static Chuck (ESC) as the wafer fixing device to replace the traditional mechanical fixture. The ESC uses electrostatic attraction to adsorb the wafer to fix, support, and transfer the wafer in the etching chamber. In addition, the ESC can also be used as the lower electrode, which is disposed opposite to the upper electrode provided on the inner wall of the etching chamber. At least one of the upper electrode and the lower electrode is connected to a radio frequency power supply, so that a radio frequency electric field can be formed between the upper electrode and the lower electrode. After the reaction gas is introduced into the etching chamber, it can be excited into plasma in the radio frequency electric field, and the plasma can further contact and react with the surface of the wafer fixed on the ESC to achieve plasma etching of the wafer.
[0026] In some examples, the area of the wafer is smaller than the area of the wafer bearing surface of the ESC, which may cause the radio frequency electric field not to be concentrated on the wafer surface. The etching rate at the center of the wafer may be different from the etching rate at the edge of the wafer, and the exposed wafer bearing surface is vulnerable to plasma bombardment, resulting in contamination of the ESC.
[0027] To solve the above problems, an Edge Ring is proposed. The Edge Ring can include a material similar to the material properties of the wafer. In the etching chamber, the Edge Ring can be disposed around the wafer. On the one hand, it can concentrate the radio frequency electric field on the wafer surface to minimize the difference between the etching rate at the center of the wafer and the etching rate at the edge; on the other hand, the Edge Ring can also protect the wafer bearing surface of the ESC from plasma bombardment.
[0028] In some embodiments, a plasma etching process can be applied to form a channel structure in a three-dimensional NAND type memory. The formation process of the channel structure includes forming a channel hole that extends vertically and penetrates through a multi-layer stack structure by using the plasma etching process. As the storage density of the memory increases, the number of layers of the stack structure increases exponentially, and the aspect ratio of the channel holes to be formed further increases. In order to form channel holes with a higher aspect ratio, the energy of the radio frequency power supply used in the etching chamber also needs to be increased accordingly. However, the increase in the energy of the radio frequency power supply will result in a shortened service life of components including the edge ring, and both the replacement frequency of the components and the maintenance frequency of the etching chamber will increase, thereby increasing the production cost. In addition, during the formation of a three-dimensional NAND type memory, for example, during the process of forming a multi-layer stack structure by using a deposition process, materials are also likely to be deposited on the back and side surfaces of the wafer. In the etching chamber, the deposited materials on the back and side surfaces of the wafer are likely to peel off from the wafer and contaminate components including the edge ring, thereby also increasing the cleaning frequency or replacement frequency of the edge ring. Therefore, it is necessary to further improve the structure of the edge ring to extend the service life of the edge ring.
[0029] In response to this, the present disclosure proposes the following embodiments.
[0030] An embodiment of the present disclosure provides an edge ring, including an inner side surface, an outer side surface, a top surface, and a bottom surface; wherein, the inner side surface includes a first portion intersecting with a first direction, and a second portion connected to both the first portion and the top surface; the angle between the second portion and the first direction is less than 45 degrees; the first direction is the thickness direction of the edge ring.
[0031] Figure 1 is a top view of the edge ring provided by an embodiment of the present disclosure, Figure 2 is Figure 1 a cross-sectional view along line AA', and line AA' passes through the center O of the edge ring. With reference to Figure 1 and Figure 2 , the edge ring includes an inner side surface 100, an outer side surface 104, a top surface 105, and a bottom surface 106; wherein, the inner side surface 100 includes a first portion 101 intersecting with the first direction, and a second portion 102 connected to both the first portion 101 and the top surface 105; the angle a between the second portion 102 and the first direction is less than 45 degrees; the first direction is the thickness direction of the edge ring. Here, taking the first direction as the Z direction as an example.
[0032] In some specific examples, the angle range of the angle a between the second portion 102 and the first direction is from 20 degrees to 30 degrees.
[0033] In a specific example, the angle a between the second portion 102 and the first direction is 24.7 degrees.
[0034] In some specific examples, with reference toFigure 1 and Figure 2 For Figure 2 , the boundary line between the first part 101 and the second part 102 is circular, and the diameter D1 of the circle ranges from 298 millimeters to 305 millimeters.
[0035] In a specific example, the diameter D1 of the circle is 302 millimeters.
[0036] In some specific examples, the thickness T1 of the edge ring in the first direction ranges from 7 millimeters to 8 millimeters.
[0037] In a specific example, the thickness T1 of the edge ring in the first direction is 7.4 millimeters.
[0038] In some specific examples, the dimension T2 of the second part 102 in the first direction ranges from 4 millimeters to 5 millimeters.
[0039] In some specific examples, as Figure 2 shown, the first part 101 is perpendicular to the first direction.
[0040] In some embodiments, as Figure 3 shown, the edge ring surrounds the wafer carrier device 201; the second part 102 surrounds the wafer carrier surface 200 of the wafer carrier device 201 and the wafer 202 placed on the wafer carrier surface 200; the wafer carrier surface 200 is perpendicular to the first direction; the width S4 of the first part 101 in the second direction is greater than twice the minimum distance S3 between the first part 101 and the wafer carrier surface 200 in the second direction; the second direction is perpendicular to the first direction. Here, taking the second direction as the X direction as an example.
[0041] In some embodiments, continuing to refer to Figure 3 , the edge of the wafer 202 located on the wafer carrier surface 200 protrudes from the side surface of the wafer carrier device 201; the first part 101 includes a first sub - part located directly below the wafer 202 in the first direction and a second sub - part connected to the first sub - part; the width S2 of the second sub - part in the second direction is greater than the width S1 of the first sub - part in the second direction.
[0042] In the embodiments of the present disclosure, the first part 101 of the inner side surface 100 of the edge ring has a relatively large dimension in the radial direction of the edge ring, and the dimension of the second sub - part of the first part 101 in the radial direction is greater than the dimension of the first sub - part located directly below the wafer 202 in the radial direction. Thus, a relatively large distance can be provided between the second part 102 and the wafer 202, thereby reducing the possibility that the wafer 202 comes into contact with the edge ring and causing the material deposited on the back and side surfaces of the wafer 202 to flake off and contaminate the edge ring, prolonging the service life of the edge ring and reducing the cleaning frequency of the edge ring.
[0043] It should be noted that, in the embodiments of the present disclosure, with reference to Figure 2 , the radial direction of the edge ring is any direction passing through the center O of the edge ring and perpendicular to the Z direction. For example, the radial direction of the edge ring can be the X direction in the figure.
[0044] Figure 4 FIG. is a cross-sectional comparison diagram of the edge ring provided by the embodiments of the present disclosure and the edge ring provided by the related art. With reference to Figure 2 and Figure 4 , the included angle b between the inclined part of the inner side surface of the edge ring provided by the related art and the first direction is greater than the included angle a between the second part 102 of the edge ring provided by the embodiments of the present disclosure and the first direction, and the included angle a is less than 45 degrees, and the included angle b is greater than 45 degrees; the dimension of the inclined part of the inner side surface of the edge ring provided by the related art in the first direction is T3, which is less than the dimension T2 of the second part 102 of the edge ring provided by the embodiments of the present disclosure in the first direction.
[0045] With reference to Figure 1 , Figure 2 , Figure 3 and Figure 4 , since the included angle a between the second part 102 of the inner side surface 100 of the edge ring provided by the embodiments of the present disclosure and the first direction is small, when the radial dimension of the bottom surface of the edge ring remains unchanged, the radial dimension S4 of the first part 101 of the edge ring, the dimension T2 of the second part 102 in the first direction, and the diameter D1 of the circular intersection line between the first part 101 and the second part 102 are all large. On the one hand, the larger dimension of the second part 102 in the first direction can increase the loss margin of the edge ring, thereby extending the service life of the edge ring; on the other hand, the larger radial dimension of the first part 101 and the larger diameter of the circular intersection line can increase the distance between the second part 102 and the wafer 202, thereby reducing the possibility that the wafer 202 contacts the edge ring and causes the material deposited on the back and side surfaces of the wafer 202 to peel off and contaminate the edge ring, thereby further extending the service life of the edge ring and reducing the cleaning frequency of the edge ring; on the other hand, the larger diameter of the circular intersection line between the first part 101 and the second part 102 can improve the cleaning efficiency when cleaning the edge ring through WAC (Waferless Auto Clean). In summary, the edge ring provided by the present disclosure can extend the service life, reduce the cleaning frequency and improve the cleaning efficiency, thereby reducing the production cost and improving the production efficiency.
[0046] In some embodiments, with reference back to Figure 2 , the inner side surface 100 further includes a third part 103 connected to both the first part 101 and the bottom surface 106, and the third part 103 intersects the bottom surface 106. Here, it is taken as an example that the third part 103 is perpendicular to both the bottom surface 106 and the first part 101.
[0047] In some other embodiments, Figure 5 is a cross-sectional view of the edge ring provided by the present disclosure. The edge ring may include an outer side surface 304, a top surface 305, a bottom surface 306, and an inner side surface. The inner side surface may include a first portion 301, a second portion 302, and a third portion 303. Among them, the angle between the second portion 302 and the first direction is less than 45 degrees. The first portion 301 may intersect with the first direction, and the angle between the first portion 301 and the third portion 303 may be an obtuse angle. Thus, the distance between the inner side surface of the edge ring and the wafer 202 located on the wafer carrier device 201 can be further increased, and the possibility that the wafer 202 contacts the edge ring and causes the material deposited on the back and side surfaces of the wafer 202 to flake off and contaminate the edge ring can be further reduced. Therefore, the service life of the edge ring can be further extended and the cleaning frequency of the edge ring can be reduced.
[0048] In some specific examples, the edge ring provided in the above embodiments may be located in an etching machine tool, and the etching machine tool may be a plasma etching machine tool. The etching machine tool may include an etching chamber. The wafer carrier device 201 may be an electrostatic chuck for carrying the wafer in the etching chamber. The electrostatic chuck can use electrostatic attraction to adsorb the wafer to fix, support, and transfer the wafer in the etching chamber. After the electrostatic chuck transfers the wafer into the etching chamber and sets it at the position where plasma etching is performed, the edge ring can be arranged around the electrostatic chuck and the wafer.
[0049] In some embodiments, the edge ring located in the plasma etching machine tool may be grounded or connected to a radio frequency power supply. In some specific examples, the edge ring and the lower electrode located in the electrostatic chuck are both connected to the radio frequency power supply, so that a radio frequency electric field can be formed between the upper electrode and the lower electrode, and between the upper electrode and the edge ring, minimizing the difference in the electric field intensity between the central part and the edge part of the wafer.
[0050] In some embodiments, during the movement of the electrostatic chuck carrying the wafer, since the angle between the second part of the edge ring and the first direction is less than 45 degrees, and the size of the first part of the edge ring in the radial direction is larger, and the diameter of the circular intersection line between the first part and the second part is larger, the possibility that the wafer contacts the edge ring and causes the material deposited on the back and side surfaces of the wafer to flake off and contaminate the edge ring is relatively low. Thus, the service life of the edge ring can be extended and the cleaning frequency of the edge ring can be reduced. In addition, since the size of the second part of the edge ring in the first direction is larger, the edge ring has a larger loss margin when performing the plasma etching process. Therefore, when a larger radio frequency power is required to form a channel hole with a higher aspect ratio, the replacement frequency of the edge ring can also be relatively low. Thus, the edge ring provided by the present disclosure can reduce the cost of the plasma etching process and improve the efficiency and reliability of the plasma etching process.
[0051] The features disclosed in several device embodiments provided by the present disclosure can be combined arbitrarily without conflict to obtain new device embodiments.
[0052] As mentioned above, the above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present disclosure can easily think of changes or substitutions, which should all be covered within the protection scope of the present disclosure.
Claims
1. An edge ring, characterized in that, The edge ring includes an inner side surface, an outer side surface, a top surface, and a bottom surface; wherein, The inner side surface includes a first portion intersecting with the first direction, and a second portion connected to both the first portion and the top surface; the included angle between the second portion and the first direction is less than 45 degrees; the first direction is the thickness direction of the edge ring.
2. The edge ring according to claim 1, wherein The angle range of the included angle between the second portion and the first direction is from 20 degrees to 30 degrees.
3. The edge ring according to claim 1, characterized in that, The intersection line between the first portion and the second portion is circular, and the diameter range of the circle is from 298 millimeters to 305 millimeters.
4. The edge ring according to claim 1, wherein The thickness range of the edge ring in the first direction is from 7 millimeters to 8 millimeters.
5. The edge ring according to claim 1, wherein The dimension range of the second portion in the first direction is from 4 millimeters to 5 millimeters.
6. The edge ring according to claim 1, wherein The edge ring surrounds the wafer carrier; the second portion surrounds the wafer carrying surface of the wafer carrier; the wafer carrying surface is perpendicular to the first direction; the width of the first portion in the second direction is greater than twice the minimum distance between the first portion and the wafer carrying surface in the second direction; The second direction is perpendicular to the first direction.
7. The edge ring according to claim 6, wherein The edge of the wafer located on the wafer carrying surface protrudes from the side surface of the wafer carrier; the first portion includes a first sub-portion located directly below the wafer in the first direction and a second sub-portion connected to the first sub-portion; the width of the second sub-portion in the second direction is greater than the width of the first sub-portion in the second direction.
8. The edge ring according to claim 1, characterized in that, The inner side surface further includes a third portion connected to both the first portion and the bottom surface, and the third portion intersects with the bottom surface.
9. The edge ring according to claim 1, wherein The edge ring is located in the etching machine table and surrounds the electrostatic chuck in the etching machine table.
10. The edge ring according to claim 9, characterized in that, The edge ring is grounded or connected to a radio frequency power supply.