Digital channel time delay measuring device, digital board and testing machine

Abstract

The utility model relates to a digital channel time delay measuring device, a digital board and a testing machine, and the device comprises a driving unit which is connected with a transmitting channel of the digital board and outputs a jump edge signal to the transmitting channel; the jump edge detection unit is connected with the sampling channel of the digital board, and performs jump edge detection on a jump edge signal returned by the sampling channel based on a clock signal of a 1 / 4 clock period of the signal source; and the control unit is connected with the jump edge detection unit and is used for recording the detection times of the jump edge detection unit when the jump edge detection unit detects the jump edge so as to be used for calculating the channel time delay, the operation is simple, convenient and rapid, and the operation convenience is improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor testing technologies, and particularly to a digital channel delay measurement device, a digital board, and a tester. Background Art

[0002] Semiconductor automatic testing refers to detecting various parameter indicators of a device under test (DUT) using automatic test equipment (ATE), and rejecting defective products to control the ex-factory quality of the test device. When the tester performs multi-channel data signal transmission, due to individual differences in components and wiring differences in different paths, the transmission delays will be different, and there will be a phase difference when multi-channel digital signals reach the receiving end. Therefore, it is necessary to correct the differences in transmission delays of each channel. The traditional method for measuring channel delay is to measure the deviation by manually connecting the calibration measurement signal to the input channel in a loop one by one. The scheme is complex and cumbersome, time-consuming, and has the disadvantage of low operation convenience. Summary of the Utility Model

[0003] Based on this, in view of the above problems, it is necessary to provide a digital channel delay measurement device, a digital board, and a tester that can improve operation convenience.

[0004] The first aspect of this application provides a digital channel delay measurement device, including:

[0005] A driving unit, connected to the sending channel of the digital board, and outputting a transition signal to the sending channel;

[0006] A transition detection unit, connected to the sampling channel of the digital board, and performing transition detection on the transition signal returned by the sampling channel based on a clock signal of 1 / 4 clock period of the signal source;

[0007] A control unit, connected to the transition detection unit, and recording the detection times of the transition detection unit when the transition detection unit detects a transition; the detection times are used to calculate the channel delay.

[0008] In one embodiment, the control unit is connected to a sending delay unit in the sending channel and a sampling delay unit in the sampling channel; the control unit adjusts the sending delay unit and the sampling delay unit so that the transition detection unit detects a transition; the detection times, the setting parameters of the sending delay unit, and the sampling delay unit are used to calculate the channel delay.

[0009] In one embodiment, the digital board includes multiple groups of transmission channels and sampling channels. The transmission channel and the sampling channel in the same group are connected and the ends are suspended. The driving unit and the edge transition detection unit are respectively connected to the transmission channel and the sampling channel in the same group.

[0010] In one embodiment, the digital channel delay measurement device further includes a connection device. The digital board includes multiple groups of transmission channels and sampling channels. The transmission channels and sampling channels in different groups are connected through the connection device. The driving unit and the edge transition detection unit are respectively connected to the transmission channels and sampling channels in different groups.

[0011] In one embodiment, the connection device is a relay.

[0012] In one embodiment, the driving unit, the edge transition detection unit, and the control unit are arranged in the same FPGA (Field-Programmable Gate Array).

[0013] The second aspect of the present application provides a digital board, including a transmission channel, a sampling channel, and the above digital channel delay measurement device.

[0014] In one embodiment, the transmission delay unit in the transmission channel includes an IDELAY unit and an ODELAY unit, and / or the sampling delay unit in the sampling channel includes an IDELAY unit and an ODELAY unit.

[0015] The third aspect of the present application provides a testing machine, including a communication board and the above digital board. The communication board is connected to the edge transition detection unit of the digital board and outputs a working clock to the edge transition detection unit.

[0016] In one embodiment, the testing machine further includes a host computer. The control unit in the digital board is connected to the host computer and adjusts the transmission delay unit and the sampling delay unit according to the instructions sent by the host computer.

[0017] For the above digital channel delay measurement device, digital board, and testing machine, by sending an edge transition signal of the driving unit to the transmission channel of the digital board, and using the edge transition detection unit to perform edge transition detection on the edge transition signal returned by the sampling channel based on the clock signal of 1 / 4 clock cycle of the signal source, a larger adjustment range can be supported. When the edge transition detection unit detects an edge transition, the control unit records the number of detections output by the driving unit for calculating the channel delay. The operation is simple and fast, improving the operation convenience. Description of the Drawings

[0018] Figure 1It is a block diagram of a digital channel delay measurement device in an embodiment;

[0019] Figure 2 It is a waveform schematic diagram of a digital channel delay measurement device in an embodiment;

[0020] Figure 3 It is a structural schematic diagram of a digital channel delay measurement device in an embodiment;

[0021] Figure 4 It is a structural schematic diagram of a digital channel delay measurement device in another embodiment. Specific implementation manners

[0022] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0023] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field to which the present application belongs. The terms used in the specification of the present application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application.

[0024] It can be understood that "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is an electrical signal or data transfer between the connected circuits, modules, units, etc.

[0025] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprise / include" or "have" etc. specify the presence of the stated features, wholes, operations, components, parts or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, operations, components, parts or combinations thereof.

[0026] In one embodiment, as Figure 1 shown, a digital channel delay measurement device is provided, which includes a driving unit 110, a transition edge detection unit 120 and a control unit 130. The driving unit 110 is connected to the transmission channel 210 of the digital board and outputs a transition edge signal to the transmission channel 210; the transition edge detection unit 120 is connected to the sampling channel 220 of the digital board and performs transition edge detection on the transition edge signal returned by the sampling channel 220 based on a clock signal of 1 / 4 clock period of the signal source. The control unit 130 is connected to the transition edge detection unit 120. When the transition edge detection unit 120 detects a transition edge, the control unit 130 records the detection times of the transition edge detection unit 120, and the detection times are used to calculate the channel delay.

[0027] Among them, the driving unit 110, the edge transition detection unit 120, and the control unit 130 can be set in the same FPGA 100, which is convenient for measuring operation control. The edge transition signal can be a rising edge signal or a falling edge signal. The control unit 130 can also be connected to the driving unit 110 to control the driving unit 110 to output an edge transition signal. An external signal source outputs a working clock to the edge transition detection unit 120 and can also output a working clock to the control unit 130. Based on the working clock output by the signal source, one cycle of the working clock can be equally divided into four phase intervals, and each phase interval serves as one cycle of the clock signal, which can expand the adjustment range and is convenient for test adjustment. The edge transition detection unit 120 can trigger an edge transition detection action once at the rising edge of the clock signal and can also send the clock signal to the driving unit 110 so that the driving unit 110 and the edge transition detection unit 120 execute actions synchronously. After power-on initialization, the control unit 130 synchronously controls the driving unit 110 to output an edge transition signal and controls the edge transition detection unit 120 to perform edge transition detection based on the clock signal of 1 / 4 clock cycle of the signal source. After the edge transition signal is output through the sending channel 210, it returns to the edge transition detection unit 120 through the sampling channel 220.

[0028] Furthermore, as Figure 3 shown, the control unit 130 is also connected to the transmission delay unit 212 in the sending channel 210 and the sampling delay unit 222 in the sampling channel 220; the control unit 130 adjusts the transmission delay unit 212 and the sampling delay unit 222 so that the edge transition detection unit 120 detects an edge transition, and the detection times, the set parameters of the transmission delay unit 212, and the sampling delay unit 222 are used to calculate the channel delay.

[0029] Among them, the control unit 130 can be connected to the host computer, feed back the detection result of the edge detection unit 120 to the host computer, adjust the transmission delay unit 212 and the sampling delay unit 222 according to the instructions sent by the host computer. The signal output delay can be adjusted through the transmission delay unit 212, and the signal sampling delay can be adjusted through the sampling delay unit 222. Specifically, taking the edge signal as a rising edge signal as an example, if the edge detection unit 120 detects an edge, the channel delay t can be directly determined according to the recorded number of detections; if the edge detection unit 120 detects a high level, the transmission delay unit 212 and the sampling delay unit 222 can be finely adjusted at the picosecond level. By repeatedly adjusting the signal output delay and the signal acquisition delay until the edge detection unit 120 detects an edge, so as to measure the channel delay t. Among them, the dichotomy method can be used to adjust the delay of the transmission delay unit 212 and the sampling delay unit 222. For example, first select the middle value of the set delay range for the delay. If no edge is detected, then select the middle value between the middle value and the lower limit value of the set delay range for the delay, and so on until an edge is detected.

[0030] The types of the transmission delay unit 212 and the sampling delay unit 222 are not unique. Taking the case where both the transmission delay unit 212 and the sampling delay unit 222 include an IDELAY unit and an ODELAY unit as an example, the control unit 130 changes the delay time of the IDELAY unit and the ODELAY by adjusting the TAP values of the IDELAY unit and the ODELAY.

[0031] As Figure 2 shown, Domain clk is the working clock output by the signal source, 1 / 4Domain clk is the clock signal used by the edge detection unit 120 for edge detection, and capture is the level signal detected by the edge detection unit 120. It can be that the control driving unit 110 outputs an edge signal at the first rising edge of the clock signal. The edge detection unit 120 triggers an edge detection action based on each subsequent rising edge of the clock signal. If the edge detection unit 120 detects a high level, the TAP values of the IDELAY unit and the ODELAY unit are adjusted according to the instructions of the host computer to extend the signal transmission time. After the edge detection unit 120 detects an edge, the control unit 130 records the number of detections N when the edge detection unit 120 detects an edge, that is, the number of cycles of the clock signal. At this time, the duration determined based on the duration of a single cycle of the clock signal and the number of detections N is the sum of the channel delay t and the delay time of the IDELAY unit and the ODELAY unit. Therefore, it is necessary to subtract the delay time of the IDELAY unit and the ODELAY unit to obtain the channel delay t. The specific calculation method of the channel delay t is:

[0032] t = N * (1 / 4domain) – iodelay * n

[0033] Wherein, N is the number of detections of the edge detection unit 120, domain is the duration of a single cycle of the working clock output by the signal source, iodelay is the delay time corresponding to a single tap value, and n is the number of tap values set by the transmission delay unit 212 and the sampling delay unit 222.

[0034] After the edge detection unit 120 detects an edge, it can be that the control unit 130 calculates the channel delay t according to the number of detections of the edge detection unit 120, the transmission delay unit 212, and the setting parameters of the sampling delay unit 222; or it can be that the control unit 130 uploads the number of detections of the edge detection unit 120, the transmission delay unit 212, and the setting parameters of the sampling delay unit 222 to the host computer, and the host computer calculates the channel delay t. In addition, after calculating the channel delay t once, the sampling can be adjusted multiple times to calculate the channel delay t, and the average value of the channel delays t calculated multiple times is calculated to obtain a more accurate delay measurement result.

[0035] In one embodiment, as Figure 3 shown, the digital board includes multiple groups of transmission channels 210 and sampling channels 220. The transmission channels 210 and sampling channels 220 in the same group are connected and the ends are left floating. The driving unit 110 and the edge detection unit 120 are respectively connected to the transmission channels 210 and sampling channels 220 in the same group. By transmitting signals and sampling signals on the transmission channels 210 and sampling channels 220 in the same group, the delay between the transmission channels 210 and sampling channels 220 in the same group can be measured, which is convenient for calibrating the channel signals in the same group.

[0036] In another embodiment, as Figure 4As shown, the digital channel delay measurement device further includes a connection device 140. The digital board includes multiple groups of transmission channels 210 and sampling channels 220. Different groups of transmission channels 210 and sampling channels 220 are connected through the connection device 140. The driving unit 110 and the edge detection unit 120 are respectively connected to different groups of transmission channels 210 and sampling channels 220. For example, the digital board includes the transmission channels 210 and sampling channels 220 of group A, and the transmission channels 210 and sampling channels 220 of group B. The connection device 140 can be used to connect the transmission channels 210 of group A to the sampling channels 220 of group B. The driving unit 110 is connected to the transmission channels 210 of group A to output an edge signal, and the edge detection unit 120 is connected to the sampling channels 220 of group B to receive the edge signal, so as to measure the delay between different groups of transmission channels 210 and sampling channels 220, which is convenient for calibrating the channel signals of different groups. The specific type of the connection device 140 is not unique either. In this embodiment, the connection device 140 is a relay.

[0037] In one embodiment, a digital board is further provided, which includes a transmission channel, a sampling channel, and the above digital channel delay measurement device. Among them, the transmission delay unit in the transmission channel includes an IDELAY unit and an ODELAY unit. The sampling delay unit in the sampling channel includes an IDELAY unit and an ODELAY unit.

[0038] In one embodiment, a testing machine is further provided, which includes a communication board and the above digital board. The communication board is connected to the edge detection unit of the digital board and outputs a working clock to the edge detection unit through an internal signal source.

[0039] Furthermore, the testing machine may further include a host computer. The control unit in the digital board is connected to the host computer and adjusts the transmission delay unit and the sampling delay unit according to the instructions sent by the host computer. The host computer can be but is not limited to various personal computers, laptop computers, smart phones, tablet computers, and portable wearable devices. The portable wearable device can be a smart watch, a smart bracelet, a head-mounted device, etc.

[0040] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0041] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation to the scope of the utility model patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the appended claims.

Claims

1. A digital channel delay measurement device, characterized in that, Comprising: A driving unit, connected to the transmission channel of the digital board, and outputting a transition edge signal to the transmission channel; A transition edge detection unit, connected to the sampling channel of the digital board, and performing transition edge detection on the transition edge signal returned by the sampling channel based on a clock signal with a 1 / 4 clock cycle of the signal source; A control unit, connected to the transition edge detection unit, and recording the detection times of the transition edge detection unit when the transition edge detection unit detects a transition edge; the detection times are used to calculate the channel delay.

2. The digital channel delay measurement device according to claim 1, characterized in that, The control unit is connected to the transmission delay unit in the transmission channel and the sampling delay unit in the sampling channel; the control unit adjusts the transmission delay unit and the sampling delay unit so that the transition edge detection unit detects a transition edge; the detection times, the setting parameters of the transmission delay unit, and the sampling delay unit are used to calculate the channel delay.

3. The digital channel delay measurement device according to claim 1, wherein The digital board includes multiple groups of transmission channels and sampling channels. The transmission channel and the sampling channel in the same group are connected and the ends are left floating. The driving unit and the transition edge detection unit are respectively connected to the transmission channel and the sampling channel in the same group.

4. The digital channel delay measurement device according to claim 1, wherein It further includes a connecting device. The digital board includes multiple groups of transmission channels and sampling channels. The transmission channels and sampling channels in different groups are connected through the connecting device. The driving unit and the transition edge detection unit are respectively connected to the transmission channels and sampling channels in different groups.

5. The digital channel delay measurement device according to claim 4, wherein The connecting device is a relay.

6. The digital channel delay measurement device according to any one of claims 1-5, characterized in that The driving unit, the transition edge detection unit, and the control unit are arranged on the same FPGA.

7. A digital board, characterized in that, Comprising a transmission channel, a sampling channel, and the digital channel delay measurement device according to any one of claims 1-6.

8. The digital board according to claim 7, characterized in that, The transmission delay unit in the transmission channel includes an IDELAY unit and an ODELAY unit, and / or the sampling delay unit in the sampling channel includes an IDELAY unit and an ODELAY unit.

9. A testing machine, characterized in that, Comprising a communication board and the digital board according to claim 7 or 8. The communication board is connected to the transition edge detection unit of the digital board and outputs a working clock to the transition edge detection unit.

10. The testing machine according to claim 9, characterized in that, It further includes a host computer. The control unit in the digital board is connected to the host computer and adjusts the transmission delay unit and the sampling delay unit according to the instructions sent by the host computer.

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