High-voltage interlocking detection circuit

Abstract

According to the high-voltage interlocking detection circuit provided by the utility model, each high-voltage connecting device is connected in series, so that each high-voltage connecting device only needs to be connected with one AD analog interface, and meanwhile, the two MEC circuits, the switching circuit and the low-pass filter circuit are combined, and the control unit controls the switching circuit, so that the control of the high-voltage connecting devices is realized; therefore, the occupancy rate of the interlocking circuit to the AD analog interface resource of the control unit is reduced, and insufficient supply of the AD analog interface resource of the control unit is avoided, so that the demand on the AD analog interface resource of the control unit is remarkably reduced, and the overall resource utilization rate of the system is optimized.

Description

Technical Field

[0001] The utility model belongs to the technical field of power electronics, and more specifically, particularly relates to a high-voltage interlock detection circuit. Background Art

[0002] The high-voltage interlock system uses an electrical low-voltage signal to detect the integrity of the high-voltage connectors of an electric vehicle. Once it detects a loop, open circuit, or damaged connection in the high-voltage system, the high-voltage interlock detection system triggers an alarm, prompting the high-voltage power supply to quickly disconnect to ensure the safety of the vehicle occupants.

[0003] Currently, two high-voltage connectors are respectively connected to the AD analog interface of a microprocessor through their respective corresponding high-voltage interlock interface circuits; that is, the microprocessor can receive the signals of the two high-voltage connectors through the two AD analog interfaces respectively, and further judge the integrity of the high-voltage connectors.

[0004] However, the AD analog interfaces of the microprocessor are relatively few, while the digital interfaces are relatively many. The existing technology occupies 2 AD analog interfaces, which may cause a problem of insufficient supply of the AD analog interface resources of the microprocessor. Summary of the Utility Model

[0005] In view of this, the purpose of the utility model is to provide a high-voltage interlock detection circuit for realizing high-voltage interlock detection with fewer AD analog interfaces.

[0006] The present application discloses a high-voltage interlock detection circuit, including: an interlock circuit, a first EMC circuit, a second EMC circuit, a clamping circuit, a switching circuit, and a low-pass filter circuit;

[0007] The interlock circuit includes at least two high-voltage connectors; both ends of the series connection of each high-voltage connector are respectively used as the interlock output end and the interlock input end of the interlock circuit;

[0008] The interlock output end and the interlock input end of the interlock circuit are respectively connected to a power supply; and the first EMC circuit is arranged at the interlock output end of the interlock circuit, and the second EMC circuit is arranged at the interlock input end of the interlock circuit;

[0009] The interlock input end of the interlock circuit is sequentially connected to the AD analog interface of the control unit through the low-pass filter circuit and the input end of the clamping circuit; the clamping circuit includes two clamping ends respectively connected to the power supply and the ground;

[0010] The interlock input end of the interlock circuit is also connected to the ground through the switching circuit;

[0011] The control end of the switching circuit is connected to the output interface of the control unit.

[0012] Optionally, the EMC circuit includes: a filter capacitor and a transient voltage suppression diode;

[0013] One end of the filter capacitor is connected to one end of the transient voltage suppression diode, and the connection point is connected to the interlock output end or the interlock input end of the interlock circuit;

[0014] The other end of the filter capacitor and the other end of the transient voltage suppression diode are both grounded.

[0015] Optionally, the switch circuit includes: a first current limiting resistor, a pull-down resistor, a second current limiting resistor, and a switching transistor;

[0016] One end of the first current limiting resistor is connected to the interlock input end of the interlock circuit;

[0017] One end of the switching transistor is connected to the other end of the first current limiting resistor;

[0018] The control end of the switching transistor is respectively connected to one end of the pull-down resistor and one end of the second current limiting resistor;

[0019] The other end of the switching transistor and the other end of the pull-down resistor are both grounded;

[0020] The other end of the second current limiting resistor is connected to the output interface of the control unit.

[0021] Optionally, the switching transistor is an NMOS transistor.

[0022] Optionally, the low-pass filter circuit includes: a low-pass filter resistor and a low-pass filter capacitor;

[0023] One end of the low-pass filter resistor is connected to the interlock input end of the interlock circuit;

[0024] The other end of the low-pass filter resistor is connected to one end of the low-pass filter capacitor, and the connection point is connected to the clamping circuit;

[0025] The other end of the low-pass filter capacitor is grounded.

[0026] Optionally, the clamping circuit includes: a first clamping sub-circuit and a second clamping sub-circuit;

[0027] One end of the first clamping sub-circuit is connected to one end of the second clamping sub-circuit, and the connection point is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit;

[0028] The other end of the first clamping sub-circuit serves as a clamping end of the clamping circuit and is connected to the power supply;

[0029] The other end of the second clamping sub-circuit serves as another clamping end of the clamping circuit and is grounded.

[0030] Optionally, the first clamping sub-circuit includes a first clamping diode;

[0031] The anode of the first clamping diode is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit;

[0032] The cathode of the first clamping diode is connected to the power supply.

[0033] Optionally, the second clamping sub-circuit includes a second clamping diode;

[0034] The anode of the second clamping diode is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit;

[0035] The cathode of the second clamping diode is grounded.

[0036] Optionally, a first current limiting circuit and a second current limiting circuit are further included;

[0037] The first current limiting circuit is arranged between the interlock output end of the interlock circuit and the power supply;

[0038] The second current limiting circuit is arranged between the interlock input end of the interlock circuit and the power supply.

[0039] Optionally, the first current limiting circuit includes a third current limiting resistor; the second current limiting circuit includes a fourth current limiting resistor.

[0040] As can be seen from the above technical solutions, for a high-voltage interlock detection circuit provided by the present utility model, each high-voltage connection device is in series, so that each high-voltage connection device only needs to be connected to one AD analog interface. At the same time, in combination with two MEC circuits, a switch circuit, and a low-pass filter circuit, the control unit controls the high-voltage connection device by controlling the switch circuit, reducing the occupancy rate of the AD analog interface resources of the control unit by the interlock circuit, avoiding insufficient supply of the AD analog interface resources of the control unit, thereby significantly reducing the demand for the AD analog interface resources of the control unit and optimizing the overall resource utilization rate of the system. Description of the Drawings

[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0042] Figure 1 It is a schematic diagram of a high-voltage interlock detection circuit provided by an embodiment of the present utility model;

[0043] Figure 2 It is a schematic diagram of another high-voltage interlock detection circuit provided by an embodiment of the present utility model;

[0044] Figure 3 It is a schematic diagram of another high-voltage interlock detection circuit provided by an embodiment of the present utility model;

[0045] Figure 4 It is a schematic diagram of another high-voltage interlock detection circuit provided by an embodiment of the present utility model;

[0046] Figure 5 It is a schematic diagram of another high-voltage interlock detection circuit provided by an embodiment of the present utility model;

[0047] Figure 6 It is a schematic diagram of another high-voltage interlock detection circuit provided by an embodiment of the present utility model. Detailed implementation manners

[0048] To make the objectives, technical solutions and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are some but not all of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts shall fall within the protection scope of the present utility model.

[0049] In this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device including a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "including a..." does not exclude the presence of additional identical elements in the process, method, article or device including the element. In addition, the terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of this application and the above accompanying drawings are used to distinguish similar objects and do not necessarily describe a specific order or sequence. It should be understood that such data can be interchanged under appropriate circumstances so that the embodiments of this application described herein can be implemented in an order other than those illustrated or described herein.

[0050] The embodiment of the present application provides a high-voltage interlock detection circuit, which is used to solve the problem in the prior art that two AD analog interfaces are occupied, which may cause a shortage of supply of the microprocessor in the AD analog interface resources.

[0051] NMOS transistor: N-channel metal oxide semiconductor field effect transistor.

[0052] Diode: An electronic device made of semiconductor materials (such as silicon, selenium, germanium, etc.). When a forward voltage is applied between the two poles of the diode, the diode conducts. When a reverse voltage is applied, the diode cuts off.

[0053] TVS: Transient voltage suppression diode, which can be used to protect devices or circuits from electrostatic breakdown.

[0054] AD: Analog-to-digital conversion, that is, converting an analog signal into a digital signal; it can collect voltage values and convert the voltage values into digital signals so as to be recognized by the control unit.

[0055] See Figure 1 , the high-voltage interlock detection circuit includes: an interlock circuit 10, a first EMC circuit 20, a second EMC circuit 30, a clamping circuit 60, a switching circuit 40, and a low-pass filter circuit 50.

[0056] The interlock circuit 10 includes at least two high-voltage connectors (such as Figure 1 the shown high-voltage connector 11, high-voltage connector 12... high-voltage connector 1n); both ends after the series connection of each high-voltage connector are respectively used as the interlock output end and the interlock input end of the interlock circuit 10.

[0057] High-voltage connectors are key components in electric vehicles and other high-voltage electrical systems, and they are responsible for safely and reliably transmitting electric power between high-voltage systems.

[0058] Specifically, taking n high-voltage connectors as an example, n is an integer greater than 1; one interlock terminal of the first high-voltage connector 11 is used as the interlock output end of the interlock circuit 10; the other interlock terminal of the first high-voltage connector 11 is connected to one interlock terminal of the second high-voltage connector 12, and the other interlock terminal of the second high-voltage connector 12 is connected to one interlock terminal of the third high-voltage connector (not shown), and so on. The other interlock terminal of the (n - 1)th high-voltage connector (not shown) is connected to one interlock terminal of the nth high-voltage connector 1n, and the other interlock terminal of the nth high-voltage connector 1n is used as the interlock input end of the interlock circuit 10.

[0059] The interlock circuit 10 is a safety protection mechanism, which is usually used in high-voltage equipment to ensure that when the equipment is working, the high-voltage part is correctly isolated to prevent personnel from contacting dangerous voltages.

[0060] The interlock output terminal and the interlock input terminal of the interlock circuit 10 are respectively connected to the power supply; and a first EMC circuit 20 is provided at the interlock output terminal of the interlock circuit 10, and a second EMC circuit 30 is provided at the interlock input terminal of the interlock circuit 10.

[0061] Specifically, the interlock output terminal of the interlock circuit 10 is connected to the power supply, that is, the floating end after the first high-voltage connector 11 is connected in series with other high-voltage connectors is connected to the power supply; the interlock input terminal of the interlock circuit 10 is connected to the power supply, that is, the floating end after the nth high-voltage connector 1n is connected in series with other high-voltage connectors is connected to the power supply.

[0062] The interlock input terminal of the interlock circuit 10 is sequentially connected to the AD analog interface of the control unit 70 through a low-pass filter circuit 50 and a clamping circuit 60; the clamping circuit 60 includes two clamping terminals respectively connected to the power supply and the ground.

[0063] The control unit 70 may be a microprocessor, and of course it may also be other controllers, which will not be elaborated here one by one and can be determined according to the actual situation, and all are within the protection scope of this application.

[0064] Specifically, the interlock input terminal of the interlock circuit 10 is connected to the first end of the low-pass filter circuit 50, and the second end of the low-pass filter circuit 50 is respectively connected to the first end of the clamping circuit 60 and the AD analog interface of the control unit 70. The grounding end of the low-pass filter circuit 50 is grounded.

[0065] The clamping circuit 60 includes two clamping terminals. Specifically, the first clamping terminal of the clamping circuit 60 is connected to the power supply, and the second clamping terminal of the clamping circuit 60 is grounded. That is to say, the clamping circuit 60 can clamp the voltage of the AD analog interface of the control unit 70 to the power supply voltage VCC or the ground voltage; this ground voltage can be a voltage of 0V, and of course other situations are not excluded.

[0066] Specifically, when the interlock input wire harness (the wire harness where the interlock input terminal is located) is connected to the positive pole of the low-voltage battery, the clamping circuit 60 limits the voltage entering the AD analog interface to around the power supply voltage VCC (usually 5V). When a negative voltage appears on the interlock input wire harness (connected to the negative pole of the low-voltage battery), the voltage of the AD analog interface is limited to around the ground voltage (0V), thus playing a protective role.

[0067] The AD analog interface can achieve mode conversion, that is, an interface for converting analog signals into digital signals. This interface can collect voltage values and convert the voltage values into digital signals for recognition by the control unit 70.

[0068] That is to say, the connection between the control unit 70 and the interlock circuit 10 only requires an AD analog interface, which can avoid occupying too many AD analog interfaces, prevent resource shortage of the control unit 70, and improve the resource utilization rate of the control unit 70. That is, if the same function can be achieved with fewer AD analog interfaces, more resources of the control unit 70 can be saved for other functions.

[0069] The low-pass filter circuit 50 is an electronic filter circuit that allows low-frequency signals to pass through while blocking or attenuating signals above a specific frequency. In electronics, the low-pass filter circuit 50 is widely used in fields such as signal processing, audio processing, video processing, and communication systems.

[0070] The interlock input terminal of the interlock circuit 10 is also connected to the ground through the switch circuit 40.

[0071] The control terminal of the switch circuit 40 is connected to the output interface of the control unit 70.

[0072] That is to say, the control unit 70 can control the on / off of the switch circuit 40 through its own output interface. Then, when needed, the interlock circuit 10 can be pulled down to the ground through the switch circuit 40 to avoid high-voltage faults from harming the staff. This output interface is the Output interface, which is a non-AD analog interface and is a digital output interface.

[0073] That is, the control of the switch circuit 40 uses the output interface instead of the AD analog interface, avoiding the problem of resource waste caused by using too many AD analog interfaces.

[0074] In this embodiment, each high-voltage connection device is connected in series, so that each high-voltage connection device only needs to be connected to one AD analog interface. At the same time, in combination with two MEC circuits, the switch circuit 40, and the low-pass filter circuit 50, the control unit 70 controls the high-voltage connection device by controlling the switch circuit 40, reducing the occupancy rate of the AD analog interface resources of the control unit 70 by the interlock circuit 10, avoiding insufficient supply of the AD analog interface resources of the control unit 70, thus significantly reducing the demand for the AD analog interface resources of the control unit 70 and optimizing the overall resource utilization rate of the system.

[0075] Optionally, the EMC circuit includes: a filtering capacitor and a transient voltage suppression diode.

[0076] One end of the filtering capacitor is connected to one end of the transient voltage suppression diode, and the connection point is connected to the interlock output terminal or the interlock input terminal of the interlock circuit 10; that is to say, one end of the filtering capacitor and the transient voltage suppression diode are both connected to the interlock output terminal or the interlock input terminal of the interlock circuit 10.

[0077] The other end of the filtering capacitor and the other end of the transient voltage suppression diode are both grounded.

[0078] The filtering capacitor and the transient voltage suppression diode can be used as filtering and anti-static components to filter out interference and static electricity on the wire harness where the interlock output terminal and the interlock input terminal are located.

[0079] Both the first EMC circuit 20 and the second EMC circuit 30 include a filtering capacitor and a transient voltage suppression diode.

[0080] Specifically, refer to Figure 2 , the first EMC circuit 20 includes a first filtering capacitor C1 and a first transient voltage suppression diode D1; one end of the first filtering capacitor C1 is connected to one end of the first transient voltage suppression diode D1, and the connection point is connected to the interlock output terminal of the interlock circuit 10; that is to say, one end of the first filtering capacitor C1 and the first transient voltage suppression diode D1 are both connected to the interlock output terminal of the interlock circuit 10. The other end of the first filtering capacitor C1 and the other end of the first transient voltage suppression diode D1 are both grounded. The first filtering capacitor C1 and the first transient voltage suppression diode D1 can be used as filtering and anti-static components to filter out interference and static electricity on the wire harness where the interlock output terminal is located.

[0081] Refer to Figure 2 , the second EMC circuit 30 includes a second filtering capacitor C2 and a second transient voltage suppression diode D2; one end of the second filtering capacitor C2 is connected to one end of the second transient voltage suppression diode D2, and the connection point is connected to the interlock input terminal of the interlock circuit 10; that is to say, one end of the second filtering capacitor C2 and the second transient voltage suppression diode D2 are both connected to the interlock input terminal of the interlock circuit 10. The other end of the second filtering capacitor C2 and the other end of the second transient voltage suppression diode D2 are both grounded. The second filtering capacitor C2 and the second transient voltage suppression diode D2 can be used as filtering and anti-static components to filter out interference and static electricity on the wire harness where the interlock input terminal is located.

[0082] Optionally, refer to Figure 3 , the switch circuit 40 includes: a first current-limiting resistor R3, a pull-down resistor R6, a second current-limiting resistor R5, and a switch transistor Q1.

[0083] One end of the first current-limiting resistor R3 is connected to the interlock input terminal of the interlock circuit 10.

[0084] One end of the switch transistor Q1 is connected to the other end of the first current-limiting resistor R3.

[0085] The control terminal of the switch transistor Q1 is respectively connected to one end of the pull-down resistor R6 and one end of the second current-limiting resistor R5.

[0086] The other end of the switching transistor Q1 and the other end of the pull-down resistor R6 are both grounded.

[0087] The other end of the second current-limiting resistor R5 is connected to the output interface of the control unit 70.

[0088] When the output interface of the control unit 70 outputs a high potential, the switching transistor Q1 conducts, similar to a switch being closed. When the output interface of the control unit 70 outputs a low potential, the switching transistor Q1 turns off, similar to a switch being opened. The resistor second limits the current flowing through the switching transistor Q1, and the pull-down resistor R6 ensures that when there is no output from the output interface of the control unit 70, the switching transistor Q1 is in the off state.

[0089] Optionally, the switching transistor Q1 is an NMOS transistor. Of course, it does not rule out the use of other transistors, which will not be elaborated here one by one and are all within the protection scope of this application.

[0090] One end of the first current-limiting resistor R3 is directly connected to the input node of the interlock circuit 10. This interlock mechanism ensures the safety and stability of the circuit when switching between different states. This design helps prevent sudden increases in current and potential damage to subsequent components.

[0091] The switching transistor Q1, as a key control element in the circuit, has one connection point connected to the other end of the first current-limiting resistor R3. The on-off switching of the circuit is achieved through the switching transistor Q1, so that the control unit 70 can control according to the state of the switching transistor Q1, and detect the voltage signal of its own AD analog interface when the switching transistor Q1 is in different states, thereby realizing the judgment of the state of the interlock circuit 10, such as whether there are integrity problems in the interlock circuit 10, whether it is connected to the positive and negative poles of the low-voltage battery, etc.

[0092] The control terminal of the switching transistor Q1 cleverly adopts a double protection measure: on the one hand, the control terminal of the switching transistor Q1 is connected to the ground through the pull-down resistor R6, ensuring that when there is no external control signal, the switching transistor Q1 is in a stable default state (usually the off state), preventing accidental current flow; on the other hand, the introduction of the second current-limiting resistor R5, one end of the second current-limiting resistor R5 is connected to the control terminal of the switching transistor Q1, and the other end of the second current-limiting resistor R5 is connected to the output interface of the control unit 70. This design not only limits the current flowing to the control terminal of the switching transistor Q1, preventing damage caused by overcurrent, but also ensures that the control signal can be accurately transmitted to the switching transistor Q1 to achieve precise circuit control.

[0093] It should be noted that the other end of the switching transistor Q1 and the other end of the pull-down resistor R6 are both firmly grounded. This design not only provides a stable reference potential for the circuit, but also completes the closed loop of the current through the ground loop, ensuring the normal operation of the circuit.

[0094] In this embodiment, the switch circuit 40 realizes effective control of the interlock circuit 10 through components such as a current-limiting resistor, a switching transistor Q1, and a pull-down resistor R6, ensuring both the safety of the circuit and improving the overall reliability and stability. The control signal sent by the control unit 70 through the output interface acts on the control terminal of the switching transistor Q1 after passing through the second current-limiting resistor R5, thereby achieving precise control of the circuit on and off.

[0095] Optionally, referring to Figure 4 , the low-pass filter circuit 50 includes: a low-pass filter resistor R4 and a low-pass filter capacitor C3.

[0096] One end of the low-pass filter resistor R4 is connected to the interlock input terminal of the interlock circuit 10. This design aims to smoothly transmit the signal to the interlock mechanism through the filtering effect, reduce the interference of high-frequency noise, and ensure that the interlock circuit 10 can work accurately and stably.

[0097] The other end of the low-pass filter resistor R4 is connected to one end of the low-pass filter capacitor C3, and the connection point is connected to the clamping circuit 60. The other end of the low-pass filter resistor R4 is connected to one end of the low-pass filter capacitor C3, forming a key node of a low-pass filter network. This connection point not only carries the filtered signal but also serves as a bridge to transmit the filtered signal to the clamping circuit 60. The role of the clamping circuit 60 is to further stabilize the signal and prevent it from exceeding the predetermined safety range, thereby protecting the subsequent circuit from damage.

[0098] The other end of the low-pass filter capacitor C3 is grounded, which not only provides the necessary reference potential for the filter capacitor but also completes the transfer and balance of charges during the filtering process through the ground loop, ensuring the realization of the filtering effect.

[0099] That is to say, the circuit structure composed of the low-pass filter resistor R4 and the low-pass filter capacitor C3 filters the interlock input signal, can filter out high-frequency signals, and provides a strong guarantee for the safe and reliable operation of the interlock circuit 10 and subsequent circuits.

[0100] Optionally, the clamping circuit 60 includes: a first clamping sub-circuit and a second clamping sub-circuit.

[0101] One end of the first clamping sub-circuit is connected to one end of the second clamping sub-circuit, and the connection point is respectively connected to the output terminal of the low-pass filter circuit 50 and the AD analog interface of the control unit 70.

[0102] The other end of the first clamping sub-circuit serves as a clamping terminal of the clamping circuit 60 and is connected to the power supply.

[0103] The other end of the second clamping sub-circuit serves as another clamping terminal of the clamping circuit 60 and is grounded.

[0104] That is to say, the first clamping sub-circuit can clamp the voltage of the AD analog interface of the control unit 70 to the power supply voltage VCC; the second clamping sub-circuit can clamp the voltage of the AD analog interface of the control unit 70 to the ground voltage.

[0105] To further improve the stability and protection ability of the circuit, the present application introduces a clamping circuit 60, which is composed of two independent but cooperative clamping sub-circuits. These two sub-circuits ensure the safe operation of the AD analog interface of the control unit 70.

[0106] Specifically, one ends of the first clamping sub-circuit and the second clamping sub-circuit are connected to each other to form a common connection point. This connection point is connected to the output end of the low-pass filter circuit 50 (i.e., the common end of the low-pass filter resistor R4 and the low-pass filter capacitor C3) and the AD analog interface of the control unit 70. Such a design ensures that the signal output from the low-pass filter circuit 50 can be directly and simultaneously monitored and regulated by the two clamping sub-circuits.

[0107] Furthermore, the other end of the first clamping sub-circuit serves as a clamping end of the clamping circuit 60 and is directly connected to the power supply. Its function is that when the voltage of the AD analog interface has an upward trend and exceeds the preset power supply voltage VCC threshold, the first clamping sub-circuit will respond quickly and clamp the voltage at the safe power supply voltage VCC level to prevent overvoltage damage.

[0108] The other end of the second clamping sub-circuit serves as another clamping end of the clamping circuit 60 and is grounded. When the voltage of the AD analog interface has a downward trend and may be lower than the ground potential, the second clamping sub-circuit will intervene in time and clamp the voltage at zero potential, effectively avoiding potential damage to the circuit caused by negative voltage.

[0109] Optionally, refer to Figure 5 , the first clamping sub-circuit includes a first clamping diode D3.

[0110] The anode of the first clamping diode D3 is respectively connected to the output end of the low-pass filter circuit 50 and the AD analog interface of the control unit 70. The cathode of the first clamping diode D3 is connected to the power supply.

[0111] Optionally, refer to Figure 5 , the second clamping sub-circuit includes a second clamping diode D4.

[0112] The anode of the second clamping diode D4 is respectively connected to the output end of the low-pass filter circuit 50 and the AD analog interface of the control unit 70. The cathode of the second clamping diode D4 is grounded.

[0113] That is to say, the first clamping sub-circuit and the second clamping sub-circuit can be implemented using clamping diodes, such as the first clamping diode D3 and the second clamping diode D4. The anode of the first clamping diode D3 is connected to the above-mentioned common connection point, and its cathode is connected to the power supply. In this way, when the voltage exceeds the power supply voltage VCC, the first clamping diode D3 conducts, limiting the voltage to the power supply voltage VCC. Similarly, the anode of the second clamping diode D4 is also connected to the common connection point, but its cathode is grounded to provide clamping protection when the voltage is too low.

[0114] In this embodiment, through the application of two independent clamping sub-circuits and diode elements, dual protection is provided for the AD analog interface of the control unit 70, ensuring the stable operation and long-term reliability of the circuit in a complex environment.

[0115] Optionally, it further includes a first current-limiting circuit and a second current-limiting circuit.

[0116] The first current-limiting circuit is arranged between the interlock output end of the interlock circuit 10 and the power supply.

[0117] The second current-limiting circuit is arranged between the interlock input end of the interlock circuit 10 and the power supply.

[0118] To ensure the stable operation of the interlock circuit 10 and effectively prevent current overload, the present application sets current-limiting protection measures at the interlock output end and the interlock input end of the interlock circuit 10. Specifically, the first current-limiting circuit is set between the interlock output end of the interlock circuit 10 and the power supply, forming a key protection barrier. Similarly, the second current-limiting circuit is set between the interlock input end of the interlock circuit 10 and the power supply, further enhancing the current management ability of the circuit.

[0119] Optionally, the first current-limiting circuit includes a third current-limiting resistor R1; the second current-limiting circuit includes a fourth current-limiting resistor R2.

[0120] That is to say, current-limiting resistors can be used to implement the current function of the current-limiting circuit. Specifically, the first current-limiting circuit can include a third current-limiting resistor R1, which limits the current passing through the interlock output end through its specific resistance characteristics to ensure that it does not exceed the preset safety threshold. Similarly, the second current-limiting circuit can implement its function through the fourth current-limiting resistor R2 to effectively regulate the current at the interlock input end and prevent damage to the circuit due to excessive current.

[0121] It should be noted that the current-limiting resistor, the low-pass filter resistor R4, and the pull-down resistor R6 can be of the same type, and their resistance values can be the same or different, and no specific limitation is made here.

[0122] The overall safety and reliability are improved by configuring a current-limiting resistor, and stable performance and efficient operation can also be maintained in the face of different working conditions and load changes. By reasonably selecting the resistance value of the current-limiting resistor, the current distribution and energy conversion efficiency of the circuit can be further optimized, providing strong support for the efficient operation of the entire system. The following describes the normal use of the wire harness of the interlock circuit 10, problems with its integrity, and the situation when it is connected to the positive and negative poles of the low-voltage battery:

[0123] When the system is powered on, the interlock output wire harness (the wire harness where the interlock output terminal is located) is connected to the power supply, and the power supply reaches the interlock input wire harness (the wire harness where the interlock input terminal is located) through the interlock terminal on the high-voltage connector. When the switch circuit 40 is in the off state, the voltage collected by the AD analog interface is the first voltage value, and when the switch circuit 40 is in the on state, the voltage collected by the AD analog interface is the third voltage value. The first voltage value can be 5V; the third voltage value can be 3.3V.

[0124] When there is a problem with the integrity of the high-voltage connector, the interlock input wire harness and the interlock output wire harness are in a disconnected state. When the switch circuit 40 is in the off state, the voltage collected by the AD analog interface is the first voltage value, and when the switch circuit 40 is in the on state, the voltage collected by the AD analog interface is the fourth voltage value. The fourth voltage value can be 2.5V.

[0125] When the interlock input wire harness and the interlock output wire harness are insulated and aged and damaged and connected to the positive pole of the battery, when the switch circuit 40 is in the off state, the voltage collected by the AD analog interface is the first voltage value, and when the switch circuit 40 is in the on state, the voltage collected by the AD analog interface is also the first voltage value.

[0126] When the interlock input wire harness and the interlock output wire harness are insulated and aged and damaged and connected to the vehicle frame (negative pole of the low-voltage battery), when the switch circuit 40 is in the off state, the voltage collected by the AD analog interface is the second voltage value, and when the NMOS transistor is in the on state, the voltage collected by the AD analog interface is also the second voltage value. The second voltage value can be 0V.

[0127] The first voltage value, the second voltage value, the third voltage value, and the fourth voltage value are different voltage values, and their specific values are not specifically limited here and can be determined according to the actual situation, and all are within the protection scope of this application.

[0128] The first voltage value can be understood as the power supply voltage VCC value, the second voltage value can be understood as the ground voltage value; the third voltage value can be calculated from each resistor and the power supply voltage VCC, and the fourth voltage value is the same.

[0129] Taking Figure 6For the circuit shown, taking the power supply voltage VCC as 5V as an example, determine the third voltage value V AD3 The formula used can be:

[0130]

[0131] where, assuming R1 = R2 = R3 = 10 kΩ, then V AD3 = 3.3V.

[0132] Determine the fourth voltage value V AD4 The formula used can be:

[0133]

[0134] Similarly, assuming R1 = R2 = R3 = 10 kΩ, then VAD = 2.5V.

[0135] In this embodiment, by controlling the on / off of the switch circuit 40 through the control unit 70, two states are provided for the AD analog interface to collect. Furthermore, on the basis of having the function of judging the integrity of the high-voltage connector, it can also judge the fault that the high-voltage interlock harness is connected to the positive pole of the low-voltage battery and the vehicle frame (negative pole of the low-voltage battery) due to insulation aging and breakage. Thus, when the high-voltage interlock detection system discovers a problem, the troubleshooting range is narrowed, which not only ensures the stable operation of the high-voltage system, but also significantly improves the overall safety and reliability of the vehicle.

[0136] The features described in each embodiment of this specification can be replaced or combined with each other. For the parts that are the same or similar among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the system or system embodiments, since they are basically similar to the method embodiments, the description is relatively simple. For the relevant parts, reference can be made to the partial description of the method embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated. The components shown as units may or may not be physical units, that is, they may be located in one place, or they may be distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art can understand and implement it without creative labor.

[0137] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0138] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A high-voltage interlock detection circuit, characterized in that, Comprising: An interlock circuit, a first EMC circuit, a second EMC circuit, a clamping circuit, a switching circuit, and a low-pass filter circuit; The interlock circuit includes at least two high-voltage connectors; Both ends of the series connection of each of the high-voltage connectors are respectively used as the interlock output end and the interlock input end of the interlock circuit; The interlock output end and the interlock input end of the interlock circuit are respectively connected to a power supply; and the first EMC circuit is provided at the interlock output end of the interlock circuit, and the second EMC circuit is provided at the interlock input end of the interlock circuit; The interlock input end of the interlock circuit is sequentially connected to the AD analog interface of the control unit through the low-pass filter circuit and the input end of the clamping circuit; the clamping circuit includes two clamping ends respectively connected to the power supply and the ground; The interlock input end of the interlock circuit is also connected to the ground through the switching circuit; The control end of the switching circuit is connected to the output interface of the control unit.

2. The high-voltage interlock detection circuit according to claim 1, wherein The EMC circuit includes: a filtering capacitor and a transient voltage suppression diode; One end of the filtering capacitor is connected to one end of the transient voltage suppression diode, and the connection point is connected to the interlock output end or the interlock input end of the interlock circuit; The other end of the filtering capacitor and the other end of the transient voltage suppression diode are both grounded.

3. The high-voltage interlock detection circuit according to claim 1, wherein The switching circuit includes: a first current-limiting resistor, a pull-down resistor, a second current-limiting resistor, and a switching transistor; One end of the first current-limiting resistor is connected to the interlock input end of the interlock circuit; One end of the switching transistor is connected to the other end of the first current-limiting resistor; The control end of the switching transistor is respectively connected to one end of the pull-down resistor and one end of the second current-limiting resistor; The other end of the switching transistor and the other end of the pull-down resistor are both grounded; The other end of the second current-limiting resistor is connected to the output interface of the control unit.

4. The high-voltage interlock detection circuit according to claim 3, wherein The switching transistor is an NMOS transistor.

5. The high-voltage interlock detection circuit according to claim 1, characterized in that, The low-pass filter circuit includes: a low-pass filter resistor and a low-pass filter capacitor; One end of the low-pass filter resistor is connected to the interlock input end of the interlock circuit; The other end of the low-pass filter resistor is connected to one end of the low-pass filter capacitor, and the connection point is connected to the clamping circuit; The other end of the low-pass filter capacitor is grounded.

6. The high-voltage interlock detection circuit according to claim 1, wherein, The clamping circuit includes: a first clamping sub-circuit and a second clamping sub-circuit; One end of the first clamping sub-circuit is connected to one end of the second clamping sub-circuit, and the connection point is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit; The other end of the first clamping sub-circuit is used as one clamping end of the clamping circuit and is connected to the power supply; The other end of the second clamping sub-circuit is used as the other clamping end of the clamping circuit and is grounded.

7. The high-voltage interlock detection circuit according to claim 6, wherein The first clamping sub-circuit includes a first clamping diode; The anode of the first clamping diode is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit; The cathode of the first clamping diode is connected to the power supply.

8. The high-voltage interlock detection circuit according to claim 6, wherein, The second clamping sub-circuit includes a second clamping diode; The anode of the second clamping diode is respectively connected to the output end of the low-pass filter circuit and the AD analog interface of the control unit; The cathode of the second clamping diode is grounded.

9. The high-voltage interlock detection circuit according to claim 1, characterized in that, It further includes a first current limiting circuit and a second current limiting circuit; The first current limiting circuit is disposed between the interlock output end of the interlock circuit and the power supply; The second current limiting circuit is disposed between the interlock input end of the interlock circuit and the power supply.

10. The high-voltage interlock detection circuit according to claim 9, wherein, The first current limiting circuit includes a third current limiting resistor; the second current limiting circuit includes a fourth current limiting resistor.

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