Multi-channel cranial meridian electrical stimulation circuit

Abstract

The multi-channel cranial meridian electrical stimulation circuit comprises a main control module, a driving module, a current detection module and a multi-path current detection and selection module, wherein the main control module is connected with the driving module, the driving module is connected with the current detection module, and the current detection module is connected with the multipath current detection selection module; the multipath current detection and selection module realizes selection of current paths flowing through resistors R7 and R22 by switching the state of an EN pin, and the multipath current detection and selection module comprises a first multipath current detection and selection circuit and a third multipath current detection and selection circuit; a pin 3 of the first multi-path current detection and selection circuit controls conduction between the pin 1 and the pin 2 and is connected to a pin 52 of the main control module, and a pin 3 of the third multi-path current detection and selection circuit controls conduction between the pin 1 and the pin 2 and is connected to a pin 59 of the main control module.

Description

Technical Field

[0001] The present application relates to the field of electrostimulation medical devices, and more particularly to a multi-channel transcranial electrostimulation circuit. Background Art

[0002] At present, transcranial electrical stimulation (TES), as a non-invasive neuromodulation technique, mainly applies weak currents through electrodes to the scalp of the brain to stimulate specific brain regions, generating membrane polarization effects, achieving synaptic plasticity regulation, and then regulating the neural activities and excitabilities of the cerebral cortex. TES has broad application prospects in the fields of research and treatment and has gradually become an important means for the treatment of mental diseases and the improvement of cognitive abilities. However, existing TES devices generally have limitations in technology and function. Specifically, existing TES devices generally face the problem of a single current output channel. Most devices can only provide a fixed and unchanging current channel during stimulation, and the current parameters are preset before the start of stimulation. This design with a lack of flexibility in a single channel makes the device unable to be adjusted according to the real-time status and feedback of patients, restricting the treatment effect.

[0003] In addition, existing TES devices also tend to meet different treatment needs in the form of independent single-type products. These devices usually have fixed electrostimulation programs built in. Although they provide simple parameter adjustment functions, they cannot achieve more personalized treatment plans. All in all, existing TES devices generally have defects such as low precision and poor feedback, which greatly affect the treatment effect of transcranial electrical stimulation.

[0004] Therefore, how to effectively implement multi-channel transcranial electrical stimulation, achieve personalized diagnosis and treatment, and improve the accuracy of electrostimulation is an urgent problem to be solved in the field of electrostimulation medical devices. Summary of the Utility Model

[0005] To solve or at least alleviate the problems raised in the above background art, the present application provides a multi-channel transcranial electrostimulation circuit.

[0006] To achieve the above object, the present application provides the following technical solutions:

[0007] A multi-channel transcranial electrostimulation circuit includes: a main control module, a driving module, a current detection module, and a multi-channel current detection and selection module;

[0008] Wherein, the main control module is connected to the driving module, the driving module is connected to the current detection module, and the current detection module is connected to the multi-channel current detection and selection module;

[0009] Current detection module. The current detection circuit includes a first current detection circuit and a second current detection circuit. The first current detection circuit includes a current detection chip U2 and a resistor R7. The pin 5 of the current detection chip U2 is connected to the pin 16 of the main control chip U1. One end of the resistor R7 is connected to the pin 1 of the current detection chip U2, and the other end is connected to the pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R7. The second current detection circuit includes a current detection chip U3 and a resistor R22. The pin 5 of the current detection chip U3 is connected to the pin 17 of the main control chip U1. One end of the resistor R22 is connected to the pin 1 of the current detection chip U3, and the other end is connected to the pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R22;

[0010] Multi-channel current detection selection module. The multi-channel current detection selection module realizes the selection of the current paths flowing through the resistors R7 and R22 by switching the state of the EN pin. Among them, the multi-channel current detection selection module includes a first multi-channel current detection selection circuit and a third multi-channel current detection selection circuit. The pin 3 of the first multi-channel current detection selection circuit controls the conduction between pin 1 and pin 2 and is connected to the pin 52 of the main control module. The pin 3 of the third multi-channel current detection selection circuit controls the conduction between pin 1 and pin 2 and is connected to the pin 59 of the main control module.

[0011] As a further solution of the present application, the main control module includes a main control chip U1 and a crystal oscillator circuit. Among them, the crystal oscillator circuit is connected to the pins 12 and 13 of the main control chip U1. The pins 11, 19, 21, 22, 28, 50, 75 and 100 of the main control chip U1 are connected to the power supply module VDD. The crystal oscillator circuit includes a resistor R1, a resistor R3, a capacitor C1, a capacitor C3 and a crystal oscillator Y1. The pin 12 of the main control chip U1 is simultaneously connected to one end of the resistor R3, one end of the capacitor C1 and one end of the crystal oscillator Y1. A path is formed by connecting one end of the resistor R3, one end of the capacitor C1 and one end of the crystal oscillator Y1 to each other, and the other end of the capacitor C1 is grounded. The pin 13 of the main control chip U1 is connected to the resistor R1, and the resistor R1 is simultaneously connected to the other end of the resistor R3, one end of the capacitor C3 and the other end of the crystal oscillator Y1. A path is formed by connecting the other end of the resistor R3, one end of the capacitor C3 and the other end of the crystal oscillator Y1 to each other, and the other end of the capacitor C3 is grounded. The crystal oscillator Y1 is grounded.

[0012] As a further solution of the present application, the main control module further includes a reset circuit, and the reset circuit includes a resistor R4, a capacitor C4, and a reset button RST1. Among them, one end of the resistor R4 is connected to the power supply module VDD, and the other end is connected to the capacitor C4; the end of the capacitor C4 far from the resistor R4 is grounded, and the reset button RST1 forms a parallel circuit with the capacitor C4. One end of the reset button RST1 is connected to both the capacitor C4 and the resistor R4 at the same time, and the other end is connected to both the capacitor C4 and the ground terminal at the same time.

[0013] As a further solution of the present application, the main control module further includes a debugging serial port, and the debugging serial port includes a first debugging serial port and a second debugging serial port. The first debugging serial port includes a debugging component J5, a resistor R5, and a resistor R6. Pin 1 of the debugging component J5 is connected to one end of the resistor R6 and pin 26 of the main control chip U1 at the same time. The other end of the resistor R6 is connected to the power supply module VDD. Pin 2 of the debugging component J5 is grounded. Pin 3 of the debugging component J5 is connected to one end of the resistor R5 and pin 25 of the main control chip U1 at the same time. The other end of the resistor R5 is connected to the power supply module VDD; the second debugging serial port includes a debugging component J6, a resistor R20, and a resistor R21. Pin 1 of the debugging component J6 is connected to one end of the resistor R20 and pin 63 of the main control chip U1 at the same time. The other end of the resistor R20 is connected to the power supply module VDD. Pin 2 of the debugging component J6 is connected to one end of the resistor R21 and pin 64 of the main control chip U1 at the same time. The other end of the resistor R21 is connected to the power supply module VDD. Pins 3 to 6 of the debugging component J6 are grounded.

[0014] As a further solution of the present application, the drive module includes a first signal amplification circuit, a second signal amplification circuit, a third signal amplification circuit, and a fourth signal amplification circuit. Among them, the first signal amplification circuit is connected to pin 29 of the main control chip U1 and receives the voltage signal DA1 from the main control chip U1; the second signal amplification circuit is connected to pin 30 of the main control chip U1 and receives the voltage signal DA2 from the main control chip U1; the third signal amplification circuit is connected to pin 33 of the main control chip U1 and receives the voltage signal DA3 from the main control chip U1; the fourth signal amplification circuit is connected to pin 34 of the main control chip U1 and receives the voltage signal DA4 from the main control chip U1.

[0015] As a further solution of the present application, the first signal amplification circuit includes a resistor R8, a resistor R9, a resistor R16, a capacitor C6, an inductor L1, and a first operational amplifier; one end of the resistor R16 is connected to the pin 29 of the main control chip U1, and the other end is connected to the pin 3 of the first operational amplifier to receive the voltage signal DA1 from the main control chip U1. One end of the resistor R8 is grounded, and the other end is simultaneously connected to one end of the resistor R9 and the pin 2 of the first operational amplifier. The other end of the resistor R9 is connected to the output pin 6 of the first operational amplifier. One end of the inductor L1 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C6 and the pin 7 of the first operational amplifier. The other end of the capacitor C6 is grounded, and the pin 4 of the first operational amplifier is grounded; the second signal amplification circuit includes a resistor R10, a resistor R11, a resistor R17, a capacitor C7, an inductor L2, and a second operational amplifier; one end of the resistor R17 is connected to the pin 30 of the main control chip U1, and the other end is connected to the pin 3 of the second operational amplifier to receive the voltage signal DA2 from the main control chip U1. One end of the resistor R10 is grounded, and the other end is simultaneously connected to one end of the resistor R11 and the pin 2 of the second operational amplifier. The other end of the resistor R11 is connected to the output pin 6 of the second operational amplifier. One end of the inductor L2 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C7 and the pin 7 of the second operational amplifier. The other end of the capacitor C7 is grounded, and the pin 4 of the second operational amplifier is grounded; the third signal amplification circuit includes a resistor R12, a resistor R13, a resistor R18, a capacitor C9, an inductor L3, and a third operational amplifier; one end of the resistor R18 is connected to the pin 33 of the main control chip U1, and the other end is connected to the pin 3 of the third operational amplifier to receive the voltage signal DA3 from the main control chip U1. One end of the resistor R12 is grounded, and the other end is simultaneously connected to one end of the resistor R13 and the pin 2 of the third operational amplifier. The other end of the resistor R13 is connected to the output pin 6 of the third operational amplifier. One end of the inductor L3 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C9 and the pin 7 of the third operational amplifier. The other end of the capacitor C9 is grounded, and the pin 4 of the third operational amplifier is grounded; the fourth signal amplification circuit includes a resistor R14, a resistor R15, a resistor R19, a capacitor C10, an inductor L4, and a fourth operational amplifier;One end of the resistor R19 is connected to pin 34 of the main control chip U1, and the other end is connected to pin 3 of the fourth operational amplifier to receive the voltage signal DA4 from the main control chip U1. One end of the resistor R14 is grounded, and the other end is simultaneously connected to one end of the resistor R15 and pin 2 of the fourth operational amplifier. The other end of the resistor R15 is connected to the output pin 6 of the fourth operational amplifier. One end of the inductor L4 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C10 and pin 7 of the fourth operational amplifier. The other end of the capacitor C10 is grounded, and pin 4 of the fourth operational amplifier is grounded. The fourth signal amplification circuit is connected to pin 34 of the main control chip U1 to receive the voltage signal DA4 from the main control chip U1.

[0016] As a further solution of the present application, the first current detection circuit includes a current detection chip U2, a resistor R7, and a capacitor C8. One end of the resistor R7 connected to the current detection chip U2 is also connected to the output pin 6 of the second signal amplifier. Pin 6 of the current detection chip U2 is simultaneously connected to the power supply module VDD and one end of the capacitor C8. One end of the capacitor C8 connected to the VS pin 6 is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U2 is connected to the grounded end of the capacitor C8 to form a resistor voltage division circuit. Pin 5 of the current detection chip U2 is connected to pin 16 of the main control chip U1. One end of the resistor R7 is connected to pin 1 of the current detection chip U2, and the other end is connected to pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R7. The second current detection circuit includes a current detection chip U3, a resistor R22, and a capacitor C11. One end of the resistor R22 connected to the current detection chip U3 is also connected to the output pin 6 of the fourth signal amplifier. The VS pin 6 of the current detection chip U3 is simultaneously connected to the power supply module VDD and one end of the capacitor C22. One end of the capacitor C22 connected to the pin 6 is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U3 is connected to the grounded end of the capacitor C22 to form a resistor voltage division circuit for the current detection chip U3 to test the current flowing through the resistor R22. Pin 5 of the current detection chip U3 is connected to pin 17 of the main control chip U1. One end of the resistor R22 is connected to pin 1 of the current detection chip U3, and the other end is connected to pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R22.

[0017] As a further solution of the present application, the first multi-channel current detection and selection module includes a multi-channel current detection and selection chip U4, a capacitor C12, and a capacitor C13. The pin 4 and pin 5 of the multi-channel current detection and selection chip U4 are connected and grounded. The pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C12, and the other end of the capacitor C12 is grounded. The pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C13, and the other end of the capacitor C13 is grounded. The pin 2, pin 7, pin 10, and pin 15 of the multi-channel current detection and selection chip U4 are connected to one end of the resistor R7. The pin 14 of the multi-channel current detection and selection chip U3 is connected to the pin 51 of the main control chip U1, the pin 3 is connected to the pin 52 of the main control chip U1, the pin 6 is connected to the pin 55 of the main control chip U1, and the pin 11 is connected to the pin 56 of the main control chip U1.

[0018] As a further solution of the present application, the multi-channel current detection and selection module further includes a second multi-channel current detection and selection circuit. The second multi-channel current detection and selection module includes a multi-channel current detection and selection chip U5, a capacitor C14, and a capacitor C15. The pin 4 and pin 5 of the multi-channel current detection and selection chip U3 are connected and grounded. The pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C14, and the other end of the capacitor C14 is grounded. The pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C15, and the other end of the capacitor C15 is grounded. The pin 2 of the multi-channel current detection and selection chip U5 is connected to one end of the resistor R7. The pin 3 of the multi-channel current detection and selection chip U5 is connected to the pin 57 of the main control chip U1. The pin 7 of the multi-channel current detection and selection chip U5 is connected to one end of the resistor R22. The pin 6 of the multi-channel current detection and selection chip U5 is connected to the pin 57 of the main control chip U1.

[0019] As a further solution of the present application, the third multi-channel current detection and selection module includes a multi-channel current detection and selection chip U6, a capacitor C16, and a capacitor C17. The pin 4 and pin 5 of the multi-channel current detection and selection chip U6 are connected and grounded. The pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C16, and the other end of the capacitor C16 is grounded. The pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C17, and the other end of the capacitor C17 is grounded. The pin 2, pin 7, pin 10, and pin 15 of the multi-channel current detection and selection chip U6 are connected to one end of the resistor R22. The pin 14 of the multi-channel current detection and selection chip U6 is connected to the pin 58 of the main control chip U1, the pin 3 is connected to the pin 59 of the main control chip U1, the pin 6 is connected to the pin 60 of the main control chip U1, and the pin 11 is connected to the pin 61 of the main control chip U1.

[0020] Compared with the prior art, the present application has the following beneficial effects:

[0021] 1. In the solution of the present application, through a cleverly designed multi-channel circuit, multiple independent current output channels are realized. This design not only enables the device to perform electrical stimulation on different brain regions simultaneously or separately, but also greatly improves the flexibility and pertinence of treatment. The electrical stimulation parameters of each channel can be flexibly adjusted according to the specific condition and real-time feedback of the patient, so as to formulate a more personalized treatment plan. And on the basis of the multi-channel circuit, a multi-channel current detection and selection module is set, enabling the present application to realize the intelligent selection of current paths flowing through different resistors, so that the device can automatically adjust the current path and parameters according to the real-time current feedback data to optimize the treatment effect, realize personalized diagnosis and treatment, and improve the accuracy of electrical stimulation.

[0022] 2. Through the first current detection circuit and the second current detection circuit in the current detection module, the present application can accurately detect the current flowing through each channel, thereby ensuring the safety and effectiveness of electrical stimulation. This design not only helps to timely adjust the electrical stimulation parameters, but also can issue an alarm in time when the current is abnormal. Combined with the design of the reset circuit and the crystal oscillator circuit of the present application, the stability and safety performance of the device are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is the circuit diagram of the main control chip U1 of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0024] Figure 2 It is the circuit diagram of the reset circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0025] Figure 3 It is the circuit diagram of the first debugging serial port of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0026] Figure 4 It is the circuit diagram of the second debugging serial port of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0027] Figure 5 It is the circuit diagram of the drive module of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0028] Figure 6 It is the circuit diagram of the first current detection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0029] Figure 7 It is the circuit diagram of the second current detection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0030] Figure 8 This is the circuit diagram of the first multi-channel current detection and selection circuit for a multi-channel transcranial electrical stimulation circuit provided by the embodiments of the present application.

[0031] Figure 9 This is the circuit diagram of the second multi-channel current detection and selection circuit for a multi-channel transcranial electrical stimulation circuit provided by the embodiments of the present application.

[0032] Figure 10 This is the circuit diagram of the third multi-channel current detection and selection circuit for a multi-channel transcranial electrical stimulation circuit provided by the embodiments of the present application.

[0033] Figure 11 This is the circuit diagram of the signal output terminal of a multi-channel transcranial electrical stimulation circuit provided by the embodiments of the present application. Detailed implementation manners

[0034] The technical solutions of this patent will be further described in detail below in conjunction with the specific implementation manners.

[0035] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0036] In the description of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application; the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance; in addition, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal communication of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.

[0037] The inventors of the present application have found that existing TES devices generally face the problem of a single current output channel. Most devices can only provide a fixed current channel during stimulation, and the current parameters are preset before the start of stimulation. This lack of flexibility in the single-channel design makes the device unable to adjust according to the patient's real-time status and feedback, limiting the treatment effect. In addition, existing TES devices also tend to meet different treatment needs in the form of independent single-type products. These devices usually have fixed electrical stimulation programs built-in, and although they provide simple parameter adjustment functions, they cannot achieve more personalized treatment plans. All in all, existing TES devices generally have the defects of low precision and poor feedback, which greatly affect the treatment effect of transcranial electrical stimulation.

[0038] In view of this, the present application provides a multi-channel transcranial electrical stimulation circuit, including: a main control module, a driving module, a current detection module, and a multi-channel current detection selection module;

[0039] Among them, the main control module is connected to the driving module, the driving module is connected to the current detection module, and the current detection module is connected to the multi-channel current detection selection module;

[0040] A current detection module, the current detection circuit includes a first current detection circuit and a second current detection circuit. The first current detection circuit includes a current detection chip U2 and a resistor R7. The pin 5 of the current detection chip U2 is connected to the pin 16 of the main control chip U1. One end of the resistor R7 is connected to the pin 1 of the current detection chip U2, and the other end is connected to the pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R7. The second current detection circuit includes a current detection chip U3 and a resistor R22. The pin 5 of the current detection chip U3 is connected to the pin 17 of the main control chip U1. One end of the resistor R22 is connected to the pin 1 of the current detection chip U3, and the other end is connected to the pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R22;

[0041] Multichannel current detection selection module. The multichannel current detection selection module realizes the selection of the current paths flowing through resistors R7 and R22 by switching the state of the EN pin. Among them, the multichannel current detection selection module includes a first multichannel current detection selection circuit and a third multichannel current detection selection circuit. Pin 3 of the first multichannel current detection selection circuit controls the conduction between pin 1 and pin 2 and is connected to pin 52 of the main control module. Pin 3 of the third multichannel current detection selection circuit controls the conduction between pin 1 and pin 2 and is connected to pin 59 of the main control module.

[0042] Please refer to Figures 1-4 , Figure 1 which is the circuit diagram of the main control chip U1 of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. Figure 2 which is the circuit diagram of a reset circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. Figure 3 which is the circuit diagram of a first debugging serial port of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. Figure 4 which is the circuit diagram of a second debugging serial port of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0043] In order to achieve the overall control of the device, realize the electrical connection of each component, and improve the overall stability of the device. In this embodiment, the main control module includes a main control chip U1 and a crystal oscillator circuit. Among them, the crystal oscillator circuit is connected to pins 12 and 13 of the main control chip U1. Pins 11, 19, 21, 22, 28, 50, 75, and 100 of the main control chip U1 are connected to the power supply module VDD. The crystal oscillator circuit includes a resistor R1, a resistor R3, a capacitor C1, a capacitor C3, and a crystal oscillator Y1. Pin 12 of the main control chip U1 is simultaneously connected to one end of the resistor R3, one end of the capacitor C1, and one end of the crystal oscillator Y1. A path is formed by connecting one end of the resistor R3, one end of the capacitor C1, and one end of the crystal oscillator Y1 to each other, and the other end of the capacitor C1 is grounded. Pin 13 of the main control chip U1 is connected to the resistor R1, and the resistor R1 is simultaneously connected to the other end of the resistor R3, one end of the capacitor C3, and the other end of the crystal oscillator Y1. A path is formed by connecting the other end of the resistor R3, one end of the capacitor C3, and the other end of the crystal oscillator Y1 to each other, and the other end of the capacitor C3 is grounded. The crystal oscillator Y1 is grounded. The crystal oscillator circuit is used to provide a stable clock signal for the main control chip to ensure the stable operation of the entire circuit system.

[0044] To enable the device to return to its initial state when an abnormality occurs or the device needs to be restarted, thereby improving the reliability of the device, in this embodiment, the main control module further includes a reset circuit. The reset circuit includes a resistor R4, a capacitor C4, and a reset button RST1. Among them, one end of the resistor R4 is connected to the power supply module VDD, and the other end is connected to the capacitor C4; the end of the capacitor C4 far from the resistor R4 is grounded, and the reset button RST1 forms a parallel circuit with the capacitor C4. One end of the reset button RST1 is simultaneously connected to the capacitor C4 and the resistor R4, and the other end is simultaneously connected to the capacitor C4 and the ground terminal.

[0045] To facilitate the use personnel to debug and maintain the device, in this embodiment, the main control module further includes a debugging serial port. The debugging serial port includes a first debugging serial port and a second debugging serial port. The first debugging serial port includes a debugging component J5, a resistor R5, and a resistor R6. Pin 1 of the debugging component J5 is simultaneously connected to one end of the resistor R6 and pin 26 of the main control chip U1. The other end of the resistor R6 is connected to the power supply module VDD. Pin 2 of the debugging component J5 is grounded. Pin 3 of the debugging component J5 is simultaneously connected to one end of the resistor R5 and pin 25 of the main control chip U1. The other end of the resistor R5 is connected to the power supply module VDD; the second debugging serial port includes a debugging component J6, a resistor R20, and a resistor R21. Pin 1 of the debugging component J6 is simultaneously connected to one end of the resistor R20 and pin 63 of the main control chip U1. The other end of the resistor R20 is connected to the power supply module VDD. Pin 2 of the debugging component J6 is simultaneously connected to one end of the resistor R21 and pin 64 of the main control chip U1. The other end of the resistor R21 is connected to the power supply module VDD. Pins 3 to 6 of the debugging component J6 are grounded.

[0046] Please refer to Figure 5 , Figure 5 is the circuit diagram of the driving module of a multi-channel transcranial electrical stimulation circuit provided by the embodiment of the present application. To receive the voltage signal from the main control module and amplify the signal, so as to drive the circuit to generate sufficient current for electrical stimulation treatment, in this embodiment, the driving module includes a first signal amplification circuit, a second signal amplification circuit, a third signal amplification circuit, and a fourth signal amplification circuit. Among them, the first signal amplification circuit is connected to pin 29 of the main control chip U1 to receive the voltage signal DA1 from the main control chip U1; the second signal amplification circuit is connected to pin 30 of the main control chip U1 to receive the voltage signal DA2 from the main control chip U1; the third signal amplification circuit is connected to pin 33 of the main control chip U1 to receive the voltage signal DA3 from the main control chip U1; the fourth signal amplification circuit is connected to pin 34 of the main control chip U1 to receive the voltage signal DA4 from the main control chip U1.

[0047] To enable the drive module to further implement technical functions and ensure that multiple independent signal amplification circuits can work simultaneously or independently for a multi-channel circuit, in this embodiment, the first signal amplification circuit includes resistor R8, resistor R9, resistor R16, capacitor C6, inductor L1, and the first operational amplifier; one end of resistor R16 is connected to pin 29 of the main control chip U1, and the other end is connected to pin 3 of the first operational amplifier to receive the voltage signal DA1 from the main control chip U1. One end of resistor R8 is grounded, and the other end is simultaneously connected to one end of resistor R9 and pin 2 of the first operational amplifier. The other end of resistor R9 is connected to the output pin 6 of the first operational amplifier. One end of inductor L1 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C6 and pin 7 of the first operational amplifier. The other end of capacitor C6 is grounded, and pin 4 of the first operational amplifier is grounded; the second signal amplification circuit includes resistor R10, resistor R11, resistor R17, capacitor C7, inductor L2, and the second operational amplifier; one end of resistor R17 is connected to pin 30 of the main control chip U1, and the other end is connected to pin 3 of the second operational amplifier to receive the voltage signal DA2 from the main control chip U1. One end of resistor R10 is grounded, and the other end is simultaneously connected to one end of resistor R11 and pin 2 of the second operational amplifier. The other end of resistor R11 is connected to the output pin 6 of the second operational amplifier. One end of inductor L2 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C7 and pin 7 of the second operational amplifier. The other end of capacitor C7 is grounded, and pin 4 of the second operational amplifier is grounded; the third signal amplification circuit includes resistor R12, resistor R13, resistor R18, capacitor C9, inductor L3, and the third operational amplifier; one end of resistor R18 is connected to pin 33 of the main control chip U1, and the other end is connected to pin 3 of the third operational amplifier to receive the voltage signal DA3 from the main control chip U1. One end of resistor R12 is grounded, and the other end is simultaneously connected to one end of resistor R13 and pin 2 of the third operational amplifier. The other end of resistor R13 is connected to the output pin 6 of the third operational amplifier. One end of inductor L3 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C9 and pin 7 of the third operational amplifier. The other end of capacitor C9 is grounded, and pin 4 of the third operational amplifier is grounded; the fourth signal amplification circuit includes resistor R14, resistor R15, resistor R19, capacitor C10, inductor L4, and the fourth operational amplifier;One end of the resistor R19 is connected to pin 34 of the main control chip U1, and the other end is connected to pin 3 of the fourth operational amplifier to receive the voltage signal DA4 from the main control chip U1. One end of the resistor R14 is grounded, and the other end is simultaneously connected to one end of the resistor R15 and pin 2 of the fourth operational amplifier. The other end of the resistor R15 is connected to the output pin 6 of the fourth operational amplifier. One end of the inductor L4 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C10 and pin 7 of the fourth operational amplifier. The other end of the capacitor C10 is grounded, and pin 4 of the fourth operational amplifier is grounded. The fourth signal amplification circuit is connected to pin 34 of the main control chip U1 to receive the voltage signal DA4 from the main control chip U1. The above-mentioned multiple independent signal amplification circuits ensure that the multi-channel circuit can work simultaneously or independently. Preferably, the amplification factor can be 16 times, which can meet the further implementation of TES.;

[0048] Please refer to Figure 6 and Figure 7 , Figure 6 which is the circuit diagram of the first current detection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. Figure 7 which is the circuit diagram of the second current detection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application.

[0049] To accurately detect the current flowing through each electrical stimulation channel, ensure that the current is within a safe range, and at the same time provide real-time current feedback data for the main control module to perform intelligent adjustment. In this embodiment, the first current detection circuit includes a current detection chip U2, a resistor R7, and a capacitor C8. One end of the resistor R7 connected to the current detection chip U2 is also connected to the output pin 6 of the second signal amplifier; pin 6 of the current detection chip U2 is simultaneously connected to the power supply module VDD and one end of the capacitor C8. One end of the capacitor C8 connected to the VS pin 6 is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U2 is connected to the grounded end of the capacitor C8 to form a resistor voltage division circuit. Pin 5 of the current detection chip U2 is connected to pin 16 of the main control chip U1. One end of the resistor R7 is connected to pin 1 of the current detection chip U2, and the other end is connected to pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across this resistor R7. The second current detection circuit includes a current detection chip U3, a resistor R22, and a capacitor C11. One end of the resistor R22 connected to the current detection chip U3 is also connected to the output pin 6 of the fourth signal amplifier; the VS pin 6 of the current detection chip U3 is simultaneously connected to the power supply module VDD and one end of the capacitor C22. One end of the capacitor C22 connected to pin 6 is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U3 is connected to the grounded end of the capacitor C22 to form a resistor voltage division circuit for the current detection chip U3 to measure the current flowing through the resistor R22. Pin 5 of the current detection chip U3 is connected to pin 17 of the main control chip U1. One end of the resistor R22 is connected to pin 1 of the current detection chip U3, and the other end is connected to pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across this resistor R22.

[0050] Please refer to Figure 8 , Figure 8The circuit diagram of the first multi-channel current detection and selection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. To implement the intelligent selection of current paths flowing through different resistors in the present application and optimize the current paths and parameters according to real-time current feedback data. In this embodiment, the first multi-channel current detection and selection module includes a multi-channel current detection and selection chip U4, a capacitor C12, and a capacitor C13. The pin 4 and pin 5 of the multi-channel current detection and selection chip U4 are connected and grounded. The pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C12, and the other end of the capacitor C12 is grounded. The pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C13, and the other end of the capacitor C13 is grounded. The pin 2, pin 7, pin 10, and pin 15 of the multi-channel current detection and selection chip U4 are connected to one end of the resistor R7. The pin 14 of the multi-channel current detection and selection chip U3 is connected to the pin 51 of the main control chip U1, the pin 3 is connected to the pin 52 of the main control chip U1, the pin 6 is connected to the pin 55 of the main control chip U1, and the pin 11 is connected to the pin 56 of the main control chip U1.

[0051] Please refer to Figure 9 , Figure 9 The circuit diagram of the second multi-channel current detection and selection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. To further improve the accuracy and treatment effect of electrical stimulation and intelligently select the current paths flowing through different resistors. In this embodiment, the multi-channel current detection and selection module further includes a second multi-channel current detection and selection circuit. The second multi-channel current detection and selection module includes a multi-channel current detection and selection chip U5, a capacitor C14, and a capacitor C15. The pin 4 and pin 5 of the multi-channel current detection and selection chip U3 are connected and grounded. The pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C14, and the other end of the capacitor C14 is grounded. The pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C15, and the other end of the capacitor C15 is grounded. The pin 2 of the multi-channel current detection and selection chip U5 is connected to one end of the resistor R7. The pin 3 of the multi-channel current detection and selection chip U5 is connected to the pin 57 of the main control chip U1. The pin 7 of the multi-channel current detection and selection chip U5 is connected to one end of the resistor R22. The pin 6 of the multi-channel current detection and selection chip U5 is connected to the pin 57 of the main control chip U1.

[0052] Please refer to Figure 10 , Figure 10This is the circuit diagram of the third multi-channel current detection and selection circuit of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. To provide a more complex and refined current path selection function and perform personalized adjustment based on real-time current data and the main control module signal, in this embodiment, the third multi-channel current detection and selection module includes a multi-channel current detection and selection chip U6, a capacitor C16, and a capacitor C17. Pin 4 and pin 5 of the multi-channel current detection and selection chip U6 are connected and grounded. Pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C16, and the other end of the capacitor C16 is grounded. Pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C17, and the other end of the capacitor C17 is grounded. Pins 2, 7, 10, and 15 of the multi-channel current detection and selection chip U6 are connected to one end of the resistor R22. Pin 14 of the multi-channel current detection and selection chip U6 is connected to pin 58 of the main control chip U1, pin 3 is connected to pin 59 of the main control chip U1, pin 6 is connected to pin 60 of the main control chip U1, and pin 11 is connected to pin 61 of the main control chip U1.

[0053] Please refer to Figure 11 , Figure 11 This is the circuit diagram of the signal output terminal of a multi-channel transcranial electrical stimulation circuit provided by an embodiment of the present application. The driving module and the multi-channel current detection and selection module can be selectively connected. In this embodiment, four signal output ports can be set to further transmit the amplified signal of the driving module to the multi-channel current detection and selection chip. Pin 1 of the first signal port J1 is connected to pin 1 of the multi-channel current detection and selection chip U5, and pin 2 of the first signal port J1 is connected to the output pin 6 of the first signal amplifier of the first signal amplification circuit. Pin 1 of the second signal port J2 is connected to pin 9 of the multi-channel current detection and selection chip U4, pin 2 is connected to pin 8 of the multi-channel current detection and selection chip U4, pin 3 is connected to pin 1 of the multi-channel current detection and selection chip U4, pin 4 is connected to pin 16 of the multi-channel current detection and selection chip U4, and pin 5 of the second signal port J2 is connected to the output pin 6 of the first signal amplifier of the first signal amplification circuit. Pin 1 of the third signal port J3 is connected to pin 8 of the multi-channel current detection and selection chip U5, and pin 2 of the third signal port J3 is connected to the output pin 6 of the third signal amplifier of the third signal amplification circuit. Pin 1 of the fourth signal port J4 is connected to pin 9 of the multi-channel current detection and selection chip U6, pin 2 is connected to pin 8 of the multi-channel current detection and selection chip U6, pin 3 is connected to pin 1 of the multi-channel current detection and selection chip U6, pin 4 is connected to pin 16 of the multi-channel current detection and selection chip U6, and pin 5 of the fourth signal port J4 is connected to the output pin 6 of the third signal amplifier of the third signal amplification circuit.

[0054] The above describes in detail the preferred embodiments of the present patent. However, the present patent is not limited to the above embodiments. Within the scope of knowledge possessed by those of ordinary skill in the art, various changes can be made without departing from the gist of the present patent.

Claims

1. A multi-channel transcranial electrical stimulation circuit, characterized in that, Including: A main control module, a drive module, a current detection module, and a multi-channel current detection selection module; Among them, the main control module is connected to the drive module, the current detection module, and the multi-channel current detection selection module, the drive module is connected to the current detection module, and the current detection module is connected to the multi-channel current detection selection module; A current detection module, the current detection module includes a first current detection circuit and a second current detection circuit. The first current detection circuit includes a current detection chip U2 and a resistor R7. The pin 5 of the current detection chip U2 is connected to the pin 16 of the main control chip U1. One end of the resistor R7 is connected to the pin 1 of the current detection chip U2, and the other end is connected to the pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R7. The second current detection circuit includes a current detection chip U3 and a resistor R22. The pin 5 of the current detection chip U3 is connected to the pin 17 of the main control chip U1. One end of the resistor R22 is connected to the pin 1 of the current detection chip U3, and the other end is connected to the pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with the pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across the resistor R22; A multi-channel current detection selection module, the multi-channel current detection selection module realizes the selection of the current paths flowing through the resistors R7 and R22 by switching the state of the EN pin. Among them, the multi-channel current detection selection module includes a first multi-channel current detection selection circuit and a third multi-channel current detection selection circuit; The pin 3 of the first multi-channel current detection selection circuit controls the conduction between the pin 1 and the pin 2 and is connected to the pin 52 of the main control module. The pin 3 of the third multi-channel current detection selection circuit controls the conduction between the pin 1 and the pin 2 and is connected to the pin 59 of the main control module.

2. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that The main control module includes a main control chip U1 and a crystal oscillator circuit. Among them, the crystal oscillator circuit is connected to pins 12 and 13 of the main control chip U1. Pins 11, 19, 21, 22, 28, 50, 75, and 100 of the main control chip U1 are connected to the power supply module VDD; the crystal oscillator circuit includes a resistor R1, a resistor R3, a capacitor C1, a capacitor C3, and a crystal oscillator Y1. Pin 12 of the main control chip U1 is simultaneously connected to one end of the resistor R3, one end of the capacitor C1, and one end of the crystal oscillator Y1. A path is formed by connecting one end of the resistor R3, one end of the capacitor C1, and one end of the crystal oscillator Y1 to each other, and the other end of the capacitor C1 is grounded; pin 13 of the main control chip U1 is connected to the resistor R1, and the resistor R1 is simultaneously connected to the other end of the resistor R3, one end of the capacitor C3, and the other end of the crystal oscillator Y1. A path is formed by connecting the other end of the resistor R3, one end of the capacitor C3, and the other end of the crystal oscillator Y1 to each other, and the other end of the capacitor C3 is grounded; the crystal oscillator Y1 is grounded.

3. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that, The main control module further includes a reset circuit. The reset circuit includes a resistor R4, a capacitor C4, and a reset button RST1. Among them, one end of the resistor R4 is connected to the power supply module VDD, and the other end is connected to the capacitor C4; the end of the capacitor C4 far from the resistor R4 is grounded. The reset button RST1 forms a parallel circuit with the capacitor C4. One end of the reset button RST1 is simultaneously connected to the capacitor C4 and the resistor R4, and the other end is simultaneously connected to the capacitor C4 and the ground terminal.

4. A multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that The main control module further includes a debugging serial port. The debugging serial port includes a first debugging serial port and a second debugging serial port. The first debugging serial port includes a debugging component J5, a resistor R5, and a resistor R6. Pin 1 of the debugging component J5 is simultaneously connected to one end of the resistor R6 and pin 26 of the main control chip U1. The other end of the resistor R6 is connected to the power supply module VDD. Pin 2 of the debugging component J5 is grounded. Pin 3 of the debugging component J5 is simultaneously connected to one end of the resistor R5 and pin 25 of the main control chip U1. The other end of the resistor R5 is connected to the power supply module VDD; the second debugging serial port includes a debugging component J6, a resistor R20, and a resistor R21. Pin 1 of the debugging component J6 is simultaneously connected to one end of the resistor R20 and pin 63 of the main control chip U1. The other end of the resistor R20 is connected to the power supply module VDD. Pin 2 of the debugging component J6 is simultaneously connected to one end of the resistor R21 and pin 64 of the main control chip U1. The other end of the resistor R21 is connected to the power supply module VDD. Pins 3 to 6 of the debugging component J6 are grounded.

5. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that, The driving module includes a first signal amplification circuit, a second signal amplification circuit, a third signal amplification circuit, and a fourth signal amplification circuit. Among them, the first signal amplification circuit is connected to pin 29 of the main control chip U1 and receives the voltage signal DA1 from the main control chip U1; the second signal amplification circuit is connected to pin 30 of the main control chip U1 and receives the voltage signal DA2 from the main control chip U1; the third signal amplification circuit is connected to pin 33 of the main control chip U1 and receives the voltage signal DA3 from the main control chip U1; the fourth signal amplification circuit is connected to pin 34 of the main control chip U1 and receives the voltage signal DA4 from the main control chip U1.

6. The multi-channel transcranial electrical stimulation circuit according to claim 5, characterized in that, The first signal amplification circuit includes resistor R8, resistor R9, resistor R16, capacitor C6, inductor L1, and a first operational amplifier; one end of resistor R16 is connected to pin 29 of the main control chip U1, and the other end is connected to pin 3 of the first operational amplifier to receive the voltage signal DA1 from the main control chip U1. One end of resistor R8 is grounded, and the other end is simultaneously connected to one end of resistor R9 and pin 2 of the first operational amplifier. The other end of resistor R9 is connected to the output pin 6 of the first operational amplifier. One end of inductor L1 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C6 and pin 7 of the first operational amplifier. The other end of capacitor C6 is grounded, and pin 4 of the first operational amplifier is grounded; the second signal amplification circuit includes resistor R10, resistor R11, resistor R17, capacitor C7, inductor L2, and a second operational amplifier; one end of resistor R17 is connected to pin 30 of the main control chip U1, and the other end is connected to pin 3 of the second operational amplifier to receive the voltage signal DA2 from the main control chip U1. One end of resistor R10 is grounded, and the other end is simultaneously connected to one end of resistor R11 and pin 2 of the second operational amplifier. The other end of resistor R11 is connected to the output pin 6 of the second operational amplifier. One end of inductor L2 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C7 and pin 7 of the second operational amplifier. The other end of capacitor C7 is grounded, and pin 4 of the second operational amplifier is grounded; the third signal amplification circuit includes resistor R12, resistor R13, resistor R18, capacitor C9, inductor L3, and a third operational amplifier; one end of resistor R18 is connected to pin 33 of the main control chip U1, and the other end is connected to pin 3 of the third operational amplifier to receive the voltage signal DA3 from the main control chip U1. One end of resistor R12 is grounded, and the other end is simultaneously connected to one end of resistor R13 and pin 2 of the third operational amplifier. The other end of resistor R13 is connected to the output pin 6 of the third operational amplifier. One end of inductor L3 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of capacitor C9 and pin 7 of the third operational amplifier. The other end of capacitor C9 is grounded, and pin 4 of the third operational amplifier is grounded; the fourth signal amplification circuit includes resistor R14, resistor R15, resistor R19, capacitor C10, inductor L4, and a fourth operational amplifier;One end of the resistor R19 is connected to pin 34 of the main control chip U1, and the other end is connected to pin 3 of the fourth operational amplifier to receive the voltage signal DA4 from the main control chip U1. One end of the resistor R14 is grounded, and the other end is simultaneously connected to one end of the resistor R15 and pin 2 of the fourth operational amplifier. The other end of the resistor R15 is connected to the output pin 6 of the fourth operational amplifier. One end of the inductor L4 is connected to the power supply module VDD, and the other end is simultaneously connected to one end of the capacitor C10 and pin 7 of the fourth operational amplifier. The other end of the capacitor C10 is grounded, and pin 4 of the fourth operational amplifier is grounded.; 7. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that, The first current detection circuit includes a current detection chip U2, a resistor R7, and a capacitor C8. One end of the resistor R7 connected to the current detection chip U2 is also connected to the output pin 6 of the second signal amplifier; pin 6 of the current detection chip U2 is simultaneously connected to the power supply module VDD and one end of the capacitor C8. One end of the capacitor C8 connected to pin 6 of VS is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U2 is connected to the grounded end of the capacitor C8, forming a resistor voltage division circuit. Pin 5 of the current detection chip U2 is connected to pin 16 of the main control chip U1. One end of the resistor R7 is connected to pin 1 of the current detection chip U2, and the other end is connected to pin 8 of the current detection chip U2 and forms a resistor voltage division circuit with pin 7 of the current detection chip U2 connected to the power supply module VDD. The current is detected by measuring the voltage drop across this resistor R7. The second current detection circuit includes a current detection chip U3, a resistor R22, and a capacitor C11. One end of the resistor R22 connected to the current detection chip U3 is also connected to the output pin 6 of the fourth signal amplifier; the VS pin 6 of the current detection chip U3 is simultaneously connected to the power supply module VDD and one end of the capacitor C22. One end of the capacitor C22 connected to pin 6 is connected to the power supply module VDD, and the other end is grounded. Pin 7 of the current detection chip U3 is connected to the grounded end of the capacitor C22, forming a resistor voltage division circuit for the current detection chip U3 to measure the current flowing through the resistor R22. Pin 5 of the current detection chip U3 is connected to pin 17 of the main control chip U1. One end of the resistor R22 is connected to pin 1 of the current detection chip U3, and the other end is connected to pin 8 of the current detection chip U3 and forms a resistor voltage division circuit with pin 7 of the current detection chip U3 connected to the power supply module VDD. The current is detected by measuring the voltage drop across this resistor R22.

8. A multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that, The first multi-channel current detection selection circuit includes a multi-channel current detection selection chip U4, a capacitor C12, and a capacitor C13. Pin 4 and pin 5 of the multi-channel current detection selection chip U4 are connected and grounded. Pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C12, and the other end of the capacitor C12 is grounded. Pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C13, and the other end of the capacitor C13 is grounded. Pins 2, 7, 10, and 15 of the multi-channel current detection selection chip U4 are connected to one end of the resistor R7. Pin 14 of the multi-channel current detection selection chip U3 is connected to pin 51 of the main control chip U1, pin 3 is connected to pin 52 of the main control chip U1, pin 6 is connected to pin 55 of the main control chip U1, and pin 11 is connected to pin 56 of the main control chip U1.

9. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that The multi-channel current detection selection module further includes a second multi-channel current detection selection circuit. The second multi-channel current detection selection circuit includes a multi-channel current detection selection chip U5, a capacitor C14, and a capacitor C15. Pin 4 and pin 5 of the multi-channel current detection selection chip U3 are connected and grounded. Pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C14, and the other end of the capacitor C14 is grounded. Pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C15, and the other end of the capacitor C15 is grounded. Pin 2 of the multi-channel current detection selection chip U5 is connected to one end of the resistor R7. Pin 3 of the multi-channel current detection selection chip U5 is connected to pin 57 of the main control chip U1. Pin 7 of the multi-channel current detection selection chip U5 is connected to one end of the resistor R22. Pin 6 of the multi-channel current detection selection chip U5 is connected to pin 57 of the main control chip U1.

10. The multi-channel transcranial electrical stimulation circuit according to claim 1, characterized in that, The third multi-channel current detection selection circuit includes a multi-channel current detection selection chip U6, a capacitor C16, and a capacitor C17. Pin 4 and pin 5 of the multi-channel current detection selection chip U6 are connected and grounded. Pin 12 is simultaneously connected to the power supply module VDD and one end of the capacitor C16, and the other end of the capacitor C16 is grounded. Pin 13 is simultaneously connected to the power supply module VDD and one end of the capacitor C17, and the other end of the capacitor C17 is grounded. Pins 2, 7, 10, and 15 of the multi-channel current detection selection chip U6 are connected to one end of the resistor R22. Pin 14 of the multi-channel current detection selection chip U6 is connected to pin 58 of the main control chip U1, pin 3 is connected to pin 59 of the main control chip U1, pin 6 is connected to pin 60 of the main control chip U1, and pin 11 is connected to pin 61 of the main control chip U1.

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