Battery management system based on AFE

Abstract

The utility model relates to an AFE-based battery management system, which comprises a battery equalization driving circuit and an MCU unit, the battery equalization driving circuit comprises an AFE chip, a current balancing circuit, a charging control enabling circuit and a discharging control enabling circuit, the AFE chip is responsible for converting analog signals such as voltage, current and temperature of a battery into digital signals, and the MCU unit is responsible for outputting the digital signals. The MCU is connected with the AFE chip through an I2C bus, the MCU can conveniently read battery data collected by the AFE chip through the I2C bus and issue a control instruction according to needs, and meanwhile, due to the design, software deployment is also facilitated, and through coordinated control of the AFE chip and the current balancing circuit, the battery data can be further processed by the MCU, so that the service life of the battery can be prolonged, and the service life of the battery can be prolonged. And high-efficiency equalization of each single battery in the battery pack is realized through the internal current balancing circuit and the external current balancing circuit, so that each single battery can work in an optimal state, thereby improving the overall performance of the battery pack and prolonging the service life of the battery pack.

Description

Technical Field

[0001] The utility model relates to the technical field of battery management, and more specifically, to an AFE-based battery management system. Background Art

[0002] Battery packs composed of series-connected single cells are required for floor sweepers, vacuum cleaners, electric vehicles, energy storage power stations, electric bicycles, etc. to meet the demand for high voltage. Therefore, how to effectively utilize the grouped batteries has become a key issue at present. There are different degrees of differences in various parameters of lithium batteries during the production process, and these differences are manifested as inconsistencies in the internal resistance, capacity, open-circuit voltage, charge and discharge voltage platforms, etc. of lithium batteries. With the increase in the number of charge and discharge cycles of lithium batteries during actual operation, as well as the influence of various factors such as temperature and self-discharge, these differences will continue to expand, resulting in an increasing performance difference between the batteries in the lithium battery pack, leading to overcharging and over-discharging phenomena of single cells in the battery pack, inconsistent attenuation rates of each single cell in the battery pack, and the capacity of the series-connected lithium battery pack being determined by the capacity of the lowest single cell in the group. Therefore, once a certain battery undergoes deep discharge, the entire battery pack must stop working. Similarly, once a certain battery undergoes overcharging, the charging process must also stop immediately, ultimately resulting in a sharp reduction in the service life of the battery pack.

[0003] When traditional battery management systems balance a battery pack, they often adopt simple resistor discharge or switch control methods. These methods are not only inefficient but also prone to energy waste. The resistor discharge method is a battery balancing method that parallels a resistor on a single cell with a higher voltage, causing the battery to discharge through the resistor to reduce its voltage and achieve voltage balance with other batteries. However, the resistor itself consumes a large amount of electrical energy and dissipates it as heat. This part of the energy cannot be reused by the battery pack and instead increases the thermal load of the system, which may affect the normal operation of other electronic components. Especially in application scenarios such as floor sweepers that require high energy density, this kind of energy waste is particularly serious. For example, in a battery pack composed of 7 single cells, if each battery discharges 1% of its power through a resistor during the balancing process, then the entire battery pack will waste 1% of the total power, which will greatly reduce the floor sweeping time of the floor sweeper.

[0004] In addition, traditional battery management systems also adopt an active power balance method that transfers the excess power in the battery pack to the battery unit with insufficient power through an energy transfer method, and can be carried out during battery charging, discharging, and when not working, so as to meet the needs of more situations of the battery pack. However, the existing active power balance in the prior art usually converts the voltages of all battery units in the battery pack and charges the battery units that need to be balanced, usually requiring a relatively long balancing time and having low efficiency. Content of the Utility Model

[0005] In order to overcome the deficiencies of the prior art, the utility model provides an AFE-based battery management system, which realizes the efficient equalization of each single battery in the battery pack through the coordinated control of the AFE chip and the current balance circuit, and through the internal current balance circuit and the external current balance circuit, so that each single battery can work in the best state, thereby improving the overall performance and service life of the battery pack.

[0006] The technical solution of the utility model is as follows: an AFE-based battery management system, including a battery equalization drive circuit and an MCU unit, the battery equalization drive circuit includes an AFE chip, a current balance circuit, a charge control enable circuit, and a discharge control enable circuit, and the MCU unit and the AFE chip are connected through an I2C bus; the AFE chip is connected to the battery through the current balance circuit, the charge control enable circuit is connected to the positive terminal of the battery pack PACK+ of the AFE chip, and the discharge control enable circuit is connected to the negative terminal of the battery pack PACK- of the AFE chip, wherein, the current balance circuit includes a plurality of internal current balance circuits and a plurality of external current balance circuits, and a plurality of the internal current balance circuits are respectively connected to a plurality of pins on the AFE chip in one-to-one correspondence, and the external current balance circuit is respectively connected to two of the internal current balance circuits.

[0007] Further, each of the internal current balance circuits includes a first resistor and a first capacitor, one end of the first resistor is connected to the positive terminal of the battery, the other end of the first resistor is respectively connected to the AFE chip and one end of the first capacitor, and the other end of the first capacitor is grounded.

[0008] Further, each of the external current balance circuits includes a second resistor, a triode, a second capacitor and a third resistor, the collector of the triode is connected to the positive terminal of the battery through the second resistor, the emitter of the triode is connected to the negative terminal of the battery, one end of the second capacitor is connected to the base of the triode, the other end of the second capacitor is connected to the negative terminal of the battery, one end of the third resistor is connected to the base of the triode, and the other end of the third resistor is grounded.

[0009] Further, the triode is an NPN-type triode.

[0010] Further, the charging control enabling circuit includes MOS transistor Q10, MOS transistor Q12, capacitor C16, and zener diode D11. The drain of MOS transistor Q10 is connected to the drain of MOS transistor Q12. The gates of MOS transistor Q10 and MOS transistor Q12 are both connected to the sixteenth pin of the AFE chip through resistor R19. The source of MOS transistor Q10 is connected to the positive terminal of the battery pack PACK+. The source of MOS transistor Q12 is connected to the sixteenth pin of the AFE chip through resistor R17. One end of capacitor C16 is connected to the source of MOS transistor Q10, and the other end of capacitor C16 is connected to the source of MOS transistor Q12. The negative terminal of zener diode D11 is connected to the source of MOS transistor Q12, and the positive terminal of zener diode D11 is connected to the sixteenth pin of the AFE chip.

[0011] Further, the discharging control enabling circuit includes MOS transistor Q19, zener diode D12, and resistor R38. The drain of MOS transistor Q19 is connected to the negative terminal of the battery pack PACK-. The gate of MOS transistor Q19 is connected to the fifteenth pin of the AFE chip through resistor R34. The source of MOS transistor Q19 is connected to the drain of MOS transistor Q19 through capacitor C34. The positive terminal of zener diode D12 is connected to the source of MOS transistor Q19. The negative terminal of zener diode D12 is connected to the fifteenth pin of the AFE chip through resistor R34. One end of resistor R38 is connected to the source of MOS transistor Q19, and the other end of resistor R38 is connected to the fifteenth pin of the AFE chip through resistor R34.

[0012] Further, the AFE chip is a REF6107 chip.

[0013] The utility model according to the above solution has the beneficial effects as follows: A battery management system based on an AFE provided in an embodiment of the utility model includes a battery equalization driving circuit and an MCU unit. The battery equalization driving circuit includes an AFE chip, a current balancing circuit, a charging control enabling circuit, and a discharging control enabling circuit. The AFE chip is responsible for converting analog signals such as the voltage, current, and temperature of the battery into digital signals for further processing by the MCU unit. The MCU unit and the AFE chip are connected through an I2C bus. The I2C bus is a two-wire serial bus with advantages such as high communication rate, simple connection, and strong scalability. Through the I2C bus, the MCU unit can conveniently read the battery data collected by the AFE chip and issue control instructions as needed. At the same time, such a design also facilitates software allocation. The AFE chip is connected to the battery through the current balancing circuit. The charging control enabling circuit connects the AFE chip to the positive terminal PACK+ of the battery pack, and the discharging control enabling circuit connects the AFE chip to the negative terminal PACK- of the battery pack. Among them, the current balancing circuit includes a plurality of internal current balancing circuits and a plurality of external current balancing circuits. The plurality of internal current balancing circuits are respectively connected to a plurality of pins on the AFE chip in one-to-one correspondence, and the external current balancing circuits are respectively connected to two internal current balancing circuits. Through the coordinated control of the AFE chip and the current balancing circuit, and through the internal current balancing circuit and the external current balancing circuit, efficient equalization of each single battery in the battery pack is achieved, enabling each single battery to work in the best state, thereby improving the overall performance and lifespan of the battery pack. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for use in the embodiments or the description of the prior art. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0015] Figure 1 It is the circuit diagram of part A of the battery equalization driving circuit in the embodiment of the present utility model;

[0016] Figure 2 It is the circuit diagram of part B of the battery equalization driving circuit in the embodiment of the present utility model, where the circuit diagram of part A and the circuit diagram of part B together form a complete battery equalization driving circuit;

[0017] Figure 3 It is the circuit diagram of the current balancing circuit in the embodiment of the present utility model;

[0018] Figure 4 It is the circuit diagram of the charging control enabling circuit in the embodiment of the present utility model;

[0019] Figure 5 This is the circuit diagram of the discharge control enable circuit in the embodiment of the present utility model;

[0020] Figure 6 This is the circuit diagram of the seven batteries in the battery pack in the embodiment of the present utility model;

[0021] Figure 7 This is the circuit diagram of the positive and negative reverse connection protection circuit in the embodiment of the present utility model;

[0022] Figure 8 This is the schematic diagram of the circuit connection of the temperature sensor in the embodiment of the present utility model;

[0023] Figure 9 This is the circuit diagram of the storage circuit in the embodiment of the present utility model;

[0024] Figure 10 This is the circuit diagram of the display driving circuit in the embodiment of the present utility model;

[0025] Figure 11 This is the circuit diagram of the temperature detection circuit in the embodiment of the present utility model;

[0026] Figure 12 This is the circuit diagram of the log output interface circuit in the embodiment of the present utility model. Detailed implementation manners

[0027] The following further describes the implementation manners of the present utility model in detail with reference to the drawings and embodiments. The detailed description and drawings of the following embodiments are used to exemplarily illustrate the principle of the present utility model, but cannot be used to limit the scope of the present utility model, that is, the present utility model is not limited to the described embodiments.

[0028] For a better understanding of the present utility model, the present utility model is further described below with reference to the drawings and the implementation manners:

[0029] See Figure 1 and Figure 2As shown in the figure, a battery management system based on an AFE provided by an embodiment of the present utility model includes a battery equalization drive circuit and an MCU unit. The battery equalization drive circuit includes an AFE chip, a current balancing circuit, a charging control enabling circuit, and a discharging control enabling circuit. The MCU unit and the AFE chip are connected through an I2C bus; the AFE chip is connected to the battery through the current balancing circuit. The charging control enabling circuit connects the AFE chip to the positive terminal PACK+ of the battery pack, and the discharging control enabling circuit connects the AFE chip to the negative terminal PACK- of the battery pack. Among them, the current balancing circuit includes a plurality of internal current balancing circuits and a plurality of external current balancing circuits. The plurality of internal current balancing circuits are respectively connected to a plurality of pins on the AFE chip in one-to-one correspondence, and the external current balancing circuits are respectively connected to two internal current balancing circuits.

[0030] In this embodiment, the AFE chip is responsible for converting analog signals such as the voltage, current, and temperature of the battery into digital signals for further processing by the MCU unit. The MCU unit and the AFE chip are connected through an I2C bus; the I2C bus is a two-wire serial bus with advantages such as high communication rate, simple connection, and strong scalability. Through the I2C bus, the MCU unit can conveniently read the battery data collected by the AFE chip and issue control instructions as needed. At the same time, such a design also facilitates software deployment. The AFE chip is connected to the battery through the current balancing circuit. The charging control enabling circuit connects the AFE chip to the positive terminal PACK+ of the battery pack, and the discharging control enabling circuit connects the AFE chip to the negative terminal PACK- of the battery pack. Among them, the current balancing circuit includes a plurality of internal current balancing circuits and a plurality of external current balancing circuits. The plurality of internal current balancing circuits are respectively connected to a plurality of pins on the AFE chip in one-to-one correspondence, and the external current balancing circuits are respectively connected to two internal current balancing circuits. Through the coordinated control of the AFE chip and the current balancing circuit, and through the internal current balancing circuit and the external current balancing circuit, efficient equalization of each single battery in the battery pack is achieved, enabling each single battery to work in the best state, thereby improving the overall performance and lifespan of the battery pack.

[0031] See Figure 1 and Figure 3 shown in Figure 1 is the circuit diagram of part A of the battery equalization drive circuit; Figure 3 is the circuit schematic diagram of the current balancing circuit; See Figure 6As shown, the present utility model uses 7 cylindrical 18650 lithium-ion batteries connected in series to form a battery pack for providing and storing electrical energy. In this embodiment, 7 internal current balance circuits are provided. The 7 internal current balance circuits are respectively connected to the second pin, the third pin, the fourth pin, the fifth pin, the sixth pin, the seventh pin, and the eighth pin of the AFE chip. The internal current balance circuits are divided according to the pins from the second pin to the eighth pin of the chip. The 7 internal current balance circuits are respectively the first internal current balance circuit, the second internal current balance circuit, the third internal current balance circuit, the fourth internal current balance circuit, the fifth internal current balance circuit, the sixth internal current balance circuit, and the seventh internal current balance circuit. One end of the first internal current balance circuit is connected to the second pin of the AFE chip, and the other end of the first internal current balance circuit is connected to the positive terminal of the seventh battery. One end of the second internal current balance circuit is connected to the third pin of the AFE chip, and the other end of the second internal current balance circuit is connected to the positive terminal of the sixth battery or the negative terminal of the seventh battery. One end of the third internal current balance circuit is connected to the fourth pin of the AFE chip, and the other end of the third internal current balance circuit is connected to the positive terminal of the fifth battery or the negative terminal of the sixth battery. One end of the fourth internal current balance circuit is connected to the fifth pin of the AFE chip, and the other end of the fourth internal current balance circuit is connected to the positive terminal of the fourth battery or the negative terminal of the fifth battery. One end of the fifth internal current balance circuit is connected to the sixth pin of the AFE chip, and the other end of the fifth internal current balance circuit is connected to the positive terminal of the third battery or the negative terminal of the fourth battery. One end of the sixth internal current balance circuit is connected to the seventh pin of the AFE chip, and the other end of the sixth internal current balance circuit is connected to the positive terminal of the second battery or the negative terminal of the third battery. One end of the seventh internal current balance circuit is connected to the eighth pin of the AFE chip, and the other end of the seventh internal current balance circuit is connected to the positive terminal of the first battery or the negative terminal of the second battery.

[0032] In this embodiment, the AFE chip is a REF6107 chip. The REF6107 chip has an analog voltage output port (AFE_VAO), which can output an analog voltage signal. The MCU unit can configure the REF6107 chip through the I2C bus. The configuration content includes the temperature of the REF6107 chip, the voltage of each of the 4 to 7 batteries, and the analog quantity output setting of the voltage of the 4 to 7 battery pack. The MCU unit (microcontroller) receives the analog voltage output (AFE_VAO) from the REF6107 chip. The analog-to-digital converter (ADC) integrated inside the MCU unit converts these analog voltage signals into digital signals for further processing. The processed digital signals are sent to the display screen, and the display screen visually displays this information, enabling the user to intuitively understand the working status of the chip and the battery pack.

[0033] In this embodiment, each internal current balance circuit includes a first resistor and a first capacitor. One end of the first resistor is connected to the positive terminal of the battery, and the other end of the first resistor is respectively connected to the AFE chip and one end of the first capacitor. The other end of the first capacitor is grounded. Specifically, the first internal current balance circuit includes resistor R11 and capacitor C12. One end of resistor R11 is connected to the positive terminal of the seventh battery cell, and the other end of resistor R11 is respectively connected to the second pin of the AFE chip and one end of capacitor C12. The other end of capacitor C12 is grounded. The second internal current balance circuit includes resistor R14 and capacitor C18. One end of resistor R14 is connected to the positive terminal of the sixth battery cell, and the other end of resistor R14 is respectively connected to the third pin of the AFE chip and one end of capacitor C18. The other end of capacitor C18 is grounded. The third internal current balance circuit includes resistor R18 and capacitor C22. One end of resistor R18 is connected to the positive terminal of the fifth battery cell, and the other end of resistor R18 is respectively connected to the fourth pin of the AFE chip and one end of capacitor C22. The other end of capacitor C22 is grounded. The fourth internal current balance circuit includes resistor R25 and capacitor C25. One end of resistor R25 is connected to the positive terminal of the fourth battery cell, and the other end of resistor R25 is respectively connected to the fifth pin of the AFE chip and one end of capacitor C25. The other end of capacitor C25 is grounded. The fifth internal current balance circuit includes resistor R29 and capacitor C28. One end of resistor R29 is connected to the positive terminal of the third battery cell, and the other end of resistor R29 is respectively connected to the sixth pin of the AFE chip and one end of capacitor C28. The other end of capacitor C28 is grounded. The sixth internal current balance circuit includes resistor R32 and capacitor C30. One end of resistor R32 is connected to the positive terminal of the second battery cell, and the other end of resistor R32 is respectively connected to the seventh pin of the AFE chip and one end of capacitor C30. The other end of capacitor C30 is grounded. The seventh internal current balance circuit includes resistor R36 and capacitor C32. One end of resistor R36 is connected to the positive terminal of the first battery cell, and the other end of resistor R36 is respectively connected to the eighth pin of the AFE chip and one end of capacitor C32. The other end of capacitor C32 is grounded.

[0034] In this embodiment, the internal current balance circuit uses the REF6107 chip to balance the current. The REF6107 chip changes the resistance value of the first resistor according to preset parameters or external signals to balance the current. It should be noted that the maximum balanced current cannot exceed the maximum balanced current of the REF6107 chip, because excessive current may damage the REF6107 chip, the battery, or the entire system.

[0035] See Figure 3As shown in the figure, each external current balance circuit includes a second resistor, a triode, a second capacitor, and a third resistor. The collector of the triode is connected to the positive terminal of the battery through the second resistor, the emitter of the triode is connected to the negative terminal of the battery, one end of the second capacitor is connected to the base of the triode, the other end of the second capacitor is connected to the negative terminal of the battery, one end of the third resistor is connected to the base of the triode, and the other end of the third resistor is grounded. Specifically, the external current balance circuit between the first internal current balance circuit and the second internal current balance circuit is the first external current balance circuit, and the external current balance circuit between the second internal current balance circuit and the third internal current balance circuit is the second external current balance circuit, and so on. Seven external current balance circuits are divided in sequence. The first external current balance circuit includes resistor R12, triode Q11, capacitor C17, and resistor R13. The collector of triode Q11 is connected to the positive terminal of the seventh battery through resistor R12, the emitter of triode Q11 is connected to the negative terminal of the seventh battery, one end of capacitor C17 is connected to the base of triode Q11, the other end of capacitor C17 is connected to the negative terminal of the seventh battery, one end of resistor R13 is connected to the base of triode Q11, and the other end of resistor R13 is grounded through capacitor C18. In this embodiment, the circuit structures of the second external current balance circuit to the seventh external current balance circuit are the same as that of the first external current balance circuit. Therefore, they will not be elaborated in this embodiment.

[0036] In this embodiment, the triode is an NPN type triode.

[0037] See Figure 4 as shown in the figure, Figure 4 is the circuit diagram of the charging control enable circuit. The charging control enable circuit includes MOS transistor Q10, MOS transistor Q12, capacitor C16, and zener diode D11. The drain of MOS transistor Q10 is connected to the drain of MOS transistor Q12. The gates of MOS transistor Q10 and MOS transistor Q12 are both connected to the sixteenth pin of the AFE chip through resistor R19. The source of MOS transistor Q10 is connected to the positive terminal of the battery pack PACK+. The source of MOS transistor Q12 is connected to the sixteenth pin of the AFE chip through resistor R17. One end of capacitor C16 is connected to the source of MOS transistor Q10, and the other end of capacitor C16 is connected to the source of MOS transistor Q12. The negative electrode of zener diode D11 is connected to the source of MOS transistor Q12, and the positive electrode of zener diode D11 is connected to the sixteenth pin of the AFE chip.

[0038] Specifically, the MCU unit sends a charging command to the REF6107 chip via the I2C bus. Pin16 / CHG of the REF6107 chip controls the conduction of MOS transistor Q10 / MOS transistor Q12, achieving the charging of 4 - 7 batteries. The magnitude of the maximum charging current depends on the current that MOS transistor Q10 and MOS transistor Q12 can withstand and the number of MOS transistors. The more MOS transistors there are, the larger the charging current.

[0039] In this embodiment, if a single MOS transistor is sufficient to withstand the required charging current, there is no need to use multiple MOS transistors. If a single MOS transistor cannot withstand the required charging current, it is necessary to consider using multiple MOS transistors in parallel. When in parallel, it is necessary to ensure that the characteristics of all MOS transistors are similar to avoid problems caused by uneven current distribution.

[0040] See Figure 5 shown Figure 5 is the circuit diagram of the discharge control enabling circuit. The discharge control enabling circuit includes MOS transistor Q19, zener diode D12, and resistor R38. The drain of MOS transistor Q19 is connected to the negative terminal of the battery pack PACK-. The gate of MOS transistor Q19 is connected to the fifteenth pin of the AFE chip through resistor R34. The source of MOS transistor Q19 is connected to the drain of MOS transistor Q19 through capacitor C34. The positive terminal of zener diode D12 is connected to the source of MOS transistor Q19. The negative terminal of zener diode D12 is connected to the fifteenth pin of the AFE chip through resistor R34. One end of resistor R38 is connected to the source of MOS transistor Q19, and the other end of resistor R38 is connected to the fifteenth pin of the AFE chip through resistor R34.

[0041] In this embodiment, the MCU unit sends a charging command to the REF6107 chip via the I2C bus. Pin15 / DSG of the REF6107 chip controls the conduction of MOS transistor Q19, achieving the external discharge of the 4 - 7 battery pack.

[0042] See Figure 6 shown Figure 6 is the circuit diagram of the 7 batteries in the battery pack. The positive and negative electrodes of the 7 batteries are connected in sequence to form a series circuit. That is, the positive electrode of the first battery is used as the positive output of the battery pack, and the negative electrode of the last battery is used as the negative output of the battery pack. In this connection method, the total voltage of the battery pack is equal to the sum of the voltages of each battery.

[0043] See Figure 7 shown Figure 7 is the circuit diagram of the positive and negative reverse connection protection circuit. Setting up the positive and negative reverse connection protection circuit can prevent users from accidentally connecting the positive and negative poles in reverse when connecting a DC power supply, thus avoiding potential safety hazards such as circuit damage, battery over-discharge, and even fire.

[0044] See Figure 8 as shown Figure 8 As shown in the figure, it is a schematic diagram of the circuit connection of the temperature sensor. In this embodiment, a temperature sensor is provided, and the temperature sensor of the REF6107 chip is automatically calibrated through the on-board temperature sensor U53 / LM75BDP. It should be noted that the automatic calibration of the temperature sensor of the REF6107 chip is a prior art and will not be elaborated here.

[0045] See Figure 9 as shown Figure 9 As shown in the figure, it is the circuit diagram of the storage circuit. The MCU unit communicates with the EEPROM (Electrically Erasable Programmable Read-Only Memory) storage chip through the I2C (Inter-Integrated Circuit) bus to store key parameters and user data, ensuring that these key information can remain unchanged even after the MCU firmware is upgraded or the system is restarted, thus improving the reliability of the system.

[0046] See Figure 10 as shown Figure 10 As shown in the figure, it is the circuit diagram of the display driving circuit. The MCU unit drives a 2.8-inch / 240*320 resolution RGB display through SPI (Serial Peripheral Interface).

[0047] See Figure 11 as shown Figure 11 As shown in the figure, it is the circuit diagram of the temperature detection circuit. The temperature sensor is a lead type NTC, which is attached to the surface of the battery pack to monitor the temperature of the battery pack during charging and discharging. If the temperature is too high, the charging or discharging will be automatically turned off, and the over-temperature alarm status will be displayed to the user through the display screen.

[0048] See Figure 12 as shown Figure 12 As shown in the figure, it is the circuit diagram of the log output interface circuit. It is a common application to use the USB to UART chip CH340G to convert the UART interface of the MCU unit into a common Type-C USB interface, especially suitable for embedded devices that need to communicate through USB. CH340G is a highly integrated USB to serial bridge chip, supporting multiple baud rates and can be easily integrated into various systems based on the MCU unit. Users only need a standard USB Type-C cable to achieve debugging, configuration and log capture of the system.

[0049] It should be understood that for those of ordinary skill in the art, improvements or transformations can be made according to the above description, and all such improvements and transformations should fall within the protection scope of the appended claims of the present utility model.

[0050] The above describes the utility model patent by way of example in conjunction with the accompanying drawings. Obviously, the implementation of the utility model patent is not limited by the above methods. As long as various improvements are made by adopting the method concept and technical solution of the utility model patent, or the concept and technical solution of the utility model patent are directly applied to other occasions without improvement, they are all within the protection scope of the utility model.

Claims

1. A battery management system based on AFE, characterized in that, Comprising: A battery balancing drive circuit and an MCU unit. The battery balancing drive circuit includes an AFE chip, a current balancing circuit, a charging control enabling circuit, and a discharging control enabling circuit. The MCU unit and the AFE chip are connected through an I2C bus; the AFE chip is connected to the battery through the current balancing circuit, the charging control enabling circuit connects the AFE chip to the positive terminal PACK+ of the battery pack, and the discharging control enabling circuit connects the AFE chip to the negative terminal PACK- of the battery pack. Among them, the current balancing circuit includes a plurality of internal current balancing circuits and a plurality of external current balancing circuits. The plurality of internal current balancing circuits are respectively connected to a plurality of pins on the AFE chip in a one-to-one correspondence, and the external current balancing circuits are respectively connected to two of the internal current balancing circuits.

2. The AFE-based battery management system according to claim 1, wherein: Each of the internal current balancing circuits includes a first resistor and a first capacitor. One end of the first resistor is connected to the positive terminal of the battery, the other end of the first resistor is respectively connected to the AFE chip and one end of the first capacitor, and the other end of the first capacitor is grounded.

3. The AFE battery management system according to claim 2, characterized in that: Each of the external current balancing circuits includes a second resistor, a triode, a second capacitor, and a third resistor. The collector of the triode is connected to the positive terminal of the battery through the second resistor, the emitter of the triode is connected to the negative terminal of the battery, one end of the second capacitor is connected to the base of the triode, the other end of the second capacitor is connected to the negative terminal of the battery, one end of the third resistor is connected to the base of the triode, and the other end of the third resistor is grounded.

4. The AFE battery management system according to claim 3, wherein: The triode is an NPN-type triode.

5. The AFE-based battery management system according to claim 1, wherein: The charging control enabling circuit includes a MOS transistor Q10, a MOS transistor Q12, a capacitor C16, and a zener diode D11. The drain of the MOS transistor Q10 and the drain of the MOS transistor Q12 are connected. The gates of the MOS transistor Q10 and the MOS transistor Q12 are both connected to the sixteenth pin of the AFE chip through a resistor R19; the source of the MOS transistor Q10 is connected to the positive terminal PACK+ of the battery pack; the source of the MOS transistor Q12 is connected to the sixteenth pin of the AFE chip through a resistor R17. One end of the capacitor C16 is connected to the source of the MOS transistor Q10, the other end of the capacitor C16 is connected to the source of the MOS transistor Q12, the negative electrode of the zener diode D11 is connected to the source of the MOS transistor Q12, and the positive electrode of the zener diode D11 is connected to the sixteenth pin of the AFE chip.

6. The AFE battery management system according to claim 1, characterized in that: The discharge control enabling circuit includes an MOS transistor Q19, a zener diode D12, and a resistor R38. The drain of the MOS transistor Q19 is connected to the negative terminal of the battery pack PACK-. The gate of the MOS transistor Q19 is connected to the fifteenth pin of the AFE chip through the resistor R34. The source of the MOS transistor Q19 is connected to the drain of the MOS transistor Q19 through a capacitor C34. The positive terminal of the zener diode D12 is connected to the source of the MOS transistor Q19. The negative terminal of the zener diode D12 is connected to the fifteenth pin of the AFE chip through the resistor R34. One end of the resistor R38 is connected to the source of the MOS transistor Q19, and the other end of the resistor R38 is connected to the fifteenth pin of the AFE chip through the resistor R34.

7. The AFE-based battery management system according to claim 1, characterized in that: The AFE chip is a REF6107 chip.

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