High-definition EPID image acquisition circuit

By adjusting the accelerator dose rate and accurately controlling the exposure time, the problem of unstable imaging quality at the moment of beam exit of medical electronic linear accelerators is solved, high definition of EPID image acquisition is achieved, and image resolution and positioning accuracy are improved.

CN223127106UActive Publication Date: 2025-07-22ZHONGNENG MEDICAL ACCELERATOR SYST GUANGDONG CO LTD
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Patent Information

Application Number
CN202422036730.9
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-21
Publication Date
2025-07-22
Estimated Expiration
2034-08-21

AI Technical Summary

Technical Problem

In the prior art, the energy and dose rate climbing stage of the medical electronic linear accelerator during the instant of beam exit leads to unstable EPID imaging quality, and the software algorithms have poor effect on improving image clarity.

Method used

By setting the adjustment module to adjust the accelerator dose rate, the first timing module is used to avoid the energy and dose rate instability stages, and the exposure time is accurately controlled through the second timing module, and combined with the EPID image acquisition module, high-definition image acquisition is achieved.

Benefits of technology

It effectively improves the clarity of the EPID image acquisition, obtains higher resolution and contrast, and improves the accuracy of position information acquisition and positioning accuracy.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a high-definition EPID image acquisition circuit, which comprises an adjusting module, an accelerator, a first timing module, a second timing module and an EPID image acquisition module, the adjusting module is electrically connected with the accelerator and is used for adjusting the dosage rate of the accelerator; the first timing module is electrically connected with the accelerator, the EPID image acquisition module and the second timing module and is used for triggering the EPID image acquisition module in a delayed manner so as to avoid the energy and dose rate climbing stage of the accelerator; and the second timing module is also electrically connected with the accelerator and is used for setting the beam output duration of the accelerator. The dose rate of the accelerator can be in the optimal state of EPID image acquisition by arranging the adjusting module, the unstable stage of the energy and the dose rate of the accelerator can be avoided by arranging the first timing module, and the exposure time is accurately controlled through timing of the second timing module, so that the definition of the EPID image acquisition is effectively improved.
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Description

Technical Field

[0001] The utility model relates to the technical field of accelerators, and particularly relates to a high-definition EPID image acquisition circuit. Background Art

[0002] In a medical electron linear accelerator, as an electronic tool for obtaining field images in positioning verification, the imaging quality of the EPID plays a crucial role in the accuracy of positioning. Improving the clarity of EPID radiographs can obtain verification images with higher resolution and contrast, enabling more accurate acquisition of position information and improving the positioning accuracy.

[0003] Because there is an energy and dose rate ramp-up stage when the medical electron linear accelerator emits beams, the energy and dose rate in this stage are unstable, which will affect the imaging quality of the EPID. Tests show that the dose rate and exposure time also have a certain impact on the imaging quality of the EPID. In the prior art, most use software algorithms to obtain clearer images from the EPID, but this method does not change the clarity of the images acquired by the EPID. Summary of the Utility Model

[0004] In the prior art, when obtaining images from the EPID, the clarity of the images is generally improved through software algorithms, but the effect is not good.

[0005] In view of the above problems, a high-definition EPID image acquisition circuit is proposed. By setting an adjustment module, the beam dose rate of the accelerator can be in a state most suitable for EPID image acquisition. By setting a first timing module, the EPID image acquisition module can avoid the unstable stage of the accelerator energy and dose rate, and through the timing of the second timing module, the exposure time is accurately controlled, effectively improving the clarity of the images acquired by the EPID.

[0006] A high-definition EPID image acquisition circuit includes:

[0007] An adjustment module;

[0008] An accelerator;

[0009] A first timing module;

[0010] A second timing module;

[0011] An EPID image acquisition module;

[0012] The adjustment module is electrically connected to the accelerator and is used to adjust the dose rate of the accelerator;

[0013] The first timing module is electrically connected to the accelerator, the EPID image acquisition module, and the second timing module respectively, and is used to trigger the EPID image acquisition module with a time delay to avoid the energy and dose rate ramp-up stages of the accelerator;

[0014] The second timing module is also electrically connected to the accelerator and is used to set the beam output duration of the accelerator.

[0015] Combined with the high-definition EPID image acquisition circuit of the present invention, in the first possible implementation manner, the first timing module includes:

[0016] A first timing circuit;

[0017] A second timing circuit;

[0018] A first trigger circuit;

[0019] The first timing circuit, the second timing circuit, and the first trigger circuit are electrically connected in sequence;

[0020] The first trigger circuit is also electrically connected to the EPID image acquisition module.

[0021] Combined with the first possible implementation manner of the present invention, in the second possible implementation manner, the second timing module includes:

[0022] A third timing circuit;

[0023] A fourth timing circuit;

[0024] A second trigger circuit;

[0025] The third timing circuit, the fourth timing circuit, and the second trigger circuit are electrically connected in sequence;

[0026] The second trigger circuit is also electrically connected to the accelerator.

[0027] Combined with the second possible implementation manner of the present invention, in the third possible implementation manner, the first timing circuit and the second timing circuit respectively include a first timing chip and a second timing chip;

[0028] The first pin of the first timing chip is grounded, the second pin is connected to the input power supply, the third pin and the fifth pin are short-circuited and connected to the power supply, the fourth pin is connected to the accelerator to receive the trigger pulse, the sixth pin is suspended, the seventh pin is connected to the fourth pin of the second timing chip, and the sixth pin of the second timing chip is connected to the trigger chip pin of the first trigger circuit.

[0029] In combination with the third possible embodiment of the present utility model, in the fourth possible embodiment, the third timing circuit and the fourth timing circuit respectively include a third timing chip and a fourth timing chip;

[0030] The fourth pin of the third timing chip is electrically connected to the sixth pin of the second timing chip, the seventh pin of the third timing chip is electrically connected to the fourth pin of the fourth timing chip, and the sixth pin of the fourth timing chip is electrically connected to the trigger chip pin of the second trigger circuit.

[0031] In combination with the fourth possible embodiment of the present utility model, in the fifth possible embodiment, the chip pins and the peripheral circuit structures of the first timing chip, the second timing chip, the third timing chip, and the fourth timing chip are the same.

[0032] In combination with the fifth possible embodiment of the present utility model, in the sixth possible embodiment, the timing accuracy of the second timing module is at the microsecond level.

[0033] Implementing the high-definition EPID image acquisition circuit of the present utility model, by setting the adjustment module, the beam dose rate of the accelerator can be in the state most suitable for EPID image acquisition. By setting the first timing module, the EPID image acquisition module can avoid the unstable stages of the accelerator energy and dose rate, and through the timing of the second timing module, the exposure time can be accurately controlled, effectively improving the clarity of the EPID acquired images. Description of the Drawings

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0035] Figure 1 It is a schematic diagram of the module connection of the high-definition EPID image acquisition circuit in the present utility model;

[0036] Figure 2 It is a schematic diagram of the circuit connection of the first timing module and the second timing module in the present utility model;

[0037] The names of the parts referred to by the numbers in the drawings are: 100 - adjustment module, 200 - accelerator, 300 - first timing module, 400 - EPID image acquisition module, 500 - second timing module. Detailed Embodiment

[0038] The following will clearly and completely describe the technical solutions in the present utility model in conjunction with the accompanying drawings in the utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all embodiments. Based on the embodiments in the present utility model, other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present utility model belongs. The terms used herein in the description of the present utility model are only for the purpose of describing specific embodiments, and are not intended to limit the present utility model. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0040] It should be noted that when an element is referred to as "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0041] It should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0042] In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present application, "a plurality of" means two or more, unless otherwise specifically defined.

[0043] In the prior art, when obtaining an image from an EPID, generally, the clarity of the image is improved through software algorithms, but the effect is not good.

[0044] In view of the above problems, a high-definition EPID image acquisition circuit is proposed.

[0045] A high-definition EPID image acquisition circuit, as Figure 1 , Figure 1It is a schematic diagram of module connection of a high-definition EPID image acquisition circuit in the present utility model; it includes an adjustment module 100, an accelerator 200, a first timing module 300, a second timing module 500, and an EPID image acquisition module 400; the adjustment module 100 is electrically connected to the accelerator 200 and is used to adjust the dose rate of the accelerator 200; the first timing module 300 is respectively electrically connected to the accelerator 200, the EPID image acquisition module 400, and the second timing module 500, and is used to delay the triggering of the EPID image acquisition module 400 to avoid the energy and dose rate ramp-up stages of the accelerator 200; the second timing module 500 is also electrically connected to the accelerator 200 and is used to set the beam output duration of the accelerator 200. By setting the adjustment module 100, the beam output dose rate of the accelerator 200 can be in the state most suitable for EPID image acquisition. By setting the first timing module 300, the EPID image acquisition module 400 can avoid the unstable stages of the energy and dose rate of the accelerator 200, and through the timing of the second timing module 500, the exposure time can be accurately controlled, effectively improving the clarity of the EPID-acquired images.

[0046] The accelerator 200 provides MV-level X-rays for the EPID image acquisition module 400. When the accelerator 200 system enters the EPID image acquisition mode, the adjustment module 100 adjusts the dose rate of the accelerator 200 to the optimal dose rate gear for EPID imaging.

[0047] The optimal dose rate gear is a set of gears with the best EPID imaging quality selected by using multiple groups of dose rates for exposure under the condition that the exposure duration is certain and the energy and dose rate reach a stable state.

[0048] The beam output signal is given by the accelerator 200 console, and the accelerator 200 enters the beam output state. The beam output signal simultaneously triggers the first timing module 300 to delay for an appropriate time to completely avoid the unstable stages of the energy and dose rate of the accelerator 200.

[0049] Under the state of the optimal dose rate gear and a certain exposure time, the delay time of the first timing module 300 is debugged to obtain a set of the best delay times, so that the EPID imaging quality is the best.

[0050] After the delay of the first timing module 300 ends, it triggers the EPID image acquisition module 400 to start acquiring images. At this time, the EPID will acquire images at the optimal imaging dose rate to improve the clarity of the film shooting by the EPID image acquisition module 400.

[0051] After the delay of the first timing module 300 ends, while triggering the EPID image acquisition module 400 to start acquiring images, it also triggers the second timing module 500 to start timing. The second timing module 500 precisely controls the exposure time through microsecond-level precise timing, further improving the clarity of the radiographs taken by the EPID image acquisition module 400.

[0052] After the second timing module 500 finishes timing, it will trigger the accelerator 200 to stop emitting beams. Thereafter, the system will process the acquired images to finally obtain verification images with higher resolution and contrast.

[0053] Furthermore, as Figure 2 , Figure 2 is a schematic circuit connection diagram of the first timing module 300 and the second timing module 500 in the present utility model; the first timing module 300 includes a first timing circuit, a second timing circuit, and a first trigger circuit; the first timing circuit, the second timing circuit, and the first trigger circuit are electrically connected in sequence; the first trigger circuit is also electrically connected to the EPID image acquisition module 400.

[0054] Furthermore, as Figure 2 , the second timing module 500 includes a third timing circuit, a fourth timing circuit, and a second trigger circuit; the third timing circuit, the fourth timing circuit, and the second trigger circuit are electrically connected in sequence; the second trigger circuit is also electrically connected to the accelerator 200.

[0055] Specifically, as Figure 2 , the first timing circuit and the second timing circuit respectively include a first timing chip U1 and a second timing chip U2; the first pin of the first timing chip U1 is grounded, the second pin is connected to the input power supply, the third pin and the fifth pin are short-circuited and connected to the power supply, the fourth pin is connected to the accelerator 200 to receive trigger pulses, the sixth pin is suspended, the seventh pin is connected to the fourth pin of the second timing chip U2, and the sixth pin of the second timing chip U2 is connected to the trigger chip U3 pin of the first trigger circuit.

[0056] Specifically, as Figure 2 , the third timing circuit and the fourth timing circuit respectively include a third timing chip U4 and a fourth timing chip U5; the fourth pin of the third timing chip U4 is electrically connected to the sixth pin of the second timing chip U2, the seventh pin of the third timing chip U4 is electrically connected to the fourth pin of the fourth timing chip U5, and the sixth pin of the fourth timing chip U5 is electrically connected to the trigger chip U6 pin of the second trigger circuit.

[0057] Preferably, as Figure 2 , the chip pins and the peripheral circuit structures of the first timing chip U1, the second timing chip U2, the third timing chip U5, and the fourth timing chip U6 are the same.

[0058] Preferably, the timing accuracy of the second timing module 500 is at the microsecond level.

[0059] For the high-definition EPID image acquisition circuit implementing the present utility model, by setting the adjustment module 100, the beam dose rate of the accelerator 200 can be made to be in the state most suitable for EPID image acquisition. By setting the first timing module 300, the EPID image acquisition module 400 can avoid the unstable stages of the energy and dose rate of the accelerator 200. And through the timing of the second timing module 500, the exposure time can be precisely controlled, effectively improving the clarity of the EPID acquired images.

[0060] The above are only the preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A high-definition EPID image acquisition circuit, characterized in that, Including: Adjustment module; Accelerator; First timing module; Second timing module; EPID image acquisition module; The adjustment module is electrically connected to the accelerator and is used to adjust the dose rate of the accelerator; The first timing module is electrically connected to the accelerator, the EPID image acquisition module and the second timing module respectively, and is used to delay the trigger of the EPID image acquisition module to avoid the energy and dose rate ramp-up stages of the accelerator; The second timing module is also electrically connected to the accelerator and is used to set the beam output duration of the accelerator.

2. The high-definition EPID image acquisition circuit according to claim 1, characterized in that The first timing module includes: First timing circuit; Second timing circuit; First trigger circuit; The first timing circuit, the second timing circuit and the first trigger circuit are electrically connected in sequence; The first trigger circuit is also electrically connected to the EPID image acquisition module.

3. The high-definition EPID image acquisition circuit according to claim 2, characterized in that, The second timing module includes: Third timing circuit; Fourth timing circuit; Second trigger circuit; The third timing circuit, the fourth timing circuit and the second trigger circuit are electrically connected in sequence; The second trigger circuit is also electrically connected to the accelerator.

4. The high-definition EPID image acquisition circuit according to claim 3, wherein The first timing circuit and the second timing circuit respectively include a first timing chip and a second timing chip; The first pin of the first timing chip is grounded, the second pin is connected to the input power supply, the third pin and the fifth pin are short-circuited and connected to the power supply, the fourth pin is connected to the accelerator to receive a trigger pulse, the sixth pin is floating, the seventh pin is connected to the fourth pin of the second timing chip, and the sixth pin of the second timing chip is connected to the trigger chip pin of the first trigger circuit.

5. The high-definition EPID image acquisition circuit according to claim 4, characterized in that, The third timing circuit and the fourth timing circuit respectively include a third timing chip and a fourth timing chip; The fourth pin of the third timing chip is electrically connected to the sixth pin of the second timing chip, the seventh pin of the third timing chip is electrically connected to the fourth pin of the fourth timing chip, and the sixth pin of the fourth timing chip is electrically connected to the trigger chip pin of the second trigger circuit.

6. The high-definition EPID image acquisition circuit according to claim 5, characterized in that, The chip pins and the peripheral circuit structures of the first timing chip, the second timing chip, the third timing chip and the fourth timing chip are the same.

7. The high-definition EPID image acquisition circuit according to any one of claims 1-6, characterized in that, The timing accuracy of the second timing module is at the microsecond level.